Multilayer wiring substrate for probe card and probe card

Abstract

Provided is a multilayer wiring board for a probe card that prevents deterioration of a thin film resistor (30). A multilayer wiring board for a probe card (ST board) (15) is provided on a wiring path between an external terminal (120) of a probe card (100) and a probe (17), and has a base insulating film (41) formed on an upper surface, and includes: a thin film resistor (30) including a thin film formed on the base insulating film (41) and connected to a pair of connection electrodes (33); a buried heat sink (31) buried in opposition to the thin film resistor (30) across the base insulating film (41) and including a material having a higher thermal conductivity than the base insulating film (41); and a cover insulating film (43) formed in a region corresponding to the thin film resistor (30) and covering the thin film resistor (30), the buried heat sink (31) having a heat dissipation portion (50) not covered by the base insulating film (41) outside the region in which the cover insulating film (43) is formed.

Description

Technical Field

[0001] This invention relates to a multilayer wiring substrate for probe cards and a probe card, and more specifically, to an improvement of a multilayer wiring substrate for probe cards having a thin-film resistor disposed on the wiring path between the external terminals and probes of the probe card. Background Technology

[0002] A probe card is an inspection device used to check the electrical characteristics of semiconductor devices formed on semiconductor wafers. It consists of numerous probes arranged on a multilayer wiring substrate, each contacting an electrode pad on the semiconductor wafer. The electrical characteristics of the semiconductor device are checked by connecting a test instrument that inputs and outputs test signals to the semiconductor device via the probes and the multilayer wiring substrate.

[0003] On the wiring circuit of a multilayer wiring board, a thin-film resistor is provided as a resistive element for impedance matching, power control, etc. The thin-film resistor is configured to be sandwiched between upper and lower insulating layers. The thin-film resistor is made of a metallic material such as a nickel-chromium (Ni-Cr) alloy, and the insulating layers are made of a resin material such as polyimide synthetic resin. Such thin-film resistors are susceptible to deterioration due to changes in ambient temperature caused by thermal cycling tests, and due to heat generated by the thin-film resistor itself during inspection.

[0004] Generally, the coefficient of linear expansion of resin materials is greater than that of metallic materials. Therefore, for example, in applications involving thermal cycling tests, there is a problem where the thin-film resistive element deteriorates due to thermal stress caused by the difference in the coefficients of linear expansion between the resistive element and the insulating film. For example, problems may arise such as wrinkles forming in the thin-film resistive element and changes in resistance value. Furthermore, because the thin-film resistive element is sandwiched between insulating layers containing a resin material with low thermal conductivity, the heat generated during inspection may not be released to the outside but instead trapped between the insulating layers, leading to further deterioration of the thin-film resistive element. For example, there is a problem where the thin-film resistive element may melt.

[0005] Therefore, in multilayer wiring substrates for probe cards, a method has been proposed to suppress the degradation of thin-film resistivity caused by thermal stress (for example, Patent Document 1). Figure 11This is an explanatory diagram schematically showing the main parts of a conventional multilayer wiring substrate 6A for probe cards. The illustrated multilayer wiring substrate 6A has first to third insulating layers 611 to 613 stacked sequentially, a thin-film resistor 600 formed on a second insulating layer 612, and a thermal expansion suppression layer 601 formed directly below the thin-film resistor 600, with the second insulating layer 612 interposed therebetween. The thermal expansion suppression layer 601, which contains a metallic material, has a smaller coefficient of linear expansion than the insulating layers 611 to 613, which contain a resin material. By providing such a thermal expansion suppression layer 601, thermal stress generated in the thin-film resistor 600 due to the difference in linear expansion rates between the insulating layers 611 to 613 and the metal layer 601 can be suppressed.

[0006] However, since the thermal expansion suppression layer 601 is embedded between the first insulating layer 611 and the second insulating layer 612, it cannot be expected to promote heat dissipation of the thin-film resistor 600 through the thermal expansion suppression layer 601. In other words, it cannot cope with the heat generated in the thin-film resistor 600 during inspection. Therefore, the following problems exist: the effect of preventing degradation caused by thermal stress is limited, and it cannot prevent the thin-film resistor 600 from melting, etc.

[0007] Therefore, a method has been proposed to prevent the thin film resistor 600 from melting due to heat during inspection (for example, Patent Document 2). Figure 12 This is an explanatory diagram schematically showing the main parts of a conventional multilayer wiring substrate 6B for probe cards. In the illustrated multilayer wiring substrate 6B, a base portion 602 is formed directly below the thin-film resistor 600, with a second insulating film 612 sandwiched therebetween, and a heat dissipation portion 603 is formed directly above the thin-film resistor 600, with a third insulating film 613 sandwiched therebetween. Furthermore, the base portion 602 and the heat dissipation portion 603 are connected by a connecting portion 604.

[0008] The base portion 602, heat dissipation portion 603, and connecting portion 604 are all made of metallic material, which has a smaller coefficient of linear expansion and higher thermal conductivity compared to the insulating layers 611-613 made of resin material. In other words, the base portion 602 acts as a thermal expansion suppression layer 601, preventing deterioration of the thin-film resistor 600 due to thermal stress. Furthermore, the heat generated in the thin-film resistor 600 can be dissipated into the atmosphere through the base portion 602 and connecting portion 604 via the heat dissipation portion 603, thus preventing the thin-film resistor 600 from melting or other defects.

[0009] Prior art literature

[0010] Patent documents

[0011] Patent Document 1: JP Japanese Patent Application Publication No. 2014-089089

[0012] Patent Document 2: JP Japanese Patent Application Publication No. 2017-201263 Summary of the Invention

[0013] The problem the invention aims to solve

[0014] In the existing multilayer wiring substrate 6B, in order to connect the base portion 602 and the heat dissipation portion 603, a connecting portion 604 that passes through the second insulating layer 612 and the third insulating layer 613 is required, which causes the structure to become complicated.

[0015] Furthermore, because the third insulating layer 613 is formed thick, it is difficult to form such a connection portion 604. For insulating layers 611 to 613, the uppermost layer must be formed on a surface with a larger unevenness, and it needs to be formed thicker to ensure coverage of the unevenness. In particular, on the thin-film resistor 600, a pair of electrodes (not shown) and an insulating layer (not shown) defining the effective length of the thin-film resistor 600 are formed repeatedly. Therefore, the third insulating layer 613 needs to be formed on a surface with a large unevenness and needs to be thicker than the first and second insulating layers 611 and 612. As a result, the heat of the thin-film resistor 600 is more easily transferred to the base portion 602 via the second insulating layer 612 than to the heat dissipation portion 603 via the third insulating layer 613, and the connection portion 604 for transferring heat from the base portion 602 to the heat dissipation portion 603 needs to be made. For the same reason, there is a problem that it is difficult to form a connection portion 604 for a through-hole wiring that passes through the second insulating layer 612 and the third insulating layer 613. For example, there is a problem that it is difficult to fill the through-hole with metal material without creating voids.

[0016] In other words, if the degradation of thin-film resistors is to be prevented, the structure of the multilayer wiring substrate for probe cards will become more complex, making its manufacturing more difficult and leading to problems such as increased manufacturing costs and reduced reliability.

[0017] The present invention was made in view of the above-mentioned issues, and its object is to provide a multilayer wiring substrate for a probe card that can prevent the degradation of thin-film resistors. Furthermore, the object is to provide a highly reliable multilayer wiring substrate for a probe card at a low cost. Ultimately, the object is to provide a probe card equipped with such a multilayer wiring substrate.

[0018] Methods for solving problems

[0019] The probe card multilayer wiring substrate of the first embodiment of the present invention is disposed on the wiring path between the external terminal of the probe card and the probe, and a base insulating film is formed on the upper surface. The probe card multilayer wiring substrate includes: a thin film resistor comprising a thin film formed on the base insulating film and connected to a pair of connecting electrodes; and a buried heat sink, which is buried opposite to the thin film resistor through the base insulating film and comprises a material with a higher thermal conductivity than the base insulating film. The buried heat sink extends outside the formation area of ​​the thin film resistor and has a heat dissipation portion not covered by the base insulating film.

[0020] By employing this structure, the heat generated in the thin-film resistor is transferred to the embedded heat sink via the substrate insulating film, and further released to the outside via the heat dissipation section of the embedded heat sink that is not covered by the substrate insulating film. Therefore, heat is not trapped in the embedded heat sink, heat dissipation of the thin-film resistor is achieved, and degradation of the thin-film resistor can be prevented.

[0021] The probe card multilayer wiring substrate of the second embodiment of the present invention is configured in addition to the above structure as follows: a covering insulating film is formed in a region corresponding to the thin film resistor, and a portion of the base insulating film is formed to cover the thin film resistor and expose the base insulating film, and the heat dissipation portion of the embedded heat sink is formed outside the region where the covering insulating film is formed.

[0022] By employing this structure, the insulating film is formed in the region corresponding to the thin-film resistor, while the heat dissipation portion, where the heat sink is embedded, is formed outside the region where the insulating film is formed. Therefore, there is no need to form a through-hole penetrating the insulating film, allowing for a simple construction and easy manufacturing. Consequently, reliability can be improved while controlling manufacturing costs.

[0023] The probe card multilayer wiring substrate of the third embodiment of the present invention is configured based on the above structure, comprising: an exposed heat sink, a given area deposited on the heat dissipation portion and the substrate insulating film adjacent to the heat dissipation portion, and comprising a material with a higher thermal conductivity than the substrate insulating film, wherein the given area of ​​the exposed heat sink is connected to the embedded heat sink via the heat dissipation portion.

[0024] By employing such a structure, the heat from the buried heat sink can be efficiently released to the outside via the exposed heat sink, which has a larger surface area than the heat dissipation section. Furthermore, since the step difference between a given area and the heat dissipation section is comparable to the thickness of the substrate insulating film, the step coverage capability between the given area and the heat dissipation section can be easily ensured when forming the exposed heat sink.

[0025] The probe card multilayer wiring substrate of the fourth embodiment of the present invention is configured such that the exposed heat sink and the connection electrode are formed simultaneously.

[0026] By adopting such a structure, connecting electrodes and exposed heat sinks can be formed in the same manufacturing process, without complicating the manufacturing process.

[0027] The probe card multilayer wiring substrate of the fifth embodiment of the present invention is configured based on the above structure, and includes: a protective film formed opposite to a thin film resistor through the covering insulating film, and the exposed heat sink being formed simultaneously with the protective film.

[0028] By employing such a structure, a protective film and exposed heat sink can be formed in the same manufacturing process, allowing for the formation of an exposed heat sink without complicating the manufacturing process. Furthermore, by including the protective film, for example, thermal expansion and contraction of the covering insulating film can be suppressed, or the thin-film resistor can be protected from laser damage.

[0029] The probe card multilayer wiring substrate of the sixth embodiment of the present invention is configured such that the exposed heat sink is simultaneously deposited on the heat dissipation portion, on the covering insulating film, and on a given area of ​​the base insulating film that is adjacent to the heat dissipation portion and the covering insulating film, respectively. The covering insulating film has a protective area as a region opposite to the thin film resistor, and the protective area is connected to the buried heat sink through the given area.

[0030] By employing this structure, heat from the embedded heat sink can be released to the outside more efficiently via the exposed heat sink, which has a larger surface area. Furthermore, because a step difference equivalent to the thickness of the substrate insulating film is formed between the heat dissipation section and the given area, and further, a step difference equivalent to the thickness of the cover insulating film is formed between the given area and the cover insulating film, the exposed heat sink can be formed more easily compared to forming via wiring that penetrates both the substrate and cover insulating films. Moreover, the exposed heat sink provides a protective area, which can, for example, suppress thermal expansion and contraction of the cover insulating film, or protect the thin-film resistor from laser damage.

[0031] The probe card multilayer wiring substrate of the seventh embodiment of the present invention is configured such that the pair of connecting electrodes are disposed at both ends of the thin film resistor in a first direction, and the heat dissipation portion is formed in a second direction that intersects the first direction when viewed from the thin film resistor.

[0032] The probe card multilayer wiring substrate of the eighth embodiment of the present invention is configured such that two or more of the thin film resistors are arranged apart from each other in a second direction, and the embedded heat sink extends in the second direction and is embedded opposite to the two or more thin film resistors respectively.

[0033] By adopting this structure, the buried heat sink can be shared for two or more thin-film resistors, eliminating the need for a separate heat sink for each thin-film resistor. Therefore, it is possible to arrange the thin-film resistors and connecting electrodes at a high density, and to configure probes with a narrow pitch.

[0034] The probe card multilayer wiring substrate of the ninth embodiment of the present invention is configured such that the substrate insulating film comprises an insulating resin material, based on the above structure.

[0035] The probe card multilayer wiring substrate of the tenth embodiment of the present invention is configured such that the exposed heat sink comprises a metal material formed by plating.

[0036] The probe card of the 11th embodiment of the present invention is configured by erecting the probe on the multilayer wiring substrate for the probe card.

[0037] Invention Effects

[0038] According to the present invention, a multilayer wiring substrate for probe cards that can prevent degradation of thin-film resistors can be provided. Furthermore, a multilayer wiring substrate for probe cards with high reliability can be provided at a low cost. Further, a probe card having such a multilayer wiring substrate can be provided. Attached Figure Description

[0039] Figure 1 This is a diagram illustrating an example of the schematic configuration of the probe card 100 according to Embodiment 1 of the present invention.

[0040] Figure 2 It means Figure 1 A diagram showing a structural example of the main part of the ST substrate 15.

[0041] Figure 3 It means Figure 1 A diagram showing a structural example of the main part of the ST substrate 15.

[0042] Figure 4 It is a schematic representation Figure 1 A figure showing an example of a manufacturing method for the ST substrate 15.

[0043] Figure 5 It is a schematic representation Figure 1 A figure showing an example of a manufacturing method for the ST substrate 15.

[0044] Figure 6 It is a schematic representation Figure 1 A figure showing an example of a manufacturing method for the ST substrate 15.

[0045] Figure 7 It means Figure 1 Figure 15 shows other structural examples of the main part of the ST substrate 15.

[0046] Figure 8 This is a diagram showing a structural example of the main parts of the ST substrate 15 according to Embodiment 2 of the present invention.

[0047] Figure 9 This is a diagram showing a structural example of the main parts of the ST substrate 15 according to Embodiment 3 of the present invention.

[0048] Figure 10 This is a diagram showing a structural example of the main parts of the ST substrate 15 according to Embodiment 4 of the present invention.

[0049] Figure 11 This is an illustrative diagram schematically showing the main parts of a conventional probe card multilayer wiring substrate 6A.

[0050] Figure 12 This is an illustrative diagram schematically showing the main parts of a conventional probe card multilayer wiring substrate 6B. Detailed Implementation

[0051] Implementation method 1.

[0052] (1) Probe card 100

[0053] Figure 1 This is a diagram illustrating an example of the schematic configuration of the probe card 100 according to Embodiment 1 of the present invention, showing the probe card 100 and a semiconductor wafer 20 disposed on a movable stage 21 of a wafer detector and disposed opposite to the probe card 100.

[0054] The probe card 100 is an inspection device that performs electrical connection checks on the electrical characteristics of the object being inspected. A large number of electrode pads 22 are formed on the semiconductor wafer 20, which is the object being inspected. A large number of probes 17 are disposed on the lower surface of the probe card 100, corresponding to and contacting each electrode pad 22. The illustrated probe card 100 includes a main substrate 12, a reinforcing plate 13, a connecting substrate 14, an ST (space converter) substrate 15, a support member 16, and two or more probes 17.

[0055] The main substrate 12 is a wiring substrate detachably mounted on the chip detector, for example, a circular glass epoxy resin substrate. The main substrate 12 is generally horizontally arranged, and a reinforcing plate 13 is mounted on the center of its upper surface. The reinforcing plate 13 is a reinforcing member for suppressing strain on the main substrate 12, for example, a metal block containing stainless steel. Two or more external terminals 120 for connecting signal terminals of a test instrument (not shown) are provided on the outer periphery of the upper surface of the main substrate 12, and are connected to a connection terminal 121 provided in the center of the lower surface of the main substrate 12.

[0056] The connecting substrate 14 is disposed between the main substrate 12 and the ST substrate 15, and is a connecting component between the substrates that enables the wiring of the main substrate 12 and the wiring of the ST substrate 15 to conduct. For example, it has a large number of spring pins 140. The spring pins 140 are plunger pins that extend and retract freely through the connecting substrate 14 in the vertical direction, so as to connect the connecting terminals 121 of the main substrate 12 and the connecting terminals 150 of the ST substrate 15.

[0057] ST substrate 15 is a multilayer wiring substrate that allows for varying electrode spacing, and is disposed on the lower surface of main substrate 12. Connecting terminals 150 are provided on the upper surface of ST substrate 15, and two or more probe electrode pads 151 are provided on the lower surface of ST substrate 15. The probe electrode pads 151 are electrodes that connect to probes 17 and are arranged at a spacing corresponding to the probes 17. Furthermore, the probe electrode pads 151 are connected via wiring circuitry within ST substrate 15 to the connecting terminals 150, which are arranged with a wider spacing, and are further connected via spring pins 140 and connecting terminals 121 to external terminals 120 of the main substrate 12, which are arranged with an even wider spacing.

[0058] ST substrate 15 includes a ceramic substrate 152 and a laminated structure 153. Since ceramics are less prone to strain compared to materials like glass and epoxy resin, strain in ST substrate 155 can be suppressed by using the ceramic substrate 152. Furthermore, the ceramic substrate 152 can be a single ceramic plate, but strain can also be further suppressed by using a laminate formed by bonding two or more ceramic plates together.

[0059] The laminated structure 153 is formed by laminating two or more insulating layers on the lower surface of the ceramic substrate 152. For example, a synthetic resin with polyimide as the main component is used for each insulating layer. Wiring patterns are formed between adjacent insulating layers, and the wiring patterns are connected to each other through vias that penetrate the insulating layers, forming a wiring circuit that enables the connection terminal 150 and the probe electrode pad 151 to conduct electricity.

[0060] The support member 16 includes one or more guide plates 160, 161 for guiding the probe 17 and spacers 162 for fixing the guide plates 160, 161 to the ST substrate 15. A number of through holes (not shown) are formed in the guide plates 160, 161 for inserting the probe 17, and the front end of the probe 17 is supported in a way that allows it to move up and down.

[0061] Probe 17 is a vertical probe with an elongated shape and contains a conductive material. The upper end of probe 17 is configured to contact probe electrode pads 151. Furthermore, the lower end of probe 17 contacts electrode pads 22 on semiconductor wafer 20 by bringing semiconductor wafer 20 close to probe card 100.

[0062] (2) ST substrate 15

[0063] Figure 2 as well as Figure 3 It means Figure 1 A diagram showing a structural example of the main portion of the ST substrate 15. These diagrams illustrate how... Figure 1 The ST substrate 15 is flipped up and down. Therefore, in the following description of the ST substrate 15, Figure 1 The lower part is referred to as the upper part in the description. Furthermore, in these figures, only a portion of the upper surface of the laminated structure 153 constituting the ST substrate 15 is shown; the other portions of the laminated structure 153 located further below and the ceramic substrate 152 are omitted. Additionally, both the first direction D1 and the second direction D2 are parallel to and orthogonal to the main surface of the ST substrate 15. However, the first direction D1 and the second direction D2 may not be orthogonal as long as they intersect each other.

[0064] Figure 2 (a) is a plan view showing the layout of each component when viewed from above on the ST substrate 15. Figure 2 (b) indicates that by Figure 2 The cross-sectional view (AA section view) is a cross-sectional view of the section cut by the AA cutting line in (a). The AA cutting line extends in the first direction D1 and is a straight line passing through the thin film resistor 30 and the pair of connecting electrodes 33. Hereinafter, reference will be made mainly to... Figure 2 Let's use (b) to explain.

[0065] Insulating film 40 is formed on the entire surface of ST substrate 15, while insulating films 41-43 are formed in regions corresponding to thin-film resistor 30. These insulating films 40-43 are layers containing insulating material, for example, formed by patterning using photolithography after coating with a synthetic resin primarily composed of polyimide and thermally curing. Alternatively, other insulating materials can be used for insulating films 40-43, and even different insulating materials can be used.

[0066] The thin-film resistor 30 is a resistive element formed as a thin film on the substrate insulating film 41. It uses a conductive metal material with a given resistivity, such as a nickel-chromium (Ni-Cr) alloy, which has a lower coefficient of linear expansion and higher thermal conductivity compared to the insulating films 40-43. The thin-film resistor 30 is formed in an elongated region with the first direction D1 as its long side, and a pair of connecting electrodes 33 are formed near both ends of the long side.

[0067] The embedded heat sink 31 is a heat dissipation component that is positioned opposite the thin-film resistor 30, separated from the substrate insulating film 41. For example, it is made of a metal material such as copper (Cu), which has a lower coefficient of linear expansion and higher thermal conductivity compared to the insulating films 40-43. The embedded heat sink 31 is embedded in the lower insulating film 40 that constitutes the laminated structure 153. A recess is formed on the upper surface of the lower insulating film 40, and the embedded heat sink 31 is formed in the recess while protruding from the upper surface of the lower insulating film 40.

[0068] A pair of wiring electrodes 32 are part of the wiring circuit within the ST substrate 15, using a low-resistance conductive metal material, such as copper (Cu). The wiring electrodes 32 are disposed away from the buried heat sink 31 and embedded in the lower insulating film 40. That is, similar to the buried heat sink 31, the wiring electrodes 32 are formed within a recess in the lower insulating film 40, protruding from the upper surface of the lower insulating film 40, thus separating the lower insulating film 40 from the buried heat sink 31. Furthermore, the wiring electrodes 32 are connected to the connection terminal 150 via a wiring pattern or via (not shown).

[0069] A pair of connecting electrodes 33 are connecting components that connect the two ends of the thin-film resistor 30 to a pair of wiring electrodes 32 respectively. They are made of a low-resistance conductive metal material, such as copper (Cu). The connecting electrodes 33 have a shape that extends in the first direction D1, with one end formed on the thin-film resistor 30 and the other end formed on the wiring electrode 32. They pass through the upper and lower insulating films 41 and the substrate insulating film 40, making the thin-film resistor 30 and the wiring electrode 32 conductive.

[0070] The protective film 34 is a thin film used to suppress thermal stress generated on the thin-film resistor 30 or to protect the thin-film resistor 30 from laser damage. It is formed on the covering insulating film 43 opposite to the thin-film resistor 30. The protective film 34 is made of a metallic material, such as gold (Au) or nickel (Ni), which has a lower coefficient of thermal expansion and better light reflection characteristics than the covering insulating film 43. It is formed in the area corresponding to the thin-film resistor 30 and substantially covers the thin-film resistor 30. By providing such a protective film 34, the thermal expansion and contraction of the covering insulating film 43 can be suppressed, and the deterioration of the thin-film resistor 30 due to thermal stress can be suppressed. Furthermore, in the case of irradiating the probe 17 with a laser to bond the probe electrode pad 151, damage to the thin-film resistor 30 due to the irradiated laser can be prevented.

[0071] The base insulating film 41 is formed by covering and embedding the heat sink 31 directly below and around the thin film resistor 30, so that the embedded heat sink 31 is insulated from the thin film resistor 30 and the connecting electrode 33.

[0072] The separating insulating film 42 is an insulating film that defines the effective length of the thin-film resistor 30 and is formed on the thin-film resistor 30. The separating insulating film 42 extends along the second direction D2, near the center of the long side of the thin-film resistor 30. A pair of connecting electrodes 33 are positioned with one end on the separating insulating film 42 and are disposed away from each other on the separating insulating film 42. Therefore, the width of the separating insulating film 42 in the first direction D1 becomes the effective length of the thin-film resistor 30, and the resistance value of the thin-film resistor 30 is defined by the shape of the separating insulating film 42.

[0073] The cover insulating film 43 is an insulating film covering the thin-film resistor 30, formed in the region corresponding to the thin-film resistor 30, for example, formed in the forming region of the thin-film resistor 30 and its surrounding region. The cover insulating film 43 is formed on the connecting electrode 33, the substrate insulating film 41, and the separation insulating film 42. A portion of the connecting electrode 33 is covered by the cover insulating film 43, while other areas are exposed from the cover insulating film 43, and can be used as probe electrode pads 151. The thin-film resistor 30 and the separation insulating film 42 are completely covered by the cover insulating film 43.

[0074] Figure 3 (a) is to make with Figure 2 (a) A plan view showing the same plan layout rotated 90°. Figure 3 (b) indicates that by Figure 3 A cross-sectional view of the section when the B1-B1 cut line is cut in (a) (B1-B1 section view). The B1-B1 cut line is a straight line that extends in the second direction D2 and passes through the thin film resistor 30 and exposes the heat sink 35.

[0075] The heat dissipation portion 50 is the area where the embedded heat sink 31 is not covered by the substrate insulating film 41. The embedded heat sink 31 is opposite to the thin film resistor 30 and extends in the second direction D2 outside the formation area of ​​the thin film resistor 30. The heat dissipation portion 50, which is away from the thin film resistor 30, is exposed from the substrate insulating film 41.

[0076] The exposed area 51 is the area of ​​the base insulating film 41 that is not covered by the covered insulating film 43. The base insulating film 41 is formed corresponding to the embedded heat sink 31, opposite to the thin film resistor 30, and extends in the second direction D2 outside the formation area of ​​the thin film resistor 30, and is exposed from the covering insulating film 43 in the exposed area 51 away from the thin film resistor 30.

[0077] In other words, the base insulating film 41 and the edge of the cover insulating film 43 intersect and extend in the second direction D2, forming an exposed area 51 outside the area where the cover insulating film 43 is formed. Furthermore, the embedded heat sink 31 also extends in the second direction D2, intersecting the edge of the base insulating film 41, forming a heat dissipation portion 50 outside the area where the base insulating film 41 is formed. Therefore, the heat dissipation portion 50 is formed away from the cover insulating film 43, and the exposed area 51 becomes an area adjacent to both the cover insulating film 43 and the heat dissipation portion 50. A height difference is formed at the boundary between the heat dissipation portion 50 and the exposed area 51, the height of which is equivalent to the thickness of the base insulating film 41. Furthermore, the heat dissipation portion 50 is adjacent to the upper surface of the lower insulating film 40 on the opposite side of the exposed area 51, and its boundary forms a height difference smaller than the height difference between it and the exposed area 51, or it is flat without a height difference.

[0078] The exposed heat sink 35 is a heat dissipation component connected to the embedded heat sink 31. It can be made of a material with a higher thermal conductivity than the insulating films 40-43, such as copper (Cu), gold (Au), or nickel (Ni). The exposed heat sink 35 is formed on the heat dissipation portion 50, and also on the exposed area 51 adjacent to the heat dissipation portion 50 and on the lower insulating film 40. In other words, the exposed heat sink 35 includes the heat dissipation portion 50 and is formed in a region wider than the heat dissipation portion 50. Therefore, a heat dissipation surface with a larger surface area than the heat dissipation portion 50 can be ensured, resulting in higher heat dissipation efficiency compared to not having the exposed heat sink 35. Furthermore, no height difference is formed at the outer edge of the heat dissipation portion 50, or only a small height difference is formed, thus allowing for easy formation of an exposed heat sink 35 with a larger area than the heat dissipation portion 50 while ensuring stepped coverage. By providing the heat dissipation portion 50 outside the area covering the insulating film 43, it can be positioned sufficiently away from the thin-film resistor 30, which serves as a heat source, thereby improving heat dissipation efficiency. Furthermore, the exposed heat sink 35 can be formed simultaneously with the connecting electrode 33 or the protective film 34, thus enabling its formation without complicating the manufacturing process.

[0079] (3) Manufacturing method

[0080] Figures 4-6 It is a schematic representation Figure 1 This figure shows an example of a manufacturing method for the ST substrate 15. (a1) to (a11) in the figure represent the manufacturing processes. Figure 2 (a) is a cross-sectional view at the AA cut line, where (b1) to (b11) represent the manufacturing process. Figure 3 The cross-sectional view at the B1-B1 cut line in (a) shows the state of the manufacturing process in a time sequence.

[0081] Figures (a1) and (b1) show the state in which recesses 31h and 32h are formed on the upper surface of the lower insulating film 40. Recesses 31h and 32h are formed using photolithography after the formation of the lower insulating film 40. Recess 31h is a groove corresponding to the buried heat sink 31, and recess 32h is a groove corresponding to the wiring electrode 32, and are formed as mutually separate grooves.

[0082] Figures (a2) and (b2) show the state after depositing a wiring material, such as copper (Cu), on the lower insulating film 40 and then grinding the surface to make it flat. Wiring material 301 is embedded in the recesses 31h and 32h, simultaneously forming a heat sink 31 and a wiring electrode 32. The upper surfaces of the heat sink 31 and the wiring electrode 32 are aligned with the upper surface of the lower insulating film 40 and are exposed from the lower insulating film 40.

[0083] The state in which the substrate insulating film 41 is formed is shown in (a3) ​​and (b3). The substrate insulating film 41 is patterned using photolithography after being formed on the entire surface of the substrate. The substrate insulating film 41 is formed by covering the buried heat sink 31 in the area corresponding to the thin film resistor 30 and the connecting electrode 33. On the other hand, it is not formed on the heat dissipation portion 50 that is separated from the thin film resistor 30 in the second direction D2, but the buried heat sink 31 is exposed.

[0084] The states of forming the resistor film 302 and photoresist 501 are shown in (a4) and (b4), and the states of forming the thin film resistor 30 are shown in (a5) and (b5). The thin film resistor 30 is obtained by patterning the resistor film 302 using photoresist 501. The resistor film 302 is a thin film formed on the entire surface of the substrate, for example, formed by depositing a nickel-chromium (Ni-Cr) alloy. Furthermore, photoresist 501 is formed on the thin film resistor 30, and patterning is performed with openings outside the formation area of ​​the thin film resistor 30. Afterwards, if the resistor film 302 exposed by etching is removed, and the photoresist 501 is further removed, the thin film resistor 30 is formed on the substrate insulating film 41.

[0085] The state in which the separation insulating film 42 is formed is shown in (a6) and (b6). After the separation insulating film 42 is formed on the entire surface of the substrate, it is patterned using photolithography. The separation insulating film 42 is formed to extend transversely through the thin film resistor 30 in the second direction D2, retaining both ends of the thin film resistor 30 in the first direction D1.

[0086] (a7) and (b7) show the state in which the seed film 511 and photoresist 502 are formed. The seed film 511 is a substrate film used to form the connecting electrode 33 and the exposed heat sink 35 by a deposition method, for example, a thin film of titanium (Ti) and copper (Cu) formed on the entire surface of the substrate by sputtering. The photoresist 502 is formed on the seed film 511, and the forming areas of the connecting electrode 33 and the exposed heat sink 35 are patterned in an open manner.

[0087] (a8) and (b8) show the state in which the connection electrode 33 and the exposed heat sink 35 are formed. The connection electrode 33 and the exposed heat sink 35 are formed by depositing, for example, copper (Cu) inside the opening of the photoresist 502, and then removing the photoresist 502 and the seed film 511. That is, the exposed heat sink 35 is formed simultaneously with the connection electrode 33 in the same process, and the exposed heat sink 35 can be formed without increasing the number of processes.

[0088] The state in which the covering insulating film 43 is formed is shown in (a9) and (b9). After the covering insulating film 43 is formed on the entire surface of the substrate, it is patterned using photolithography. The covering insulating film 43 is formed over the thin film resistor 30.

[0089] (a10) and (b10) show the state in which the seed film 512 and photoresist 503 are formed. The seed film 512 is a substrate film used to form the protective film 34 by a deposition method, for example, by sputtering thin films of titanium (Ti) and copper (Cu). The photoresist 503 is formed on the seed film 512, and the formation area of ​​the protective film 34 is patterned in an open manner.

[0090] The protective film 34 is shown in (a11) and (b11). The protective film 34 is formed by depositing gold (Au), nickel (Ni), etc., into the opening of the photoresist 503, and then removing the photoresist 503 and the seed film 512.

[0091] Since the base insulating film 41 is formed on the planarized lower insulating film 40, it is formed as a relatively thin layer, for example, with a thickness of 5 μm. On the other hand, the separation insulating film 42 is formed, for example, with a thickness of 10 to 15 μm, and the connecting electrode 33 is formed, for example, with a thickness of 10 μm. Moreover, the connecting electrode 33 is repeatedly formed with the base insulating film 41, the thin film resistor 30, and the separation insulating film 42, resulting in large unevenness on the upper surface of the substrate after the connecting electrode 33 is formed. Therefore, the cover insulating film 43 formed thereon is formed as a relatively thick layer, for example, with a thickness of 20 μm or more, in order to ensure coverage. Therefore, if through holes are formed in the cover insulating film 43 as in the prior art, the manufacturing cost will increase, or the reliability will decrease. To address this, by embedding the heat sink 31 outside the formation area of ​​the cover insulating film 43 and providing a heat dissipation portion 50 not covered by the base insulating film 41, the manufacturing process can be simplified.

[0092] In addition, an example of forming the exposed heat sink 35 and the connecting electrode 33 simultaneously has been described here, but it is also possible to form the exposed heat sink 35 simultaneously in the same process as the protective film 34.

[0093] (4) Variations

[0094] Figure 7 It means Figure 1 Figure 15 shows other structural examples of the main part of the ST substrate 15. Figure 7 (a) is a plan view showing the layout of each component when viewed from above on the ST substrate 15. Figure 7 (b) indicates that by Figure 7 A cross-sectional view of the section cut by the B2-B2 cut line in (a) (B2-B2 cross-sectional view). The B2-B2 cut line is a straight line extending through the thin film resistor 30 in the second direction D2. Additionally, the AA cut surface... Figure 2 Since (b) is the same, the repeated description is omitted.

[0095] If with Figure 3 Compared to the ST substrate 15 shown, it differs in the following aspects: it does not have an exposed heat sink 35, so that the heat dissipation part 50 with the embedded heat sink 31 is exposed to the atmosphere, and the heat of the embedded heat sink 31 is dissipated directly from the heat dissipation part 50 to the atmosphere without the heat sink 35 being exposed.

[0096] Implementation method 2.

[0097] In Embodiment 1, an ST substrate 15 was described in which the exposed heat sink 35 and the protective film 34 are separated from each other. In contrast, in this embodiment, an ST substrate 15 in which a portion of the exposed heat sink 35 functions as the protective film 34 is described.

[0098] Figure 8This is a diagram showing a structural example of the main parts of the ST substrate 15 according to Embodiment 2 of the present invention. Figure 8 (a) is a plan view showing the layout of each component when viewed from above on the ST substrate 15. Figure 8 (b) indicates that by Figure 8 A cross-sectional view of the section cut by the B3-B3 cut line in (a) (B3-B3 cross-sectional view). The B3-B3 cut line is a straight line extending through the thin film resistor 30 in the second direction D2. Furthermore, the AA cut surface is due to... Figure 2 Since (b) is the same, the repeated description is omitted.

[0099] If with Figure 3 Compared to the ST substrate 15 shown in (Embodiment 1), it differs in the following aspects: the area where the exposed heat sink 35 extends to the protective film 34 has a protective region 52 opposite to the thin-film resistor 30, which protects the thin-film resistor 30 from damage by thermal stress or laser. In other words, it has an exposed heat sink 35 that integrates the protective film 34, compared to... Figure 3 The ST substrate 15 has an even wider surface area.

[0100] The exposed heat sink 35 functions as a heat dissipation component for the thin-film resistor 30 and also as a protective component for the thin-film resistor 30. Therefore, a metal material with a lower coefficient of thermal expansion than the insulating films 40-43, as well as high thermal conductivity and good light reflection properties, such as gold (Au) or nickel (Ni), is used and formed through the same process as the protective film 34.

[0101] An exposed heat sink 35 is formed on the heat dissipation portion 50, the exposed area 51, and the lower insulating film 40, and also on the covering insulating film 43, having a protective region 52 that faces the thin-film resistor 30 across the covering insulating film 43. The protective region 52 is formed to substantially cover the thin-film resistor 30, protecting the thin-film resistor 30 from thermal stress damage by suppressing the thermal expansion and contraction of the covering insulating film 43, or protecting the thin-film resistor 30 from laser damage caused by irradiation for bonding the probe 17 to the probe electrode pad 151.

[0102] The exposed heat sink 35 includes a heat dissipation portion 50, formed in an area wider than the heat dissipation portion 50. Specifically, by extending to the covering insulating film 43, it is possible to form even when... Figure 3 The exposed heat sink 35 shown in (Embodiment 1) is located in a much wider area. Therefore, a heat dissipation surface with a large surface area can be ensured, and higher heat dissipation efficiency can be ensured.

[0103] Furthermore, the exposed area 51 is adjacent to both the heat dissipation portion 50 and the covering insulating film 43. Therefore, a height difference is formed at the boundary between the heat dissipation portion 50 and the exposed area 51, with the height being approximately equal to the thickness of the base insulating film 41. A similar height difference is also formed at the boundary between the exposed area 51 and the covering insulating film 43, with the height being approximately equal to the thickness of the covering insulating film 43. Therefore, it is necessary to form a connection with... Figure 12 Compared to existing technologies where via wiring is present through both the base insulating film 41 and the cover insulating film 43, corresponding to the second insulating film 612 and the third insulating film 613, it is possible to easily form an exposed heat sink 35 with a large area while ensuring stepped coverage. Furthermore, since the exposed heat sink with a protected area 52 is provided instead of the protective film 34, it is possible to manufacture without complicating the manufacturing process compared to the ST substrate 15 with the protective film 34.

[0104] Implementation method 3.

[0105] In the above embodiments, an example was described in which a heat sink 31, a heat dissipation portion 50, and an exposed heat sink 35 were provided for each thin-film resistor 30. In contrast, in this embodiment, a case is described in which two or more thin-film resistors 30a to 30c share the same heat sink 31, heat dissipation portion 50, and exposed heat sink 35.

[0106] Figure 9 This is a diagram showing a structural example of the main parts of the ST substrate 15 according to Embodiment 3 of the present invention. Figure 9 (a) is a plan view showing the layout of each component when viewed from above on the ST substrate 15. Figure 9 (b) indicates that by Figure 9 A cross-sectional view of the section cut by the B4-B4 cut line in (a) (B4-B4 cross-sectional view). The B4-B4 cut line is a straight line extending through the thin film resistor 30 in the second direction D2. Furthermore, the AA cut surface is due to... Figure 2 Since (b) is the same, the repeated description is omitted.

[0107] If with Figure 8 Compared to the ST substrate 15 shown in (Embodiment 2), it differs in that it provides a common embedded heat sink 31, heat dissipation portion 50 and exposed heat sink 35 for two or more thin film resistors 30a to 30c.

[0108] Two or more thin-film resistors 30a to 30c are arranged at equal intervals in the second direction D2. Each of the two or more thin-film resistors 30a to 30c is provided with a pair of wiring electrodes 32a to 32c and a pair of connecting electrodes 33a to 33c. On the other hand, a common insulating film 41 to 43 is provided, a heat sink 31 is buried, a heat sink 35 is exposed, and a heat dissipation part 50 is provided.

[0109] In other words, two or more thin-film resistors 30a to 30c are formed on a common substrate insulating film 41, and are positioned opposite a common embedded heat sink 31 through the substrate insulating film 41. Furthermore, a common separating insulating film 42 is formed on the two or more thin-film resistors 30, and a common covering insulating film 43 is further formed. In addition, a common heat dissipation portion 50 and an exposed area 51 are formed on the outer side of one end of the thin-film resistor 30a, and the common exposed heat sink 35 is connected to the embedded heat sink 31 via the heat dissipation portion 50. The exposed heat sink 35 is positioned opposite each of the two or more thin-film resistors 30a to 30c.

[0110] Regarding two or more thin-film resistors 30a to 30c, by sharing the embedded heat sink 31, the heat dissipation section 50 can also be shared. Therefore, it is not necessary to provide a heat dissipation section 50 for each thin-film resistor 30, and the thin-film resistors 30 and connecting electrodes 33 can be arranged with high density, and the probe electrode pads 151 can be arranged with narrow spacing.

[0111] Implementation method 4.

[0112] In the above embodiments, an example was described in which a heat dissipation portion 50 was formed on one side of the thin-film resistor 30 and a heat sink 35 was exposed. In contrast, in this embodiment, a case is described in which a heat dissipation portion 50 is formed on both sides of the thin-film resistor 30 and a heat sink 35 is exposed.

[0113] Figure 10 This is a diagram showing a structural example of the main parts of the ST substrate 15 according to Embodiment 4 of the present invention. Figure 10 (a) is a plan view showing the layout of each component when viewed from above on the ST substrate 15. Figure 10 (b) indicates that by Figure 10 A cross-sectional view of the section cut along the B5-B5 cut line in (a) (B5-B5 cross-sectional view). The B5-B5 cut line is a straight line extending through the thin-film resistor 30 in the second direction D2. Additionally, the AA cut surface... Figure 2 Since (b) is the same, the repeated description is omitted.

[0114] An embedded heat sink 31 extends from the thin-film resistor 30 in two directions of the second direction D2. A pair of heat dissipation portions 50 and a pair of exposed heat sinks 35 are arranged on both sides of the thin-film resistor 30. The exposed heat sinks 35 are connected to the common embedded heat sinks 31 via corresponding heat dissipation portions 50. Therefore, two exposed heat sinks 35 can be used to dissipate heat from the thin-film resistor 30, which can further increase the area of ​​the heat dissipation surface in contact with the atmosphere and further improve the heat dissipation efficiency.

[0115] In addition, regarding Figure 7(Implementation Method 1) Figure 8 (Implementation Method 2) and Figure 9 The ST substrate 15 shown in (Embodiment 3) can also be configured to have a pair of heat dissipation portions 50 formed on both sides of the thin film resistor 30, just like in this embodiment.

[0116] Explanation of reference numerals in the attached figures

[0117] 12 Main base board

[0118] 120 external terminals

[0119] 121 Connection terminal

[0120] 13 Reinforcing Plates

[0121] 14 Connecting substrate

[0122] 140 Spring Pin

[0123] 15 ST substrate

[0124] 150 connection terminal

[0125] 151 Probe Electrode Pads

[0126] 152 Ceramic Substrate

[0127] 153 Layered Structures

[0128] 16 Supporting components

[0129] 17 probes

[0130] 20 Semiconductor wafers

[0131] 21 Movable worktable

[0132] 22 Electrode pads

[0133] 30, 30a~30c Thin film resistors

[0134] 31. Installation of heat sink

[0135] 32, 32a~32c wiring electrodes

[0136] 33, 33a~33c connecting electrodes

[0137] 34 Protective film

[0138] 35 Exposed heat sink

[0139] 40 Lower insulating film

[0140] 41. Substrate insulating film

[0141] 42 Separating the insulating film

[0142] 43 Cover with insulating film

[0143] 50 Heat dissipation section

[0144] 51 Exposed Area

[0145] 52 protected areas

[0146] 100 probe cards

Claims

1. A multilayer wiring substrate for a probe card, disposed on the wiring path between the external terminals and probes of the probe card, and having a substrate insulating film formed on its upper surface, characterized in that it comprises: A thin-film resistor comprising a thin film formed on the substrate insulating film and connected to a pair of connecting electrodes; and A layered embedded heat sink is embedded opposite to the thin-film resistor, separated by the substrate insulating film, and contains a material with a higher thermal conductivity than the substrate insulating film. The embedded heat sink extends beyond the formation area of ​​the thin-film resistor, and a portion of the embedded heat sink has a heat dissipation portion not covered by the substrate insulating film.

2. The multilayer wiring substrate for probe cards according to claim 1, characterized in that, The probe card multilayer wiring substrate further comprises: a covering insulating film formed in a region corresponding to the thin-film resistor, wherein the film covers the thin-film resistor and exposes a portion of the substrate insulating film. The heat dissipation portion of the embedded heat sink is formed outside the area where the covering insulating film is formed.

3. The multilayer wiring substrate for probe cards according to claim 2, characterized in that, The probe card multilayer wiring substrate includes: an exposed heat sink, a given area simultaneously deposited on the heat dissipation portion and the substrate insulating film adjacent to the heat dissipation portion, and comprising a material with a higher thermal conductivity than the substrate insulating film. The given area of ​​the exposed heat sink is connected to the embedded heat sink via the heat dissipation part.

4. The multilayer wiring substrate for probe cards according to claim 3, characterized in that, The exposed heat sink and the connecting electrode are formed simultaneously.

5. The multilayer wiring substrate for a probe card according to claim 3, characterized in that, The probe card uses a multilayer wiring substrate comprising: a protective film, which is formed opposite to a thin-film resistor through the covering insulating film. The exposed heat sink and the protective film are formed simultaneously.

6. The multilayer wiring substrate for a probe card according to claim 3, characterized in that, The exposed heat sink is simultaneously deposited on the heat dissipation portion, the covering insulating film, and a given region of the substrate insulating film adjacent to the heat dissipation portion and the covering insulating film, respectively. The covering insulating film has a protective region that serves as a region opposite to the thin-film resistor. The protected area is connected to the buried heat sink via the given area.

7. The multilayer wiring substrate for a probe card according to any one of claims 1 to 6, characterized in that, The pair of connecting electrodes are disposed at both ends of the thin-film resistor in the first direction. The heat dissipation portion is formed in a second direction that intersects the first direction when viewed from the thin-film resistor.

8. The multilayer wiring substrate for a probe card according to claim 7, characterized in that, Two or more of the thin-film resistors are arranged apart from each other in the second direction. The embedded heat sink extends in the second direction and is embedded opposite to the two or more thin-film resistors.

9. The multilayer wiring substrate for a probe card according to any one of claims 1 to 6, characterized in that, The substrate insulating film comprises an insulating resin material.

10. The multilayer wiring substrate for a probe card according to any one of claims 3 to 6, characterized in that, The exposed heat sink comprises a metallic material formed by a plating process.

11. A probe card, characterized in that, The probe is disposed on the multilayer wiring substrate for the probe card according to any one of claims 1 to 10.

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