Pic dies and packages with multiple layers of multi-depth fiber-to-on-chip optical component connections

Abstract

The present disclosure relates to PIC dies and packages with multi-layer, multi-depth fiber-to-on-chip optical component connections. A photonic integrated circuit (PIC) die is provided. The PIC includes a set of optical connection slots including a first slot that aligns a core of a first optical fiber located therein with a first optical component in a first layer at a first vertical depth of a plurality of layers of a die body; and a second slot that aligns a core of a second optical fiber located therein with a second optical component in a second, different layer at a second, different vertical depth of the plurality of layers. The slots can also have end faces located at different lateral depths relative to an edge of the die body. Any number of first and second slots can be used to communicate optical signals to any number of layers at different vertical and / or lateral depths within the die body of the PIC die.

Description

TECHNICAL FIELD

[0001] The present disclosure relates to photonic integrated circuits (PICs), and more particularly to a PIC die having multi-depth (vertical and / or lateral) optical connection slots for connecting cores of external optical fibers to on-die optical components at multiple levels within the PIC die. BACKGROUND

[0002] Current photonic integrated circuit (PIC) dies require complex packaging integration schemes. One challenge is to provide optical coupling between the PIC die and external optical fibers. For example, very precise alignment tolerances must be adhered to when attaching input and output fibers in order to effectively couple light between on-die optical waveguides and off-module connections. Typically, V-shaped or U-shaped optical connection slots are formed in the edges of the PIC die to seat the optical fibers in an aligned manner to corresponding on-die optical waveguides in the PIC die. A challenge with this arrangement is that the on-die optical waveguides are formed in or near the active layer of the PIC, i.e., the layer having active devices such as transistors therein. Thus, all of the lateral optical connection slots for connecting external optical fibers to the PIC die are also formed near the active layer of the PIC. The slots take up a large portion of the PIC footprint area, which portion could otherwise be used for active devices of the photonic devices. This arrangement also limits the ability to increase the rate (bandwidth) and density of data transmission into the PIC, as too many optical fibers in close lateral proximity to one another can create crosstalk between the optical signals. In another approach, one optical fiber can be connected to a number of vertically spaced apart optical waveguides, i.e., a waveguide mesh, which are all connected together inside the PIC. As only one optical fiber is provided, this approach does not increase the rate (bandwidth) or density of data transmission into the PIC. SUMMARY

[0003] One aspect of the present disclosure relates to a photonic integrated circuit (PIC) die, comprising: a body having a plurality of layers including a plurality of interconnected layers; and a set of optical connection slots defined in an edge of the body, the set of optical connection slots including: a first slot that aligns a core of a first optical fiber located therein with a first optical component in a first layer at a first vertical depth of the plurality of layers; and a second slot that aligns a core of a second optical fiber located therein with a second optical component in a second, different layer at a second vertical depth of the plurality of layers different from the first vertical depth.

[0004] Another aspect of the present disclosure includes a photonic integrated circuit (PIC) die, comprising: a body having a plurality of layers including a plurality of interconnect layers; and a set of optical connection slots defined in an edge of the body, the set of optical connection slots including: a first slot to align a core of a first optical fiber located therein with a first optical component in the plurality of layers, the first slot having a first end face that exposes the first optical component at a first lateral depth relative to the edge of the body; and a second slot to align a core of a second optical fiber located therein with a second optical component in the plurality of layers, the second slot having a second end face that exposes the second optical component at a second lateral depth relative to the edge of the body that is different than the first lateral depth.

[0005] An aspect of the present disclosure relates to a method, comprising: forming a first slot defined in an edge of a body of a photonic integrated circuit (PIC) die, the first slot exposing a first optical component in a first layer at a first vertical depth in a plurality of layers of the body; and forming a second slot defined in the edge of the body, the second slot exposing a second optical component in a second, different layer at a second, different vertical depth in the plurality of layers of the body.

[0006] The above-described and other features of the present disclosure will become apparent from the following more detailed description of the embodiments of the present disclosure. BRIEF DESCRIPTION OF DRAWINGS

[0007] Embodiments of the present disclosure will be described in detail with reference to the following drawings, wherein like reference numerals indicate like elements, and wherein:

[0008] Figure 1 An exploded perspective view of a PIC package is shown in accordance with embodiments of the present disclosure.

[0009] Figure 2 A cross-sectional view of a PIC die with optical fibers attached in different optical connection slots is shown in accordance with embodiments of the present disclosure, wherein the optical connection slots are configured to position cores of the optical fibers at different vertical depths.

[0010] Figure 3 A perspective view of a PIC die without optical fibers attached is shown in accordance with embodiments of the present disclosure.

[0011] Figure 4 A perspective view of a PIC die with optical fibers attached in optical connection slots is shown in accordance with embodiments of the present disclosure, wherein the optical connection slots are configured to position cores of the optical fibers at different vertical depths.

[0012] Figure 5A cross-sectional view of a PIC die with optical fibers attached in different optical connection trenches is shown, in accordance with an embodiment of the disclosure, where the optical connection trenches are used for two active layers at different vertical depths.

[0013] Figure 6 A perspective view of a PIC die with a set of optical connection trenches configured to position cores of optical fibers at different vertical depths and different lateral depths relative to the die body edge is shown, in accordance with an embodiment of the disclosure.

[0014] Figure 7 A perspective view of a PIC die with optical fibers attached in a set of optical connection trenches is shown, in accordance with an embodiment of the disclosure. Figure 6

[0015] Figure 8 A perspective view of a PIC die with a set of optical connection trenches configured to position cores of optical fibers at different lateral depths relative to the die body edge is shown, in accordance with an embodiment of the disclosure.

[0016] Figure 9 A cross-sectional view of a PIC die and a PIC package including vertical optical waveguides is shown, in accordance with an embodiment of the disclosure.

[0017] Figure 10 A cross-sectional view of a PIC die with optical fibers attached in different optical connection trenches and arranged by vertical depth is shown, in accordance with an embodiment of the disclosure.

[0018] Figure 11 A cross-sectional view of a PIC die and a PIC package with a lid is shown, in accordance with an embodiment of the disclosure.

[0019] Figure 12 A top view of a PIC die and a PIC package with a lid positioned over a portion of the PIC die is shown, in accordance with an embodiment of the disclosure.

[0020] Figure 13 A top view of a PIC die and a PIC package with a lid positioned over the entire PIC die is shown, in accordance with an embodiment of the disclosure.

[0021] Figure 14 A cross-sectional view of a PIC die and a PIC package is shown, in accordance with an embodiment of the disclosure, where optical fibers are attached by optical connection trenches with their cores at more than two different vertical depths.

[0022] Figure 15 ​Cross-sectional views of a PIC die and a PIC package according to embodiments of the present disclosure are shown in which an optical fiber is attached through an optical connection slot such that its core is aligned with optical components in multiple interconnect layers at different vertical depths.

[0023] Note that the drawings of the present disclosure are not necessarily to scale. The drawings are merely intended to depict typical aspects of the present disclosure, therefore should not be considered to be limiting of the scope of the present disclosure. In the drawings, like reference numerals denote like elements throughout the several views. DETAILED DESCRIPTION

[0024] In the following description, reference is made to the accompanying drawings which form a part hereof, and in which is shown by way of illustration specific exemplary embodiments in which the teachings can be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the teachings, and it is to be understood that other embodiments can be utilized and that changes can be made without departing from the scope of the present teachings. The following description is, therefore, not to be taken in a limiting sense.

[0025] It will be understood that when an element such as a layer, region or substrate is referred to as being "on" or "over" another element, it can be directly on the other element or intervening elements can also be present. In contrast, when an element is referred to as being "directly on" or "directly over" another element, there are no intervening elements present. It will also be understood that when an element is referred to as being "connected" or "coupled" to another element, it can be directly connected or coupled to the other element or intervening elements can be present. In contrast, when an element is referred to as being "directly connected" or "directly coupled" to another element, there are no intervening elements present.

[0026] References in the specification to “one embodiment” or “an embodiment” of the disclosure, or the like, mean that a particular feature, structure, characteristic, or the like being described is included in at least one embodiment of the disclosure. Therefore, the appearance of the phrase “in one embodiment” or “in an embodiment” or any other variant thereof in various places in the specification are not necessarily all referring to the same embodiment. It is appreciated that any of the phrases “ / ”, “and / or”, and “at least one of’ are intended to encompass the selection of either the first listed option, or the second listed option, or both options if a comma separates the options. As examples of other implementations, in the cases of “A / B” and “at least one of A and B” the phrase is intended to mean the selection of A only, or B only, or the selection of both A and B. In the case of “A, B, and / or C” and “at least one of A, B, and C”, the phrase is intended to mean the selection of A only, or B only, or C only, or the selection of both A and B, or the selection of both A and C, or the selection of both B and C, or the selection of all of A, B, and C, or a combination of articulated terms. This applies similarly to phrases such as “at least one of A, B, and C, or any of the articles (a, an, the) preceding the items in the lists of items, as well as similar understandings for many terms throughout the specification.

[0027] “Optical fiber” can include any now known or later developed structure capable of transmitting an optical signal from an external source to a photonic integrated circuit (PIC) die in a single mode or multi-mode form, including but not limited to thin flexible optical fibers of glass, polymer, or other transparent solid that can transmit optical (light-based) signals.

[0028] Embodiments of the present disclosure provide a photonic integrated circuit (PIC) die and related PIC package. The PIC die includes a body having a plurality of layers including a plurality of interconnect layers. The plurality of layers includes optical components to produce a photonic integrated circuit (PIC). The PIC die also includes a set of optical connection slots defined in an edge of the PIC die body (e.g., a side and an upper surface of the body). The set of optical connection slots includes a first slot that aligns a core of a first optical fiber located therein with a first optical component (e.g., a light receiver) in a first layer at a first vertical depth in the plurality of layers, and a second slot that aligns a core of a second optical fiber located therein with a second optical component in a different second layer having a second vertical depth different from the first vertical depth in the plurality of layers. Alternatively or additionally, the slots can have different lateral depths or distances relative to the edge of the body. In this regard, the first slot can have a first end face that exposes the first optical component at a first lateral depth relative to the edge of the body, and the second slot has a second end face that exposes the second optical component at a second lateral depth relative to the edge of the body different from the first lateral depth. Any number of first and second slots can be used to deliver optical signals to optical components at any vertical and / or lateral depth in any number of layers within the PIC die. The PIC package can also include a cap located over at least a portion of the PIC die.

[0029] Embodiments of the PIC die and package provide optical signal alignment and delivery to individual layers of interest, and reduce signal loss and crosstalk. The PIC die also provides better use of discrete layers and individual layers, for example by freeing up areas of the active layer for other active layer devices instead of fiber attachment structures. The PIC die can also provide higher data transmission rates and higher data transmission densities into and out of individual layers compared to conventional PIC dies. The set of slots provides flexibility to direct light to one or more active layer (front end of line, FEOL) optical components, and / or to optical components in back end of line (BEOL) and / or middle of line (MOL) interconnect layers. The set of slots also provides flexibility to direct light to optical components located at different lateral depths relative to the edge of the PIC die body. Vertical waveguides can also be used to transmit optical signals vertically between layers.

[0030] Reference Figure 1This image shows an exploded side-top perspective view of an embodiment of a PIC package 100 (with a PCB not attached thereto). The PIC package 100 (also known as a PIC die fan-out package, hereinafter referred to as "PIC package 100") may include an overmold body 110 and a PIC die 112 located within the overmold body 110. The PIC die 112 may include any now-known or later-developed semiconductor photonic integrated circuit therein. As understood in the art, the PIC die 112, also known as integrated optical circuitry, may be any device including an electro-optical circuit 114 (or PIC) that integrates multiple photonic functions for receiving optical information signals thereby via, for example, optical fiber 116. Such functions often include converting optical information signals into electrical signals or vice versa. The electro-optical circuit 114 may include one or more (on-chip) optical components 118 (… Figure 1 (Indicated by dashed lines). One or more optical components 118 may include, for example, waveguide systems (e.g., grating couplers, I / O waveguides), but may also include other components depending on the application, such as, but not limited to: Bragg reflectors; arrayed waveguide gratings; transistor-based electronics, including detectors and modulators; photodiodes; photoelectric receivers (converters); optical amplifiers; lasers; couplers and / or modulators. It should be understood that the optical waveguide system may include structures that individually guide light / signals from each optical fiber coupled thereto.

[0031] The overlapping injection molding body 110 may include any material now known or hereafter developed capable of encapsulating electronic devices, such as, but not limited to, thermosetting polymers, such as epoxy molding compound resins, or silicon-based materials. The PIC package 100 may also include auxiliary devices 120 located within the overlapping injection molding body 110. One or more auxiliary devices 120 may include any one or more devices that provide complementary functionality to the PIC in the PIC die 112. Any number of auxiliary devices 120 may be provided. Auxiliary devices 120 may include, but are not limited to, transimpedance amplifiers (TIAs), drivers, and / or passive devices (e.g., resistors, capacitors, or other passive components). The PIC package 100 may also include a redistribution layer (RDL) interposer 122 adjacent to the overlapping injection molding body 110 and electrically connected to the PIC die 112 and the auxiliary devices 120. The RDL interposer 122 may include any interconnect structures now known or hereafter developed, such as, but not limited to, wiring and vias within a corresponding dielectric layer. The dielectric layer may include, but is not limited to, polyimide (PI), polybenzoxazole (PBO), benzocyclobutene (BCB), and epoxy-based materials. Wiring and vias may include any materials now known or developed in the future, such as aluminum or copper within a refractory metal liner. Other conventional PIC package structures may also be provided.

[0032] PIC package 100 also includes optical components 118 operatively coupled to PIC die 112. Figure 1 Multiple optical fibers 116 (represented by dashed lines). According to embodiments of this disclosure, Figure 2 A cross-sectional view of the PIC die 112 and the multiple optical fibers 116 attached thereto is shown. Figure 3 A perspective view of the PIC die 112 without optical fiber is shown. Figure 4 A perspective view of a PIC die 112 with optical fiber 116 is shown. The PIC die 112 includes a body 128 having multiple interconnect layers 134. Figures 2-3 Multiple layers 130 () Figures 2-3). The plurality of layers 130 can also include at least one active layer 132. In this latter case, a plurality of interconnect layers 134 can be located above the one or more active layers 132. The plurality of layers 130 can also include a substrate 146. In the illustrated example, the active layer 132 can be part of a semiconductor-on-insulator (SOI) substrate that includes the active layer 132 in an SOI layer 138 above an insulator layer 140 located above the substrate 146. The SOI layer 138 and the substrate 146 can comprise any semiconductor material suitable for a PIC die, such as silicon, silicon germanium, etc. The insulator layer 140 can comprise any suitable dielectric suitable for an SOI substrate, such as silicon oxide. Although the active layer 132 is shown as part of an SOI substrate, embodiments of the present disclosure are not limited to any form of substrate.

[0033] The one or more active layers 132 can include any now known or later developed active devices (not shown) located therein, such as transistors, capacitors, resistors, and other forms of active devices, i.e., any front end of line (FEOL) devices. The interconnect layers 134 can include any back end of line (BEOL) or middle of line (MOL) interconnect layers. As understood in the art, the interconnect layers 134 can include layers of dielectric material, such as silicon oxide layers, with metal lines and / or vertical metal contacts (vias) therein capable of electrically connecting components of the PIC die 112 to form the PIC. The interconnect layers 134 can also include passive devices (not shown), such as resistors, capacitors, optical waveguides, etc.

[0034] The PIC die 112 also includes a set of optical connection slots 136 defined in an edge 137 of the body 128 of the PIC die 112. The edge 137 can include an outermost surface 142 of the die and / or a side 144 of the body 128. The side 144 can include a face of a square or rectangular PIC die 112 (and optionally overmold body 110 Figure 1 ) that is not vertically oriented, i.e., up or down, in an operational state. As understood in the art, the optical connection slots 136 are used to position an optical fiber 116, more specifically an optical fiber stub, relative to the optical components 118 in the body 128 of the PIC die 112. More specifically, the optical connection slots 136 are used to align a core of the optical fiber 116, i.e., the center of the optical fiber that carries the optical signal, relative to the optical components 118 in the body 128 of the PIC die 112. As understood in the art, the optical fiber 116 is a single mode optical fiber, i.e., a fiber that carries a single mode of light, such as a single mode fiber with a core diameter of 8-10 microns. The optical fiber 116 can be a single mode fiber with a core diameter of 9 microns. Figure 2As shown, the set of optical connection slots 136 includes a first slot 150 that aligns a core of a first optical fiber 116A located therein with a first optical component 118A in a first layer 152 at a first vertical depth VD1 in the plurality of layers 130. In contrast to conventional systems, the set of optical connection slots 136 also includes a second slot 156 that aligns a core of a second optical fiber 116B located therein with a second optical component 118B in a second different layer 158 at a second vertical depth VD2 in the plurality of layers 130 that is different (as shown, deeper) than the first vertical depth VD1. As used herein, “align” means that the core of the optical fiber can be in optical communication with the corresponding optical component, i.e., the core is in line with the optical component. The vertical depths VD1, VD2 can be measured relative to any structure above the slots 150, 156 (e.g., the outermost interconnect layer 134 that forms the outermost surface 142 of the PIC die 112). As shown, the slots 150, 156 position the cores of the optical fibers 116A, 116B to align the cores with the optical components 118A, 118B in different layers 152, 158 at different vertical depths within the body 128 of the PIC die 112. While the optical fibers 116A, 116B are generally illustrated as having the same size, e.g., diameter, it will be recognized that they can have different sizes. In any case, the slots 150, 156 align the cores of the optical fibers at different layers having different vertical depths relative to the body 128.

[0035] The first slot 150 and the second slot 156 can be formed separately or together. In any case, one or more masks (not shown) can be patterned above the body 128 of the PIC die 112, and etching can be performed to open the first slot 150 and / or the second slot 156. In the case of separate formation, each etch can be configured to form the respective slot 150 or 156. In the case of formation together, parameters of the etching can be controlled to produce the slots to have different vertical depths VD1, VD2 and different lateral depths LD1, LD2, etc. (see, e.g., FIGS. 1A-1C). Figure 13different layers 152, 158 of the PIC die 112. For example, a trench configuration that varies in shape, width, vertical depth, lateral depth relative to the edge 137 of the body 128, etc. can be formed using a single mask having varying hole positions, sizes (e.g., width and length), and / or shapes. When exposed to an etching (e.g., but not limited to, tetramethylammonium hydroxide (TMAH) based etching) process simultaneously and under the same process conditions, the different hole configurations will result in the formation of cavities (trenches) having different configurations. In any case, the first trench 150 can be formed to have a configuration defined in the edge 137 of the body 128 of the PIC die 112 to expose the first optical component 118A in the first layer 152. The first trench 150 is configured to allow the core of the optical fiber 116 located therein to be aligned with the first layer 152 at a first vertical depth VD1 in the plurality of layers 130 of the body 128 of the PIC die 112. Further, the second trench 156 can be formed to have a configuration defined in the edge 137 of the body 128 of the PIC die 112 to expose the second optical component 118B in a different second layer 158. The second trench 156 is configured to allow the core of the second optical fiber 116B located therein to be aligned with the second layer 158 at a second vertical depth VD2 in the plurality of layers 130. The etching can include any chemical action suitable for the layer of material to be removed, such as wet etching, dry etching, etc.

[0036] For illustrative purposes only, the optical fiber 116 (in some cases referred to as a fiber stub due to the shorter length) has a glass cladding of, for example, 125 pm outer diameter and a core of 9 pm. Note that these dimensions are possible dimensions for the optical fiber 116, assuming the PIC die 112 has a body 128 with trenches 150, 156 that are 1 millimeter (mm) long. It is emphasized that the dimensions can vary depending on, for example, die size, length of the trenches 150, 156, fiber length, fiber protrusion length, and other parameters. In other examples, the optical fiber 116 can have a diameter of 80 pm and a core of 4 pm. Multimode optical fibers (125 pm optical fibers with 62.5 pm cores) can also be coupled to the trenches 150, 156. In any case, the first and second optical connection trenches 150, 156 can have appropriate vertical or lateral depths, widths, and lengths to properly position the core of the optical fiber to be aligned with the optical components 118 at different layers 152, 158 and different vertical depths within the PIC die 112. The optical fiber 116 can be held in the trenches 150, 156 by any suitable means (e.g., adhesive 160) (see also Figure 11 )..

[0037] The optical fibers 116 can be coupled into the respective slots 150, 156 using any now known or later developed technique, such as but not limited to using pick-and-place systems. In any case, the first optical fiber 116A is coupled in the first slot 150, which aligns the core of the first optical fiber 116A with the first optical component 118A in a first one of the plurality of layers 130 of the body 128 of the PIC die 112. Also, the second optical fiber 116B is coupled in the second slot 156, which aligns the core of the second optical fiber 116B with the second optical component 118B in a different second one of the layers 130 of the body 128 of the PIC die 112.

[0038] In Figures 2-4 , the first slot 150 aligns the core of the first optical fiber 116A with the first optical component 118A in one of the plurality of interconnect layers 134 (i.e., layer 152), and the second slot 156 aligns the core of the second optical fiber 116B with the second optical component 118B in the active layer 132. The layer 152 can be any of the interconnect layers 134, allowing the optical fiber 116A to be moved vertically away from the active layer 132, and possibly allowing more area in the active layer 132 for active devices. The vertical spacing also reduces cross-talk between optical fibers that are normally laterally adjacent. In Figure 2 In the illustrated example, a single active layer 132 is used. Figure 5 A cross-sectional view is shown in which the plurality of layers 130 includes a first active layer 132A and a different second active layer 132B that is located below the first active layer 132A. In the illustrated example, each of the active layers 132A, 132B is part of a respective SOI layer, each SOI layer having a respective insulating layer 140. Note that other forms of dual active layer configurations are possible. In these embodiments, the first slot 150 aligns the core of the first optical fiber 116A with the first optical component 118A in the first active layer 132A, and the second slot 156 aligns the core of the second optical fiber 116B with the second optical component 118B in the second active layer 132B. In this way, different active layers 132A, 132B with different active devices can be provided with different optical signals.

[0039] Figure 6 A perspective view of a PIC die 112 having a set of optical connection slots 136 configured to position cores 118A-C of optical fibers 116A-C at different vertical depths VD1-VD3 and different lateral depths LD1-LD3 relative to an edge 137 of the die body 128 is shown, in accordance with an embodiment of the present disclosure. Figure 7 A cross-sectional view is shown in which the optical fibers 116A-C are attached in the set of optical connection slots 136, in accordance with an embodiment of the present disclosure. Figure 6A perspective view of PIC die 112 is shown. Here, first slot 150 has first end face 180 of first optical component 118A exposed at a first lateral depth LDi relative to edge 137 (specifically, side 144) of body 128. PIC die 100 also includes second slot 156 having second end face 188 of second optical component 118B exposed at a second lateral depth LD2 relative to edge 137 (specifically, side 144) of body 128 that is different than first lateral depth LDi. Lateral depths LDi, LD2 can be measured relative to side 144 of body 128. PIC die 100 can include any number of slots 136 having different lateral depths relative to edge 137 of body 128. In Figure 6 , third slot 190 has third end face 194 of third optical component 118D exposed at a third lateral depth LDD relative to edge 137 of body 128 that is different than first and second lateral depths LDi, LD2. Slots having Figure 6 and Figure 7 Slots of the structures shown can be formed as previously described herein.

[0040] Figure 8 A perspective view of PIC die 100 is shown having a set of optical connection slots 136 configured to position cores of optical fibers 116A-C at different lateral depths LDi-LD3 relative to edge 137 of die body 128. Here, the vertical depth (i.e., layer in which) of each optical component 118A-C is the same. Any number of slots 136 having different lateral depths relative to edge 137 of body 128 can be used. Slots having Figure 8 Slots of the structures shown can be formed as previously described herein.

[0041] Figure 9 A cross-sectional view of a PIC die is shown including optical component 118B in the form of optical waveguide 162 configured to vertically pass optical signals from at least one of first layer 152 and second layer 158 to, for example, active layer 132. Optical waveguide 162 can include any now known or later developed vertical optical tunnel capable of vertically redirecting and transporting optical signals through any one or more layers 130 of PIC die 112. While the example is shown in Figure 9 , optical waveguide 162 can pass optical signals vertically between any layers 130 in body 128 of PIC die 112.

[0042] Where optical components 118 include optical waveguides, the waveguides can be made of different materials depending on the layer 130 in which they reside. For example, as Figure 2As shown, the optical component 118A in one of the interconnect layers 152 can include a silicon nitride waveguide, while the second optical component 118B in the active layer 132 can include a silicon waveguide. In another example, as shown in Figure 5 As shown, both the optical component 118A in the first active layer 132A and the second optical component 118B in the second active layer 132B can include silicon waveguides.

[0043] Figure 10 and Figure 11 A cross-sectional view of a PIC die 112 having more than one first slot 150 and more than one second slot 156 is shown. Regardless of the implementation, the PIC die 112 can have any number of different optical connection slots 150, 156. The slots 150, 156 can be arranged in any desired manner. For example, in Figure 10 , the first slots 150 are together located at one location on the body 128, while the second slots 156 are together located at another location on the body 128. Thus, optical fibers 116 having cores located at a particular vertical depth and / or a particular lateral depth can be positioned together. In this arrangement, a cover 154 (shown as being located above the PIC die 112) can be used as part of the PIC package 100 to cover the optical fibers 116A, 116B. In Figure 11 , the first slots 150 and the second slots 156 are laterally alternating in the body 128. Thus, optical fibers 116 having cores aligned at alternating vertical depths are possible. Similar arrangements can be provided with respect to lateral depths.

[0044] With continued reference to Figure 11 , the PIC package 100 can include the PIC die 112 located on a package substrate 170 (e.g., a printed circuit board, an RDL interposer, etc.). The PIC package 100 can also include a cover 172 located above at least a portion of the PIC die 112. The cover 172 (and the cover 154 in Figure 10 ) can be coupled above at least a portion of the PIC die 112, i.e., above the optical fibers 116 and / or other components of the PIC die 112, e.g., by an adhesive 160. The PIC package 100 can also include any now known or later developed covering 182 coupled to the cover 172 (or the cover 154 in Figure 10 ) by, e.g., a thermal glue 184, and to the PIC die 112 by any suitable adhesive 186. The covering 182 can optionally include a heat sink (not shown).

[0045] Regardless of the implementation, the optical connection slots 150, 156 can have any now known or later developed configuration. In Figures 1-5In this context, the first and second grooves 150 and 156 are referred to as V-grooves, meaning they have inclined sides that can be connected by a horizontal surface (see example...). Figures 2-4 Or they may intersect at a single point (see example). Figure 5 In other embodiments, for example, as in Figure 10 As shown in the cross-sectional view, the first and second grooves 150, 156 are referred to as U-grooves, meaning they have generally vertical sides with curved bottoms. One or more first grooves 150 do not need to have the same construction as one or more second grooves 156; for example, one could be a V-groove and the other a U-groove (see example...). Figure 10 The slots 150 and 156 can have the same shape but different vertical or horizontal depths, widths, etc. The spacing between the first slots 150 (i.e., the distance between adjacent slots) and the spacing between the second slots 156 can also be customized. For example, the first slot 150 can have a spacing of 127 μm, while the second slot 156 can have a spacing of 150 μm, even if slots 150 and 156 are on the same PIC die 112. In this way, the spacing between the cores of slots 150, 156, and therefore the fiber 116, and their impact on performance (e.g., crosstalk) can be controlled. Any spacing between any slots can be used to provide the desired layout and performance for the PIC die 112.

[0046] Cover 154 ( Figure 10 ) and 172 ( Figure 11 It can cover any range of the required PIC die 112. Figure 12 and Figure 13 A top view of a PIC package 100 according to an embodiment of the present disclosure is shown. Figure 12 For example, cover 172 only covers a portion of the PIC die 112 above a set of optical connection slots 136 located in the edge 137 of the body 128 of the PIC die 112. Figure 13 In the middle, cover 172 covers the entire PIC die 112, including a set of optical connection slots 136 in the edge 137 of the body 128 of the PIC die 112, and other components. These arrangements can also be applied to cover 154 ( Figure 10 ).

[0047] While embodiments of the present disclosure described herein have first and second slots 150, 156 for first and second optical fibers 116A, 116B and first and second optical components 118A, 118B, embodiments of the present disclosure may include slots positioning the fiber core in more than two distinct layers and at vertical depths and / or more than two distinct lateral depths. For example, as Figure 14As shown, the PIC die 112 can include a third slot 190 that aligns the core of the third optical fiber 116C with a third optical component 118C in a third different layer 192 at a third different vertical depth VD3 from the respective first and second vertical depths VD1 and VD2 of the first and second layers 152, 158, respectively. While shown as an active layer 132, the third layer 192 can be any of the layers 130. Any number of different slots can be provided. For example, four, five, six, or more different slots are also possible and are considered within the scope of the present disclosure. While many embodiments of the present disclosure show optical components 118 (e.g., silicon waveguides) in one or more active layers 132 together with optical components 118 (e.g., silicon nitride waveguides) in one or more interconnect layers 152, 158, it should be recognized that the teachings of the present disclosure can apply to only the active layers 132 (see, e.g., FIG. 1A) or only the interconnect layers 134. Figure 2 and Figure 10 ) or only the interconnect layers 134. Figure 15 A cross-sectional view of a die 112 that includes optical components 118 (e.g., silicon nitride waveguides) only in one or more interconnect layers 134 (e.g., 152, 158, 192) is shown.

[0048] Embodiments of the present disclosure provide direct optical signal alignment and communication to various layers of interest in a PIC die and reduce signal loss and crosstalk. The PIC die also provides better use of discrete layers, for example, by freeing up areas of the active layer for other active layer devices instead of fiber attachment structures. The PIC die also provides higher data transfer rates and higher data transfer densities into and out of various layers, for example, coupling efficiencies greater than 2 decibels. The set of slots provides flexibility in directing light to one or more active layer (front end of line, FEOL) optical components and / or to optical components in back end of line (BEOL) and / or middle of line (MOL) interconnect layers. The set of slots also provides flexibility in directing light to one or more optical components located at different lateral depths relative to the edges of the PIC die body. Vertical waveguides can also be used to vertically transfer optical signals between various layers, allowing for inputting optical signals at one layer and using the optical signals at another layer. Embodiments of the present disclosure can also enable the creation, construction, and integration of three-dimensional (3D) integrated circuit photonic dies.

[0049] The above-described method is used in the manufacture of photonic integrated circuit dies. The resulting PIC dies can be distributed by the manufacturer in raw wafer form (i.e., as a single wafer having a plurality of unpackaged chips), as a bare die, or in a packaged form. In the latter case, the PIC dies are mounted in the form of single PIC packages (e.g., plastic carriers with leads that are soldered to a motherboard or other higher level carrier) or multi-PIC packages (e.g., ceramic carriers with surface interconnections and / or buried interconnections). In any case, the dies are then integrated with other chips, discrete circuit elements, and / or other signal processing devices as part of either (a) an intermediate product (e.g., a motherboard) or (b) an end product. The end product can be any product that includes the PIC dies, ranging from toys and other low-end applications to high-end computer products with displays, keyboards or other input devices, and central processing units.

[0050] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the present disclosure. As used herein, the singular forms "a", "an" and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms "comprises" and / or "comprising," when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof. "Optional" or "optionally" means that the subsequently described event or circumstance can or can not occur, and that the description includes instances where the event occurs and instances where it does not.

[0051] Approximating language can be used herein for the purpose of conveying a spatial or temporal proximity between one or more events and / or one or more spatial or temporal descriptions of one or more events. Thus, as used herein, the terms "about" and "substantially" are understood not to be absolute terms, but to allow a reasonable amount of variation based on experimental error, measurement techniques, measurement

[0052] Any structural, material, or act is meant to include any that performs the same function in an equivalent manner. The description of the disclosure is not intended to be exhaustive or to limit the disclosure to the precise form disclosed. Many modifications and variations are possible in light of the above teachings. It is intended to cover any modifications and variations of this disclosure provided they come within the scope of the above disclosure and the appended claims.

Claims

1. A photonic integrated circuit (PIC) die, comprising: a body having a plurality of layers including a plurality of interconnect layers; and a set of optical connection slots defined in an edge of the body, the set of optical connection slots including: a first slot to align a core of a first optical fiber located therein with a first optical component in a first layer at a first vertical depth in the plurality of layers; and a second slot to align a core of a second optical fiber located therein with a second optical component in a different second layer at a second vertical depth in the plurality of layers different from the first vertical depth, wherein the second layer is an active layer.

2. The PIC die of claim 1, wherein, the first layer is one of the plurality of interconnect layers, and wherein the first slot aligns the core of the first optical fiber with the first optical component in the one of the plurality of interconnect layers, and the second slot aligns the core of the second optical fiber with the second optical component in the active layer.

3. The PIC die of claim 1, wherein, the plurality of layers further includes a first active layer and a different second active layer located below the first active layer, wherein the first slot aligns the core of the first optical fiber with the first optical component in the first active layer, and the second slot aligns the core of the second optical fiber with the second optical component in the different second active layer.

4. The PIC die of claim 1, wherein, the plurality of layers further includes an additional active layer, and wherein the second optical component includes an optical waveguide to vertically communicate an optical signal from the second layer to the additional active layer.

5. The PIC die of claim 1, wherein, the first optical component includes a silicon nitride waveguide, and the second optical component includes a silicon waveguide.

6. The PIC die of claim 1, wherein, each of the first slot and the second slot is selected from a group consisting of a V-shaped slot and a U-shaped slot.

7. The PIC die of claim 1, wherein, the first slot has a first end face that exposes the first optical component at a first lateral depth relative to the edge of the body, and the second slot has a second end face that exposes the second optical component at a second lateral depth relative to the edge of the body different from the first lateral depth.

8. A photonic integrated circuit (PIC) die, comprising: a body having a plurality of layers including a plurality of interconnect layers; and a set of optical connection slots defined in an edge of the body, the set of optical connection slots including: a first slot to align a core of a first optical fiber located therein with a first optical component in the plurality of layers, the first slot having a first end face that exposes the first optical component at a first lateral depth relative to the edge of the body; and a second slot to align a core of a second optical fiber located therein with a second optical component in the plurality of layers, the second slot having a second end face that exposes the second optical component at a second lateral depth relative to the edge of the body different from the first lateral depth.

9. The PIC die of claim 8, wherein, the first slot aligns the core of the first optical fiber located therein with the first optical component in a first layer at a first vertical depth in the plurality of layers; and the second slot aligns the core of the second optical fiber located therein with the second optical component in a different second layer at a second vertical depth in the plurality of layers different from the first vertical depth. The second trench aligns the core of the second optical fiber located therein with the second optical component in a second layer at a second vertical depth different from the first vertical depth of the first layer.

10. The PIC die of claim 9, wherein, The plurality of layers further includes an active layer, wherein the first trench aligns the core of the first optical fiber with the first optical component in one of the plurality of interconnect layers, and the second trench aligns the core of the second optical fiber with the second optical component in the active layer.

11. The PIC die of claim 9, wherein, The first layer includes a first active layer and the second layer includes a second, different active layer located below the first active layer, wherein the first trench aligns the core of the first optical fiber with the first optical component in the first active layer, and the second trench aligns the core of the second optical fiber with the second optical component in the second active layer.

12. The PIC die of claim 9, wherein, The plurality of layers further includes an active layer, and wherein the second optical component includes an optical waveguide configured to vertically communicate optical signals from the second layer to the active layer.

13. The PIC die of claim 8, further comprising a cap covering at least a portion of the PIC die located above the set of optical connection trenches.

14. The PIC die of claim 8, wherein, Each of the first trench and the second trench is selected from the group consisting of a V-shaped trench and a U-shaped trench.

15. A method of forming a photonic integrated circuit (PIC) die, comprising: forming a first trench defined in an edge of a body of the photonic integrated circuit (PIC) die, the first trench exposing a first optical component in a first layer of a plurality of layers of the body at a first vertical depth; and forming a second trench defined in the edge of the body, the second trench exposing a second optical component in a second, different layer of the plurality of layers of the body at a second, different vertical depth, wherein the second layer is an active layer.

16. The method of claim 15, further comprising: coupling a first optical fiber into the first trench, the first trench aligning a core of the first optical fiber with the first optical component in the first layer of the plurality of layers of the body; and coupling a second optical fiber into the second trench, the second trench aligning a core of the second optical fiber with the second optical component in the second, different layer of the plurality of layers of the body.

17. The method of claim 16, wherein, The first trench aligns the core of the first optical fiber with the first optical component in one of a plurality of interconnect layers above the active layer in the body, and the second trench aligns the core of the second optical fiber with the second optical component in the active layer of the body.

18. The method of claim 16, wherein, The first trench aligns the core of the first optical fiber with the first optical component in a first active layer of the body, and the second trench aligns the core of the second optical fiber with the second optical component in a second, different active layer of the body.

19. The method of claim 15, further comprising coupling a cap over at least a portion of the PIC die.

20. The method of claim 15, wherein, The first slot has a first end face of the first optical component exposed at a first lateral depth relative to the edge of the body, and the second slot has a second end face of the second optical component exposed at a second lateral depth relative to the edge of the body different from the first lateral depth.

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