Laser Pulse Synchronization Control Device

Abstract

The present invention discloses a laser pulse synchronization control device, which includes a timing circuit for generating a first-level envelope signal based on a seed sampling circuit and a primary screening signal, and transmitting the first-level envelope signal to the first-level AOM driving circuit, so that the first-level AOM driving circuit drives the first-level AOM acousto-optic crystal to perform primary screening on laser pulses, and is used for generating a second-level switching signal based on the seed sampling signal and an optical switch control signal, and transmitting the second-level switching signal to the second-level AOM driving circuit, so that the second-level AOM driving circuit drives the second-level AOM acousto-optic crystal to control the output of the laser pulses after primary screening, and realizes secondary screening on the laser pulses after primary screening. The present invention sets the phase difference between the synchronization signal and the rising edge of the optical switch control signal to a preset value, and based on the synchronization signal output by the machine tool control board, the first-level frequency division phase is adjusted in real time according to the synchronization signal when the first-level AOM acousto-optic crystal performs frequency division, so as to solve the problem of the phase difference between the internal menu selection of the laser and the external control signal.

Description

Technical Field

[0001] The present invention relates to the technical field of femtosecond laser pulse control, and particularly to a laser pulse synchronization control device. Background Art

[0002] In the field of brittle processing, single-pulse energy of lasers in the range of several hundred microjoules and single-frequency selection in the range of several hundred kHz pulsed light have been widely used. And with the improvement of technical level, some special brittle materials require single-pulse beams with greater energy to achieve good cutting effects. Currently, the common method to obtain pulsed beams with greater energy is to reduce the single-frequency selection of the seed light, and then amplify the light to increase the single-cluster light power within a certain range.

[0003] Currently, during the single-frequency selection process, the method of registering the machine signal and the laser signal is often used to achieve single-frequency selection. However, when the internal generated single-frequency selection frequency is relatively low (50KHz - 500KHz), it is difficult to coordinate between the machine and the laser signal in the existing signal registration method. If the pulse-on-demand (POD) method is used, due to the asynchronization between the internal clock and the external clock, when the processing frequency is close to the internal frequency, leakage problems are likely to occur. Summary of the Invention

[0004] The technical problem to be solved by the present invention is that the existing laser single-frequency selection method makes it more difficult to coordinate between the machine and the laser, and when using the pulse-on-demand output method, the internal clock is not synchronized with the external clock, and leakage problems are likely to occur when the processing frequency is close to the internal frequency.

[0005] To solve the above technical problems, the present invention provides a laser pulse synchronization control device, which is characterized by comprising:

[0006] A seed sampling circuit, configured to obtain a seed sampling signal based on the seed laser rotation and transmit the seed sampling signal to a timing circuit to provide a timing reference for the timing circuit;

[0007] A timing circuit, configured to generate a first-level envelope signal based on the seed sampling circuit and a primary screening signal, and transmit the first-level envelope signal to the first-level AOM driving circuit, so that the first-level AOM driving circuit drives the first-level AOM acousto-optic crystal to perform primary screening on the laser pulse, and is configured to generate a second-level switching signal based on the seed sampling signal and a switch control signal, and transmit the second-level switching signal to the second-level AOM driving circuit, so that the second-level AOM driving circuit drives the second-level AOM acousto-optic crystal to control the output of the laser pulse after primary screening, and to perform secondary screening on the laser pulse after primary screening;

[0008] An AOM driving circuit is used to control the switch of a first-stage AOM acousto-optic crystal based on a first-stage envelope signal to perform primary screening on laser pulses, and is also used to control the switch of a second-stage AOM acousto-optic crystal based on a second-stage switching signal to control the output of the laser pulses after primary screening and perform secondary screening on the laser pulses after primary screening;

[0009] A machine tool control board is used to provide a synchronization signal and a switching control signal for the timing circuit.

[0010] Preferably, the laser pulse synchronization control device further includes a detection and sampling circuit. The detection and sampling circuit is used to obtain a primary sampling signal based on the laser pulses after primary screening and transmit the primary sampling signal to the timing circuit to provide a judgment benchmark for whether the laser is correctly output for the timing circuit;

[0011] The timing circuit is further used to judge whether the laser pulses after primary screening are correctly output based on the primary sampling signal. If so, it controls the output of the laser pulses; otherwise, it controls the end of the laser pulse output.

[0012] Preferably, both the seed sampling circuit and the detection and sampling circuit include a beam splitter, a photodiode, and an amplifier connected in sequence.

[0013] Preferably, when the timing circuit performs primary screening based on the synchronization signal:

[0014] The timing circuit receives the synchronization signal provided by the machine tool control board and outputs a first-stage envelope signal to the first-stage AOM driving circuit based on the seed sampling signal and the synchronization signal, so that the first-stage AOM driving circuit drives the laser pulses screened by the first-stage AOM acousto-optic crystal to have the same phase and frequency as the synchronization signal. In this primary screening method, the primary screening signal includes the synchronization signal.

[0015] Preferably, the phase difference between the rising edge of the synchronization signal and the switching control signal is a preset value, so that the laser pulses after primary screening and the switching control signal have the same phase.

[0016] Preferably, when the timing circuit performs primary screening based on a single external control method:

[0017] The timing circuit outputs a first-stage envelope signal to the first-stage AOM driving circuit based on the seed sampling signal and a set repetition frequency, so that the first-stage AOM driving circuit drives the first-stage AOM acousto-optic crystal to output laser pulses with a specific phase and frequency; and each time the rising edge of the switching control signal is received, the counter of the timing circuit is reset to zero. In this primary screening method, the primary screening signal includes the set repetition frequency.

[0018] Preferably, the timing circuit includes an FPGA unit and a high-speed DAC unit connected to each other. The level-1 envelope signal is output by the high-speed DAC unit, and the level-2 switch signal is output by the FPGA unit.

[0019] Preferably, the FPGA unit includes an FPGA, a signal output circuit connected to the FPGA, and at least one set of signal input circuits.

[0020] When the timing circuit performs primary screening based on a synchronization signal, the synchronization signal is input into the FPGA through one set of signal input circuits, and the switch control signal is input into the FPGA through another set of signal input circuits.

[0021] When the timing circuit performs primary screening based on a single external control mode, the switch control signal is input into the FPGA through one set of signal input circuits.

[0022] The FPGA outputs a level-2 switch signal to the level-2 AOM driving circuit based on the signal output circuit.

[0023] Preferably, the high-speed DAC unit includes an operational amplifier circuit and a high-speed DAC connected to the output end of the operational amplifier circuit.

[0024] Preferably, the laser pulse synchronization control device further includes a host computer, which is communicatively connected to the timing circuit through RS232 to provide a set repetition frequency for the timing circuit.

[0025] Compared with the prior art, one or more embodiments of the above solution may have the following advantages or beneficial effects:

[0026] Applying the laser pulse synchronization control device provided by the embodiment of the present invention, setting the phase difference between the rising edges of the synchronization signal and the switch control signal to a preset value, taking the synchronization signal output by the machine tool control board as a reference, and adjusting the level-1 frequency division phase in real time according to the synchronization signal when the level-1 AOM acousto-optic crystal performs frequency division, so as to solve the problem of the phase difference between the internal menu of the laser and the external control signal; and by sending the synchronization signal and the switch control signal from the machine tool control board to the timing circuit, realizing the synchronization process of the laser signal and the machine tool control board signal, and solving the problem of the large difficulty in registering the machine tool signal and the laser signal in the prior art.

[0027] Other features and advantages of the present invention will be described in the following specification, and will become partially obvious from the specification, or be understood by implementing the present invention. The objectives and other advantages of the present invention can be achieved and obtained through the structures specifically pointed out in the specification, the claims, and the drawings. Description of the Drawings

[0028] The accompanying drawings are used to provide a further understanding of the present invention and form a part of the specification. They are used together with the embodiments of the present invention to explain the present invention, but do not constitute a limitation to the present invention. In the accompanying drawings:

[0029] Figure 1 It shows a schematic structural diagram of a laser pulse synchronization control device according to Embodiment 1 of the present invention;

[0030] Figure 2 It shows a schematic circuit diagram of a signal input circuit in Embodiment 1 of the present invention;

[0031] Figure 3 It shows a schematic circuit diagram of a signal output circuit in Embodiment 1 of the present invention;

[0032] Figure  4 It shows a schematic circuit diagram of an operational amplifier circuit in Embodiment 1 of the present invention;

[0033] Figure 5 It shows a signal conditioning diagram when the timing circuit in Embodiment 1 of the present invention performs primary screening based on a single external control method

[0034] Figure 6 It shows a signal conditioning diagram when the timing circuit in Embodiment 1 of the present invention performs primary screening based on a synchronization signal;

[0035] Figure 7 It shows a schematic circuit diagram of a two-stage amplifier in Embodiment 1 of the present invention. Detailed Embodiments

[0036] The following will describe in detail the embodiments of the present invention in conjunction with the accompanying drawings and embodiments, so as to fully understand how the present invention uses technical means to solve technical problems and achieve the implementation process of technical effects and implement accordingly. It should be noted that as long as there is no conflict, the various embodiments in the present invention and the various features in each embodiment can be combined with each other, and the formed technical solutions are all within the protection scope of the present invention.

[0037] The existing method of outputting laser pulses on demand (POD) does not change the menu frequency. It only selects the pulses with relatively later switch-on control signals from a series of menu pulses and emits them. In this way, when the menu frequency and the required frequency of the switch-on control signal differ greatly, the position of the light output is easy to determine. However, if the menu frequency and the required frequency of the switch-on control signal differ slightly, the problem of processing missing points is likely to occur.

[0038] Example 1

[0039] To solve the technical problems existing in the prior art, an embodiment of the present invention provides a laser pulse synchronization control device.

[0040] Figure 1 The structural schematic diagram of the laser pulse synchronization control device according to the first embodiment of the present invention is shown. Refer to Figure 1 As shown, the laser pulse synchronization control device according to the embodiment of the present invention includes a seed sampling circuit, a timing circuit, an AOM driving circuit, a machine tool control board, a host computer, and a detection sampling circuit.

[0041] The seed sampling circuit is mainly used to convert the seed laser into a clock sampling signal and transmit the clock sampling signal to the timing circuit to provide a timing reference for the timing circuit. The seed sampling circuit includes a beam splitter, a photodiode, and an amplifier connected in sequence. The beam splitter in this circuit is used to split the seed laser into a split seed laser. The photodiode in this circuit is used to convert the split seed laser into a seed electrical signal. The amplifier in this circuit is used to amplify the seed electrical signal to obtain a seed sampling signal.

[0042] The timing circuit includes an FPGA unit and a high-speed DAC unit connected to each other. The FPGA unit includes an FPGA, a signal output circuit, and multiple groups of signal input circuits respectively connected to the FPGA. Preferably, the FPGA can adopt the model 10M16SCE144C8G. Refer to Figure 2 As shown, the signal input circuit includes a photoelectric coupler and an inverter connected, etc. The photoelectric coupler is used to convert the synchronization signal or the switch control signal into a corresponding electrical signal through optoelectronic devices to achieve a good isolation effect of the electrical signal. The inverter is used to enhance the driving ability of the electrical signal and transmit the inverted signal to the FPGA. The signal input circuit realizes transmitting the synchronization signal or the switch control signal to the FPGA. Refer to Figure 3 As shown, the signal output circuit includes an inverter, etc. The signal output circuit is used to enhance the driving of the two-level switch signal output by the FPGA and transmit the enhanced two-level switch signal to the two-level AOM driving circuit.

[0043] When the timing circuit performs primary screening based on the synchronization signal, two groups of signal input circuits need to be set. The synchronization signal is input to the FPGA through one group of signal input circuits, and the switch control signal is input to the FPGA through the other group of signal input circuits. When the timing circuit performs primary screening based on a single external control mode, only one group of signal input circuits needs to be set, and the switch control signal is input to the FPGA through one group of signal input circuits.

[0044] The high-speed DAC unit includes an operational amplifier circuit and a parallel high-speed DAC, and the operational amplifier circuit is connected to the high-speed DAC. Refer to Figure 4 As shown, the operational amplifier circuit includes an operational amplifier, etc. The operational amplifier can adopt the model AD9748ACPZ. The operational amplifier circuit is used to enhance the driving of the analog envelope output by the FPGA to transmit a first-level envelope signal to the first-level AOM driving circuit.

[0045] The main working mode of the sequential circuit is as follows: generate a first-level envelope signal based on the seed sampling circuit and the primary screening signal, and transmit the first-level envelope signal to the first-level AOM driving circuit, so that the first-level AOM driving circuit drives the first-level AOM acousto-optic crystal to perform primary screening on the laser pulse, and is used to generate a second-level switching signal based on the seed sampling signal and the switch control signal, and transmit the second-level switching signal to the second-level AOM driving circuit, so that the second-level AOM driving circuit drives the second-level AOM acousto-optic crystal to control the output of the laser pulse after primary screening, and realize secondary screening of the laser pulse after primary screening. The first-level envelope signal is output by the high-speed DAC, and the second-level switching signal is output by the FPGA.

[0046] Among them, there are two types of primary screening signals. One is to perform primary screening on the laser pulse through the synchronization signal provided by the external machine tool control board, and the other is to perform primary screening on the laser pulse through the single external control mode preset by the sequential circuit. The single external control mode includes a preset repetition frequency, and the preset repetition frequency can be transmitted from the upper computer to the sequential circuit through RS232. It should be noted that the preset repetition frequency can also be transmitted from the upper computer to the sequential circuit through other reasonable communication methods, and no more details will be elaborated here.

[0047] When the sequential circuit performs primary screening based on the synchronization signal, the machine tool control board will provide the synchronization signal to the sequential circuit. After receiving the synchronization signal, the sequential circuit will output a first-stage envelope signal to the first-stage AOM driver circuit based on the synchronization signal and the seed sampling signal. The first-stage envelope signal can make the first-stage AOM driver circuit drive the first-stage AOM acousto-optic crystal to filter out laser pulses with the same phase and frequency as the synchronization signal. Further, the FPGA in the sequential circuit multiplies the 50M crystal oscillator to a high frequency (i.e., the set repetition frequency), and then, based on this high-frequency PLL frequency, samples the seed sampling signal to obtain a marking signal; the marking signal controls the generation of the DAC clock signal and the DAC data signal, and the FPGA outputs the DAC clock signal and the DAC data signal to the high-speed DAC to control the high-speed DAC to output the envelope signal. The FPGA determines the frequency and phase of the seed sampling signal according to the collected optical signal. At the rising edge of the synchronization signal, the FPGA counter in the sequential circuit is reset to zero, and then an analog signal envelope is generated based on the synchronization signal. The process of generating the analog signal envelope is as follows: at the start of the synchronization signal, the high-speed DAC generates the starting point of the first burst analog signal envelope in the first half cycle of the first burst pulse light, sets the amplitude of the high-speed DAC at the starting point of the first burst analog signal envelope through the pre-set amplitude parameter, and the high-speed DAC generates the ending point of the first burst analog signal envelope in the second half cycle of the first burst pulse light. Thus, the setting of the first burst analog signal envelope is completed, and so on, until all the analog signal envelopes of the required bursts are completed; when the next synchronization signal arrives, the FPGA starts to control the high-speed DAC to generate the next string of BURST analog signal envelopes again. The primary screening signal in this primary screening method includes the synchronization signal. It should be noted that in this mode, when the synchronization signal is lost, the laser triggers an emergency stop alarm.

[0048] The analog signal envelope is sent by the FPGA controlling the high-speed DAC and received by the first-stage AOM driver circuit. Since light takes some flight time to transmit in the optical fiber, in fact, there is a certain delay in the output of the analog signal envelope to match each optical pulse. After receiving the envelope signal, the first-stage AOM driver circuit converts it into an amplitude-modulated radio frequency signal with a carrier and inputs it into the first-stage AOM acousto-optic crystal. After receiving the radio frequency signal, the first-stage AOM acousto-optic crystal starts to screen and amplitude-modulate the seed source signal passing through the crystal. If the delay is appropriate, the radio frequency signal envelope can be within the required BURST light to achieve the purpose of selecting the seed source optical pulses with different amplitudes of the required bursts.

[0049] It should be noted that in order to solve the problem of the phase difference between the primary screening signal and the switch control signal of the laser, in this mode, it is necessary to set the phase difference between the rising edge of the synchronization signal and the switch control signal to a preset value. This phase difference can make the laser pulse after primary screening have the same phase as the switch control signal, thereby achieving the purpose of synchronizing the switch control signal with the synchronization signal to avoid the problem of missing points when the processing frequency is close to the internal frequency.

[0050] When the timing circuit performs primary screening based on a single external control method: the timing circuit needs to output a first-stage envelope signal to the first-stage AOM driving circuit based on the seed sampling signal and the set repetition frequency. The first-stage envelope signal can enable the first-stage AOM driving circuit to drive the first-stage AOM acousto-optic crystal to output laser pulses with specific phases and frequencies. Further, in the timing circuit, the FPGA multiplies the 50M crystal oscillator to a high frequency (i.e., the set repetition frequency), and then, based on this high-frequency PLL frequency, collects the seed sampling signal to obtain a marker signal; the marker signal controls the generation of the DAC clock signal and the DAC data signal, and the FPGA outputs the DAC clock signal and the DAC data signal to the high-speed DAC to control the high-speed DAC to output the envelope signal. Among them, using the crystal oscillator signal to monitor the seed sampling signal can easily perform operations such as signal rectification and delay on the monitored optical signal. The primary screening signal in this primary screening method includes the set repetition frequency.

[0051] Based on the optical signal collected by the FPGA in the timing circuit, the high-speed DAC in the timing circuit outputs an envelope analog signal with a specific amplitude to the acousto-optic driving device at a specific position between each pulse through the control of the FPGA. Further, using the delay function of the crystal oscillator signal, an analog signal envelope is given to the first-stage AOM driving circuit by the high-speed DAC between the valleys of two optical signals. The first-stage AOM driving circuit outputs a carrier radio frequency signal with a certain amplitude according to the time and amplitude of the analog signal envelope to drive the first-stage AOM acousto-optic crystal to pass light. If the laser pulse passes through the first-stage AOM acousto-optic crystal exactly within the arrival time of the carrier radio frequency signal, then this optical pulse will be deflected to the next stage. If the laser pulse does not pass through the first-stage AOM acousto-optic crystal within the arrival time of the carrier radio frequency signal, then this laser pulse will not be deflected and will be discarded into the waste optical path.

[0052] To solve the problem of the phase difference between the primary screening signal and the switch control signal of the laser, it is set that when the timing circuit receives the rising edge of the switch control signal each time, the FPGA counter in the timing circuit is reset to zero, thereby achieving the purpose of synchronizing the switch control signal with the primary screening signal, that is, the set repetition frequency, to avoid the problem of missing points when the processing frequency is close to the internal frequency.

[0053] It should be noted that the laser itself has a laser seed source for outputting laser pulses and multiple AOM acousto-optic crystals. This implementation is based on the laser, and the laser pulses, the first-stage AOM acousto-optic crystal, and the second-stage AOM acousto-optic crystal in this embodiment are all provided by the laser.

[0054] When the timing circuit receives the primary screening signal, it also receives the switch control signal provided by the machine tool control board. When the timing circuit receives the switch control signal provided by the machine tool control board, when it receives the rising edge of the switch control signal, the FPGA counter in the timing circuit is reset to zero. Similarly, the FPGA in the timing circuit multiplies the frequency of the 50M crystal oscillator to a high frequency, and then based on this high-frequency PLL frequency, samples the seed sampling signal. Then, using the delay function of the crystal oscillator signal, a control signal is given to the second-stage AOM drive circuit. The second-stage AOM drive circuit outputs a carrier radio frequency signal with a certain amplitude according to the time and amplitude of the control signal to drive the second-stage AOM acousto-optic crystal to transmit light. If the laser pulse after primary screening passes through the second-stage AOM acousto-optic crystal exactly within the arrival time of the carrier radio frequency signal, then this laser pulse will be normally output. If the laser pulse after primary screening does not pass through the second-stage AOM acousto-optic crystal within the arrival time of the carrier radio frequency signal, then this laser pulse is deflected into the waste optical path and discarded.

[0055] It should be noted that the second-stage AOM drive circuit is controlled by the second-stage switch signal to enable the second-stage AOM drive circuit to drive the second-stage AOM acousto-optic crystal to transmit light or not, thereby realizing the control of whether the laser outputs laser pulses, that is, acting as a switch. At the same time, the second-stage switch signal is generated based on the switch control signal, and the laser pulse after primary screening is secondarily screened based on the second-stage switch signal, realizing the control of the frequency and amplitude of the laser pulse output by the laser, and further achieving the purpose of selecting the laser pulse with the required frequency and amplitude.

[0056] Furthermore, the switch control signal includes two working modes, the GATE working mode and the TIGGER working mode. When the switch control signal is in the GATE working mode, the second-stage AOM acousto-optic crystal outputs laser pulses and continuously outputs the laser pulses after primary screening when the switch control signal is at a high level. When the switch control signal is in the TIGGER working mode, the frequency of the laser pulses output by the second-stage AOM acousto-optic crystal is consistent with the frequency of the switch control signal.

[0057] Figure 5 Fig. shows the signal conditioning diagram when the timing circuit in Embodiment 1 of the present invention performs primary screening based on a single external control method; Figure 6 Fig. shows the signal conditioning diagram when the timing circuit in Embodiment 1 of the present invention performs primary screening based on a synchronization signal; Refer to Figure 5 and Figure 6As shown, when the switch control signal is in the GATE working mode, in the timing circuit, the FPGA controls the two-stage AOM acousto-optic crystal to turn on when the external control GATE signal is at a high level. At this time, the laser emits the complete BURST laser pulse train when the external control GATE signal is at a high level. When the switch control signal is in the TIGGER mode, the FPGA controls the two-stage AOM acousto-optic crystal to turn on within the first BURST after the rising edge of the external control TRIGGER signal. At this time, the laser emits the first BURST after the rising edge of the external control TRIGGER signal. It should be noted that the processes of generating the first-stage envelope signal and the second-stage switch signal in the timing circuit do not interfere with each other.

[0058] When the laser pulse synchronization control device of the embodiment of the present invention realizes the primary screening of laser pulses through the single external control mode or the synchronous signal mode of the timing circuit, and realizes the secondary screening of laser pulses through the switch control signal provided by the machine tool control board.

[0059] The AOM drive circuit is used to control the switch of the first-stage AOM acousto-optic crystal based on the first-stage envelope signal to realize the primary screening of laser pulses, and is used to control the switch of the second-stage AOM acousto-optic crystal based on the second-stage switch signal to realize the control of the output of the laser pulses after the primary screening, and to realize the secondary screening of the laser pulses after the primary screening. The AOM drive circuit includes a first-stage AOM drive circuit and a second-stage AOM drive circuit.

[0060] The machine tool control board is used to provide a synchronous signal and a switch control signal for the timing circuit. The host computer is communicatively connected to the timing circuit through RS232 to provide a set repetition frequency for the timing circuit. The detection sampling circuit has the same structure as the seed sampling circuit, so its specific structure will not be described in detail here. Preferably, the amplifiers in the detection sampling circuit and the seed sampling circuit are both magnitude amplifiers, and the circuit diagrams of the two-stage amplifiers are as Figure 7 shown.

[0061] The detection sampling circuit is used to obtain a primary sampling signal based on the laser pulses after the primary screening and transmit the primary sampling signal to the timing circuit to provide a judgment basis for the correct output of the laser for the timing circuit.

[0062] At this point, the FPGA in the timing circuit is also used to determine whether the laser pulse after primary screening is correctly output based on the primary sampling signal. This determination is made by determining whether the laser pulse frequency after primary screening is consistent with the set crossover frequency. The crossover frequency is the frequency multiplied by the 50MHz crystal oscillator during the FPGA's acquisition of the seed sampling signal to obtain the marker signal. The FPGA uses the high-frequency PLL frequency as a reference and transmits the setting to the host computer when acquiring the optical signal to be collected. For example, if the seed source is 20MHz and the crossover frequency is set to 100K, the host computer will transmit the number 200 (20000000 / 100000) to the FPGA. Each time a marker bit arrives, the FPGA's internal counter will increase by 1. When the counter reaches 200, it will reset to zero and restart counting.

[0063] When it is determined that the laser pulse frequency after primary screening is consistent with the set division frequency, it means that the laser pulse output after primary screening is normal and there is no offset or other phenomena. At this time, the FPGA can control the laser pulse output normally, otherwise the FPGA control ends the output of the laser pulse.

[0064] The laser pulse synchronization control device provided by the embodiment of the present invention sets the rising edge phase difference between the synchronization signal and the switching control signal to a preset value, takes the synchronization signal output by the machine tool control board as a reference, and adjusts the first-level frequency division phase in real time according to the synchronization signal during the first-level AOM acousto-optic crystal frequency division to solve the problem of the phase difference between the internal menu of the laser and the external control signal; and sends the synchronization signal and the switching control signal to the timing circuit through the machine tool control board to realize the synchronization process of the laser signal and the machine tool control board signal, thereby solving the problem of the difficulty of aligning the machine signal with the laser signal in the existing process.

[0065] Although the embodiments disclosed herein are as described above, the contents described herein are merely embodiments for facilitating understanding of the present invention and are not intended to limit the present invention. Any person skilled in the art may make any modifications and variations in the form and details of the embodiments without departing from the spirit and scope of the present invention. However, the scope of protection of the present invention shall remain subject to the scope defined by the appended claims.

Claims

1. A laser pulse synchronization control device, characterized in that, Including: A seed sampling circuit, configured to obtain a seed sampling signal based on a seed laser and transmit the seed sampling signal to a timing circuit to provide a timing reference for the timing circuit; A timing circuit, configured to generate a first-stage envelope signal based on the seed sampling circuit and a primary screening signal, and transmit the first-stage envelope signal to a first-stage AOM driving circuit, so that the first-stage AOM driving circuit drives a first-stage AOM acousto-optic crystal to perform primary screening on a laser pulse, and configured to generate a second-stage switching signal based on the seed sampling signal and a switching control signal, and transmit the second-stage switching signal to a second-stage AOM driving circuit, so that the second-stage AOM driving circuit drives a second-stage AOM acousto-optic crystal to control the output of the laser pulse after primary screening, and to perform secondary screening on the laser pulse after primary screening; An AOM driving circuit, configured to control the switching of a first-stage AOM acousto-optic crystal based on the first-stage envelope signal to perform primary screening on a laser pulse, and configured to control the switching of a second-stage AOM acousto-optic crystal based on the second-stage switching signal to control the output of the laser pulse after primary screening, and to perform secondary screening on the laser pulse after primary screening; A machine tool control board, configured to provide a synchronization signal and a switching control signal for the timing circuit; wherein, When the timing circuit performs primary screening based on a single external control mode, it includes: the timing circuit outputs a first-stage envelope signal to the first-stage AOM driving circuit based on the seed sampling signal and a set repetition frequency, so that the first-stage AOM driving circuit drives the first-stage AOM acousto-optic crystal to output a laser pulse with a specific phase and frequency; and each time the rising edge of the switching control signal is received, the counter of the timing circuit is reset to zero, and the primary screening signal includes the set repetition frequency.

2. The device according to claim 1, characterized in that, The laser pulse synchronization control device further includes a detection sampling circuit, configured to obtain a primary sampling signal based on the laser pulse after primary screening and transmit the primary sampling signal to the timing circuit to provide a judgment reference for whether the laser is correctly output for the timing circuit; The timing circuit is further configured to judge whether the laser pulse after primary screening is correctly output based on the primary sampling signal, and if so, control the output of the laser pulse, otherwise control to end the output of the laser pulse.

3. The device according to claim 2, wherein Both the seed sampling circuit and the detection sampling circuit include a beam splitter, a photodiode, and an amplifier connected in sequence.

4. The device according to claim 1, characterized in that, When the timing circuit performs primary screening based on a synchronization signal: The timing circuit receives the synchronization signal provided by the machine tool control board, and outputs a first-stage envelope signal to the first-stage AOM driving circuit based on the seed sampling signal and the synchronization signal, so that the phase and frequency of the laser pulse screened out by the first-stage AOM driving circuit driving the first-stage AOM acousto-optic crystal are the same as the synchronization signal, and the primary screening signal includes the synchronization signal.

5. The device according to claim 4, characterized in that The phase difference between the synchronization signal and the rising edge of the switching control signal is a preset value, so that the laser pulse after primary screening has the same phase as the switching control signal.

6. The device according to claim 1 or 5, characterized in that, The timing circuit includes an FPGA unit and a high-speed DAC unit connected to each other. The level-1 envelope signal is output by the high-speed DAC unit, and the level-2 switch signal is output by the FPGA unit.

7. The device according to claim 6, characterized in that, The FPGA unit includes an FPGA, a signal output circuit, and at least one set of signal input circuits respectively connected to the FPGA. When the timing circuit performs primary screening based on a synchronization signal, the synchronization signal is input into the FPGA through one set of signal input circuits, and the switch control signal is input into the FPGA through another set of signal input circuits. When the timing circuit performs primary screening based on a single external control mode, the switch control signal is input into the FPGA through one set of signal input circuits. The FPGA outputs a level-2 switch signal to the level-2 AOM drive circuit based on the signal output circuit.

8. The device according to claim 6, characterized in that, The high-speed DAC unit includes an operational amplifier circuit and a high-speed DAC connected to the output end of the operational amplifier circuit.

9. The device according to claim 1, characterized in that The laser pulse synchronization control device further includes a host computer, which is communicatively connected to the timing circuit through RS232 to provide a set repetition frequency for the timing circuit.

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