Semiconductor structure and method of manufacturing the same, test system

Abstract

The embodiment of the present disclosure relates to the field of semiconductor, in particular to a semiconductor structure, a preparation method thereof and a test system, the semiconductor structure comprising: a system board; a packaging structure comprising a packaging layer, a packaging substrate and a die in the packaging layer, the packaging layer being located on a surface of the packaging substrate away from the system board; an electrical connection structure, part of the electrical connection structure being located in the packaging structure, the electrical connection structure electrically connecting the die and the system board; and a conductive structure located on the surface of the packaging substrate, the conductive structure comprising a first part covered by the packaging layer and electrically connected with the electrical connection structure, and a second part not covered by the packaging layer and used for connecting a test device, the second part comprising a connection segment connected with the first part, a contact segment used for connecting the test device and a connection device connecting the connection segment to the contact segment, the connection device being detachably connected between the connection segment and the contact segment. The embodiment of the present disclosure is beneficial to improving the test quality of signal test on the semiconductor structure.

Description

Technical Field

[0001] This disclosure relates to the field of semiconductors, and in particular to a semiconductor structure, its preparation method, and a testing system. Background Technology

[0002] With the development of technology, semiconductor chips are increasingly widely used in various electronic products, and they are typically mounted on printed circuit boards (PCBs). To improve the yield of semiconductor chips, it is usually necessary to perform high-speed signal testing on each chip while it is electrically connected to the PCB. During testing, the high-speed signal needs to have good signal integrity and power integrity to accurately reflect the performance of the semiconductor chip.

[0003] However, currently, when testing semiconductor chips with high-speed signals, there is a phenomenon of test signal distortion, which affects the quality of the test. Summary of the Invention

[0004] This disclosure provides a semiconductor structure and its fabrication method, as well as a testing system, which at least helps to improve the testing quality when performing signal testing on the semiconductor structure.

[0005] This disclosure provides a semiconductor structure, including: a system board; a packaging structure disposed on the surface of the system board, the packaging structure including a die, a packaging layer, and a packaging substrate, the packaging layer being located on the surface of the packaging substrate away from the system board, the packaging layer encapsulating the die within it; an electrical connection structure, a portion of which is located within the packaging structure, the electrical connection structure electrically connecting the die and the system board respectively; and a conductive structure located on the surface of the packaging substrate away from the system board, the packaging layer covering a portion of the conductive structure, the conductive structure including a first portion covered by the packaging layer and electrically connected to the electrical connection structure, and a second portion not covered by the packaging layer and used for connecting a test device, the second portion including a connection segment connected to the first portion, a contact segment spaced apart from the connection segment and used for connecting a test device, and a connecting device connecting the connection segment to the contact segment, the connecting device being detachably connected between the connection segment and the contact segment.

[0006] In some embodiments, the contact segment includes: a conductive portion that contacts an end of the connecting device away from the connection segment; and an electrical contact structure located at the end of the conductive portion away from the connecting device.

[0007] In some embodiments, the orthographic projection shape of the electrical contact structure on the surface of the packaging substrate is rectangular.

[0008] In some embodiments, the projected area of ​​the electrical contact structure on the surface of the packaging substrate is greater than the projected area of ​​the conductive portion on the surface of the packaging substrate.

[0009] In some embodiments, the orthographic projection of the encapsulation layer onto the surface of the encapsulation substrate falls onto the surface of the encapsulation substrate.

[0010] In some embodiments, the connecting device is an external resistor.

[0011] In some embodiments, the resistance of the external resistor is zero ohms.

[0012] In some embodiments, the electrical connection structure includes: a pad located on the surface of the package substrate away from the system board; a bonding wire electrically connecting the die and the pad; wiring and solder balls electrically connected to the wiring, the wiring penetrating the package substrate and electrically connected to the pad, and the solder balls located between the package substrate and the system board and electrically connected to the system board.

[0013] In some embodiments, the connection segment is connected to the end of the conductive structure adjacent to the pad.

[0014] Accordingly, this disclosure also provides a method for fabricating a semiconductor structure, comprising: providing a packaging substrate and a system board; forming an electrical connection structure and a conductive structure connected to the electrical connection structure on the packaging substrate, the electrical connection structure being electrically connected to a bare die, the conductive structure including a first part and a second part, the second part being used to connect a test device, the second part including a connection segment connected to the first part, a contact segment spaced apart from the connection segment and used to connect the test device, and a connecting device connecting the connection segment to the contact segment, the connecting device being detachably connected between the connection segment and the contact segment; forming a packaging layer on the surface of the packaging substrate, the packaging layer encapsulating the bare die, the first part, and part of the electrical connection structure within it; and electrically connecting the packaging substrate and the system board based on the electrical connection structure.

[0015] In some embodiments, the process steps for forming the conductive structure include: forming a conductive portion, an electrical contact structure, and an initial connection segment electrically connected to an electrical connection structure on a packaging substrate, wherein the electrical contact structure is located at the end of the conductive portion away from the electrical connection structure, a portion of the initial connection segment serves as a connection segment, and the remaining portion of the initial connection segment serves as a first portion, and the conductive portion and the connection segment are spaced apart; and a connecting device is disposed between the conductive portion and the electrical connection structure, wherein the connecting device connects the connection segment to the conductive portion, and the electrical contact structure, the conductive portion, the connecting device, the connection segment, and the first portion form a conductive structure.

[0016] In some embodiments, an electroplating process is used to form a conductive structure.

[0017] In some embodiments, the material of the conductive structure includes any one of copper, tin, or gold.

[0018] Accordingly, this disclosure also provides a testing system, including a testing apparatus, which is used to test any of the above-described semiconductor structures.

[0019] The technical solutions provided in this disclosure have at least the following advantages:

[0020] The semiconductor structure provided in this disclosure includes: a system board; a packaging structure disposed on the surface of the system board, comprising a die, a packaging layer, and a packaging substrate, wherein the packaging layer is located on the surface of the packaging substrate away from the system board and encapsulates the die; an electrical connection structure, wherein a portion of the electrical connection structure is located within the packaging structure and electrically connects the die to the system board; and a conductive structure located on the surface of the packaging substrate away from the system board, wherein the packaging layer covers a portion of the conductive structure, the conductive structure comprising a first portion covered by the packaging layer and electrically connected to the electrical connection structure, and a second portion not covered by the packaging layer and used for connecting a test device. In other words, a conductive structure is disposed on the packaging substrate as a connection... Compared to introducing an additional adapter board between the die and the system board to provide test points, embedding the test points within the semiconductor structure of the testing device brings the test points closer to the die, resulting in a shorter signal transmission path and faster signal transmission. Furthermore, it eliminates the need for additional electrical connections between the die and the system board, thus minimizing the impact on the signal itself. This improves the authenticity of the test signal and enhances test quality. The second part includes a connection segment connected to the first part, a contact segment spaced apart from the connection segment and used to connect the testing device, and a connecting device that connects the connection segment to the contact segment. The connecting device is detachably connected between the connection segment and the contact segment, enabling the switching of current between the conductive structure and the electrical connection structure. Thus, after testing the die, the connecting device can be removed to disconnect the conductive structure from the electrical connection structure, ensuring that the conductive structure on the packaging substrate does not affect the normal performance of the die. This achieves the goal of improving test signal quality while maintaining good die performance. Attached Figure Description

[0021] One or more embodiments are illustrated by way of example with reference to the accompanying drawings. These illustrations do not constitute a limitation on the embodiments, and unless otherwise stated, the figures in the drawings are not to be limited by scale.

[0022] Figure 1 A cross-sectional view of a semiconductor structure provided in an embodiment of this disclosure;

[0023] Figure 2 A top view schematic diagram of a semiconductor structure provided in an embodiment of this disclosure;

[0024] Figure 3 A schematic diagram of the structure corresponding to the step of forming an electrical connection structure in a method for fabricating a semiconductor structure according to an embodiment of the present disclosure;

[0025] Figures 4 to 5 A schematic diagram of the structure corresponding to the step of forming a conductive structure in a method for preparing a semiconductor structure according to an embodiment of the present disclosure;

[0026] Figure 6 A schematic diagram of the structure corresponding to the step of forming the encapsulation layer in a method for fabricating a semiconductor structure according to an embodiment of the present disclosure;

[0027] Figure 7 This is a schematic diagram of the structure of a test system provided in an embodiment of the present disclosure. Detailed Implementation

[0028] As the background technology indicates, there is currently a problem with low test quality when performing signal testing on semiconductor chips. Analysis reveals that one reason for this low test quality is the use of an adapter board between the system board and the adapter board when performing high-speed signal testing on semiconductor chips. This adapter board serves two purposes: firstly, it electrically connects the semiconductor chip to the system board; secondly, it has test points for connecting testing equipment, thus providing test signals to the semiconductor chip for testing. However, the presence of this adapter board introduces an additional electrical connection line between the semiconductor chip and the system board. This connection line results in a longer signal transmission path, hindering the rapid transmission of test signals and causing signal distortion, thereby reducing test quality.

[0029] This disclosure provides a semiconductor structure, including: a system board and a package structure. The package structure is disposed on the surface of the system board and includes a die, a package layer, and a package substrate. The package layer is located on the surface of the package substrate away from the system board and encapsulates the die within it. An electrical connection structure is partially located within the package structure, electrically connecting the die and the system board respectively. A conductive structure is located on the surface of the package substrate away from the system board and includes a first portion covered by the package layer and electrically connected to the electrical connection structure, and a second portion not covered by the package layer and used for connecting a test device. The package includes a connecting segment connected to the first part, a contact segment spaced apart from the connecting segment and used for connecting the test device, and a connecting device connecting the connecting segment to the contact segment. The connecting device is detachably connected between the connecting segment and the contact segment. In other words, a conductive structure is provided on the packaging substrate as a test point for connecting the test device. This makes the distance between the test point and the die closer, resulting in a shorter signal transmission path, which is beneficial for fast signal transmission. Furthermore, there is no need for additional electrical connection lines between the die and the system board, thus minimizing the impact on the signal itself and improving the authenticity of the test signal and the test quality. In addition, the connecting device in the conductive structure allows for the switching of current between the conductive structure and the electrical connection structure. Therefore, after testing the die, the connecting device can be removed to disconnect the conductive structure from the electrical connection structure, ensuring that the conductive structure on the packaging substrate does not affect the normal performance of the die. This achieves the goal of improving the quality of the test signal while maintaining good performance of the die itself.

[0030] The embodiments of this disclosure will now be described in detail with reference to the accompanying drawings. However, those skilled in the art will understand that many technical details have been provided in the embodiments of this disclosure to facilitate a better understanding of the disclosure. However, the technical solutions claimed in this disclosure can be implemented even without these technical details and various variations and modifications based on the following embodiments.

[0031] Figure 1 This is a cross-sectional schematic diagram of a semiconductor structure provided in an embodiment of the present disclosure.

[0032] refer to Figure 1The semiconductor structure includes: a system board 100; a package structure 110 disposed on the surface of the system board 100, the package structure 110 including a die 111, a package layer 112, and a package substrate 113, the package layer 112 being located on the surface of the package substrate 113 away from the system board 100, and the package layer 112 encapsulating the die 111; an electrical connection structure 120, a portion of which is located within the package structure 110, electrically connecting the die 111 to the system board 100; and a conductive structure 130 located on the package substrate 113 away from the system board 100. On the surface of 0, the encapsulation layer 112 covers a portion of the conductive structure 130. The conductive structure 130 includes a first portion 131 covered by the encapsulation layer 112 and electrically connected to the electrical connection structure 120, and a second portion 132 not covered by the encapsulation layer 112 and used for connecting a test device. The second portion 132 includes a connection segment 133 connected to the first portion 131, a contact segment 134 spaced apart from the connection segment 133 and used for connecting a test device, and a connection device 135 connecting the connection segment 133 to the contact segment 134. The connection device 135 is detachably connected between the connection segment 133 and the contact segment 134.

[0033] Conductive structures 130 are provided on the packaging substrate 113 as test points for connecting the testing device. This makes the distance between the test points and the die 111 closer, resulting in a shorter signal transmission path, which is beneficial for fast signal transmission. Furthermore, no additional electrical connection lines are needed between the die 111 and the system board 100, thus minimizing the impact on the signal itself. In addition, a connecting device 135 is provided in the conductive structure 130 to control the current flow between the conductive structure 130 and the electrical connection structure 120. Therefore, after testing the die 111, the connecting device 135 can be removed to disconnect the conductive structure 130 from the electrical connection structure 120. This ensures that the conductive structure 130 on the packaging substrate 113 does not affect the normal performance of the die 111, thereby improving the quality of the test signal while maintaining good performance of the die 111 itself.

[0034] Semiconductor manufacturing includes wafer fabrication and packaging / testing. These two stages involve two testing steps: wafer inspection and finished product testing. Finished product testing refers to the functional and electrical parameter testing of the packaged chip. After packaging, the bare die 111 becomes a chip. Chips are typically electrically connected to a printed circuit board (PCB). The PCB has metal traces that allow for interconnection and relay transmission between chips, enabling current to amplify, attenuate, modulate, decode, and encode along pre-defined lines within the bare die 111. Once the chip is electrically connected to the PCB, its electrical characteristics need to be tested. Specifically, the electrical signals of the chip under test are led to test points. A testing device inputs test signals to the chip and acquires its output signals to determine whether the chip's functions and performance meet design specifications. Typically, the test signals used by the testing device are high-speed signals. To accurately reflect the chip's electrical characteristics, high-speed signals need to have good signal integrity and power integrity during testing.

[0035] The system board 100 is directly electrically connected to the bare die 111 in the package structure 110, which is equivalent to the electrical connection between the chip and the system board 100. In some embodiments, the system board 100 can be a PCB board.

[0036] The packaging structure 110 encapsulates the bare die 111, protecting it from environmental influences. It also includes an electrical connection structure 120 for electrically connecting the bare die 111 to the system board 100. Specifically, the packaging substrate 113 in the packaging structure 110 provides electrical connection, protection, support, and assembly functions for the bare die 111, enabling multi-pin configuration, improved electrical performance, and high density. The packaging layer 112 covers part of the electrical connection structure 120 and the bare die 111, protecting them from damage and preventing gas ingress that could oxidize the internal bare die 111. It also ensures product safety and stability. In some embodiments, the packaging layer 112 can be made of a molding compound, such as epoxy molding compound, silicone rubber, or polyimide.

[0037] Specifically, in some embodiments, the orthographic projection of the encapsulation layer 112 onto the surface of the encapsulation substrate 113 falls onto the surface of the encapsulation substrate 113. That is, in the direction parallel to the surface of the encapsulation substrate 113, the area of ​​the encapsulation layer 112 is smaller than the area of ​​the encapsulation substrate 113. Specifically, the encapsulation layer 112 covers a portion of the encapsulation substrate 113, and the portion of the encapsulation substrate 113 not covered by the encapsulation layer 112 can be used to support the conductive structure 130, allowing the conductive structure 130 to be exposed for connection to a testing device. Furthermore, the connection device 135 is also exposed, thus facilitating its disassembly and reassembly, thereby achieving the purpose of controlling the current flow between the conductive structure 130 and the electrical connection structure 120.

[0038] In some embodiments, the contact segment 134 includes: a conductive portion 136, which contacts the end of the connecting device 135 away from the connecting segment 133; and an electrical contact structure 137, located at the end of the conductive portion 136 away from the connecting device 135. That is, the electrical contact structure 137 serves as a test point for electrical connection with the testing device, and the conductive portion 136 electrically connects the electrical contact structure 137 to the die 111, thereby enabling the transmission of test signals between the testing device and the die 111. It is understood that the conductive portion 136 and the electrical contact structure 137 serve different functions. For the electrical contact structure 137, since it needs to make electrical contact with the testing device, it needs to have a relatively large contact area to facilitate electrical contact with the testing device. The conductive portion 136 is used to electrically connect the electrical contact structure 137 to the die 111. The ease of forming the conductive portion 136 needs to be considered to simplify the actual fabrication process of the conductive portion 136, which is beneficial for large-scale production.

[0039] refer to Figure 2 , Figure 2 This is a top view schematic diagram of a semiconductor structure provided in one embodiment of the present disclosure. In some embodiments, the orthographic projection shape of the electrical contact structure 137 on the surface of the packaging substrate 113 is rectangular. Because the electrical contact structure 137 is rectangular, when multiple electrical contact structures 137 need to be formed in the semiconductor structure, while keeping the area of ​​the electrical contact structure 137 constant, the aspect ratio of the electrical contact structure 137 can be adjusted so that the width of the electrical contact structure 137 is smaller in the direction along which the multiple electrical contact structures 137 are spaced apart, thereby allowing for a denser arrangement of the electrical contact structures 137 to meet different product requirements. It is understood that in other embodiments, the orthographic projection shape of the electrical contact structure 137 on the surface of the packaging substrate 113 may also be circular or other geometric shapes.

[0040] In some embodiments, the projected area of ​​the electrical contact structure 137 on the surface of the packaging substrate 113 is larger than the projected area of ​​the conductive portion 136 on the surface of the packaging substrate 113. This results in a relatively large surface area for the electrical contact structure 137, leading to a larger contact area between the electrical contact structure 137 and the connection lines of the testing device when the electrical contact structure 137 is connected to an external testing device. This reduces the contact resistance between the electrical contact structure 137 and the connection lines, allowing the test signal output by the testing device to be transmitted to the die 111 more quickly, and the feedback signal from the die 111 to the test signal to be transmitted to the testing device more quickly. Therefore, higher accuracy of the test signal can be maintained, thereby mitigating the impact on test quality caused by delayed transmission of the test signal. It is understood that in other embodiments, the projected area of ​​the electrical contact structure 137 on the surface of the packaging substrate 113 may also be equal to the projected area of ​​the conductive portion 136 on the surface of the packaging substrate 113.

[0041] The connecting device 135 is detachably connected between the connecting section 133 and the contact section 134. This allows control over the current flow between the connecting section 133 and the contact section 134, thereby controlling the current flow between the conductive structure 130 and the electrical connection structure 120, effectively functioning as a switch. Specifically, when testing the die 111, the connecting device 135 electrically connects the connecting section 133 and the contact section 134, conducting the current between the conductive structure 130 and the electrical connection structure 120, allowing the electrical signal generated by the die 111 to be transmitted to the testing device. When testing the die 111 is not required, the connecting device 135 can be detached, breaking the circuit between the connecting section 133 and the contact section 134. Thus, after testing the die 111, since the conductive structure 130 and the electrical connection structure 120 are in an open-circuit state, the normal performance of the die 111 is not affected. Therefore, the product used for testing can also be used as a mass-produced product. Specifically, in some embodiments, the connection device 135 can be an external resistor. External resistors have a simple structure and low cost, which is beneficial for the mass production of the semiconductor structures provided in the embodiments of this disclosure.

[0042] Specifically, in some embodiments, the resistance of the external resistor is zero ohms. Thus, when the external resistor is used to connect the connection segment 133 and the contact segment 134 to test the bare die 111, since the resistance of the external resistor is zero, it is equivalent to directly connecting the connection segment 133 and the contact segment 134. This facilitates the rapid transmission of the test signal between the conductive structure 130 and the electrical connection structure 120, thereby improving the problem of test signal distortion caused by delayed transmission of the test signal, and ultimately improving the test quality.

[0043] Electrical connection structure 120 electrically connects the die 111 and the system board 100 respectively, thereby realizing the electrical connection between the die 111 and the system board 100. In addition, electrical connection structure 120 is also electrically connected to conductive portion 136, so that the electrical signal of the die 111 can be extracted for testing. In some embodiments, electrical connection structure 120 may include: pad 121, which is located on the surface of the package substrate 113 away from the system board 100; bonding wire 122, which electrically connects the die 111 and the pad 121; wiring 123 and solder ball 124 electrically connected to wiring 123. Wiring 123 passes through the package substrate 113 and is electrically connected to the pad 121. Solder ball 124 is located between the package substrate 113 and the system board 100 and is electrically connected to the system board 100.

[0044] In some embodiments, the connection segment 133 may be connected to the end of the pad 121 adjacent to the conductive structure 130. Both the connection segment 133 and the pad 121 are located on the surface of the packaging substrate 113 away from the system board 100. Therefore, during the actual fabrication of the conductive structure 130, the connection segment 133 and the pad 121 can be connected in the same process step, simplifying the fabrication process and facilitating mass production. Furthermore, the pad 121 has a large surface area; therefore, in the actual fabrication process, the process parameters for fabricating the connection segment 133 can be controlled to maximize the contact area between the connection segment 133 and the pad 121. This results in lower contact resistance between the connection segment 133 and the pad 121, which is beneficial for rapid transmission of test signals. It is understood that in other embodiments, the connection segment 133 may also be electrically connected to the surface of the pad 121 away from the packaging substrate 113.

[0045] The semiconductor structure provided in the above embodiments includes a system board 100, a package structure 110, an electrical connection structure 120, and a conductive structure 130. The package structure 110 includes a die 111, a package layer 112, and a package substrate 113, with the package layer 112 encapsulating the die 111. A portion of the electrical connection structure 120 is located within the package structure 110, and the electrical connection structure 120 electrically connects the die 111 to the system board 100. The conductive structure 130 is located on the surface of the encapsulation substrate 113 away from the system board 100. The encapsulation layer 112 covers a portion of the conductive structure 130. The conductive structure 130 includes a first portion 131 covered by the encapsulation layer 112 and electrically connected to the electrical connection structure 120, and a second portion 132 not covered by the encapsulation layer 112 and used for connecting a test device. The second portion 132 includes a connection segment 133 connected to the first portion 131, a contact segment 134 spaced apart from the connection segment 133 and used for connecting a test device, and a connection device 135 connecting the connection segment 133 to the contact segment 134. The connection device 135 is detachably connected between the connection segment 133 and the contact segment 134. The connection device 135 is equivalent to a switch and can control the current flow between the conductive structure 130 and the electrical connection structure 120. In other words, by setting the conductive structure 130 on the packaging substrate 113 as a test point for connecting the testing device, compared to introducing an additional adapter board between the die 111 and the system board 100 to provide test points, the test points are built into the semiconductor structure, making the distance between the test points and the die 111 closer, thus shortening the signal transmission path and facilitating fast signal transmission. Furthermore, there is no need for additional electrical connection lines between the die 111 and the system board 100, therefore, the impact on the signal itself is smaller, resulting in a more accurate reflection of the signal quality. The connecting device 135 can control the flow of current between the conductive structure 130 and the electrical connection structure 120. Thus, after testing the die 111, the connecting device can be removed to disconnect the conductive structure 130 from the electrical connection structure 120, ensuring that the conductive structure 130 on the packaging substrate 113 does not affect the normal performance of the die 111. This achieves the goal of improving the quality of the test signal while maintaining good performance of the die 111 itself.

[0046] Accordingly, another embodiment of this disclosure provides a method for preparing a semiconductor structure, which can form the semiconductor structure provided in the previous embodiment. The method for preparing a semiconductor structure provided in another embodiment of the present invention will be described in detail below with reference to the accompanying drawings.

[0047] Figures 3 to 6 This is a schematic diagram of the structure corresponding to each step in the method for preparing a semiconductor structure according to another embodiment of this disclosure.

[0048] refer to Figure 3 , Figure 3 This is a schematic diagram of the structure corresponding to the step of forming an electrical connection structure 120 in the method for preparing a semiconductor structure according to an embodiment of the present disclosure. A packaging substrate 113 and a system board are provided. An electrical connection structure 120 is formed on the packaging substrate 113, and the electrical connection structure 120 is electrically connected to the bare die 111.

[0049] In some embodiments, the encapsulation substrate 113 may be a rigid encapsulation substrate, such as any one of a polymer substrate, a metal substrate, a composite substrate, or a ceramic substrate. In other embodiments, the encapsulation substrate 113 may also be a flexible encapsulation substrate, and the material of the flexible encapsulation substrate 113 may be any one of PI (polyimide) resin or PE (polyester) resin.

[0050] The system board is used to form an electrical connection with the bare die 111. Specifically, the system board and the bare die 111 can be electrically connected respectively through the electrical connection structure 120, thereby forming an electrical connection between the system board and the bare die 111. Therefore, in some embodiments, the system board can be located on the side of the packaging substrate 113 away from the bare die 111.

[0051] Specifically, in some embodiments, the step of forming the electrical connection structure 120 on the packaging substrate 113 may include:

[0052] Wiring 123 is formed in the packaging substrate 113, a portion of the wiring 123 penetrates the packaging substrate 113, and a portion of the wiring 123 is also located on the surface of the packaging substrate 113 away from the system board.

[0053] A pad 121 is formed on the surface of the packaging substrate 113 away from the system board. The pad 121 is electrically connected to the wiring 123. Specifically, in some embodiments, the pad 121 can be formed by electroplating.

[0054] A bonding wire 122 is formed, which is used to electrically connect the pad 121 and the die 111. Specifically, in some embodiments, the bonding wire 122 can be formed by pressure bonding, that is, by using hot pressure or ultrasonic energy to weld the bonding wire 122 to the pad 121 and the die 111 respectively, thereby forming an electrical connection between the pad 121 and the die 111.

[0055] Specifically, in some embodiments, the material of the electrical connection structure 120 may be at least one of copper, tin, or gold.

[0056] refer to Figure 4 as well as Figure 5 , Figures 4 to 5This is a schematic diagram of the structure corresponding to the step of forming a conductive structure 130 in the semiconductor structure fabrication method provided in an embodiment of the present disclosure. A conductive structure 130 connected to an electrical connection structure 120 is formed on a packaging substrate 113. The conductive structure 130 includes a first portion 131 and a second portion 132. The second portion 132 is used to connect a test device. The second portion 132 includes a connection segment 133 connected to the first portion 131, a contact segment 134 spaced apart from the connection segment 133 and used to connect to the test device, and a connection device 135 connecting the connection segment 133 to the contact segment 134. The connection device 135 is detachably connected between the connection segment 133 and the contact segment 134. In other words, the conductive structure 130 can be directly formed on the packaging substrate 113, thus simplifying the fabrication process. Furthermore, the connection segment 133 can be formed to connect with the electrical connection structure 120 in the same process step, further simplifying the process flow and facilitating large-scale production.

[0057] Specifically, in some embodiments, the process steps for forming the conductive structure 130 include:

[0058] refer to Figure 4 A conductive portion 136, an electrical contact structure 137, and an initial connection segment 133 electrically connected to an electrical connection structure 120 are formed on a packaging substrate 113. The electrical contact structure 137 is located at the end of the conductive portion 136 away from the electrical connection structure 120. A portion of the initial connection segment 133 is used as a connection segment 133, and the remaining portion of the initial connection segment 133 is used as a first portion 131. The conductive portion 136 and the connection segment 133 are spaced apart.

[0059] In other words, the conductive part 136 and the electrical contact structure 137 can be formed separately. Thus, in the step of forming the electrical contact structure 137, the surface area of ​​the electrical contact structure 137 can be adjusted to be relatively large, so that when the electrical contact structure 137 is connected to the connection line of the test device, the contact area between the electrical contact structure 137 and the connection line is large, which is beneficial to the rapid transmission of test signals.

[0060] The conductive part 136 and the connecting section 133 are spaced apart, that is, space is reserved between the conductive part 136 and the connecting section 133 for the connecting device 135, so that the connecting device 135 can be detachably connected between the connecting section 133 and the contact section 134.

[0061] The initial connection segment 133 is divided into a connection segment 133 and a first part 131, the first part 131 being the portion subsequently covered by the encapsulation layer 112. In other words, a portion of the initial connection segment 133 is reserved for being covered by the encapsulation layer 112. This prevents the entire connection segment 133 from being covered due to the possibility of forming too much encapsulation layer 112 on the encapsulation substrate 113, thereby increasing the process window for forming the encapsulation layer 112.

[0062] refer to Figure 5 A connecting device 135 is provided between the conductive part 136 and the electrical connection structure 120. The connecting device 135 connects the connecting segment 133 to the conductive part 136. The electrical contact structure 137, the conductive part 136, the connecting device 135, the connecting segment 133, and the first part 131 form the conductive structure 130. A space is reserved between the conductive part 136 and the electrical connection structure 120 to form the connecting device 135, simplifying the fabrication process.

[0063] Specifically, in some embodiments, an electroplating process can be used to form the conductive structure 130. Specifically, a dry electroplating process can be used to form the conductive structure 130, such as vacuum electroplating, vapor phase electroplating, and molten electroplating using molten metal. In this way, only the portion where the conductive structure 130 needs to be formed can be electroplated without affecting other parts of the encapsulation layer 112.

[0064] In some embodiments, the material of the conductive structure 130 includes any one of copper, tin, or gold. Specifically, in some embodiments, the material of the conductive structure 130 can be copper. On the one hand, copper has good conductivity, allowing electrical signals on the die 111 to be output relatively quickly through the conductive portion 136. On the other hand, copper is inexpensive, thus reducing the manufacturing cost of the semiconductor structure and facilitating large-scale production.

[0065] refer to Figure 6 , Figure 6 This is a schematic diagram of the structure corresponding to the step of forming the encapsulation layer 112 in the method for fabricating a semiconductor structure according to an embodiment of this disclosure. The encapsulation layer 112 is formed on the surface of the encapsulation substrate 113, and the encapsulation layer 112 encapsulates the bare die 111, the first portion 131, and part of the electrical connection structure 120. Specifically, in some embodiments, the encapsulation layer 112 can be formed on the surface of the encapsulation substrate 113 using a molding compound process. The material of the encapsulation layer 112 can be an encapsulation molding compound, such as any one of epoxy molding compound, silicone rubber, or polyimide.

[0066] refer to Figure 1The packaging substrate 113 is electrically connected to the system board 100 based on the electrical connection structure 120. Specifically, in some embodiments, a plurality of spaced solder balls 124 can be formed between the packaging substrate 113 and the system board 100. The solder balls 124 are electrically connected to the wiring 123 and the system board 100, thereby realizing the electrical connection between the electrical connection structure 120 and the system board 100. Specifically, in some embodiments, a soldering method can be used to form a plurality of spaced solder balls 124.

[0067] In the semiconductor structure fabrication method provided in the above embodiments, an electrical connection structure 120 and a conductive structure 130 connected to the electrical connection structure 120 are formed on the packaging substrate 113. The electrical connection structure 120 is electrically connected to the bare die 111. The conductive structure 130 includes a first part 131 and a second part 132. The second part 132 is used to connect a test device. The second part 132 includes a connection segment 133 connected to the first part 131, a contact segment 134 spaced apart from the connection segment 133 and used to connect the test device, and a connection device 135 connecting the connection segment 133 to the contact segment 134. The connection device 135 is detachably connected between the connection segment 133 and the contact segment 134. An encapsulation layer 112 is formed on the surface of the packaging substrate 113. The encapsulation layer 112 encapsulates the bare die 111, the first part 131, and part of the electrical connection structure 120. The packaging substrate 113 is electrically connected to the system board 100 based on the electrical connection structure 120. A conductive structure 130 for connecting to a test device is formed on the packaging substrate 113, and is electrically connected to the electrical connection structure 120 in the packaging structure 110, realizing signal transmission between the die 111 and the test device. This not only simplifies the fabrication process but also shortens the connection distance between the test point and the die 111, resulting in a shorter signal transmission path, which is beneficial for test signal transmission. Furthermore, a detachable connector 135 is provided in the conductive structure 130 to control the current flow between the die 111 and the conductive structure 130. Thus, after testing the die 111, the connector 135 can be removed to disconnect the connection between the die 111 and the conductive structure 130, ensuring that the conductive structure 130 does not affect the normal performance of the die 111. This achieves the goal of improving the quality of the test signal while maintaining good performance of the die 111 itself.

[0068] Accordingly, refer to Figure 7 , Figure 7 This is a schematic diagram of a test system provided in one embodiment of the present disclosure. The present disclosure also provides a test system including a test apparatus 1, which is used to test any of the aforementioned semiconductor structures. (See reference...) Figure 1 as well as Figure 7In this embodiment, a conductive structure 130 is provided on the packaging substrate 113 as a test point for connecting the test device 1. This is equivalent to embedding the test point within the semiconductor structure. Compared to introducing an additional adapter board between the die 111 and the system board 100 to provide the test point, the distance between the test point and the die 111 is closer, resulting in a shorter signal transmission path and facilitating faster signal transmission. Furthermore, there is no need to additionally provide electrical connection lines between the die 111 and the system board 100, thus minimizing the impact on the signal itself and more accurately reflecting the signal quality. The connecting device 135 is detachably connected between the connecting section 133 and the contact section 134, enabling the switching of current between the conductive structure 130 and the electrical connection structure 120. Thus, after the test of the bare die 111 is completed, the connecting device 135 can be removed to disconnect the connection between the conductive structure 130 and the electrical connection structure 120, so that the conductive structure 130 on the packaging substrate 113 will not affect the normal performance of the bare die 111. In this way, when using the test system to test the semiconductor structure, not only can the quality of the test signal be improved, but the performance of the bare die 111 itself can also be maintained.

[0069] Those skilled in the art will understand that the above embodiments are specific examples of implementing this disclosure, and in practical applications, various changes in form and detail may be made without departing from the spirit and scope of this disclosure. Any person skilled in the art can make their own modifications and alterations without departing from the spirit and scope of this disclosure; therefore, the scope of protection of this disclosure should be determined by the scope defined in the claims.

Claims

1. A semiconductor structure, characterized in that, include: System board; A packaging structure is disposed on the surface of the system board. The packaging structure includes a die, a packaging layer, and a packaging substrate. The packaging layer is located on the surface of the packaging substrate away from the system board, and the packaging layer encapsulates the die. An electrical connection structure, wherein a portion of the electrical connection structure is located within the package structure, and the electrical connection structure electrically connects the die to the system board respectively; A conductive structure is located on the surface of the packaging substrate away from the system board. The packaging layer covers a portion of the conductive structure. The conductive structure includes a first portion covered by the packaging layer and electrically connected to the electrical connection structure, and a second portion not covered by the packaging layer and used for connecting a test device. The second portion includes a connection segment connected to the first portion, a contact segment spaced apart from the connection segment and used for connecting a test device, and a connection device connecting the connection segment to the contact segment. The connection device is detachably connected between the connection segment and the contact segment. After testing the bare die, the connecting device is removed to disconnect the conductive structure from the electrical connection structure. The connecting device is an external resistor with a resistance of zero ohms.

2. The semiconductor structure according to claim 1, characterized in that, The contact segment includes: A conductive portion, wherein the conductive portion contacts the end of the connecting device away from the connecting segment; An electrical contact structure is located at the end of the conductive portion away from the connecting device.

3. The semiconductor structure according to claim 2, characterized in that, The orthographic projection shape of the electrical contact structure on the surface of the packaging substrate is rectangular.

4. The semiconductor structure according to claim 2, characterized in that, The projected area of ​​the electrical contact structure on the surface of the packaging substrate is greater than the projected area of ​​the conductive part on the surface of the packaging substrate.

5. The semiconductor structure according to claim 1, characterized in that, The orthographic projection of the encapsulation layer onto the surface of the encapsulation substrate falls onto the surface of the encapsulation substrate.

6. The semiconductor structure according to claim 1, characterized in that, The electrical connection structure includes: Pads, the pads being located on the surface of the packaging substrate away from the system board; Bonding wires that electrically connect the die and the pads; Wiring and solder balls electrically connected to the wiring, the wiring passing through the package substrate and electrically connected to the pads, the solder balls being located between the package substrate and the system board and electrically connected to the system board.

7. The semiconductor structure according to claim 6, characterized in that, The connecting segment is connected to the end of the conductive structure adjacent to the pad.

8. A method for fabricating a semiconductor structure, characterized in that, include: Provides packaging substrates and system boards; An electrical connection structure and a conductive structure connected to the electrical connection structure are formed on the packaging substrate. The electrical connection structure is electrically connected to the die. The conductive structure includes a first part and a second part. The second part is used to connect a test device. The second part includes a connection segment connected to the first part, a contact segment spaced apart from the connection segment and used to connect the test device, and a connection device connecting the connection segment to the contact segment. The connection device is detachably connected between the connection segment and the contact segment. An encapsulation layer is formed on the surface of the encapsulation substrate, the encapsulation layer encapsulating the bare die, the first portion and a portion of the electrical connection structure; The packaging substrate is electrically connected to the system board based on the electrical connection structure; After testing the bare die, the connecting device is removed to disconnect the conductive structure from the electrical connection structure. The connecting device is an external resistor with a resistance of zero ohms.

9. The method for preparing a semiconductor structure according to claim 8, characterized in that, The process steps for forming the conductive structure include: A conductive portion, an electrical contact structure, and an initial connection segment electrically connected to the electrical connection structure are formed on the packaging substrate. The electrical contact structure is located at the end of the conductive portion away from the electrical connection structure. A portion of the initial connection segment serves as the connection segment, and the remaining portion of the initial connection segment serves as the first portion. The conductive portion and the connection segment are spaced apart. A connecting device is provided between the conductive part and the electrical connection structure, the connecting device connecting the connecting segment to the conductive part, and the electrical contact structure, the conductive part, the connecting device, the connecting segment, and the first part form the conductive structure.

10. The method for preparing a semiconductor structure according to claim 9, characterized in that, The conductive structure is formed using an electroplating process.

11. The method for preparing a semiconductor structure according to claim 8, characterized in that, The material of the conductive structure includes any one of copper, tin, or gold.

12. A testing system comprising a testing apparatus for testing a semiconductor structure electrically connected to any one of claims 1 to 7.

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