A method of designing a combined signal filter

Abstract

The application provides a combined signal filter design method, and the construction of the filter adopts a hierarchical, partitioned and grouped method to construct each pair of filter conceptual layer, logical layer and physical layer of the filter, forms a branch system in structure, and is more convenient for specific design and overall performance evaluation; in the design process, electrical interfaces, circuit topologies and circuit parameters are designed, and through the selection of components, a closed loop is completed at the entity design level, and the overall design method is more scientific and practical, thereby providing a solution for the low-cost and rapid design of the combined signal filter.

Description

Technical Field

[0001] This invention relates to the fields of electromagnetic compatibility and electronics, specifically to a method for designing combined signal filters. Background Technology

[0002] As electronic systems face increasingly demanding requirements in complex electromagnetic interference environments, the electromagnetic compatibility (EMC) requirements for integrated electronic systems are becoming more stringent, necessitating multiple EMC tests before deployment. EMC issues in integrated electronic systems, particularly exceeding CE102 and RE102 limits, can be addressed using filters, thus requiring a design methodology for combined signal filters.

[0003] In filter design, power supply filtering and signal filtering are generally separated. For filter design of combined signals, existing design methods involve combining parts to form the whole. This type of method usually requires repeated adjustments to the design to ensure that the parts combine and have minimal mutual interference, making the design process time-consuming, labor-intensive, and with a low success rate. Summary of the Invention

[0004] The purpose of this invention is to provide a method for designing combined signal filters, so as to overcome the problems of long design time and low success rate in the existing technology.

[0005] To achieve the above objectives, the present invention provides the following technical solution:

[0006] A method for designing a combined signal filter includes the following steps;

[0007] S1: Performance requirements for filtering functions to acquire power, KIO and serial port signals;

[0008] S2: Perform time-domain and frequency-domain characteristic analysis on power supply, KIO, and serial port signals;

[0009] S3: Based on the performance requirements of filtering functions for power supply, KIO, and serial port signals, and the results of time-domain and frequency-domain characteristic analysis, construct the filter concept layer, logic layer, and physical layer;

[0010] S4: Based on the constructed filter concept layer, logic layer, and physical layer, design the electrical interface, circuit topology, and circuit parameters of the filter circuit;

[0011] S5: Select components based on the circuit parameters of the filter circuit to complete the filter design.

[0012] Preferably, the specific performance requirements for the filtering function in S1 for acquiring power, KIO, and serial port signals are as follows:

[0013] First, the amplitude-frequency characteristics of the electromagnetic compatibility test results are analyzed to obtain the frequency bands and amplitudes exceeding the standard. Based on the requirements of meeting electromagnetic compatibility, structural and electrical requirements, and environmental adaptability requirements, the insertion loss index is decomposed. Finally, the performance requirements for filtering functions of power supply, KIO, and serial port signals are proposed in combination with the index requirements.

[0014] Preferably, the filter concept layer in S3 is constructed using a passive filtering mode, with grounding implemented at the component level, board level, external cable level, and housing level, and further divided and grouped for grounding at each level.

[0015] Preferably, the construction of the filter physical layer in S3 specifically involves: hierarchical design, partitioning design, and grouping design of the filter hardware.

[0016] Preferably, the hardware is designed in a hierarchical manner at the system level, printed circuit board level, module level, and component level.

[0017] Preferably, the partitioning is designed as a power supply area, a KIO area, and a serial port signal area;

[0018] Preferably, the grouping design involves grouping KIO and serial port signals according to the signal.

[0019] Preferably, the electrical interface design of the filter circuit adopts electromagnetic compatibility design through isolation, grounding, and shielding.

[0020] Preferably, the circuit parameter design of the filter circuit specifically involves first normalizing the frequency characteristics, and then obtaining the denormalized circuit parameters of the filter circuit by scaling the transfer function and parameter values ​​according to the frequency and impedance ratio.

[0021] Compared with the prior art, the present invention has the following beneficial effects: The present invention provides a design method for combined signal filters. The filter is constructed by using a hierarchical, partitioned, and grouped approach to build the conceptual layer, logic layer, and physical layer of each filter pair, forming a branch system in structure, which is more convenient for specific design and overall performance evaluation. In the design process, electrical interfaces, circuit topology, and circuit parameters are designed, and a closed loop is completed at the physical design level through the selection of components. The overall design method is more scientific and practical, providing a solution for low-cost and rapid design of combined signal filters. Attached Figure Description

[0022] Figure 1 This is a flowchart of a combined signal filter design method according to the present invention. Detailed Implementation

[0023] The present invention will be further described in detail below with reference to specific embodiments. These descriptions are for explanation purposes only and are not intended to limit the scope of the invention.

[0024] like Figure 1 As shown, this invention provides a combined filter design method. This invention adopts a clear design method from high to low levels and considers more comprehensive influencing factors, thereby improving design efficiency and design success rate. It provides a solution for the good electromagnetic compatibility performance requirements of control systems and the efficient design method of combined signal filters.

[0025] The present invention is achieved through the following technical solution.

[0026] A method for designing a combined signal filter, comprising:

[0027] The requirements analysis for the filter includes:

[0028] First, the amplitude-frequency characteristics of the electromagnetic compatibility test results are analyzed to obtain the out-of-standard frequency band Δf. ij and the excess range ΔG ij Let i∈M, j∈N, where M is the signal type and N is the number of frequency bands exceeding the standard. Secondly, the principles of filter design are proposed, including: meeting electromagnetic compatibility requirements, meeting structural and electrical requirements, and meeting environmental adaptability requirements. Then, the indicators are decomposed, using one or more combinations of empirical, equivalent, or simulation methods. Finally, based on the indicator requirements, the filtering performance requirements for power supply, KIO, and serial port signals are proposed, including dividing the interface signals into points according to frequency, grouping signals according to category, arranging signals according to characteristics, and proposing the differential-mode insertion loss and common-mode insertion loss for the three types of signals in the frequency bands exceeding the standard, with safety margins provided.

[0029] Time-domain and frequency-domain characteristic analysis was performed on the power signal, KIO signal, and serial port signal to obtain the rise time T. R descent time T F rate of change of amplitude And in the frequency band exceeding the standard Δf ij Differential insertion loss ΔDIL ij and common-mode insertion loss ΔCIL ij And leave a safety margin ΔW ij .

[0030] The filter is demonstrated, including:

[0031] Conceptual level argumentation: Discuss the filtering mode, the filter grounding method, and the filter shielding method;

[0032] Logical layer argumentation: Analyze the relationships between nodes, including the timing and logical relationships of the corresponding branch signals;

[0033] Physical layer argumentation: The relationship between partitioned signals, grouped signals, and signals within a group is analyzed from the perspective of current relationship. The main basis is Kirchhoff's current law and Ohm's law.

[0034] The filter is constructed, including:

[0035] Conceptual layer construction: Select passive filtering mode. Properly ground the component level, board level, external cables, and housing, and further partition and group grounding based on the hierarchical structure; shield the filter using the same method.

[0036] Logical layer construction: rise time T R descent time T F and rate of change of amplitude It is the time-domain waveform of the signal of interest, and the frequency range exceeding the standard is Δf. ij Differential insertion loss ΔDIL ij and common-mode insertion loss ΔCIL ij and safety margin ΔW ij This refers to the frequency domain waveform of the signal. The 10kHz to 1MHz frequency band is mainly differential-mode interference, while the frequency band above 1MHz is mainly common-mode interference. Therefore, ΔW is required. ij +ΔDIL ij ≥ΔG ij (10kHz~1MHz band), ΔW ij +ΔCIL ij ≥ΔG ij (Frequency band above 1MHz).

[0037] Physical layer construction: The filter hardware is designed hierarchically, partitioned, and grouped. The hardware hierarchy is divided into system-level, printed circuit board level, module level, and component level; the partitioning design is divided into power supply area, KIO area, and serial port signal area; the grouping design is to group KIO and serial port signals according to the signal.

[0038] The design of the filter circuit includes:

[0039] Electrical interface design: Electromagnetic compatibility (EMC) design employs isolation, grounding, and shielding. For grounding, the grounding pins of components should be reliably grounded, the shielding cover should be grounded to the ground plane, the printed circuit board should be grounded through metallized mechanical holes, and the housing should be grounded through conductive oxide surfaces. For shielding, components should be shielded with metal shells or shielding covers, and cables should be shielded with a shielding layer (either built-in or added; the latter can be complete or incomplete shielding, with complete shielding involving grounding of the shielding body).

[0040] Topology Design: The basic units of filter circuits are divided into four types: Γ-type, inverse Γ-type, T-type, and Π-type, which are constructed by connecting a resistor in series with several inductors and several capacitors in parallel. In practical applications, the basic units need to be cascaded or connected in parallel to complete the design. For the design of low-pass filters, when Z... G →∞ and Z L When Z approaches infinity, a parallel capacitor structure is selected. G →0 and Z L When →0, a series inductor structure is selected. G →0 and Z L When Z approaches infinity, a structure is selected that first connects the inductor in series and then the capacitor in parallel. G →∞ and Z L When the value is →0, a structure is selected that first connects the capacitor in parallel and then the inductor in series, where Z... G For the impedance of the interference source, Z L This is the load impedance.

[0041] Parameter design: First, frequency response normalization is performed, that is, a filter type with a specific complexity is selected based on the frequency response characteristics (including Butterworth's flattest amplitude-frequency response, Chebyshev's flattest amplitude-frequency response, Bessel's flattest delay, linear phase and equal ripple error, transition characteristics, synchronous tuning, elliptic function and Papris optimization "L"). Then, the denormalized filter parameters are obtained by scaling the transfer function and parameter values ​​according to the frequency and impedance ratios.

[0042] Component (raw material) selection: Select resistor, capacitor and inductor parameters based on filter parameters, and then select package, quality grade, temperature range, rated power consumption, limit voltage, allowable deviation and weight according to structural requirements.

[0043] Supply chain confirmation: Based on the selected component (raw material) model, evaluate the supply cycle and supply stability of its suppliers, and select the best manufacturer.

[0044] Compared with existing methods, the present invention has at least the following beneficial effects:

[0045] 1. Before the design work, the present invention conducts a requirements analysis on the filter and clarifies various basic indicators.

[0046] 2. The filter is demonstrated and constructed from conceptual, logical and physical perspectives, making the method more rigorous and orderly.

[0047] 3. The filter is constructed using a hierarchical, partitioned, and grouped approach, forming a branch system that facilitates detailed design and overall performance evaluation.

[0048] 4. During the design process, a closed loop was completed at the physical design level, covering electrical interfaces, circuit topology, parameter design, component (raw material) selection, and supply chain confirmation.

[0049] This invention enables a more comprehensive and efficient design of combined signal filters using standardized and simplified design methods. It proposes a hierarchical, partitioned, and grouped construction method, making the design method more scientific and practical, and providing a solution for the low-cost and rapid design of combined signal filters.

[0050] Although embodiments of the present invention have been described above in conjunction with the accompanying drawings, the present invention is not limited to the specific embodiments and application fields described above. The specific embodiments described above are merely illustrative and instructive, and not restrictive. Those skilled in the art, guided by the specification, can make many other modifications without departing from the scope of the claims of the present invention, and all of these modifications are within the scope of protection of the present invention.

Claims

1. A method for designing a combined signal filter, characterized in that, Includes the following steps; S1: Performance requirements for filtering functions to acquire power, KIO and serial port signals; S2: Perform time-domain and frequency-domain characteristic analysis on power supply, KIO, and serial port signals; S3: Based on the performance requirements of filtering functions for power supply, KIO, and serial port signals, and the results of time-domain and frequency-domain characteristic analysis, construct the filter concept layer, logic layer, and physical layer; S4: Based on the constructed filter concept layer, logic layer, and physical layer, design the electrical interface, circuit topology, and circuit parameters of the filter circuit; S5: Select components based on the circuit parameters of the filter circuit to complete the filter design; The specific construction of the filter's conceptual layer, logic layer, and physical layer is as follows: Conceptual layer construction: Select passive filtering mode, ground the component level, board level, external cables and housing respectively, and perform partitioned and grouped grounding on the basis of the hierarchy; The filter was shielded in the same manner. Logical layer construction: rise time T R descent time T F and rate of change of amplitude It refers to the time-domain waveform of the signal, and the frequency band exceeding the standard. Differential insertion loss and common-mode insertion loss and safety margin This refers to the frequency domain waveform of the signal. The 10kHz~1MHz frequency band is mainly characterized by differential-mode interference, while the frequency band above 1MHz is mainly characterized by common-mode interference. Therefore, it is required... , ; Physical layer construction: The filter hardware is designed hierarchically, partitioned, and grouped. The hardware is hierarchically divided into whole machine level, printed circuit board level, module level, and component level. The partitioning design is divided into power supply area, KIO area, and serial port signal area. The grouping design is to group KIO and serial port signals according to the signal. The design of the filter circuit includes: Electrical interface design: Electromagnetic compatibility design is carried out using isolation, grounding, and shielding. For grounding, the grounding pins of components should be reliably grounded, the shielding cover should be grounded to the ground layer, the printed circuit board should be grounded through metallized mechanical holes, and the housing should be grounded through conductive oxide surfaces. For shielding, components should be shielded with metal shells or shielding covers. Cables should use shielding layers, either built-in or added. Added shielding is divided into complete shielding and incomplete shielding. Complete shielding involves grounding the shielding body. Topology Design: The basic units of filter circuits are divided into four types: Γ-type, inverse Γ-type, T-type, and Π-type. They are constructed by connecting resistors in series with several inductors and capacitors in parallel. These basic units are cascaded or connected in parallel to complete the design. For the design of low-pass filters, when... and When a parallel capacitor structure is selected, and When a series inductor structure is selected, when and When using a structure where the inductor is connected in series first and the capacitor in parallel, and When using this method, a structure is chosen where the capacitor is connected in parallel first, followed by the inductor in series. For the impedance of the interference source, The load impedance; Parameter design: First, the frequency response is normalized. Then, the denormalized filter parameters are obtained by scaling the transfer function and parameter values ​​according to the frequency and impedance ratios.

2. The method for designing a combined signal filter according to claim 1, characterized in that, The specific performance requirements for the filtering function in S1 for acquiring power, KIO, and serial port signals are as follows: First, the amplitude-frequency characteristics of the electromagnetic compatibility test results are analyzed to obtain the frequency bands and amplitudes exceeding the standard. Based on the requirements of meeting electromagnetic compatibility, structural and electrical requirements, and environmental adaptability requirements, the insertion loss index is decomposed. Finally, the performance requirements for filtering functions of power supply, KIO, and serial port signals are proposed in combination with the index requirements.

3. The method for designing a combined signal filter according to claim 1, characterized in that, The electrical interface design of the filter circuit adopts isolation, grounding and shielding for electromagnetic compatibility design.

4. The method for designing a combined signal filter according to claim 1, characterized in that, The specific design of the filter circuit parameters involves first normalizing the frequency response, and then obtaining the denormalized filter circuit parameters by scaling the transfer function and parameter values ​​according to the frequency and impedance ratios.

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