Energy detection circuit

Abstract

The application provides an energy detection circuit, and relates to the technical field of electronics.The circuit comprises a first field effect transistor, a second field effect transistor, a third field effect transistor and a fourth field effect transistor.The first field effect transistor and the second field effect transistor constitute a first gate cross-coupled rectification structure, and the third field effect transistor and the fourth field effect transistor constitute a second gate cross-coupled rectification structure.The threshold voltage of the field effect transistor is reduced by adjusting the substrate potential of the first gate cross-coupled rectification structure, and the lower limit of detection is less than half of the threshold voltage of the field effect transistor.On the one hand, the lower limit of energy detection is reduced, and the sensitivity of the wake-up circuit is improved; on the other hand, the power consumption of the energy detection circuit is reduced.

Description

Technical Field

[0001] This invention relates to the field of electronic technology, and more particularly to an energy detection circuit. Background Technology

[0002] Systems involving high-speed differential signal transmission, such as high-speed serial interface (SERDES) chips, wireless LANs such as automotive Ethernet physical layer (PHY) chips, and portable radio frequency communication devices, often require a low-power mode. This mode allows the system to sleep when there is no signal transmission to reduce power consumption. When a data signal is detected, the system wakes up the low-power mode and enters normal mode to perform data transmission and exchange.

[0003] Traditional energy detection circuits fall into two main categories. One approach compares the detected data signal with a reference signal using a comparator to determine the presence of a data signal by analyzing the voltage level. This method struggles to achieve low power consumption in high-speed data systems because high-speed data transmission requires a high-bandwidth comparator, which in turn demands high current, contradicting the need for low power consumption. The other approach uses diode rectification. The detection limit of this method is the diode's forward voltage drop or the threshold voltage of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOS), which is around 0.7V. Combined with the attenuation from cable transmission, the threshold voltage of traditional rectifier circuits is too high to be directly used for data signal detection. Therefore, traditional energy detection circuits are insufficient to meet the signal detection requirements of data transmission systems. Summary of the Invention

[0004] This application provides an energy detection circuit to solve the problems of high threshold and high power consumption in the prior art.

[0005] To address the aforementioned technical problems, embodiments of this application provide an energy detection circuit, comprising:

[0006] First field-effect transistor, second field-effect transistor, third field-effect transistor, fourth field-effect transistor;

[0007] The sources of the first and third field-effect transistors are respectively connected to the first terminal of the differential input signal;

[0008] The gates of the first and third field-effect transistors are respectively connected to the second terminal of the differential input signal;

[0009] The sources of the second and fourth field-effect transistors are respectively connected to the second terminals of the differential input signal;

[0010] The gates of the second and fourth field-effect transistors are respectively connected to the first terminal of the differential input signal;

[0011] The drain of the third field-effect transistor is connected to the substrate of the third field-effect transistor;

[0012] The drain of the fourth field-effect transistor is connected to the substrate of the fourth field-effect transistor;

[0013] The drains of the third and fourth field-effect transistors are connected;

[0014] The substrate of the first field-effect transistor is connected to the first terminal of the differential input signal;

[0015] The substrate of the second field-effect transistor is connected to the second terminal of the differential input signal;

[0016] The drains of the first field-effect transistor and the second field-effect transistor are respectively connected to the first connection point.

[0017] In some embodiments, the energy detection circuit further includes:

[0018] A first switch is disposed between the first terminal of the differential input signal and the substrate of the first field-effect transistor;

[0019] A second switch is arranged between the second terminal of the differential input signal and the substrate of the second field-effect transistor.

[0020] In some embodiments, the energy detection circuit further includes:

[0021] A third switch is positioned between the first connection point and the grounding terminal.

[0022] In some embodiments, the energy detection circuit is activated by closing the first switch, the second switch, and the third switch.

[0023] When the energy detection circuit starts working, the first switch, the second switch, and the third switch are turned off.

[0024] In some embodiments, the energy detection circuit further includes:

[0025] A first capacitor is placed between the first connection point and the ground terminal.

[0026] In some embodiments, the value of the first capacitor ranges from 1 to 10 picofarads.

[0027] In some embodiments, the value of the first capacitor ranges from 2 to 3 picofarads.

[0028] In some embodiments, the energy detection circuit further includes a signal processor;

[0029] The input terminal of the signal processor is connected to the first connection point;

[0030] The signal processor outputs an energy detection indication signal.

[0031] The signal processor is an inverter, a field-effect transistor, or a comparator.

[0032] In some embodiments, the energy detection circuit...

[0033] The aspect ratio of the first field-effect transistor ranges from 30 to 100.

[0034] The aspect ratio of the second field-effect transistor ranges from 30 to 100.

[0035] The aspect ratio of the third field-effect transistor is 1; or,

[0036] The aspect ratio of the fourth field-effect transistor is 1.

[0037] In some embodiments, the energy detection circuit comprises a first field-effect transistor, a second field-effect transistor, a third field-effect transistor, and a fourth field-effect transistor, all of which are PMOS (positive MOS) transistors.

[0038] The energy detection circuit provided in this application embodiment uses a two-gate cross-coupled rectifier structure composed of MOS transistors, which on the one hand lowers the lower limit of energy detection and improves the sensitivity of the wake-up circuit, and on the other hand reduces the power consumption of the energy detection circuit. Attached Figure Description

[0039] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0040] Figure 1 This is a schematic diagram of the energy detection circuit provided in an embodiment of this application. Detailed Implementation

[0041] Systems involving high-speed differential signal transmission, such as high-speed serial interface chips, wireless LANs like automotive Ethernet physical layer chips, and portable RF communication devices, often require low-power modes. These modes allow the system to sleep when no signal is being transmitted to reduce power consumption. When a data signal is detected, a wake-up circuit breaks the low-power mode and returns to normal mode for data transmission and exchange. Therefore, low-power, high-sensitivity wake-up circuits are becoming increasingly important, especially for systems with limited power sources, such as battery-powered systems, or communication chips that require optimized power consumption and heat dissipation.

[0042] Traditional energy detection circuits fall into two main categories. One involves comparing the detected data signal with a reference signal using a comparator to determine the presence of a data signal by analyzing the voltage level. This method is difficult to implement with low power consumption in high-speed data systems because high-speed data requires a high-bandwidth comparator, which in turn requires high current, contradicting the need for low power consumption. The other method uses diode rectification. The detection limit of this method is the diode's forward voltage drop or the MOSFET threshold voltage, which is around 0.7V. For signal transmission systems, such as automotive Ethernet 100base-T1PHY chips, the single-ended signal peak value is no greater than 1.1V, and the amplitude is no greater than 0.55V. Combined with the attenuation from cable transmission, the threshold voltage of traditional rectifier circuits is too high to be directly used for data signal detection.

[0043] Traditional energy detection circuits are difficult to meet the signal detection requirements of data transmission systems. Therefore, this application provides an energy detection circuit that solves the problems of high detection threshold and high power consumption in the prior art.

[0044] To make the objectives, technical solutions, and advantages of this application clearer, a further detailed description of this application will be provided below in conjunction with the accompanying drawings. However, the exemplary embodiments can be implemented in various forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided to make this application more comprehensive and complete, and to fully convey the concept of the exemplary embodiments to those skilled in the art. The same reference numerals in the drawings denote the same or similar structures, and therefore repeated descriptions of them will be omitted. Terms describing position and direction as described in this application are illustrative based on the accompanying drawings, but changes can be made as needed, and all such changes are included within the scope of protection of this application. The accompanying drawings of this application are only for illustrating relative positional relationships and do not represent actual proportions. All other embodiments obtained by those skilled in the art based on the embodiments in this application without inventive effort are within the scope of protection of this application.

[0045] Figure 1 This is a schematic diagram of the energy detection circuit provided in an embodiment of this application, as shown below. Figure 1 As shown, this application embodiment provides an energy detection circuit, including:

[0046] First field-effect transistor P1, second field-effect transistor P2, third field-effect transistor P3, fourth field-effect transistor P4;

[0047] The sources of the first field-effect transistor P1 and the third field-effect transistor P3 are respectively connected to the first terminal of the differential input signal;

[0048] The gates of the first field-effect transistor P1 and the third field-effect transistor P3 are respectively connected to the second terminal of the differential input signal;

[0049] The sources of the second field-effect transistor P2 and the fourth field-effect transistor P4 are respectively connected to the second terminal of the differential input signal;

[0050] The gates of the second field-effect transistor P2 and the fourth field-effect transistor P4 are respectively connected to the first terminal of the differential input signal;

[0051] The drain of the third field-effect transistor P3 is connected to the substrate of the third field-effect transistor P3.

[0052] The drain of the fourth field-effect transistor P4 is connected to the substrate of the fourth field-effect transistor P4;

[0053] The drains of the third field-effect transistor P3 and the fourth field-effect transistor P4 are connected;

[0054] The substrate of the first field-effect transistor P1 is connected to the first terminal of the differential input signal;

[0055] The substrate of the second field-effect transistor P2 is connected to the second terminal of the differential input signal;

[0056] The drains of the first field-effect transistor P1 and the second field-effect transistor P2 are respectively connected to the first connection point.

[0057] Specifically, the first field-effect transistor (FET) P1 and the second FET P2 form a first gate-cross-coupled rectifier structure, and the third FET P3 and the fourth FET P4 form a second gate-cross-coupled rectifier structure. The substrates of the first FET P1, the second FET P2, the third FET P3, and the fourth FET P4 are connected together. The differential input data signal is connected to the first gate-cross-coupled rectifier structure, which includes the first FET P1 and the second FET P2. The source of the FETs is connected to one end of the differential input data signal, and the gate is cross-coupled to the other end of the input data signal. The drains of the first FET P1 and the second FET P2 are connected together. This structure fully utilizes the characteristics of the differential signal, making the detection threshold less than the threshold of the FETs.

[0058] Furthermore, by adjusting the substrate potential of the first field-effect transistor P1 and the second field-effect transistor P2 through the second gate cross-coupled rectifier structure, the substrate bias effect of the field-effect transistor in the gate cross-coupled structure is reduced to the greatest extent, thereby reducing the threshold voltage of the first field-effect transistor P1 and the second field-effect transistor P2, and thus lowering the lower limit of the circuit's energy detection.

[0059] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0060] In some embodiments, the energy detection circuit further includes:

[0061] A first switch K1 is disposed between the first terminal of the differential input signal and the substrate of the first field-effect transistor P1;

[0062] The second switch K2 is arranged between the second terminal of the differential input signal and the substrate of the second field-effect transistor P2.

[0063] Specifically, the substrate potentials of the third field-effect transistor (FET) P3 and the fourth field-effect transistor (FET) P4 are connected to the input data signal; when there is no signal input, their values ​​are the common-mode level of the differential data signal. When energy detection begins, switch K1 can be used to switch to the drain of the first field-effect transistor (FET) P1. At this time, the substrate of the second gate cross-coupled structure is connected to the drain of the first field-effect transistor (FET) P1. When there is no energy input, the gate, source, substrate, and drain potentials of the third field-effect transistor (FET) P3 and the fourth field-effect transistor (FET) P4 in the second gate cross-coupled structure are the same. When there is an energy input greater than the detection lower limit, the voltage drop during FET conduction is ignored, and the drain of the FET is the highest potential of the input data signal.

[0064] Furthermore, the substrate of the second gate cross-coupled structure can be switched to the drain of the second field-effect transistor P2 via switch K2.

[0065] This application provides an energy detection circuit that adjusts the substrate potential of the first field-effect transistor P1 and the second field-effect transistor P2 through a second gate cross-coupled rectifier structure. This reduces the increase in the threshold voltage of the rectifier field-effect transistor caused by the substrate bias effect, while ensuring the highest potential of the substrate connection circuit to avoid PN junction forward bias and latch-up effect, thus ensuring reliability.

[0066] In some embodiments, the energy detection circuit further includes a third switch K3 disposed between the first connection point and the grounding terminal.

[0067] Specifically, the third switch K3 is closed before energy detection begins, allowing the energy detection signal to be grounded before detection starts. When energy detection begins, the switch opens, and the amplitude of the energy detection signal increases when data is input.

[0068] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure and a third switch K3, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0069] In some embodiments, before the energy detection circuit is started, the first switch K1, the second switch K2, and the third switch K3 are closed.

[0070] When the energy detection circuit starts working, the first switch K1, the second switch K2, and the third switch K3 are disconnected.

[0071] Specifically, the first switch K1 and the second switch K2 are used to adjust the substrate potentials of the first field-effect transistor P1 and the second field-effect transistor P2, so that the threshold voltages of the first field-effect transistor P1 and the second field-effect transistor P2 are kept at a dynamic maximum potential, rather than a fixed high potential, thereby reducing the lower limit of energy detection of the circuit. The third switch K3 is closed before the energy detection circuit is started, so that the energy detection signal is grounded through the switch before energy detection begins.

[0072] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure and switching on and off, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0073] In some embodiments, the energy detection circuit further includes:

[0074] A first capacitor C1 is placed between the first connection point and the ground terminal.

[0075] Specifically, the first gate cross-coupled rectifier structure rectifies the input signal, causing the voltage at the positive terminal of capacitor C1 to rise from 0V. Its stable value is the common-mode voltage of the energy detection input signal plus the single-ended amplitude.

[0076] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure and a first capacitor C1, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0077] In some embodiments, the value of the first capacitor C1 ranges from 1 to 10 picofarads.

[0078] Specifically, the first gate cross-coupled rectifier structure rectifies the input signal, causing the voltage at the positive terminal of capacitor C1 to rise from 0V. Its stable value is the common-mode voltage of the energy detection input signal plus the single-ended amplitude. The capacitance value of the first capacitor C1 can be selected according to the process and specific application. A smaller value increases the energy detection speed, but too small a value will lead to poor anti-interference ability. Generally, a value in the picofarad (pF) range is sufficient, and it can be 1 to 10 picofarads.

[0079] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure and a first capacitor C1, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0080] In some embodiments, the value of the first capacitor C1 ranges from 2 to 3 picofarads.

[0081] Specifically, the first gate cross-coupled rectifier structure rectifies the input signal, causing the voltage at the positive terminal of capacitor C1 to rise from 0V. Its stable value is the common-mode voltage of the energy detection input signal plus the single-ended amplitude. The capacitance value of the first capacitor C1 can be selected according to the process and specific application. A smaller value increases the energy detection speed, but too small a value will lead to poor anti-interference ability. Generally, a value in the picofarad range is sufficient, and it can be 2 to 3 picofarads.

[0082] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure and a first capacitor C1, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0083] In some embodiments, the energy detection circuit further includes a signal processor;

[0084] The input terminal of the signal processor is connected to the first connection point;

[0085] The signal processor outputs an energy detection indication signal.

[0086] The signal processor is an inverter, a field-effect transistor, or a comparator.

[0087] Specifically, the input terminal of the signal processor is connected to the first connection point. The signal processor can be an inverter. The energy signal is converted into a digital output signal through the inverter, which can then determine whether there is an energy signal input exceeding the energy detection lower limit. If there is an energy signal input exceeding the energy detection lower limit, it can be sent to the main system's energy presence / absence identification module to wake up the system. The energy signal processing method can be flexible. For example, it can be compared with an adjustable reference signal through a comparator and then output; or it can be used to drive an NMOS (N-Mental-Oxide-Semiconductor) transistor, with the output signal indicated by the drain of the NMOS transistor.

[0088] This application provides an energy detection circuit that, by using a gate cross-coupled rectifier structure and a signal processor, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0089] In some embodiments, the energy detection circuit...

[0090] The aspect ratio of the first field-effect transistor ranges from 30 to 100.

[0091] The aspect ratio of the second field-effect transistor ranges from 30 to 100.

[0092] The aspect ratio of the third field-effect transistor is 1; or,

[0093] The aspect ratio of the fourth field-effect transistor is 1.

[0094] Specifically, the width-to-length ratio (W / L) of the first field-effect transistor P1 and the second field-effect transistor P2 is generally between 30 and 100. The third field-effect transistor P3 and the fourth field-effect transistor P4 do not need to generate large currents, so their W / L values ​​can be small, such as 1, to keep the substrate voltage at a high potential while reducing substrate voltage fluctuations.

[0095] This application provides an energy detection circuit that uses a gate cross-coupled rectifier structure composed of PMOS transistors to reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0096] In some embodiments, the first field-effect transistor P1, the second field-effect transistor P2, the third field-effect transistor P3, and the fourth field-effect transistor P4 are all PMOS transistors.

[0097] Specifically, depending on the common-mode condition of the input signal, the first field-effect transistor P1, the second field-effect transistor P2, the third field-effect transistor P3, and the fourth field-effect transistor P4 can be PMOS transistors.

[0098] This application provides an energy detection circuit that uses a gate cross-coupled rectifier structure composed of PMOS transistors to reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0099] The methods described in the above embodiments will be further illustrated below with specific examples.

[0100] like Figure 1 As shown, the signal processor is an inverter, and the field-effect transistor is a PMOS transistor.

[0101] VIN and VIP are differential input data signals, which are also the input signals of the energy detection circuit. V is the substrate voltage (Vbulk).

[0102] Before the energy detection circuit is started, switches K1, K2, and K3 are all closed. At this time, the source, gate, and substrate of P1 and P2 are connected to the common-mode level of the input signal. The source, gate, drain, and substrate of P3 and P4 are all connected to the common-mode level of the input data signal. The substrates of P1 and P2 are connected to the drains of P3 and P4.

[0103] When the energy detection circuit starts working, switches K1, K2 and K3 are all open.

[0104] When a data signal higher than the detection lower limit is input, the PMOS gate cross-coupled rectification structure composed of P3 and P4, ignoring the PMOS transistor on-state voltage drop, rapidly raises the substrate voltage to the input signal amplitude, ensuring the substrate is at a high potential. P3 and P4 do not need to generate large currents; their W / L ratio can be small, such as 1, to maintain a high substrate voltage while reducing substrate voltage fluctuations. Switches K1 and K2 adjust the substrate voltages of P1 and P2, connecting them to the dynamic highest potential, reducing the threshold voltages of P1 and P2, and thus lowering the detection lower limit of the energy circuit.

[0105] The PMOS gate cross-coupled rectifier structure composed of P1 and P2 rectifies the input signal, causing the voltage signal (Vsense) at the positive terminal of capacitor C1 to rise from 0V. Its stable value is the sum of the common-mode voltage and single-ended amplitude of the energy detection input signal. The W / L ratio of P1 and P2 is typically between 30 and 100. The capacitance value of capacitor C1 can be selected based on the process and specific application. A smaller value increases the energy detection speed, but too small a value leads to poor anti-interference capability; generally, a value in the picofarad range is sufficient.

[0106] Vsense is converted into a detection signal (Vdetect) via an inverter and connected to the system's energy signal presence / absence identification module. When Vdetect is low, the main circuit detects that data has been received and wakes up the system.

[0107] This application provides an energy detection circuit that, through a gate cross-coupled rectifier structure, can reduce the energy detection threshold, improve the sensitivity of the wake-up circuit, and reduce the power consumption of the detection circuit.

[0108] Obviously, those skilled in the art can make various modifications and variations to this application without departing from the spirit and scope of this application. Therefore, if such modifications and variations fall within the scope of the claims of this application and their equivalents, this application also intends to include such modifications and variations.

Claims

1. An energy detection circuit, characterized in that, include: First field-effect transistor, second field-effect transistor, third field-effect transistor, fourth field-effect transistor; The sources of the first and third field-effect transistors are respectively connected to the first terminal of the differential input signal; The gates of the first and third field-effect transistors are respectively connected to the second terminal of the differential input signal; The sources of the second and fourth field-effect transistors are respectively connected to the second terminals of the differential input signal; The gates of the second and fourth field-effect transistors are respectively connected to the first terminal of the differential input signal; The drain of the third field-effect transistor is connected to the substrate of the third field-effect transistor; The drain of the fourth field-effect transistor is connected to the substrate of the fourth field-effect transistor; The drains of the third and fourth field-effect transistors are connected; The substrate of the first field-effect transistor is connected to the first terminal of the differential input signal; The substrate of the second field-effect transistor is connected to the second terminal of the differential input signal; The drains of the first field-effect transistor and the drains of the second field-effect transistor are respectively connected to the first connection point; The first, second, third, and fourth field-effect transistors are all PMOS transistors; The first field-effect transistor and the second field-effect transistor form the first gate cross-coupled rectification structure, and the third field-effect transistor and the fourth field-effect transistor form the second gate cross-coupled rectification structure. It also includes: a first switch disposed between the first terminal of the differential input signal and the substrate of the first field-effect transistor; a second switch disposed between the second terminal of the differential input signal and the substrate of the second field-effect transistor; and a third switch disposed between the first connection point and the ground terminal; Before the energy detection circuit is started, the first switch, the second switch, and the third switch are closed; when the energy detection circuit starts working, the first switch, the second switch, and the third switch are open. It also includes: a first capacitor disposed between the first connection point and the ground terminal; It also includes a signal processor; the input terminal of the signal processor is connected to the first connection point; the output terminal of the signal processor outputs an energy detection indication signal; the signal processor is an inverter, a field-effect transistor, or a comparator.

2. The energy detection circuit according to claim 1, characterized in that, The value of the first capacitor ranges from 1 to 10 picofarads.

3. The energy detection circuit according to claim 2, characterized in that, The value of the first capacitor is in the range of 2 to 3 picofarads.

4. The energy detection circuit according to claim 1, characterized in that, The aspect ratio of the first field-effect transistor ranges from 30 to 100; The aspect ratio of the second field-effect transistor ranges from 30 to 100. The aspect ratio of the third field-effect transistor is 1; or, The aspect ratio of the fourth field-effect transistor is 1.

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