Deposition method
By selectively reacting bulk precursors containing metal atoms, halogen atoms, and other atoms with reactants on semiconductor substrates, the problem of uneven material deposition in integrated circuit manufacturing is solved, achieving efficient material filling and improved circuit performance.
Patent Information
- Application Number
- CN202310180876.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2019-02-07
- Publication Date
- 2026-02-27
- Estimated Expiration
- 2039-02-07
AI Technical Summary
In the current technology for manufacturing integrated circuits on semiconductor substrates, the selective deposition of materials and subsequent processing steps are cumbersome and difficult to reduce effectively. In particular, when filling conductive materials in gaps with high aspect ratios, voids or seams are prone to occur, affecting circuit performance.
By employing a bulk precursor containing metal atoms, halogen atoms, and other atoms, more material is formed on the first surface relative to the second surface through selective reaction with reactants on the substrate. Selective deposition is achieved by cleaning the surface with the pre-prepared precursor and optimizing the reaction conditions.
The material on the first surface is more than 2 times, preferably 5 times, and most preferably 10 times more than that on the second surface, which fills the gaps and reduces subsequent processing steps, thereby improving the material deposition efficiency and circuit performance.
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Figure CN116145112B_ABST
Abstract
Description
[0001] This application is a divisional application of the Invention Patent Application No. 201980008364.5 (Applicant: ASM IP Private Holdings, LLC, Invention Title: Deposition Method) entered China National Phase of PCT Application PCT / IB2019 / 050974 filed on February 7, 2019. TECHNICAL FIELD
[0002] The present disclosure relates generally to methods of depositing material on a substrate. More particularly, the present disclosure relates to selective deposition of material on a first surface of a substrate relative to a second surface. BACKGROUND
[0003] Integrated circuits are manufactured by carefully designed processes in which various layers of material are deposited in a predetermined arrangement on a semiconductor substrate. The predetermined arrangement of material on the semiconductor substrate can often be achieved by depositing material over the entire substrate surface and then removing material from predetermined areas of the substrate, such as by depositing a masking layer and a subsequent etching process. The material can be electrically conductive in order to provide electrical connections within the integrated circuit.
[0004] The number of steps involved in manufacturing an integrated surface on a substrate is very large, thereby making the production process very complex. The number of steps can be reduced by utilizing a selective deposition process whereby material is selectively deposited on a first surface relative to a second surface without the need for subsequent processing or with reduced need for subsequent processing. SUMMARY
[0005] There can be a need for a method of selectively depositing material on a first surface relative to a second surface. Accordingly, there can be provided a method of selectively depositing material on a substrate, comprising:
[0006] providing a substrate having a first surface and a second surface, the first surface being different from the second surface;
[0007] depositing the material on the substrate by:
[0008] supplying a bulk precursor comprising metal atoms, halogen atoms, and at least one additional atom that is not a metal or halogen atom; and
[0009] supplying a reactant to the substrate, whereby the bulk precursor and the reactant react with the first surface relative to the second surface to form more material on the first surface than on the second surface.
[0010] By supplying a bulk precursor comprising metal atoms, halogen atoms, and at least one additional atom that is not a metal or halogen atom, material can be selectively deposited on a first surface relative to a second surface to form more material on the first surface than on the second surface. The bulk precursor and reactant can react on the first surface relative to the second surface to form more than 2 times, preferably more than 5 times, most preferably more than 10 times more material on the first surface than on the second surface.
[0011] The bulk precursor can comprise a transition metal atom, such as molybdenum. The deposited material can be electrically conductive. The halogen atom can be chlorine. The at least one additional atom can be selected from a chalcogenide, such as oxygen. The reactant can comprise a hydrogen atom.
[0012] In some embodiments, a method for semiconductor processing can be provided. The method can comprise selectively depositing a material comprising a metal into a gap in a substrate, thereby filling the gap. BRIEF DESCRIPTION OF DRAWINGS
[0013] These and other features, aspects, and advantages of the inventions disclosed herein will be described in connection with certain embodiments, intended as illustrations of various aspects of the inventions, and not as limitations. The
[0014] Figure 1a A gap A is disclosed according to one embodiment, having a first (bottom) surface comprising an electrically conductive material and a second (side) surface comprising an insulator filled with a metal.
[0015] Figure 1b The same gap as in Figure 1a is disclosed, but showing that the metal deposition process can be hindered by contaminants in the gap.
[0016] Figure 2a A flowchart illustrating a method of preparing a deposition layer according to one embodiment is shown.
[0017] Figure 2b A flowchart illustrating a method of depositing a layer according to one embodiment is shown.
[0018] Figure 3a A cross-section of a gap structure in a substrate to be filled according to an embodiment is shown.
[0019] Figure 3b A cross-section of a gap structure according to the embodiment is shown, filled Figure 3a according to the embodiment. DETAILED DESCRIPTION
[0020] Integrated circuits are manufactured by a process in which various layers of material are deposited in a predetermined arrangement on a semiconductor substrate. Metal layers can be required in semiconductor devices as conductive layers to electrically connect some of these layers. The number of steps involved in manufacturing an integrated surface on a substrate can be reduced by making use of a selective deposition process whereby material is selectively deposited on a first surface with respect to a second surface without or with reduced need for subsequent processing. It has been found that a method can be required to selectively deposit a conductive material on a first surface with respect to a second surface to provide an electrical connection.
[0021] Gaps produced during the manufacture of features of integrated circuit devices can be provided with a metal material. The gaps can have a high aspect ratio as their depth is much greater than their width. The gaps can be provided through these layers, for example, by etching. It can be required to provide a conductive material in the gaps.
[0022] Figure 1a A gap A is disclosed having a first (bottom) surface comprising a conductive metal, for example, tungsten or titanium nitride, and a second (side) surface comprising an insulating oxide, for example, aluminum oxide AI2O3 or silicon dioxide SiO2. The gap A can be filled with a material deposited by supplying a bulk precursor and a reactant to the substrate. The bulk precursor and the reactant can have a reaction with the first surface with respect to the second surface to form more material on the first surface than on the second surface. Thereby, the gap can be filled from the bottom up, which is advantageous as if the fill grows from the bottom and the sides, the growth from the sides can close the entrance of the gap before the bottom is fully provided with material, leaving a void in the bottom portion. This can result in voids or seams in the deposited material which can deteriorate the performance of the integrated circuit.
[0023] The bulk precursor can comprise a metal atom, a halogen atom, and at least one further atom which is not a metal or a halogen atom. The bulk precursor and the reactant can have a reaction with the first surface with respect to the second surface to form more than 2 times, preferably more than 5 times, most preferably more than 10 times more material on the first surface than on the second surface. In fact, as shown in Figure 1a zero growth on the second surface with respect to the first surface.
[0024] The metal can be a transition metal atom. The transition metal atom can be molybdenum (Mo). The halogen atom can be chlorine. The at least one further atom can be selected from a chalcogenide. The at least one further atom selected from a chalcogenide can be oxygen. The bulk precursor can comprise molybdenum pentachloride (MoCI5).
[0025] The reactant can comprise a hydrogen atom. The reactant can be hydrogen gas (H2).
[0026] The first surface can comprise a metal, such as a transition metal. The transition metal can be selected from titanium (Ti), tantalum (Ta), manganese (Mn), tungsten (W), ruthenium (Ru), cobalt (Co), and copper (Cu). The first surface can comprise a metal nitride. The second surface can comprise cobalt tungsten phosphide (CoWP). For example, the second surface can comprise titanium nitride (TiN) or tantalum nitride (TaN). Alternatively, the metal can be aluminum (Al).
[0027] The second surface can comprise an oxide, a nitride, or a combination thereof. The oxide, the nitride, or the combination thereof can be selected from aluminum oxide (AIO x ), silicon oxide (SiO x ), silicon nitride (SiN), hafnium oxide (HfO2), zirconium oxide (ZrO2), and silicon oxynitride (SiON). The silicon oxide can be a thermal oxide of silicon. The silicon oxide can be carbon-doped. The second surface can be a dielectric surface.
[0028] The deposited material can be electrically conductive, having a resistivity less than 3000 μΩ-cm.
[0029] Figure 1b The same gap as in Figure 1a is disclosed, but shows that the deposition process can be hindered by contamination of the titanium nitride layer (TiN) in air. The contamination can be caused by the process of depositing the silicon oxide layer with a plasma enhanced CVD process. For example, the titanium nitride can be partially oxidized or some silicon can form contamination in the gap. Therefore, the deposited material can not be formed uniformly in the first gap B or can not be formed at all in the second gap C. The method can therefore comprise supplying a preparation precursor to the substrate.
[0030] The preparation precursor can comprise a metal and a halogen atom. The preparation precursor can comprise the same metal atom as the bulk precursor, such that when some material is deposited, the material is more the same as the material deposited later from the bulk precursor. The preparation precursor can also comprise a different metal atom than the bulk precursor. The metal in the preparation precursor can be a transition metal, such as molybdenum. Alternatively, the metal can be selected from transition metals, including tungsten (W), ruthenium (Ru), cobalt (Co), and copper (Cu).
[0031] The preparation precursor can comprise the same halide as the bulk precursor, such that when some halide is left behind, the material is the same as the material that can be left behind in the deposition process later from the bulk precursor. The preparation precursor can also comprise a different halide than the bulk precursor to optimize the method. The preparation precursor can comprise molybdenum pentachloride (MoCl5).
[0032] The preparatory precursor can be used as an etchant to etch away the oxide layer formed on the titanium nitride. Thereafter, the bulk precursor can react better with the un-contaminated titanium nitride. The first surface can comprise a metal, a metal oxide, a metal nitride or silicon nitride to be cleaned with the preparatory precursor.
[0033] The preparatory precursor can be supplied to the reaction chamber in 10 to 2000, preferably 30 to 600, more preferably 50 to 200, most preferably about 100 pulses, and these pulses are between 0.1 and 10 seconds. The bulk precursor can be supplied to the reaction chamber in 50 to 10000, preferably 200 to 4000, more preferably 500 to 2000, most preferably about 1000 pulses, and these pulses are between 0.1 and 10 seconds.
[0034] The flow of the bulk precursor into the reaction chamber with the substrate is between 50 and 1000 seem. The flow of the reactant into the reaction chamber with the substrate can be between 50 and 50000 seem. The pressure in the reaction chamber can be between 0.1 and 100 Torr. The process temperature can be between 300 and 800 °C.
[0035] The substrate can have a substantially horizontal top surface and a gap extending vertically in a layer that has been manufactured, and the method comprises etching the first and second surfaces of the gap before depositing material selectively on the first surface of the gap.
[0036] The depositing material can comprise repeating atomic layer deposition (ALD) cycles, which comprise supplying pulses of the bulk precursor to the substrate and supplying pulses of the reactant to the substrate in succession. Between the pulses of the bulk precursor and the reactant, the substrate can be purged for between 0.5 and 50 seconds. The supplying of the bulk precursor to the substrate in the reaction chamber takes between 0.5 and 50 seconds.
[0037] The gap can extend vertically in a layer that has been manufactured, which has a substantially horizontal top surface. The gap extending vertically and provided with a metal layer can for example be used in a word line of a memory integrated circuit of the dynamic random access memory (DRAM) type. The gap extending vertically and filled with a metal can also for example be used in a logic integrated circuit. For example, the metal-filled gap can be used as a gate fill in a p-type metal oxide semiconductor (PMOS) or complementary metal oxide semiconductor (CMOS) integrated circuit or a source / drain trench contact.
[0038] The gap can also be arranged in a layer that has been manufactured in a horizontal direction. Again, the gap can have a high aspect ratio, as its depth (now in the horizontal direction) is larger than its width. The gap extending horizontally and provided with a metal can for example be used in a word line of a memory integrated circuit of the 3D NAND type. The gap can also be arranged in a combination of vertical and horizontal directions.
[0039] The surface of the gap may contain one type of deposited material. Alternatively, the surface of the gap may contain different types of deposited materials. The surface of the gap may, for example, contain a tungsten and silicon oxide layer (see Figure 1). When, for example, a conductive layer needs to contact the tungsten layer, it may be advantageous to selectively deposit the conductive material on the tungsten in the gap relative to the silicon layer.
[0040] To fill the entire gap, a bulk layer can be deposited by sequentially repeating a bulk ALD cycle. Alternatively, a bulk layer can be deposited on a seed layer using a CVD process. The CVD process can be pulsed, in which a second precursor is pulsedly supplied to the substrate while a second reactant is continuously supplied to the substrate, or vice versa.
[0041] Figure 2a and 2b A flowchart illustrating a method for selectively depositing layers according to one embodiment is shown, wherein a preparative precursor may be provided in the gaps to prepare the surface. Figure 2a It can also selectively deposit a bulk layer on a prepared surface using bulk precursors and reactants. Figure 2b Pretreatment cycle 1 using the pretreatment precursor can be shown in... Figure 2a In the example, the ontology ALD loop 2 used for the ontology layer can be shown as follows: Figure 2b In one embodiment, the pretreatment cycle 1 using the pretreatment precursor can be omitted. In another embodiment, the pretreatment cycle 1 using the pretreatment precursor can deposit a thin seed layer.
[0042] After providing a substrate having first and second surfaces (wherein the first surface is different from the second surface) into the reaction chamber in step 3, a pre-prepared precursor containing metal and halogen atoms can be supplied to the substrate in step 5 with a pre-pulse of duration T1 (see [link to product]). Figure 1a Subsequently, in step 7, the additional supply of the preparation precursor to the substrate can be stopped, for example by removing, for example, a portion of the preparation precursor from the reaction chamber, continuing the preparation precursor removal period R1. The supply of the preparation precursor containing metal and halogen atoms can be repeated multiple times, for example, N times. The preparation precursor can prepare the substrate for deposition of the bulk layer and / or reactively form at least a portion of the seed layer on the substrate. Typically, a few cycles (about 50 to 100 cycles) may be required before the deposition of the seed layer can begin, but a few cycles may be sufficient to prepare the surface for deposition of the bulk layer.
[0043] Preparing precursors can be selected to achieve a suitable etching effect on the surface of the gap. Pretreatment cycle 1 can be repeated N times to prepare the surface, wherein N is selected between 10 and 2000, preferably 30 to 600, more preferably between 50 and 200, most preferably about 100 pulses entering the reaction chamber, and the preparation pulse T1 is between 0.1 and 10 seconds.
[0044] Can be found in the ALD loop 2 of the ontology (seeFigure 2b In step 11, a bulk precursor comprising metal and halogen atoms is supplied to a substrate having first and second surfaces via a bulk pulse of duration T2. This can be combined with... Figure 2a The pretreatment cycle 1 can be performed in the same reaction chamber or in different reaction chambers. When the temperature requirements of the pretreatment cycle may differ, it may be advantageous to perform the bulk ALD cycle in a different reaction chamber than the pretreatment cycle. Therefore, substrate transfer may be required. Figure 2b The body ALD loop 2 can also be in the absence of Figure 2a The process is completed under the condition of a preparatory cycle. During the body ALD cycle, the additional supply of body precursor to the substrate can be stopped in step 13, for example by removing, for example, a portion of the body precursor from the reaction chamber, continuing the body removal period R2.
[0045] Furthermore, the cycle may include supplying reactant 15 to the substrate in reactant pulses for a duration T3. A portion of the bulk precursor and reactant may selectively react with respect to the second surface on the first surface to form at least a portion of the bulk layer, resulting in more material on the first surface than on the second surface. For example, the bulk precursor and reactant may react with respect to the second surface and the first surface to form more than 2 times, preferably more than 5 times, and most preferably more than 10 times more material on the first surface than on the second surface. Additional supply of reactant to the substrate may be stopped in step 17, for example, by removing, for example, a portion of the reactant from the reaction chamber, for a reactant removal period R3.
[0046] Bulk precursors and reactants can be selected to produce suitable electronic properties in the deposited material. For example, a low resistivity. The resistivity of molybdenum films can be less than 3000 μΩ-cm, or less than 1000 μΩ-cm, or less than 500 μΩ-cm, or less than 200 μΩ-cm, or less than 100 μΩ-cm, or less than 50 μΩ-cm, or less than 25 μΩ-cm, or less than 15 μΩ-cm, or even less than 10 μΩ-cm.
[0047] The body ALD cycle 2 for the body layer can be repeated M times, wherein M is selected between 200 and 2000, preferably between 400 and 1200, and more preferably between 600 and 1000. The thickness of the body layer on the first surface of the substrate can be between 1 and 100 nm, preferably between 5 and 50 nm, and more preferably between 10 and 30 nm.
[0048] The preparatory precursor and the bulk precursor can comprise the same metal atom. The metal can be a transition metal atom. The transition metal atom can be molybdenum. The preparatory precursor and the bulk precursor can comprise the same halogen atom. The halogen atom can be chlorine. By having the same metal atom and / or the same halogen, the tooling and process in the manufacturing plant can be simplified in terms of inspection, as only one metal atom and / or one halogen can need to be evaluated. If the preparatory precursor comprises the same metal atom as the bulk precursor, then some material deposition occurring during the preparation can not be a problem, as it is more identical to the material deposited later from the bulk precursor. If the preparatory precursor comprises the same halide as the bulk precursor, then some halide that can be left behind will be identical to the material that can be left behind in the deposition process from the bulk precursor later, simplifying the inspection of the process. The preparatory precursor can comprise molybdenum pentachloride (MoCl5).
[0049] During the pre-treatment ALD cycle, the process temperature in the reaction chamber can be selected between 300 and 800 °C, preferably between 400 and 700 °C, more preferably between 450 and 550 °C. The container in which the preparatory precursor is vaporized can be kept between 40 and 100 °C, preferably between 60 and 80 °C, more preferably at about 70 °C.
[0050] The bulk precursor can comprise additional atoms that are not metal or halogen atoms. The additional atoms can be chalcogens. The chalcogen can be oxygen, sulfur, selenium or tellurium. The bulk precursor can comprise molybdenum(VI) dichloride dioxide (MoO2Cl2).
[0051] The process temperature during the bulk ALD cycle can be between 300 and 800 °C, preferably between 400 and 700 °C, more preferably between 500 and 650 °C. The container in which the second precursor is vaporized can be kept between 20 and 150 °C, preferably between 30 and 120 °C, more preferably between 40 and 110 °C.
[0052] The feeding of the preparatory precursor and / or the bulk precursor into the reaction chamber can be realized with pulses of duration T1, T2, respectively, which can be selected between 0.1 and 10 seconds, preferably between 0.5 and 5 seconds, more preferably between 0.8 and 2 seconds. For example, T1 can be 1 second and T2 can be 1.3 seconds. The flow rate of the preparatory precursor and / or the bulk precursor into the reaction chamber can be selected between 10 and 2000 seem, between 50 and 1000 seem, preferably between 100 and 500 seem, more preferably between 200 and 400 seem. The pressure in the reaction chamber can be selected between 0.1 and 100 Torr, preferably between 1 and 50 Torr, more preferably between 4 and 20 Torr.
[0053] The reactant can have hydrogen atoms, for example hydrogen gas (H2). The duration T3 of the supply of the reactant into the reaction chamber with pulses of the reactant can be between 0.5 and 50 seconds, preferably between 1 and 10 seconds, more preferably between 2 and 8 seconds. The flow of the reactant into the reaction chamber can be between 50 and 50000 seem, preferably between 100 and 20000 seem, more preferably between 500 and 10000 seem.
[0054] For the reactant, silane can be considered. The general formula of silane is SiH4. x H2 (x+2) wherein x is an integer 1, 2, 3, 4,.... Silane (SiH4), disilane (Si2H6) or trisilane (Si3H8) can be suitable examples of reactants having hydrogen atoms.
[0055] The removal of a part of at least one of the precursor, the bulk precursor and the reactant from the reaction chamber, for example by purging, can be done in a removal period R1, R2, R3 between 0.5 and 50 seconds, preferably between 1 and 10 seconds, more preferably between 2 and 8 seconds. Purging can be used to remove a part of at least one of the precursor, the bulk precursor or the reactant from the reaction chamber after the supply of the precursor to the substrate, after the supply of the bulk precursor or after the supply of the reactant for a removal period R1, R2, R3. The removal can be achieved by pumping and / or by providing a purge gas. The purge gas can be an inert gas such as nitrogen or helium.
[0056] The method can be used in a single or batch wafer ALD apparatus. The method comprises providing a substrate in a reaction chamber and a pre-treatment cycle in the reaction chamber can comprise: supplying a precursor to the substrate in the reaction chamber and purging a part of the precursor from the reaction chamber. Further, the method comprises providing a substrate in a reaction chamber and a bulk ALD cycle in the reaction chamber comprises: supplying a bulk precursor to the substrate in the reaction chamber; purging a part of the second precursor from the reaction chamber; supplying a reactant to the substrate in the reaction chamber; and purging a part of the reactant from the reaction chamber.
[0057] An exemplary single wafer reactor specifically designed for performing ALD processes is available from ASM International N.V. under the trade designation and from ASM International N.V. (Almelo, The Netherlands). The method can also be performed in a batch wafer reactor, for example a vertical furnace. For example, the deposition process can also be performed in an A412 TM vertical furnace available from ASM International N.V. The furnace can have a process chamber that can accommodate a load of 150 semiconductor substrates or wafers of 300 mm diameter.
[0058] The wafer reactor can have a controller and a memory that can control the reactor. The memory can be programmed to supply precursors and reactants in the reaction chamber according to embodiments of the disclosure when executed on the controller.
[0059] Figure 3a A cross section of a structure 18 according to one embodiment is shown, having a sidewall 19 extending along a gap and having a hole 20 to be filled. As shown, the gap can extend vertically in a layer already manufactured on the substrate. The already manufactured layer can comprise, for example, silicon oxide S1O2, aluminum oxide AI2O3, titanium nitride TiN, and tungsten W.
[0060] The gap can have a high aspect ratio, as the vertical and or horizontal depth is much greater than the width. The aspect ratio of the gap (gap depth / gap width) can be greater than about 2, greater than about 5, greater than about 10, greater than about 20, greater than about 50, greater than about 75, or in some cases even greater than about 100, or greater than about 150, or greater than about 200.
[0061] It can be noted that it can be difficult to determine the aspect ratio for a gap, but in this case, the aspect ratio can be replaced by a surface enhancement ratio, which can be the ratio of the total surface area of the gap in the wafer or part of the wafer to the planar surface of the wafer or part of the wafer. The surface enhancement ratio of the gap (surface gap / surface wafer) can be greater than about 2, greater than about 5, greater than about 10, greater than about 20, greater than about 50, greater than about 75, or in some cases even greater than about 100, or greater than about 150, or greater than about 200.
[0062] Figure 3a The structure of Figure 1 is produced by etching, such that the surface of the sidewall 19 of the gap and to the different layers of tungsten W can be removed to a lesser extent. During the etch-back process, the different layers tungsten W and aluminum oxide AI2O3 are etched differently, such that the tungsten W is etched more than needed, resulting in the hole 20. The surface of the hole 20 after etching can comprise different kinds of deposited layers, for example, the first surface is electrically conductive and comprises tungsten W and titanium nitride TiN, while the second surface is electrically insulating and comprises aluminum oxide AI2O3 and silicon oxide S1O2.
[0063] A selective metal 25 can be deposited on the first surface comprising tungsten W, with respect to the second surface comprising silicon oxide and AI2O3. The selective metal 25 can be deposited according to embodiments as depicted in Figure 2b The embodiments as depicted in Figure 2 are deposited on the surface 19 of the gap by sequentially repeating deposition cycles. A pre-treatment cycle using a pre-cursor can be applied as depicted in Figure 2a The embodiments as depicted in Figure 2 are deposited on the surface 19 of the gap by sequentially repeating deposition cycles. A pre-treatment cycle using a pre-cursor can be applied as depicted in Figure 2a and 2b and the related description.
[0064] The metal 25 can comprise molybdenum having an electrical resistivity of less than 3000 μΩ-cm, or less than 1000 μΩ-cm, or less than 500 μΩ-cm, or less than 200 μΩ-cm, or less than 100 μΩ-cm, or less than 50 μΩ-cm, or less than 25 μΩ-cm, or less than 15 μΩ-cm or even less than 10 μΩ-cm. In some embodiments, the step coverage of the deposited layer 25 comprising Mo can be greater than about 50%, greater than about 80%, greater than about 90%, greater than about 95%, greater than about 98%, greater than about 99%.
[0065] The method can be performed in an atomic layer deposition apparatus. For example, the deposition method can be performed in an XPALD apparatus.
[0066] The method can also be used in a spatial atomic layer deposition apparatus. In spatial ALD, precursors and reactants are supplied consecutively in different physical sections and the substrate is moved between the sections. At least two sections can be provided, in which half-reactions can be performed in the presence of the substrate. If the substrate is present in such a half-reaction section, a monolayer can be formed from the first or second precursor. The substrate is then moved to a second half-reaction section, where the ALD cycle is completed by the first or second reactant to form one ALD monolayer. Alternatively, the substrate position can be fixed and the gas supply can be moved, or some combination of the two. To obtain thicker films, this procedure can be repeated.
[0067] According to one embodiment of the spatial ALD apparatus, the pre-treatment method comprises:
[0068] placing the substrate in a reaction chamber comprising a plurality of sections, each section separated from an adjacent section by a gas curtain;
[0069] supplying a pre-treatment precursor to the substrate in a first section of the reaction chamber;
[0070] moving the substrate surface laterally relative to the reaction chamber through the gas curtain to a second section of the reaction chamber;
[0071] supplying a first reactant to the substrate in the second section of the reaction chamber;
[0072] moving the substrate surface laterally relative to the reaction chamber through the gas curtain; and
[0073] repeating the supplying of the pre-treatment precursor and the reactant, including moving the substrate surface laterally relative to the reaction chamber.
[0074] To form the bulk layer, the method further comprises:
[0075] placing the substrate in a reaction chamber comprising a plurality of sections, each section separated from an adjacent section by a gas curtain;
[0076] The bulk precursor is supplied to the substrate in the first section of the reaction chamber;
[0077] The substrate surface is moved laterally relative to the reaction chamber, passing through the air curtain to reach the second section of the reaction chamber;
[0078] In the second section of the reaction chamber, a second reactant is supplied to the substrate to form a bulk layer;
[0079] The substrate surface is moved laterally relative to the reaction chamber through the air curtain; and
[0080] Repeatedly supplying the bulk precursor and reactants includes moving the substrate surface laterally relative to the reaction chamber to form the bulk layer.
[0081] Exemplary single-wafer reactors specifically designed for ALD processes can be traded under the name of Available commercially from ASM International NV (Almere, Netherlands). The method can also be carried out in batch wafer reactors, such as vertical furnaces. For example, the deposition process can also be performed in an A400 furnace available from ASM International NV. TM Or A412 TM The process is carried out in a vertical furnace. The furnace may have a processing chamber that can accommodate a load of 100 or more semiconductor substrates or wafers.
[0082] In other embodiments, the body layer may contain less than about 40 atomic percent, less than about 30 atomic percent, less than about 20 atomic percent, less than about 10 atomic percent, less than about 5 atomic percent, or even less than about 2 atomic percent of oxygen. In further embodiments, the body layer may contain less than about 30 atomic percent, less than about 20 atomic percent, less than about 10 atomic percent, or less than about 5 atomic percent, or less than about 2 atomic percent, or even less than about 1 atomic percent of hydrogen. In some embodiments, the body layer may contain less than about 10 atomic percent, or less than about 5 atomic percent, less than about 1 atomic percent, or even less than about 0.5 atomic percent of halogen or chlorine. In still further embodiments, the body layer may contain less than about 10 atomic percent, or less than about 5 atomic percent, or less than about 2 atomic percent, or less than about 1 atomic percent, or even less than about 0.5 atomic percent of carbon. In the embodiments outlined herein, the atomic percentage (at.%) concentration of the elements can be determined using Rutherford backscattering (RBS).
[0083] In some embodiments of the present disclosure, forming a semiconductor device structure, such as a semiconductor device structure can include forming a gate electrode structure including a molybdenum film, the effective work function of the gate electrode structure being greater than about 4.9 eV, or greater than about 5.0 eV, or greater than about 5.1 eV, or greater than about 5.2 eV, or greater than about 5.3 eV, or even greater than about 5.4 eV. In some embodiments, the effective work function values given above can be exhibited for electrode structures including a molybdenum film having a thickness less than about 100 Angstroms, or less than about 50 Angstroms, or less than about 40 Angstroms, or even less than about 30 Angstroms.
[0084] Those of skill in the art will appreciate that the methods and structures described above can be subjected to various modifications, additions and deletions without departing from the scope of the invention. It is contemplated that various combinations or sub-combinations of specific features and aspects of the embodiments can be made without departing from the scope of the description. Various features and aspects of the disclosed embodiments can be combined or substituted with each other in any manner possible within the scope of the disclosure. All such modifications and variations are intended to be within the scope of the present invention, as defined by the following claims.
Claims
1. A method of selectively depositing a material on a substrate, the method comprising: providing a substrate having a gap, the gap having a first bottom surface and a second side surface; depositing the material on the substrate by: supplying a preliminary precursor comprising a metal and a halogen to the substrate; supplying a bulk precursor comprising a metal atom, a halogen atom, and at least one chalcogen atom; and supplying a reactant to the substrate, whereby the bulk precursor and the reactant react with the first bottom surface more than the second side surface to form more of the material on the first bottom surface than on the second side surface, wherein the preliminary precursor comprises the same metal and halogen as the bulk precursor.
2. The method of claim 1, wherein the bulk precursor and the reactant react with the first bottom surface more than 5 times more than the second side surface to form more of the material on the first bottom surface than on the second side surface.
3. The method of claim 1, wherein the bulk precursor comprises a transition metal atom.
4. The method of claim 3, wherein the transition metal atom is molybdenum.
5. The method of claim 1, wherein the halogen atom is chlorine.
6. The method of claim 1, wherein the first bottom surface comprises a transition metal.
7. The method of claim 1, wherein the at least one chalcogen atom comprises oxygen.
8. The method of claim 1, wherein the first bottom surface comprises a metal nitride.
9. The method of claim 1, wherein the reactant comprises a hydrogen atom.
10. A method of selectively depositing a material on a substrate, the method comprising: providing a substrate having a gap, the gap having a first bottom surface and a second side surface; depositing the material on the substrate by: supplying a preliminary precursor comprising a metal and a halogen to the substrate; supplying a bulk precursor comprising a metal atom, a halogen atom, and at least one additional atom that is not a metal or halogen atom; and supplying a reactant to the substrate, whereby the bulk precursor and the reactant react with the first bottom surface more than the second side surface to form more of the material on the first bottom surface than on the second side surface, wherein the reactant comprises a hydrogen atom, and wherein the preliminary precursor comprises the same metal and halogen as the bulk precursor.
11. The method of claim 10, wherein, the first bottom surface comprises a metal.
12. The method of claim 11, wherein, the metal comprises a transition metal.
13. The method of claim 12, wherein, the transition metal is selected from the group consisting of titanium (Ti), tantalum (Ta), manganese (Mn), tungsten (W), ruthenium (Ru), cobalt (Co), and copper (Cu).
14. The method of claim 12, wherein, the first bottom surface comprises a transition metal nitride.
15. The method of claim 10, wherein, the second side surface comprises an oxide, a nitride, or a combination thereof.
16. The method of claim 10, wherein, the second side surface comprises is selected from the group consisting of AIOx, SiOx, SiN, HfO2, ZrO2, and SiON.
17. The method of claim 10, wherein, the second side surface is a dielectric surface.
18. The method of claim 10, wherein, the metal comprises molybdenum.
19. The method of claim 10, wherein, the metal is selected from the group of transition metals consisting of tungsten (W), ruthenium (Ru), cobalt (Co), and copper (Cu).
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