Electronic device

Abstract

An electronic device includes a circuit substrate, an electronic element, a planar layer, a first transparent conductive layer, and a second transparent conductive layer. The electronic element and the planar layer are disposed on the circuit substrate. The planar layer includes a top surface and a first via. The first transparent conductive layer is disposed in the first via and electrically connected to the circuit substrate. The second transparent conductive layer is disposed on the top surface and extends into the first via to electrically connect the first transparent conductive layer. The electronic element is electrically connected to the second transparent conductive layer. A material of the first transparent conductive layer is different from a material of the second transparent conductive layer.

Description

Technical Field

[0001] This invention relates to an electronic device, and more particularly to an electronic device having a hybrid contact structure. Background Technology

[0002] In the process of thin-film transistors (TFTs) or the interlayer connection of electronic components and circuits, planarization layers are used to smooth out the in-plane steps caused by various layer patterns on the substrate of electronic components.

[0003] However, when the required thickness of the planarization layer is too thick, the conductive layer spanning the planarization layer may require an excessively long slope, leading to potential wire breakage and affecting the electrical connections of electronic components. Furthermore, when the conductive layer of electronic components requires high light transmittance (e.g., optical sensing devices, fingerprint recognition devices, or display devices), metal materials are unsuitable due to their tendency to block light. Using transparent conductive materials (e.g., indium tin oxide) also presents challenges due to the excessively thick planarization layer, requiring an excessively long slope for the transparent conductive material, making deposition difficult and increasing the risk of wire breakage. Solving these problems has become a crucial issue for relevant manufacturers. Summary of the Invention

[0004] This invention provides an electronic device that increases the reliability of electrical connections in the conductive layer.

[0005] This invention provides a method for manufacturing an electronic device, which can reduce the difficulty of setting the conductive layer on the slope of a flat layer.

[0006] The electronic device of the present invention includes a circuit board, electronic components, a planarization layer, a first transparent conductive layer, and a second transparent conductive layer. The electronic components and the planarization layer are disposed on the circuit board. The planarization layer includes a top surface and a first through-hole. The first transparent conductive layer is disposed in the first through-hole and electrically connected to the circuit board. The second transparent conductive layer is disposed on the top surface and extends into the first through-hole, electrically connecting to the first transparent conductive layer. The electronic components are electrically connected to the second transparent conductive layer. The material of the first transparent conductive layer is different from the material of the second transparent conductive layer.

[0007] The present invention also provides a method for manufacturing an electronic device, comprising providing a circuit substrate, disposing electronic components on the circuit substrate, disposing a planarization layer on the circuit substrate, forming a first via in the planarization layer, disposing a first transparent conductive layer in the first via and electrically connecting it to the circuit substrate, and disposing a second transparent conductive layer on the top surface of the planarization layer. The second transparent conductive layer is electrically connected to the electronic components and extends into the first via, electrically connecting to the first transparent conductive layer. The material of the first transparent conductive layer is different from the material of the second transparent conductive layer.

[0008] Based on the above, the electronic device of the present invention utilizes a material different from that of the second transparent conductive layer. When the electronic device requires a conductive layer with high light transmittance and a planarization layer with high thickness, the high light transmittance of both the first and second transparent conductive layers has minimal impact on the optical properties of the electronic device. Furthermore, since the first transparent conductive layer can be made of a material that is easier to install, and the second transparent conductive layer extends into the first through-hole of the planarization layer and is electrically connected to the first transparent conductive layer, the second transparent conductive layer does not need to be excessively thick, reducing the climbing height of the second transparent conductive layer, lowering the difficulty of installing the conductive layer and the risk of wire breakage, thus increasing the yield of the electronic device. The present invention also provides a method for manufacturing an electronic device, utilizing a material different from that of the second transparent conductive layer to reduce the difficulty of installing the second transparent conductive layer.

[0009] To make the above features and advantages of the present invention more apparent and understandable, specific embodiments are described below in conjunction with the accompanying drawings. Attached Figure Description

[0010] Figure 1 This is a cross-sectional schematic diagram of the electronic device according to the first embodiment of the present invention;

[0011] Figure 2 This is a cross-sectional schematic diagram of an electronic device according to a second embodiment of the present invention;

[0012] Figures 3A to 3E This is a schematic diagram of the manufacturing process of the electronic device according to the first embodiment of the present invention;

[0013] Figures 4A to 4E This is a schematic diagram of the manufacturing process of the electronic device according to the second embodiment of the present invention;

[0014] Figure 5 This is a top view schematic diagram of the electronic device according to the third embodiment of the present invention.

[0015] Symbol Explanation

[0016] 1A, 1B: Electronic devices

[0017] 100: Circuit board

[0018] 101: Driver Layer

[0019] 102: First insulating layer

[0020] 1021: First Circuit Layer

[0021] 103: Second insulating layer

[0022] 1031: Second Circuit Layer

[0023] 104: Third Insulation Layer

[0024] 1041: Third Circuit Layer

[0025] 105: Adhesive layer

[0026] 106: Protective layer

[0027] 110: Electronic components

[0028] 110S: Sidewall of electronic components

[0029] 111: Electrode

[0030] 111A: Joint

[0031] 112: The other electrode

[0032] 112A: Joint

[0033] 120: Flattening layer

[0034] 120T: Top surface

[0035] 130: First transparent conductive layer

[0036] 140: Second transparent conductive layer

[0037] G: Gap

[0038] H1: First through hole

[0039] H2: Second through hole

[0040] H2S: Sidewall of the second through hole

[0041] OP: Open

[0042] S: Interval

[0043] SW: Switching element

[0044] T1: First adapter hole

[0045] T2: Second adapter hole

[0046] T3: Third adapter hole

[0047] Th1: Thickness of the first transparent conductive layer

[0048] Th2: Thickness of the planarization layer

[0049] UC: Bottom Cut Detailed Implementation

[0050] As used herein, “about,” “approximately,” “essentially,” or “substantially” includes the value and the average value within an acceptable range of deviations from a particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and a particular number of errors associated with the measurement (i.e., limitations of the measurement system). For example, “about” may mean within one or more standard deviations of the value, or, for example, within ±30%, ±20%, ±15%, ±10%, ±5%. Furthermore, the use of “about,” “approximately,” “essentially,” or “substantially” herein may be chosen to select a more acceptable range of deviations or standard deviations depending on the nature of the measurement, the cutting nature, or other properties, and a single standard deviation may not be applicable to all properties.

[0051] In the accompanying drawings, the thicknesses of layers, films, panels, regions, etc., are enlarged for clarity. It should be understood that when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected" to another element, it may be directly on or connected to the other element, or intermediate elements may also be present. Conversely, when an element is referred to as being "directly on" or "directly connected" to another element, no intermediate elements are present. As used herein, "connection" can refer to a physical and / or electrical connection. Furthermore, an "electrical connection" may involve the presence of other elements between the two elements.

[0052] Reference will now be made in detail to exemplary embodiments of the invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same element references are used in the drawings and description to denote the same or similar parts.

[0053] Figure 1 This is a cross-sectional schematic diagram of the electronic device according to the first embodiment of the present invention. Please refer to... Figure 1 The electronic device 1A of this embodiment includes a circuit board 100, an electronic component 110, a planarization layer 120, a first transparent conductive layer 130, and a second transparent conductive layer 140. The electronic component 110 and the planarization layer 120 are disposed on the circuit board 100. The planarization layer 120 includes a top surface 120T and a first through-hole H1. The first transparent conductive layer 130 is disposed in the first through-hole H1 and is electrically connected to the circuit board 100. The second transparent conductive layer 140 is disposed on the top surface 120T and extends into the first through-hole H1, electrically connecting to the first transparent conductive layer 130. The electronic component 110 is electrically connected to the second transparent conductive layer 140.

[0054] In detail, the circuit board 100 may include a driving circuit layer, multiple circuit layers, and multiple insulating layers. For example, the circuit board 100 of this embodiment includes a driving layer 101, a first insulating layer 102, a second insulating layer 103, a third insulating layer 104, a first circuit layer 1021, a second circuit layer 1031, and a third circuit layer 1041. The materials of the first insulating layer 102, the second insulating layer 103, and the third insulating layer 104 may be insulating materials such as silicon nitride, silicon oxynitride, and aluminum oxide, or organic insulating materials such as epoxy resin or phenolic resin. The materials of the first circuit layer 1021, the second circuit layer 1031, and the third circuit layer 1041 may be copper, aluminum, silver, gold, alloys, or other suitable materials, or a stacked layer of metal materials and other conductive materials. The driving layer 101 may include a switching element SW or a pixel circuit structure (not shown) electrically connected to other components. The so-called pixel circuit structure may include active elements, capacitors, power lines, signal lines (e.g., data lines, scan lines), etc. Of course, the present invention is not limited to the number of insulating layers or the number and types of materials of circuit layers.

[0055] The first circuit layer 1021, the second circuit layer 1031, and the third circuit layer 1041 can be layered together via the second insulating layer 103 and the third insulating layer 104, and electrically connected via the second transition hole T2 penetrating the second insulating layer 103 and the third transition hole T3 penetrating the third insulating layer 104. For example, the switching element SW can control the passage of electrical signals, so that the electrical signals can be sequentially transmitted to the electronic component 110 via the first transition hole T1 electrically connected to the switching element SW, the second transition hole T2 of the second circuit layer 1031, the third transition hole T3 of the third circuit layer 1041, the first transparent conductive layer 130, and the second transparent conductive layer 140.

[0056] It should be noted that the illustrations in the embodiments are merely schematic diagrams of the switching element SW to illustrate its electrical connection relationship with each circuit layer. Those skilled in the art can formulate suitable switching element SW structures according to actual circuit requirements.

[0057] Furthermore, an adhesive layer 105 may be included between the first insulating layer 102 and the second insulating layer 103, and between the second insulating layer 103 and the third insulating layer 104. For example, the adhesive layer 105 may be disposed between the first circuit layer 1021 and the first insulating layer 102, or between the second circuit layer 1031 and the second insulating layer 103, thereby increasing the bonding strength between the first circuit layer 1021 and the first insulating layer 102, or increasing the bonding strength between the second circuit layer 1031 and the second insulating layer 103. Additionally, the circuit board 100 may also include a protective layer 106 disposed on the second circuit layer 1031 and between the conductive patterns of the third circuit layer 1041 (e.g., Figure 1 The protective layer 106 is located between the third adapter hole T3 and the third circuit layer 1041. This protective layer 106 can prevent corrosion or oxidation of the second circuit layer 1031 and the third circuit layer 1041, ensuring that the conductivity of each circuit layer is not affected.

[0058] Electronic component 110 may include an electrode 111 and another electrode 112. The junction surface 111A of electrode 111 can directly contact the second transparent conductive layer 140 to achieve electrical connection between electrode 111 and the second transparent conductive layer 140. Furthermore, the junction surface 112A of the other electrode 112 can be electrically connected to the third circuit layer 1041 to achieve electrical connection between the other electrode 112 and the circuit board 100. Accordingly, electronic component 110 can enable electrode 111 and the other electrode 112 to receive different electrical signals (e.g., different potentials), thus allowing electronic component 110 to operate. Electrode 111 and the other electrode 112 can be gold (Au), silver (Ag), copper (Cu), germanium gold (GeAu), or other metals or alloys suitable for forming ohmic contacts with the second transparent conductive layer 140, P-type semiconductors, and N-type semiconductors, and materials suitable for connecting with the third circuit layer 1041 of the circuit board 100 and solder metal (not shown). The invention is not limited to these materials.

[0059] Furthermore, electronic device 1A can be a display device, and electronic component 110 can be, for example, a micro light-emitting diode (μLED), a sub-millimeter light-emitting diode (mini-LED), or a light-emitting diode (mini-LED). Its structure can be, for example, a vertical light-emitting diode. Because vertical light-emitting diodes occupy a small area and can carry higher current, the placement density of electronic component 110 can be further increased, i.e., the placement density of light-emitting diodes can be increased, thereby improving the resolution of the display device. In some embodiments, electronic component 110 can also be other functional components to provide the required functions. For example, functional components may include display elements, touch elements, sensing elements, etc. The pixel circuit structure in driving layer 101 can be used to drive functional components, enabling electronic component 110 to provide display functions, touch functions, sensing functions, or combinations thereof. In other words, electronic device 1A can be a light-emitting device, a display device, a touch device, a sensing device, or a multi-functional device.

[0060] The planarization layer 120 can be made of photoresist, such as a positive photoresist, which facilitates the formation of high-resolution patterns on the planarization layer 120. Alternatively, a negative photoresist can be used, which helps reduce the setup cost of the planarization layer 120. After the photoresist is applied to the circuit board 100, the planarization layer 120 is formed by exposure, baking, and drying. Of course, the present invention is not limited to this.

[0061] It should be noted that the second transparent conductive layer 140 of the present invention can directly contact the first transparent conductive layer 130, and the materials of the first transparent conductive layer 130 and the second transparent conductive layer 140 are different.

[0062] In detail, the first transparent conductive layer 130 is made of a transparent organic material doped with conductive materials, including one of tin dioxide, graphene, and antimony oxide. Transparent organic materials include, for example, polymers of 3,4-ethylenedioxythiophene monomer (PEDOT) and polystyrene sulfonate (PSS). Specifically, the first transparent conductive layer 130 can be antimony tin oxide (ATO) or all-organic composites (AOC). The second transparent conductive layer 140 is made of metal oxides, such as indium tin oxide (ITO), indium zinc oxide, aluminum tin oxide, aluminum zinc oxide, or other suitable oxides, or a stack of at least two of the above. In other words, the first transparent conductive layer 130 and the second transparent conductive layer 140 in this embodiment constitute a hybrid contact electrode.

[0063] Currently, indium tin oxide (ITO), a transparent conductive material, is mostly prepared using physical vapor deposition methods such as sputtering. However, when it is necessary to deposit a thicker ITO film (e.g., Figure 1 The first through-hole H1 has a relatively high height, which causes ITO to climb to an excessively high height, making it easy to break the wire. An excessively thick ITO film is also prone to crystallization, resulting in uneven ITO film thickness that is difficult to control, affecting the optical properties and conductivity of ITO.

[0064] As mentioned above, since the first transparent conductive layer 130 and the second transparent conductive layer 140 are made of different materials, the first transparent conductive layer 130 can be manufactured using a different method than the second transparent conductive layer 140. For example, the first transparent conductive layer 130 can be prepared into a solution and then coated by spraying. This can reduce the sputtering process time of the second transparent conductive layer 140 and reduce the amount of material used in the second transparent conductive layer 140.

[0065] Furthermore, since the first transparent conductive layer 130 is located between the circuit board 100 and the second transparent conductive layer 140, the first transparent conductive layer 130 fills the first through-hole H1 first, so that the second transparent conductive layer 140 does not need to have an excessively high thickness or a high slope when filling the first through-hole H1, greatly reducing the chance of the second transparent conductive layer 140 breaking. In addition, the reduced thickness of the second transparent conductive layer 140 also benefits the light transmittance and thickness uniformity of the second transparent conductive layer 140, thereby stabilizing the electrical connection of the electronic component 110.

[0066] It is worth mentioning that the planarization layer 120 may also have a second through hole H2, in which an electronic component 110 is disposed. Another electrode 112 of the electronic component 110 is electrically connected to the circuit board 100, and the electrode 111 of the electronic component 110 is electrically connected to the second transparent conductive layer 140.

[0067] Specifically, the electronic component 110 in this embodiment can be further disposed in the planarization layer 120 and contact the second through hole H2, and the planarization layer 120 is used to strengthen the stability of the electronic component 110 in the planting area (e.g., the junction of the other electrode 112 and the third circuit layer 1041).

[0068] However, the present invention is not limited thereto. In other embodiments not shown, if the electronic device 1A requires a thick planarization layer 120 and the electronic components must be disposed on the top surface 120T of the planarization layer 120, the first transparent conductive layer 130 can be used to fill the first through-hole H1 to contact the third transition hole T3, and the second through-hole H2 to contact the third circuit layer 1041. A second transparent conductive layer 140 is disposed on the first transparent conductive layer 130, and the two electrodes of the electronic components located in the same contact direction (e.g., a flip-chip light-emitting diode) are respectively bonded to the second transparent conductive layer 140 to achieve electrical connection of the electronic components. This also reduces the required climbing height of the second transparent conductive layer 140 within the excessively thick planarization layer 120.

[0069] The following are some other embodiments to illustrate the present invention in detail, wherein the same components will be marked with the same symbols, and the description of the same technical content will be omitted. For the omitted parts, please refer to the foregoing embodiments, and they will not be repeated below.

[0070] Figure 2 This is a cross-sectional schematic diagram of an electronic device according to a second embodiment of the present invention. Please refer to... Figure 2The electronic device 1B in this embodiment is similar to the electronic device 1A, except that the other electrode 112 of the electronic component 110 in this embodiment contacts the second transparent conductive layer 140, while the electrode 111 contacts the third circuit layer 1041. Furthermore, there is a gap G between the sidewall H2S of the second via H2 and the sidewall 110S of the electronic component 110, and the first transparent conductive layer 130 further fills the gap G.

[0071] In detail, the electronic component 110 in this embodiment is, for example, a flip-chip electronic component (e.g., a flip-chip miniature light-emitting diode). Since the junction 112A of the other electrode 112 is larger than the junction 111A of the electrode 111, the contact area between the junction 112A and the second transparent conductive layer 140 can be increased, thereby improving the electrical connection effect. It should be noted that in... Figure 2 The second transparent conductive layer 140 partially covers the junction 112A; however, the invention is not limited thereto. In other embodiments, the second transparent conductive layer 140 may also fully cover the junction 112A.

[0072] On the other hand, due to the design of flip-chip electronic components, the planarization layer 120 may not fully contact the sidewalls 110S of the electronic component 110 due to insufficient material flow, thus failing to form a gap G. Alternatively, if the required thickness of the planarization layer 120 is too thick, and the solvent in the photoresist solution is removed during drying or baking to form the planarization layer 120, poor solvent removal at the bottom of the planarization layer 120 can easily occur, leading to undercut (UC) structural problems in the planarization layer 120. Undercut UC can cause the electronic component 110 to be located in the mounting area of ​​the electronic device 1B (e.g., Figure 2 The unstable bonding structure at the junction of the third conductive layer 1041 and the interface 111A affects the electrical connection of the electronic component 110.

[0073] Since the first transparent conductive layer 130 in this embodiment can be further filled into the gap G, the first transparent conductive layer 130 can reduce the structural instability of the electronic component 110 caused by the undercut UC structure, increase the reliability of the connection of the electronic component 110, and improve the product yield of the electronic device 1B. When the electronic component 110 is a miniature light-emitting diode and the electronic device 1B is a display device or a light-emitting device, it can also reduce the risk of poor bonding of the miniature light-emitting diode and reduce the probability of pixel defects.

[0074] It is worth mentioning that in the second via H2, the thickness Th2 of the first transparent conductive layer 130 is approximately one-half to two-thirds the thickness Th1 of the planarization layer 120. This design prevents the first transparent conductive layer 130 from completely filling the gap G, maintaining an appropriate distance between the first transparent conductive layer 130 and the other electrode 112, thus preventing direct contact between the first transparent conductive layer 130 and the other electrode 112 and avoiding a short circuit in the electronic component 110.

[0075] Furthermore, the top surface 120T of the planarization layer 120 and the upper electrode of the electronic component 110 (e.g.) Figure 2 There is a horizontal gap S between the other electrode 112 in the process. For example, when the planarization layer 120 is coated, if the material of the planarization layer 120 has poor flowability and fails to fill the area around the electronic component 110, the gap S is easily generated when the other electrode 112 of the electronic component 110 is exposed in subsequent manufacturing processes (such as exposure and development processes). Therefore, the material of the first transparent conductive layer 130 can be filled into the gap G through the gap S, thus completing the setting of the first transparent conductive layer 130. It should be noted that... Figure 2 The interval S is marked on the right side of the electronic component 110 in the cross-sectional view for ease of understanding. However, the present invention does not limit the position of the interval S. In fact, the interval S may appear anywhere around the electronic component 110.

[0076] Figures 3A to 3E This is a schematic diagram illustrating the manufacturing process of the electronic device according to the first embodiment of the present invention. Please also refer to... Figure 3A and Figure 3B First of all, Figure 3A As shown, a circuit board 100 is provided. The internal components of the circuit board 100, such as insulating layers, interconnecting holes, and circuit layers, are described above and will not be repeated here. Next, as... Figure 3B As shown, electronic component 110 is disposed on circuit board 100. For example, surface mount technology can be used to contact another electrode 112 of electronic component 110 with third circuit layer 1041. When electronic component 110 is a miniaturized structure, such as a miniature light-emitting diode, electrostatic transfer technology or micro-transfer technology can be used to transfer multiple electronic components 110 onto circuit board 100. The present invention is not limited thereto.

[0077] Please refer to Figure 3CNext, a planarization layer 120 is formed on the circuit board 100, and a first via H1 is formed in the planarization layer 120. Specifically, the planarization layer 120 can be formed using a slot coating method or a spin coating method, where a photoresist solution is coated onto the circuit board 100. An exposure and development process is then used to form the first via H1, exposing the third transition via T3. After baking, drying, and ashing to remove slag, the planarization layer 120 is formed, and the electronic component 110 is disposed within the planarization layer 120.

[0078] Please refer to Figure 3D Next, a first transparent conductive layer 130 is disposed in the first through-hole H1, and the first transparent conductive layer 130 is electrically connected to the circuit board 100. Specifically, the method for disposing of the first transparent conductive layer 130 is, for example, inkjet coating, where ink containing the material of the first transparent conductive layer 130 is sprayed through a nozzle, and the first transparent conductive layer 130 contacts the third transition hole T3 in the first through-hole H1. This achieves the electrical connection between the first transparent conductive layer 130 and the circuit board 100.

[0079] Please refer to Figure 3E Next, a second transparent conductive layer 140 of a different material is deposited on the top surface 120T of the planarization layer 120. The second transparent conductive layer 140 is electrically connected to the electronic component 110, and extends into the first via H1 to electrically connect to the first transparent conductive layer 130. Furthermore, the second transparent conductive layer 140 can be formed on the top surface 120T of the planarization layer 120 using sputtering, vacuum evaporation, or pulsed laser deposition methods, and then patterned. One end of the second transparent conductive layer 140 contacts the electrode 111, while the other part of the second transparent conductive layer 140 fills the first via H1 to contact the first transparent conductive layer 130. This completes the fabrication of the electronic device 1A.

[0080] Figures 4A to 4E This is a schematic diagram illustrating the manufacturing process of the electronic device according to the second embodiment of the present invention. Please also refer to... Figure 4A and Figure 4B First of all, Figure 4A As shown, a circuit board 100 is provided. The bonding method of the electronic components 110 onto the circuit board 100 can be referred to in the preceding paragraphs and will not be repeated here. It is worth mentioning that, as... Figure 4B As shown, here, the electrode 111 of the electronic component 110 with a smaller contact surface 111A contacts the third circuit layer 1041 (that is, the electrode 111 contacts and is electrically connected to the circuit board 100), while the other electrode 112 with a larger contact surface 112A is disposed opposite to it. In other words, the electronic component 110 is in a flip-chip configuration.

[0081] Please refer to Figure 4CNext, a planarization layer 120 is disposed on the circuit board 100, and a first via H1 is formed in the planarization layer 120. The method of disposing the planarization layer 120 and the first via H1 can be referred to the preceding paragraphs, and will not be repeated here. It is worth mentioning that, because the required thickness of the planarization layer 120 may be relatively thick, or because the electronic component 110 is in a flip-chip configuration, the planarization layer 120 may have problems such as poor flowability, resulting in a gap G between the electronic component 110 and the planarization layer 120 when the electronic component 110 is disposed in the planarization layer 120, and a horizontal distance S between the other electrode 112 of the electronic component 110 and the top surface 120T of the planarization layer 120.

[0082] Please refer to Figure 4D , Figure 4D The manufacturing process is the same as the aforementioned Figure 3D The manufacturing process is similar, but the difference lies in that the first transparent conductive layer 130 is also disposed in the gap G. Specifically, as described above, inkjet coating can be used to spray ink containing the material of the first transparent conductive layer 130 through a nozzle no, and the first transparent conductive layer 130 flows through the ink into the gap S to fill the gap G. Since the first transparent conductive layer 130 can be effectively filled into the gap G by means of the fluidity of the inkjet coating, it can ensure that the electrodes 111 of the electronic component 110 are electrically connected to the circuit board 100, and increase the overall stability of the electronic component 110.

[0083] As mentioned above, it should be noted that when inkjet coating the first transparent conductive layer 130, the thickness of the first transparent conductive layer 130 is one-half to two-thirds of the thickness of the planarization layer 120, so as to prevent the first transparent conductive layer 130 from directly contacting the other electrode 112 and causing a short circuit in the electronic component 110.

[0084] Please refer to Figure 4E , Figure 4E The manufacturing process is the same as the aforementioned Figure 3E The manufacturing processes are similar, the difference being that the second transparent conductive layer 140 is electrically connected to the other electrode 112 of the electronic component 110. Specifically, due to... Figure 4D The electronic component 110 is a flip-chip configuration, so the other electrode 112, which has a larger contact surface 112A, can have a larger contact area with the second transparent conductive layer 140. This increases the reliability of the electrical connection between the electronic component 110 and the second transparent conductive layer 140. Accordingly, the reliability of the electrical connection can be ensured for both the electrode 111 and the other electrode 112 of the electronic component 110, further improving the yield of the electronic device 1B. The fabrication of the electronic device 1B is thus completed.

[0085] Figure 5 This is a top view schematic diagram of the electronic device according to the third embodiment of the present invention. Please refer to... Figure 5The electronic device 1C in this embodiment is similar to the electronic device 1B, except that the planarization layer 120 in this embodiment further includes an opening OP connecting the second through hole H2 at the top surface 120T. It should be noted that, for ease of presentation, [the following text is missing]. Figure 5 The second transparent conductive layer 140 and the relative positions of the remaining components are omitted in the illustration. Please refer to the aforementioned embodiment for the omitted parts, which will not be repeated below.

[0086] Specifically, the method for setting the opening OP can be in Figure 4C The first through-hole H1 is fabricated using exposure and development processes. The opening OP allows ink containing the first transparent conductive layer 130 to flow more easily into the gap G when sprayed. Furthermore, the opening OP increases the capacity of the gap G, further limiting the thickness Th1 of the first transparent conductive layer 130 and reducing the risk of a short circuit caused by the first transparent conductive layer 130 directly contacting the other electrode 112 or the second transparent conductive layer 140 within the gap G.

[0087] It should be noted that, in Figure 5 In the top view of electronic device 1C, the projection of opening OP onto planarization layer 120 is offset from the projection of second transparent conductive layer 140 onto planarization layer 120, meaning that opening OP and second transparent conductive layer 140 are not overlapped. For example, opening OP can be set in... Figure 5 The opening OP extends to the right side of the other electrode 112, and the aperture of the opening OP extends towards the right side of the other electrode 112. The extension direction of the second transparent conductive layer 140 may, for example, extend to the left side of the other electrode 112. Of course, the invention is not limited to this. With the above configuration, the second transparent conductive layer 140 is prevented from filling the opening OP and is disposed in the gap G, thereby improving the electrical connection reliability of the electronic component 110.

[0088] In summary, the electronic device of the present invention utilizes a material different from that of the second transparent conductive layer. When the electronic device requires a conductive layer with high light transmittance and a planarization layer with high thickness, the high light transmittance of both the first and second transparent conductive layers has minimal impact on the optical properties of the electronic device. Furthermore, since the first transparent conductive layer can be made of a material that is easier to install, and the second transparent conductive layer extends into the first through-hole of the planarization layer and is electrically connected to the first transparent conductive layer, the second transparent conductive layer does not need to be grown to a excessive thickness. This reduces the climbing height of the second transparent conductive layer, lowers the installation difficulty of the conductive layer, reduces the risk of wire breakage, and increases the yield of the electronic device. The present invention also provides a method for manufacturing an electronic device, utilizing a material different from that of the second transparent conductive layer to reduce the installation difficulty of the second transparent conductive layer.

[0089] Although the present invention has been disclosed in conjunction with the above embodiments, it is not intended to limit the present invention. Any person skilled in the art can make some modifications and refinements without departing from the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be defined by the appended claims.

Claims

1. An electronic device comprising: Circuit board; Electronic components are mounted on this circuit board. A planarization layer is disposed on the circuit board, the planarization layer including a top surface and a first through hole; A first transparent conductive layer is disposed in the first through hole and electrically connected to the circuit board; as well as A second transparent conductive layer is disposed on the top surface and extends into the first through-hole, electrically connecting the first transparent conductive layer. The electronic component is electrically connected to the second transparent conductive layer, and the first transparent conductive layer is made of a different material than the second transparent conductive layer. The electronic component is disposed in the planarization layer, and there is a gap between the electronic component and the planarization layer, and the first transparent conductive layer is disposed in the gap.

2. The electronic device of claim 1, wherein the planarization layer has a second via, the electronic element is in the second via, an electrode of the electronic element is electrically connected to the circuit board, and another electrode of the electronic element is electrically connected to the second transparent conductive layer.

3. The electronic device of claim 2, wherein the thickness of the first transparent conductive layer is one-half to two-thirds the thickness of the planarization layer.

4. The electronic device as claimed in claim 2 or 3, wherein the gap is present between the sidewall of the second through hole and the sidewall of the electronic element.

5. The electronic device of claim 4, wherein the planarization layer further includes an opening connecting the second through-hole, and the opening does not overlap the second transparent conductive layer.

6. The electronic device of claim 1, wherein the electronic element is a vertical miniature light-emitting diode.

7. The electronic device of claim 1, wherein the material of the first transparent conductive layer is a transparent organic material doped with a conductive material, the conductive material including one of tin dioxide, graphene and antimony oxide, and the material of the second transparent conductive layer includes indium tin oxide.

8. A method for manufacturing an electronic device, comprising: Provide circuit boards; Electronic components are mounted on the circuit board. A planarization layer is disposed on the circuit board; A first through-hole is formed in the planarization layer; A first transparent conductive layer is disposed in the first through hole and electrically connected to the circuit board; A second transparent conductive layer is disposed on the top surface of the planar layer, and the second transparent conductive layer is electrically connected to the electronic component. The second transparent conductive layer also extends into the first through-hole and is electrically connected to the first transparent conductive layer. The first transparent conductive layer and the second transparent conductive layer are made of different materials. The electronic component is disposed in the planarization layer, and there is a gap between the electronic component and the planarization layer, and the first transparent conductive layer is disposed in the gap.

9. The method of manufacturing an electronic device as claimed in claim 8, wherein, The planarization layer has a second via, through which the electronic component is located. The electrodes of the electronic component are electrically connected to the circuit board, and the other electrode of the electronic component is electrically connected to the second transparent conductive layer. The gap is present between the sidewall of the second through hole and the sidewall of the electronic component.

10. The method of manufacturing an electronic device as claimed in claim 8 or 9, wherein the step of disposing the first transparent conductive layer in the first through-hole and the gap further comprises: An opening is provided on the flat layer, which connects the gap and does not overlap the second transparent conductive layer.

11. The method of manufacturing an electronic device as claimed in claim 10, wherein the step of disposing the first transparent conductive layer in the first through-hole and the gap further comprises: The first transparent conductive layer is applied by inkjet printing, and the thickness of the first transparent conductive layer is one-half to two-thirds of the thickness of the planarization layer.

12. The method of manufacturing an electronic device as claimed in claim 8, wherein the material of the first transparent conductive layer is a transparent organic material doped with a conductive material, the conductive material including one of tin dioxide, graphene and antimony oxide, and the material of the second transparent conductive layer includes indium tin oxide.

13. The method of manufacturing an electronic device as claimed in claim 8, wherein the step of disposing the electronic element on the circuit board includes electrically connecting the electrodes of the electronic element to the circuit board, and the step of disposing the second transparent conductive layer further includes electrically connecting the second transparent conductive layer to another electrode of the electronic element.

14. The method of manufacturing an electronic device as claimed in claim 8, wherein the step of depositing a second transparent conductive layer on the top surface of the planarization layer further includes sputtering and patterning the second transparent conductive layer.

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