A server mainboard, server board online analysis system and method

Abstract

The application belongs to the technical field of server board analysis and design, and specifically provides a server mainboard, a server board online analysis system and method, wherein the mainboard is provided with a logic programming device and a main chip connected with the logic programming device; the logic programming device is used for receiving a test signal sent by the main chip, processing the received test signal to generate a processing signal, and sending the processing signal back to the main chip; the processing signal returned by the main chip is received, and the processing signal returned by the main chip is compared with the received test signal sent by the main chip, and a comparison analysis result is output; and the positioning difficulty effect of the field is reduced through the comparison between the original signal and the loopback signal by the logic programming device.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of server board card analysis design, and particularly relates to a server mainboard, a server board card online analysis system and method. BACKGROUND

[0002] The application environment of communication and computing fields including router / switch / server and other types of products is in the customer room. Such products are composed of circuit boards, and each circuit board generally contains a logic programming device. Once the on-site machine has a problem, the on-site engineer will face the following difficult scenarios: the product problem may include circuit board damage, device aging, program error, version mismatch, and other types of problems, and it is difficult to locate the problem cause in a short time to restore customer business at the customer site.

[0003] Hardware failure problems, in general, the engineer carries the corresponding configuration circuit board, replaces it at the customer side, and the machine is normal. The engineer carries the damaged circuit board back to the laboratory to reproduce the problem under the permission of the customer; in addition, the customer site may not be able to take the problem part away for analysis due to security factors; in this case, the customer's operation method is inquired, and the scene is reproduced in the laboratory according to the customer's description, and if it cannot be reproduced, the engineer needs to carry the test equipment to the customer site to measure and locate. This problem can sometimes not be successfully reproduced by laboratory reproduction or scene reproduction according to customer description, which prolongs the time of problem analysis and positioning.

[0004] Software failure problems require the customer site to enter the debugging mode and run the test code. For example, the super command used when debugging in front of the customer, the super mode. Even need to download software to the customer device or remotely network to send commands for debugging, the software enters the super mode, which will affect the customer experience and increase the customer's security concerns, and some customer environments prohibit connecting to the external network and downloading external software, which makes it impossible to realize debugging by downloading software. SUMMARY

[0005] The present application provides a server mainboard, a server board card online analysis system and method to solve the problem of problem reproduction of hardware circuit board failure.

[0006] In a first aspect, the present application provides a server mainboard, which is provided with a logic programming device and a main chip connected with the logic programming device.

[0007] The logic programming device is used for receiving the test signal sent by the main chip and processing the received test signal to generate a processing signal looped back to the main chip when the motherboard needs to be analyzed, receiving the processing signal returned by the main chip, comparing the processing signal returned by the main chip with the received test signal sent by the main chip, and outputting a comparison analysis result; and is also used for transmitting the output signal of the motherboard when the motherboard does not need to be analyzed.

[0008] The logic programming device is arranged on the motherboard, when a fault needs to be analyzed on the server, the logic programming device is started to analyze the board, the output pin of the main chip on the motherboard sends a test signal to the logic programming device, the logic programming device internally processes the received test signal, which is actually converted into a processing signal according to a set protocol, the logic programming device loops the processing signal to the input pin of the main chip, the main chip returns the received processing signal to the logic chip through the output pin, at this time, the logic chip compares the received processing signal returned by the main chip with the received test signal, before comparison, the logic chip needs to perform inverse conversion on the received processing signal to generate a returned test signal, and the generated returned test signal is compared with the received test signal to output a comparison result.

[0009] As a preferred technical scheme of the present application, the logic programming device is used for positioning a problem according to a comparison result and applying a fault judgment model to output a fault positioning prompt information if the comparison result is inconsistent, and is used for outputting a test passing prompt information if the comparison result is consistent and the number of times of receiving the test signal sent by the main chip is greater than a set threshold.

[0010] The information output by different pins of the main chip is different, the logic programming device receives the test signal sent by the main chip, and when the comparison signal is inconsistent, the pin of the main chip sending the test signal is first judged to position the faulty component, before this, a registration information table can be established, in which the registration information of each component corresponding to the pin of the main chip in the BIOS is established, and the component corresponding to the pin of the main chip is judged by looking up the table to position the faulty component.

[0011] The fault judgment model actually gives troubleshooting suggestions by applying the fault judgment model, and outputs a display, according to the given suggestions, the customer can troubleshoot and solve the fault according to the prompt information. The fault judgment model is a fault troubleshooting suggestion model given according to different faults, and a series of models are established according to different types of faults.

[0012] As a preferred technical scheme of the present application, the logic programming device is provided with a communication interface, and the communication interface is connected with a connection terminal, and the comparison and analysis result is output through the connection terminal. When used, the connection terminal can be directly connected through a cable.

[0013] As a preferred technical scheme of the present application, the logic programming device is arranged at an output position of the mainboard. In order to facilitate wiring, the logic programming device is used to analyze and judge the output signal of the mainboard, or the output signal of the mainboard is transmitted and output.

[0014] As a preferred technical scheme of the present application, the mainboard is provided with a first output connector, and the logic programming device is connected with the first output connector.

[0015] The logic programming device is used to transmit the output signal of the mainboard to the first output connector when the mainboard does not need to be analyzed, and the output signal is output through the first output connector. The plug-in and plug-out are facilitated, and the problem of connection confusion on the surface of the board caused by direct connection of the cable is overcome.

[0016] In the second aspect, the present application provides a server board online analysis system, which comprises the server mainboard and the visual interface as described in the first aspect.

[0017] The logic programming device is connected with the visual interface, and is used to convert the comparison and analysis result into display code and output display.

[0018] As a preferred technical scheme of the present application, the visual interface is arranged on a PCB of a server lug.

[0019] When the communication interface of the logic programming device is connected with the connection terminal, the connection terminal is connected with the visual interface through a cable.

[0020] As a preferred technical scheme of the present application, the system further comprises a component board, and the component board is provided with a component chip.

[0021] The component chip is connected with the logic programming device.

[0022] The logic programming device is used to send a test signal to the component chip and receive a processed signal returned by the component chip when the component board needs to be analyzed, compare and analyze the received processed signal with the sent test signal, convert the comparison and analysis result into display code and output display through the visual interface, and is also used to transmit and output the output signal of the component board when the component board does not need to be analyzed.

[0023] The logic programming device is arranged on the mainboard. When the server needs to be analyzed in terms of the board, the board analysis function of the logic programming device is started. The logic programming device sends a test signal to the component chip. The component chip internally processes the received test signal according to a set protocol, sends the processed signal to the logic chip, and the logic chip processes the sent test signal according to the set protocol after receiving the processed signal returned by the component chip. After the processing is completed, the processed signal returned by the component chip is compared, and the comparison result is output. Alternatively, the logic chip can process the processed signal of the component chip according to the set protocol after receiving the processed signal returned by the component chip. After the processing is completed, the test signal sent to the component chip is compared, and the comparison result is output.

[0024] In a third aspect, the technical scheme of the present application further provides a server board online analysis method based on the system of the first aspect, the method comprising the following steps:

[0025] determining whether to start online analysis;

[0026] if yes, performing board online analysis;

[0027] if no, transmitting the output signal of the accessed board;

[0028] The step of performing board online analysis comprises performing mainboard online analysis, specifically comprising:

[0029] receiving a test signal sent by a main chip;

[0030] processing the received test signal to generate a processing signal and sending the processing signal back to the main chip;

[0031] receiving the processing signal returned by the main chip and comparing the received processing signal returned by the main chip with the received test signal sent by the main chip;

[0032] when the comparison result is inconsistent, positioning the problem according to the comparison result and applying a fault judgment model, and outputting fault positioning prompt information according to the fault judgment model;

[0033] when the comparison result is consistent, determining whether the number of times of receiving the test signal sent by the main chip is greater than a set threshold;

[0034] if yes, outputting a test pass prompt information;

[0035] if no, performing the step of receiving a test signal sent by a main chip;

[0036] As a preferred embodiment of the technical scheme of the present application, the step of performing board online analysis further comprises performing online analysis on a component board, specifically comprising:

[0037] The logic programmed device sends a test signal to the component chip and receives a processed signal returned by the component chip;

[0038] The logic programmed device compares the received processed signal with the sent test signal;

[0039] When the comparison result is inconsistent, the problem is located according to the comparison result and a fault judgment model is applied, and a fault location prompt information is output according to the fault judgment model;

[0040] When the comparison result is consistent, the logic programmed device judges whether the number of times of sending the test signal to the component board is greater than a set threshold value;

[0041] If yes, a test passing prompt information is output;

[0042] If no, the step of sending a test signal to the component chip by the logic programmed device and receiving a processed signal returned by the component chip is executed.

[0043] From the above technical solution, the present application has the following advantages:

[0044] 1. The positioning difficulty in the field is reduced by means of comparing the original signal with the loopback signal by the logic programmed device.

[0045] 2. The positioning time in the field is reduced by means of comparing the problem type with the fault model data on the logic programmed device.

[0046] 3. The positioning result is displayed and output, which can support the customer to self-position and judge.

[0047] 4. The customer can operate according to the display prompt, which improves the customer's trust in safety.

[0048] In addition, the present application has reliable design principle, simple structure and very wide application prospect.

[0049] Therefore, compared with the prior art, the present application has outstanding substantial characteristics and significant progress, and the beneficial effects of the implementation are also obvious. BRIEF DESCRIPTION OF DRAWINGS

[0050] In order to more clearly illustrate the technical solutions in the embodiments of the present application or the prior art, the drawings needed to be used in the embodiments or prior art description will be briefly introduced below, and obviously, other drawings can also be obtained by those skilled in the art without creative labor.

[0051] Figure 1 is a schematic diagram of a server mainboard provided by the embodiment of the present application.

[0052] Figure 2 is a schematic block diagram of a server board online analysis system provided by an embodiment of the present application.

[0053] Figure 3 is a schematic flow chart of a server board online analysis method provided by an embodiment of the present application. DETAILED DESCRIPTION

[0054] Those skilled in the art can understand that the units and algorithm steps of each example described in combination with the embodiments disclosed herein can be realized in electronic hardware, computer software or a combination of both. In order to clearly illustrate the interchangeability of hardware and software, the components and steps of each example have been described in the above description in a general manner. Whether the functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. A person skilled in the art can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0055] The block diagram shown in the accompanying drawings is only a functional entity, and does not necessarily correspond to a physically independent entity. That is, the functional entities can be implemented in the form of software, or in one or more hardware modules or integrated circuits, or in different network and / or processor devices and / or microcontroller devices.

[0056] In the embodiments provided in the present application, it should be understood that the disclosed system, device and method can be implemented in other ways. For example, the device embodiments described above are only schematic, and the division of the units is only a logical function division, and there can be another division in actual implementation, for example, a plurality of units or components can be combined or integrated into another system, or some features can be ignored or not executed. In addition, the coupling or direct coupling or communication connection between the units shown or discussed can be indirect coupling or communication connection through some interfaces, devices or units, and can also be electrical, mechanical or other forms of connection.

[0057] Moreover, the described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments. In the following description, numerous specific details are provided to give a thorough understanding of embodiments of the claimed application. One skilled in the relevant art will recognize, however, that the various embodiments of the application can be practiced without one or more of the specific details, or

[0058] The English annotations are as follows:

[0059] FPGA: Field Programmable Gate Array, as a kind of semi-custom circuit in the field of application-specific integrated circuit (ASIC), both to solve the lack of custom circuit, and overcome the original programmable device gate number limited shortcomings.

[0060] MCU: Micro Control Unit, the Chinese name for micro control unit, also known as single chip microcomputer (Single Chip Microcomputer) or single-chip microcomputer, refers to the CPU, RAM, ROM, timing counter and a variety of I / O interface integrated on a chip with the development of large-scale integrated circuit, forming a chip-level computer for different application scenarios to do different combination control common memory device.

[0061] I2C (Inter-Integrated Circuit) is the call of internal integrated circuit, a kind of serial communication bus, using multi-master-slave architecture, is a simple, bidirectional two-wire synchronous serial bus.

[0062] UART: Universal Serial Bus.

[0063] Figure 1 The server mainboard schematic diagram provided by the embodiment of the application, the mainboard is provided with a logic programming device and a main chip connected with the logic programming device;

[0064] The logic programming device is used for receiving the test signal sent by the main chip and processing the received test signal to generate a processing signal when the motherboard needs to be analyzed, and the processing signal is looped back to the main chip; the processing signal returned by the main chip is received, and the processing signal returned by the main chip is compared with the received test signal sent by the main chip, and an analysis result of comparison is output; and the logic programming device is also used for transmitting and outputting the output signal of the motherboard when the motherboard does not need to be analyzed.

[0065] The logic programming device is arranged on the motherboard, when a fault needs to be analyzed on the server, the logic programming device is started, the output pin of the main chip on the motherboard sends a test signal to the logic programming device, the logic programming device internally processes the received test signal, and the processing of the test signal actually includes conversion of the test signal (the test signal contains a check code) according to a set protocol to generate a processing signal. The logic programming device loops back the processing signal to the input pin of the main chip, and the main chip returns the received processing signal to the logic chip through the output pin. At this time, the logic chip compares the received processing signal returned by the main chip with the received test signal. Before comparison, the logic chip needs to perform inverse conversion (that is, the same way of generating a processing signal from a test signal, the inverse conversion converts the processing signal back to a test signal) on the received processing signal to generate a returned test signal, and the generated returned test signal is compared with the received test signal. If the comparison result is inconsistent, a fault positioning prompt information is output according to the comparison result and a fault judgment model. If the comparison result is consistent and the number of times of receiving the test signal sent by the main chip is greater than a set threshold, a test passing prompt information is output.

[0066] For example, the original fixed data 01010101010101X (X is a check code) and the looped-back received 11010101010101Y (Y is a check code) can identify that the data at this position has a problem.

[0067] The information output by different pins of the main chip is different, the logic programming device receives the test signal sent by the main chip, and when the compared signals are inconsistent, the pin of the main chip sending the test signal is first judged to locate the faulty component. Before that, a registration information table can be established first, and the registration information of each component corresponding to the pin of the main chip in the BIOS is established in the table. The faulty component is located by looking up the table to determine the component corresponding to the pin of the main chip.

[0068] The fault judgment model actually gives troubleshooting suggestions by applying the fault judgment model, and outputs display, according to the given suggestions, the customer self-troubleshoots and solves according to the prompt information. The fault judgment model is a fault troubleshooting suggestion model given according to different faults. Different types of faults have different troubleshooting methods, and a series of models are established.

[0069] As a preferred technical solution of the present application, the logic programming device is provided with a communication interface connected with a connection terminal, and the comparison and analysis result is output through the connection terminal. When used, it can be directly connected with the terminal through a cable. The UART / I2C / USB communication interface of the logic programming device is led out as a terminal. Generally, the logic programming device is arranged at the output position of the mainboard. In order to facilitate wiring, since the logic programming device is used for analyzing and judging the output signal on the mainboard, or transmitting the output signal of the mainboard. Generally, the mainboard is provided with a connector, which is a first output connector. The logic programming device is connected with the first output connector.

[0070] The logic programming device is used for transmitting the output signal of the mainboard to the first output connector when the mainboard does not need to be analyzed, and the output signal is output through the first output connector. It is convenient to plug and unplug, and overcomes the problem of connection confusion on the surface of the board caused by direct connection of the cable.

[0071] The embodiment of the present application also provides a server mainboard. The hardware part of the mainboard is added with a logic programming device such as FPGA or MCU. Here, FPGA is selected. The position of the FPGA is located at the output part of the mainboard. The original output signal is connected to the FPGA pin, and another pin is led out to the original connector. Here, the original connector refers to the connector of the original signal output of the mainboard. The UART / IIC / USB communication interface of the FPGA is led out as a terminal. The terminal is connected to the ear output port of the server through a cable.

[0072] When testing, the mainboard and the FPGA send test signals, the FPGA first diagnoses the mainboard side signals, the diagnosis method is to use program control the same group of data to loop back in the FPGA multiple times, for example 01010101010101X (X is a check code). From the main chip (such as CPU) output, after processing in the FPGA, it is looped back to the main chip (such as CPU), the main chip returns the signal to the FPGA, and the FPGA performs diagnosis processing, compares the looped back received data with the fixed data (the test signal sent by the main chip), monitors the error code, and sends the error code through the communication port. No problem feedback success. For example, the original fixed data 01010101010101X (X is a check code), after looped back, the received data is 11010101010101Y (Y is a check code), which can immediately identify that the data at this position has a problem. The positioning problem is output; for example, the slot 2 external loop back fails, at this time, the BIOS internal registration information is queried, and the slot 2 is DPU. That is, through the communication interface, the prompt information of "please replace the slot 2 DPU" is reported.

[0073] Figure 2 is a schematic block diagram of the server board card online analysis system provided by the embodiment of the application, the system comprises a visual interface and a mainboard;

[0074] The mainboard is provided with a logic programming device and a main chip connected with the logic programming device;

[0075] The logic programming device is used for receiving the test signal sent by the main chip and processing the received test signal to generate a processing signal when the mainboard needs to be analyzed, and the processing signal is looped back to the main chip; receiving the processing signal returned by the main chip, and comparing the processing signal returned by the main chip with the received test signal sent by the main chip, and outputting the comparison analysis result; when the mainboard does not need to be analyzed, the output signal of the mainboard is transmitted and output.

[0076] The logic programming device is connected with the visual interface, and is used for converting the comparison analysis result into display code and outputting the display through the visual interface.

[0077] Here, the visual interface is arranged on the PCB board of the server lug; those skilled in the art know that the server lug is outside the server case, and the PCB board is also arranged at the server lug, and the visual interface is arranged on the PCB board of the lug in the embodiment, so that the external display device is connected through the visual interface, and the display device is used to display the comparison analysis result of the logic programming device through the visual interface, so that the working personnel can intuitively know the analysis result of the server board card, and the user can conveniently perform fault positioning processing according to the input prompt information.

[0078] When the communication interface of the logic programming device is connected with the connection terminal, the connection terminal is connected with the visual interface through the cable.

[0079] The board card of the server includes not only the main board but also the component board card, and the component chip is arranged on the component board card.

[0080] The component chip is connected with the logic programming device.

[0081] The logic programming device is used for sending a test signal to the component chip and receiving a processed signal returned by the component chip when the component board card needs to be analyzed, comparing and analyzing the received processed signal with the sent test signal, and converting the comparison and analysis result into a display code output display through the visual interface; and is also used for transparently outputting the output signal of the component board card when the component board card does not need to be analyzed.

[0082] The logic programming device is connected with the second output connector.

[0083] The logic programming device is arranged on the main board, and when the server needs to be analyzed in terms of the board card, the board card analysis function of the logic programming device is started, the logic programming device sends a test signal to the component chip, the component chip internally processes the received test signal according to a set protocol, sends the processed signal to the logic chip, the logic chip can process the sent test signal according to the set protocol after receiving the processed signal returned by the component chip, compares the processed signal with the received processed signal returned by the component chip after the processing is completed, and outputs the comparison result; or the logic chip can reversely process the received processed signal of the component chip according to the set protocol after receiving the processed signal returned by the component chip, compares the processed signal with the test signal sent to the component chip after the processing is completed, and outputs the comparison result.

[0084] The hardware part of the main board is added with a logic programming device such as FPGA or MCU, and here, FPGA is selected, the position of the FPGA is located at the output part of the main board, the original output signal is connected to the pin of the FPGA, and another pin is led out to the original connector, and here, the original connector refers to the connector of the original signal output of the main board; the communication interface such as UART / I2C / USB of the FPGA is led out as a terminal, and the terminal is connected to the ear output port of the server through the cable.

[0085] The component board card is provided with a second output connector connected with the programmable logic device, when the board card analysis is not needed, the signal output from the main board to the component board card is transmitted to the component board card through the logic programmable device, and the signal output from the main board to the outside is transmitted through the first output connector; the signal output from the component board card to the main board is transmitted to the main board through the logic programmable device, and the signal output from the component board card to the outside is transmitted through the second output connector.

[0086] During testing, test signals are sent between the main board and the FPGA, the FPGA first diagnoses the signals on the main board side, the diagnosis method is to use a program to control the same group of data to loop back in the FPGA multiple times, for example, 01010101010101X (X is a check code). From the output port of the main chip (such as CPU), after processing in the FPGA, it is looped back to the main chip (such as CPU), and the main chip returns the signal to the FPGA, and the FPGA performs diagnosis processing, compares the looped back received data with the fixed data (the test signal sent by the main chip), monitors the error code, and sends the error code through the communication port. No problem feedback success. For example, the original fixed data 01010101010101X (X is a check code), after looped back, 11010101010101Y (Y is a check code) is obtained, which can immediately identify that there is a problem with the data at this place. Output the positioning problem; for example, slot 2 external loop back fails, at this time, the BIOS internal registration information is queried, and slot 2 is DPU. That is, through the communication interface, the prompt information "please replace slot 2 DPU" is reported.

[0087] The same as the internal loop back, the process of sending test signals to the component board card for testing includes: setting a logic programming device on the main board, when a fault occurs and the server needs to be analyzed, the board card analysis function of the logic programming device is started, the logic programming device sends test signals to the component chip, the component chip internally processes the received test signals according to the set protocol, and sends the processed signals to the logic chip. After the logic chip receives the processed signals returned by the component chip, the transmitted test signals can be processed according to the set protocol, and the comparison result is output after the processing is completed; or, after the logic chip receives the processed signals returned by the component chip, the received processed signals of the component chip can be processed in reverse according to the set protocol, and the comparison result is output after the processing is completed.

[0088] The positioning problem or is directly thrown to the visual interface, which is convenient for the customer to confirm. For example, slot 2 external loop back fails, at this time, the BIOS internal registration information is queried, and slot 2 is DPU. That is, through the communication interface described in the second part, the display "please replace slot 2 DPU" is reported

[0089] Fault diagnosis models can also be applied to display troubleshooting methods to customers, enabling self-localization. For example, in the DPM fault model, when the DPU fails, the prompts could be: "1. Try replacing the DPU slot; 2. Please test for abnormal input voltage" -> If the customer selects "No," a prompt could appear -> Please observe whether the DPU board is burnt out or contains foreign objects -> If the customer confirms that there are indeed foreign objects on the gold fingers, the customer can resolve the problem themselves -> The customer clicks "Yes" -> The self-test passes again -> Self-localization complete. Customers can resolve the problem themselves based on the prompts, and the problem remains transparent.

[0090] Figure 3 This is a schematic flowchart of the server board online analysis method provided in this embodiment of the invention. It should be noted that the server board online analysis method in this embodiment is based on a server board online analysis system. The system includes a visualization interface and a motherboard. The motherboard is equipped with a logic programming device and a main chip connected to the logic programming device. The logic programming device is used to receive test signals sent by the main chip when analysis of the motherboard is required, process the received test signals to generate a processed signal, and loop it back to the main chip. It also receives the processed signal returned by the main chip, compares the returned processed signal with the received test signal sent by the main chip, and outputs the comparison analysis result. When analysis of the motherboard is not required, it transmits the output signal of the motherboard transparently. The logic programming device is connected to the visualization interface and is used to convert the comparison analysis result into a display encoding output for display through the visualization interface. The system also includes component boards, on which component chips are mounted; the component chips are connected to a logic programming device; when the logic programming device needs to analyze the component board, it sends a test signal to the component chip and receives a processed signal returned by the component chip, compares and analyzes the received processed signal with the sent test signal, and converts the comparison and analysis results into display codes for output through a visualization interface; when the component board does not need to be analyzed, the output signal of the component board is transparently transmitted; the method includes the following steps:

[0091] Step 1: Determine whether online analysis is enabled;

[0092] If yes, proceed to step 2; otherwise, proceed to step 3.

[0093] Step 2: Perform online analysis of the circuit board;

[0094] Step 3: Transmit the output signal of the connected board out;

[0095] Step 2, which involves online analysis of the circuit board, includes online analysis of the motherboard, specifically:

[0096] Step 121: Receive the test signal sent by the main chip;

[0097] Step 122: processing the received test signal to generate a processing signal looped back to the main chip;

[0098] Step 123: receiving the processing signal returned by the main chip and comparing the received processing signal returned by the main chip with the received test signal sent by the main chip;

[0099] Step 124: judging whether the comparison result is consistent, if not, executing step 125, otherwise executing step 126;

[0100] Step 125: locating the problem according to the comparison result and applying a fault judgment model, and outputting fault location prompt information according to the fault judgment model;

[0101] Step 126: judging whether the number of times of receiving the test signal sent by the main chip is greater than a set threshold;

[0102] If yes, executing step 127, otherwise, returning to step 121;

[0103] Step 127: outputting test pass prompt information.

[0104] In step 2, the steps of performing online analysis of the board card include performing online analysis of the component board card, specifically including:

[0105] Step 221: the logic programming device sends a test signal to the component chip and receives the processed signal returned by the component chip;

[0106] Step 222: the logic programming device compares and analyzes the received processed signal with the sent test signal;

[0107] Step 223: judging whether the comparison result is consistent, if not, executing step 224, otherwise executing step 225;

[0108] Step 224: locating the problem according to the comparison result and applying a fault judgment model, and outputting fault location prompt information according to the fault judgment model;

[0109] Step 225: the logic programming device judges whether the number of times of sending the test signal to the component board card is greater than a set threshold; if yes, executing step 226, otherwise executing step 221;

[0110] Step 226: outputting test pass prompt information 。

[0111] It should be noted that when the logic programming device is provided on the mainboard, and the server needs to be analyzed for board failure, the board analysis function of the logic programming device is started, and the mainboard is analyzed. The output pin of the main chip on the mainboard sends a test signal to the logic programming device. The logic programming device internally processes the received test signal. Here, the processing actually converts the received test signal (the test signal contains a check code) according to the set protocol to generate a processing signal. The logic programming device loops the processing signal back to the input pin of the main chip. The main chip returns the processing signal received by the logic chip through the output pin. At this time, the logic chip compares the processing signal returned by the main chip with the received test signal. Before comparison, the logic chip needs to perform inverse transformation (that is, the same way as generating a processing signal from a test signal, inverse transformation converts the processing signal back to a test signal) to generate a returned test signal. The generated returned test signal is compared with the received test signal. If the comparison result is inconsistent, the problem is located according to the comparison result and the fault judgment model is applied. The fault judgment model outputs a fault positioning prompt information; if the comparison result is consistent and the number of times of receiving the test signal sent by the main chip is greater than the set threshold, a test pass prompt information is output.

[0112] When the component board is analyzed, the logic programming device sends a test signal to the component chip. The component chip internally processes the received test signal according to the set protocol and sends the processed signal to the logic chip. After receiving the processed signal returned by the component chip, the logic chip can process the sent test signal according to the set protocol. After processing, the processed signal is compared with the received processed signal returned by the component chip, and the comparison result is output. Or, after receiving the processed signal returned by the component chip, the logic chip can perform reverse processing on the received processed signal of the component chip according to the set protocol. After processing, the test signal sent to the component chip is compared, and the comparison result is output.

[0113] The component board is provided with a second output connector connected with the programming logic device. When the board analysis is not needed, the step of transmitting the output signal of the connected board in step 3 includes: the signal output from the mainboard to the component board is transmitted to the component board through the logic programming device, and the signal output from the mainboard to the outside is transmitted through the first output connector through the logic programming device; the signal output from the component board to the mainboard is transmitted to the mainboard through the logic programming device, and the signal output from the component board to the outside is transmitted through the second output connector through the logic programming device.

[0114] The server mainboard, the server board card online analysis system and method of the present application are units and algorithm steps of each example described in combination with the embodiments disclosed herein, which can be realized by electronic hardware, computer software or combination of both. In order to clearly illustrate the interchangeability of hardware and software, the composition and steps of each example have been generally described in the above description. Whether the functions are realized in hardware or software manner depends on the specific application and design constraints of the technical solution. The skilled person can use different methods to realize the described functions for each specific application, but such implementation should not be considered beyond the scope of the present application.

[0115] Although the present application has been described in detail by referring to the preferred embodiments thereof, it is to be understood that the present application is not limited to the preferred embodiments. Various alterations and modifications to the embodiments of the present application can be made by those skilled in the art without departing from the spirit and scope of the present application. Therefore, it is intended that the present application cover any and all modifications and alterations of the application. Any and all modifications and alterations of this application can be acquired across the technical range disclosed in the present application by any person skilled in the art. Therefore, the scope of the present application should be limited by the scope of the claims.

Claims

1. A server motherboard, characterized by, The mainboard is provided with a logic programming device and a main chip connected with the logic programming device; The logic programming device is used for receiving a test signal sent by the main chip, processing the received test signal to generate a processing signal, and feeding back the processing signal to the main chip; receiving a processing signal returned by the main chip, and comparing the processing signal returned by the main chip with the received test signal sent by the main chip to output a comparison analysis result; The logic programming device is used for positioning a problem according to the comparison result and applying a fault judgment model to output a fault positioning prompt information if the comparison result is inconsistent; The logic programming device is used for outputting a test passing prompt information if the comparison result is consistent and the number of times of receiving the test signal sent by the main chip is greater than a set threshold value; The logic programming device is provided with a communication interface, and the communication interface is connected with a connection terminal to output the comparison analysis result through the connection terminal; The logic programming device is arranged at an output position of the mainboard; The information output by different pins of the main chip is different, and the logic programming device receives the test signal sent by the main chip. When the comparison signals are inconsistent, the pin of the main chip sending the test signal is first judged to position the faulty component. Before this, a registration information table is established to establish the registration information of each component corresponding to the pin of the main chip in the BIOS. The faulty component is positioned by looking up the table.

2. The server motherboard of claim 1, wherein, The mainboard is provided with a first output connector, and the logic programming device is connected with the first output connector; The logic programming device is used for transmitting the output signal of the mainboard to the first output connector without analyzing the mainboard, and outputting the signal through the first output connector.

3. A server board online analysis system, characterized in that, The server mainboard comprises a visual interface and a logic programming device as claimed in any one of claims 1-2; The logic programming device is connected with the visual interface, and is used for converting the comparison analysis result into display code to output a display.

4. The server board online analysis system of claim 3, wherein, The visual interface is arranged on a PCB board of a server lug; When the communication interface of the logic programming device is connected with the connection terminal, the connection terminal is connected with the visual interface through a cable.

5. The server board online analysis system of claim 4, wherein, The system further comprises a component board card, and the component board card is provided with a component chip; The component chip is connected with the logic programming device; The logic programming device is used for sending a test signal to the component chip, receiving a processed signal returned by the component chip, comparing the received processed signal with the sent test signal, and converting the comparison analysis result into display code to output a display through the visual interface.

6. An online analysis method of a server board based on the system of any one of claims 3-5, characterized in that, The method comprises the following steps: Judging whether to start online analysis; If yes, performing board card online analysis; If no, transmitting the output signal of the accessed board card; The step of performing board card online analysis comprises online analysis of the mainboard, and specifically comprises: Receiving a test signal sent by the main chip; Processing the received test signal to generate a processing signal, and feeding back the processing signal to the main chip; Receiving a processing signal returned by the main chip, and comparing the received processing signal returned by the main chip with the received test signal sent by the main chip; When the comparison result is inconsistent, the problem is located according to the comparison result and the fault judgment model is applied, and fault location prompt information is output according to the fault judgment model; When the comparison result is consistent, it is judged whether the number of times of receiving the test signal sent by the main chip is greater than a set threshold value; If yes, test pass prompt information is output; If no, the step of receiving the test signal sent by the main chip is executed.

7. The server board online analysis method of claim 6, wherein, The step of performing online analysis of the board card includes performing online analysis on the component board card, specifically including: The logic programming device sends a test signal to the component chip and receives a processed signal returned by the component chip; The logic programming device compares and analyzes the received processed signal with the sent test signal; When the comparison result is inconsistent, the problem is located according to the comparison result and the fault judgment model is applied, and fault location prompt information is output according to the fault judgment model; When the comparison result is consistent, the logic programming device judges whether the number of times of sending the test signal to the component board card is greater than a set threshold value; If yes, test pass prompt information is output; If no, the step of the logic programming device sending a test signal to the component chip and receiving a processed signal returned by the component chip is executed.

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