Large-scale rc network equivalent reduction method based on ticer algorithm

Abstract

The application discloses a large-scale RC network equivalent reduction method based on a TICER algorithm and belongs to the field of integrated circuit design. The improved TICER algorithm is used to perform equivalent reduction on a capacitor-resistor network, including evaluation and retention and merging of 'important' nodes and 'unimportant' nodes, adaptive merging of coupling capacitors, definition of a coupling capacitor threshold value, adaptive merging of resistors and the like. According to the application, coupling capacitors are adaptively distributed to connected nodes according to the conductance connection relationship of the nodes, thereby avoiding the problem that the number of newly added resistors and capacitors greatly increases in the original TICER algorithm under a dense network, and the threshold value of the reserved coupling capacitor is adaptively determined according to different net lists, small coupling capacitors are grounded, and the problem that the number of small coupling capacitors greatly increases in the original TICER algorithm is improved, so that the effect of adaptively ensuring the node compression rate and the capacitor and resistor compression rate according to different net list conditions is realized.

Description

Technical Field

[0001] This invention belongs to the field of integrated circuit design, and in particular relates to a method for equivalent reduction of large-scale RC networks based on the TICER algorithm. Background Technology

[0002] With the continuous advancement of manufacturing processes, the number of transistors integrated per unit area is constantly increasing. The number of transistors in an integrated circuit design may reach hundreds of millions. As a result, the coupling capacitance between different transistors, the coupling capacitance between transistor interconnects, and the coupling capacitance between the transistors' own GSDs have become increasingly apparent. The additional delays they generate may even affect timing simulations.

[0003] Therefore, large-scale chip design requires methods such as parasitic parameter extraction to analyze coupling capacitance effects. Only after obtaining the netlist with extracted parasitic parameters can backend timing and power consumption be simulated as accurately as possible to eliminate various risks encountered during tape-out. Because the impact of all coupling capacitances, line resistances, etc., on the design needs to be considered as comprehensively as possible, improving the accuracy of parasitic parameter extraction often means a larger netlist size. Therefore, the netlist after parasitic parameter extraction is often enormous, representing an RC network with tens or even hundreds of millions of nodes and capacitors / resistors.

[0004] The RC network after parasitic parameter extraction grows exponentially with continuous process iteration, and the netlist size also increases continuously. For such a huge netlist-represented RC network, the computational cost of backend timing and power tools directly performing calculations, which are mainly based on nonlinear differential equations, is quite high. In particular, direct simulation of parameter networks extracted at the whole-chip level is generally impossible due to excessive memory and time consumption. This bottleneck limits the lightweighting and speed of many simulation tools in the industry, and even more seriously, prevents them from completing the simulation of large-scale circuits.

[0005] Therefore, the industry has proposed a model reduction method to equivalently compress the netlist. This method reduces the RC network as much as possible without affecting the timing simulation. Specifically, it reduces the number of nodes, capacitors, and resistors. At the same time, the delay deviation on the timing simulation signal lines before and after reduction is within a controllable range, so as to obtain an almost completely equivalent, lightweight, and small-scale netlist, thereby accelerating the simulation speed.

[0006] While the traditional TICER method performs well in node compression, it generates a lot of new capacitors and resistors in dense networks (where the nodes to be deleted are connected to many nodes). In most cases, although the node compression rate is high, the number of capacitors and resistors increases instead of decreasing. This leads to an increase in subsequent simulation time and complexity, rendering the algorithm meaningless. Summary of the Invention

[0007] This invention discloses an equivalent reduction method for large-scale RC networks based on the TICER algorithm. It significantly improves upon the TICER algorithm's tendency to only effectively compress nodes while capacitors and resistors increase instead of decreasing in most cases. This method enables RC networks to exhibit good compression rates for nodes, resistors, and capacitors in most situations, and the timing delay of the netlist before and after compression is within 1-2% according to SPICE simulation.

[0008] The technical solution adopted by this invention to solve its technical problem is as follows:

[0009] A method for equivalent reduction of large-scale RC networks based on the TICER algorithm includes the following steps:

[0010] Step (1): Parse the original netlist file, take the connection point between two components with a connection relationship as the network node, obtain the original capacitor-resistor network, and mark the important nodes in the original capacitor-resistor network, and the rest are non-important nodes.

[0011] Step (2) divide the original capacitor-resistor network into several net parts connected by resistors. One or more nodes in each net are connected to other nets through coupling capacitors, and at least one node in each net is connected to the capacitor to ground.

[0012] Step (3): For each net in the original capacitor-resistor network, set a lower limit cMin for the retained coupling capacitance value;

[0013] Step (4): Traverse all nodes in the original capacitor-resistor network. If the resistance value of the resistor connected to the node is less than the preset resistance threshold, delete the resistor and merge the two nodes connected to the two ends of the resistor.

[0014] Step (5): Traverse all non-critical nodes, calculate the time constant of each non-critical node, and if the time constant is less than the preset time constant threshold, redistribute the capacitors and resistors connected to the node and delete the node.

[0015] Step (6): Traverse all undeleted nodes. If the capacitance value of the coupling capacitor connected to the node is less than the lower limit cMin of the reserved coupling capacitor value of the net, then process the coupling capacitor to ground.

[0016] Step (7): Traverse all undeleted nodes. If the capacitance value of the coupling capacitor connected to the node is less than the preset capacitance threshold, and the node has other coupling capacitors, then the coupling capacitor with a capacitance value less than the threshold is merged with the other coupling capacitors connected to the node. If the node does not have other coupling capacitors, then the coupling capacitor with a capacitance value less than the threshold is merged with the other coupling capacitors connected to the net where the node is located.

[0017] Step (8) traverse all undeleted nodes and their capacitor-resistor connections to form a compressed capacitor-resistor network, and convert it into a compressed netlist file.

[0018] Furthermore, step (3) specifically involves: for each net in the original capacitor-resistor network, randomly extracting K coupling capacitors connected to that net, arranging the extracted coupling capacitors in ascending order of their capacitance values, and then... n The capacitance value at the rounded-up position is set as cMin.

[0019] Furthermore, the formula for calculating the time constant of the non-critical nodes is as follows:

[0020]

[0021] In the formula, rc N c represents the time constant of node N. kN This represents the capacitance value of the k-th capacitor connected to node N, where M1 is the number of capacitors connected to node N; g kN M1 represents the conductance of the k-th resistor connected to node N, and M2 represents the number of resistors connected to node N. Since each node is connected to at least one capacitor or resistor, M1 + M2 ≥ M, where M represents the total number of nodes connected to that node.

[0022] Furthermore, in step (5), before deleting a node, the capacitors and resistors connected to that node need to be redistributed, specifically as follows:

[0023] Randomly select X resistors from all the unremoved resistors connected to this node, and denote the conductance of the X resistors as (G). 1N G 2N ,…,G kN ,…,G XN ), where G XN G represents the conductance value of the Xth resistor connected to node N. kN This represents the conductance value of the k-th resistor connected to node N; a new resistor is added between the two nodes connected to this node, and the conductance value of the new resistor is:

[0024]

[0025] In the formula, Gij represents the conductance of the new resistor added between nodes i and j connected to the node N to be deleted, giN represents the conductance of the resistor between node N and node i, and gjN represents the conductance of the resistor between node N and node j.

[0026] Iterate through all the coupling capacitors connected to this node, and assign each coupling capacitor value to the X nodes connected to node N. This creates a new coupling capacitor between the two nodes connected to this node, with the value of the new coupling capacitor being:

[0027]

[0028] In the formula, Cij represents the capacitance value of the newly added coupling capacitor between nodes i and j connected to the node N to be deleted, and ciN represents the capacitance value of the i-th coupling capacitor connected to the node N to be deleted.

[0029] Furthermore, the grounding process involves deleting the coupling capacitor and allocating its capacitance value to the grounding capacitor of the net in which the node resides.

[0030] The beneficial results of this invention are as follows: This invention adaptively allocates coupling capacitors to connected nodes according to the node connection conductance relationship, avoiding the problem of a large increase in the number of added resistors and capacitors in dense networks in the original TICER algorithm. Furthermore, it adaptively determines the threshold for retaining coupling capacitors based on different netlists and grounds small coupling capacitors, thereby improving the problem of a large increase in the number of small coupling capacitors in the original TICER algorithm. This achieves the effect of adaptively ensuring node compression ratio and capacitor / resistor compression ratio according to different netlist conditions. Attached Figure Description

[0031] Figure 1 This is a flowchart illustrating an equivalent reduction method for large-scale RC networks based on the TICER algorithm, as shown in this invention.

[0032] Figure 2 This is a schematic diagram of the resistance adaptive merging method shown in this invention;

[0033] Figure 3 This is a schematic diagram of the adaptive merging method of coupling capacitance shown in this invention. Detailed Implementation

[0034] The technical solution of the present invention will be further described below with reference to specific examples. The concept of the exemplary embodiments will be fully conveyed to those skilled in the art. The described features, structures, or characteristics can be combined in any suitable manner in one or more embodiments.

[0035] This invention proposes an equivalent reduction method for large-scale RC networks based on the TICER algorithm, such as... Figure 1 As shown, the main steps include:

[0036] Step (1). Filter the original netlist, that is, extract the capacitor-resistor network from the original standard DSPF / SPEF format netlist representing the RC network, and use the open-source lexical parser Flex&Bison to parse the standard DSPF / SPEF format netlist. Mark important nodes in the original netlist. Generally, nodes such as Instance Pin, Pin, Probe Node, and Ports declared in the netlist are marked as important nodes and cannot be deleted in the subsequent equivalent compression process.

[0037] In this field, RC networks are generally stored as netlist files, representing different resistor and capacitor connection relationships, and the capacitor-resistor network can be directly parsed. The original capacitor-resistor network is divided into several nets connected by resistors. One or more nodes in each net are connected to other nets through coupling capacitors, and at least one node in each net is connected to a capacitor to ground. K coupling capacitors are extracted from each filtered net, and the extracted coupling capacitor values ​​are sorted in ascending order. The first half... n The capacitance value at the location is set to retain the lower limit of the coupling capacitance value, cMin. In this embodiment, the K*1 / 2th... n The capacitance value at the rounded-up position is set as cMin.

[0038] Step (2). Traverse all nodes in the original capacitor-resistor network and access the resistor connected to each node. If there exists a resistor R with a resistance value less than the given threshold m ohms... m The resistor R m Delete, and transfer the resistor-capacitor connection of this node to R. m On the other node of the connection, that is, the resistor R m The two nodes connected at both ends are merged.

[0039] Step (3). Given the lower limit of the working master frequency time constant rcMin of the netlist. Traverse all nodes. If an important node is visited, keep the node and do not delete it. If a non-important node is visited, assume that the total number of nodes connected to the node is M.

[0040] The time constant rc of this node is calculated as follows:

[0041]

[0042] In the formula, rc N c represents the time constant of node N. kN This represents the capacitance value of the k-th capacitor connected to node N, where M1 is the number of capacitors connected to node N; g kNM1 represents the conductance of the k-th resistor connected to node N, and M2 represents the number of resistors connected to node N. Since each node is connected to at least one capacitor or resistor, M1 + M2 ≥ M, where M represents the total number of nodes connected to that node.

[0043] If the time constant is less than the preset time constant threshold, the capacitors and resistors connected to the node will be redistributed, and the node will be deleted. The deletion steps are as follows:

[0044] Randomly select X resistors from all the unremoved resistors connected to this node, and denote the conductance of the X resistors as (G). 1N G 2N ,…,G KN ,…,G XN ), where G XN G represents the conductance value of the Xth resistor connected to node N. kN This represents the conductance value of the k-th resistor connected to node N; for example... Figure 2 As shown, there are resistances between node N and node i, and between node N and node j. Therefore, the resistance connected to node N is deleted, and a new resistance is added between nodes i and j connected to node N. The conductance of the new resistance is:

[0045]

[0046] In the formula, Gij represents the conductance of the new resistor added between nodes i and j connected to the node N to be deleted, giN represents the conductance of the resistor between node N and node i, and gjN represents the conductance of the resistor between node N and node j.

[0047] Iterate through all the coupling capacitors connected to the node, and assign each coupling capacitor value to the X nodes connected to node N, such as... Figure 3 As shown, there is a 10pF coupling capacitor between node N and node k. Remove the coupling capacitor connected to node N, and add a new coupling capacitor between the other two nodes connected to node N. The capacitance value of the new coupling capacitor is:

[0048]

[0049] In the formula, Cij represents the capacitance value of the newly added coupling capacitor between nodes i and j connected to the node N to be deleted, and ciN represents the capacitance value of the i-th coupling capacitor connected to the node N to be deleted.

[0050] by Figure 3For example, the coupling capacitor between node N and node k is distributed between node k and the other two nodes j and o connected to node N. That is, a new coupling capacitor of 6.66pF is added between node k and node j, and a new coupling capacitor of 3.33pF is added between node k and node o.

[0051] After redistributing the capacitance and resistance values ​​of the node, delete the node and all capacitance and resistance information connected to it, thus completing the deletion of a "non-critical" node.

[0052] In the above steps, the coupling capacitor retention threshold cMin, the lower limit of the time constant rcMin, and the number of node resistors retained X can all be adjusted according to the compression situation. That is: when calculating the coupling capacitor retention threshold in step (1), the first 1 / 2 after sorting is taken. n The position capacitance acts as a small capacitance threshold, and the value of n can be adjusted. Increasing n decreases the retention threshold, reduces the number of coupling capacitors to be removed, and lowers the compression ratio. Conversely, decreasing n increases the retention threshold, increases the number of coupling capacitors to be removed, and improves the compression ratio. Increasing the lower limit of the time constant rcMin reduces the number of nodes retained within the main frequency range, thus improving the compression ratio. Decreasing the number of node resistors retained (X) reduces the number of redistributed capacitors, thus improving the compression ratio.

[0053] Step (4). Traverse all nodes that have not been deleted. If the capacitance value of the coupling capacitor connected to a node is less than the lower limit cMin of the reserved coupling capacitor value of its net, then the coupling capacitor is grounded. The grounding process is as follows: delete the coupling capacitor and allocate the capacitance value of the coupling capacitor to the ground capacitor of the net where the node is located.

[0054] Step (5). Traverse all nodes that have not been deleted. If the capacitance value of the coupling capacitor connected to the node is less than the preset capacitance threshold, and there are other coupling capacitors connected to the node, then the coupling capacitor with a capacitance value less than the threshold is merged with the other coupling capacitors connected to the node; if there are no other coupling capacitors connected to the node, then the coupling capacitor with a capacitance value less than the threshold is merged with the other coupling capacitors connected to the net in which the node is located.

[0055] For example, accessing the coupling capacitance C connected to node i that has not been deleted. ij If the capacitance value is less than the given minimum coupling capacitance threshold m farads, record C. ij For the corresponding coupled net connected to node i, find the coupled capacitors connected to that net among the remaining undeleted coupled capacitors of node i, and arbitrarily select one of the found coupled capacitors C. ik Modify C ik The value is C ik +C ij .

[0056] Step (6). Traverse all undeleted nodes and output the nodes, capacitors, and resistors retained after processing in steps (1) to (5). Output in the specified DSPF / SPEF format to obtain the compressed netlist.

[0057] This invention addresses the shortcomings of the TICER algorithm by making the following improvements:

[0058] First, the evaluation of "important" nodes and "non-important" nodes will be maintained and merged.

[0059] Secondly, an adaptive merging method for coupling capacitance is proposed. The original TICER algorithm causes a quadratic increase in the number of capacitors in dense nodes due to the redistribution of node coupling capacitance. This invention provides a coupling capacitance redistribution algorithm that redistributes the small capacitors generated after compression, improving the quadratic capacitor growth problem of the original TICER algorithm in dense networks, resulting in a good capacitance compression ratio.

[0060] Thirdly, a method for defining coupling capacitance thresholds. This method extracts K coupling capacitances from each net in the original netlist, sorts the extracted coupling capacitance values, and determines a lower limit cMin for retaining coupling capacitance values; coupling capacitances smaller than cMin are grounded.

[0061] Fourth is the adaptive resistance merging method. This method adaptively merges resistors in the netlist that are less than a given threshold before and after compression, improving the TICER algorithm's handling of quadratic increases in resistance after compression and thus improving the algorithm's resistance compression ratio.

[0062] To verify the effectiveness of the proposed method for equivalent reduction of large-scale RC networks based on the TICER algorithm, experiments were conducted on 256 cases at the transistor level and 256 cases at the gate level in this embodiment.

[0063] When experimenting on 256 cases at the transistor level, the lower limit of the time constant is: rcMin = 1.0e -14 Coupling capacitance retention threshold cMin = 1.5 * 10 -18 f; Number of node resistors to be retained X = 2 or 3; Small capacitor retention threshold = 5Ω; Small coupling capacitor retention threshold = 3 * 10 -18 f.

[0064] Table 1 compares the results of this embodiment with the industry gold standard compression ratio index, and Table 2 compares the results of this embodiment with the industry gold standard compression simulation timing.

[0065] Table 1. Comparison of transistor-level compression ratio with industry gold standard metrics in 256 cases.

[0066]

[0067] Table 2 Comparison of timing errors with industry gold standard compressed simulation in 256 transistor-level cases

[0068]

[0069] When experimenting on the gate-level case, the lower bound of the time constant is: rcMin = 1.0e -12 Coupling capacitance retention threshold cMin = 0.5 * 10 -17 f; Number of node resistors retained X = 5; Small capacitor retention threshold = 3Ω; Small coupling capacitor retention threshold = 1.2 * 10 -17 f. Table 3 shows the compression of nodes, capacitors, and resistors in the gate-level case of this invention, and Table 4 shows the simulation results of randomly selected Nets before and after compression in the gate-level case of this invention.

[0070] Table 3 shows the node, capacitance, and resistance compression in the gate-level case of this invention.

[0071]

[0072] Table 4 shows the Spice simulation results of randomly selected Nets before and after compression in the gate-level case of this invention.

[0073]

[0074] As can be seen from the above results, this invention reduces the RC network as much as possible without affecting the timing simulation. Specifically, it achieves good compression ratios by reducing the number of nodes, capacitors, and resistors. At the same time, the delay deviation on the timing simulation signal lines before and after reduction is within a controllable range, resulting in an almost completely equivalent, lightweight, and small-scale netlist. This accelerates the simulation speed and significantly improves the traditional TICER algorithm, which in most cases only effectively compresses nodes and increases capacitors and resistors instead of decreasing them. The simulation delay of the netlist before and after compression is within 1 to 2%.

[0075] The above examples are merely specific embodiments of the present invention. Obviously, the present invention is not limited to the above embodiments and many variations are possible. All variations that can be directly derived or conceived by those skilled in the art from the disclosure of the present invention should be considered within the scope of protection of the present invention.

Claims

1. A method for equivalent reduction of large-scale RC networks based on the TICER algorithm, characterized in that, Includes the following steps: Step (1): Parse the original netlist file, take the connection point between two components with a connection relationship as the network node, obtain the original capacitor-resistor network, and mark the important nodes in the original capacitor-resistor network, and the rest are non-important nodes. Step (2) divide the original capacitor-resistor network into several net parts connected by resistors. One or more nodes in each net are connected to other nets through coupling capacitors, and at least one node in each net is connected to the capacitor to ground. Step (3): For each net in the original capacitor-resistor network, set a lower limit cMin for the retained coupling capacitance value; Step (4): Traverse all nodes in the original capacitor-resistor network. If the resistance value of the resistor connected to the node is less than the preset resistance threshold, delete the resistor and merge the two nodes connected to the two ends of the resistor. Step (5): Traverse all non-critical nodes, calculate the time constant of each non-critical node, and if the time constant is less than the preset time constant threshold, redistribute the capacitors and resistors connected to the node and delete the node. Step (6): Traverse all undeleted nodes. If the capacitance value of the coupling capacitor connected to the node is less than the lower limit cMin of the reserved coupling capacitor value of the net, then process the coupling capacitor to ground. Step (7): Traverse all undeleted nodes. If the capacitance value of the coupling capacitor connected to the node is less than the preset capacitance threshold, and the node has other coupling capacitors, then the coupling capacitor with a capacitance value less than the threshold is merged with the other coupling capacitors connected to the node. If the node does not have other coupling capacitors, then the coupling capacitor with a capacitance value less than the threshold is merged with the other coupling capacitors connected to the net where the node is located. Step (8) traverse all undeleted nodes and their capacitor-resistor connections to form a compressed capacitor-resistor network, and convert it into a compressed netlist file.

2. The method for equivalent reduction of large-scale RC networks based on the TICER algorithm according to claim 1, characterized in that, Step (3) specifically involves: for each net in the original capacitor-resistor network, randomly extracting K coupling capacitors connected to that net, arranging the extracted coupling capacitors in ascending order of their capacitance values, and then... n The capacitance value at the rounded-up position is set as cMin.

3. The method for equivalent reduction of large-scale RC networks based on the TICER algorithm according to claim 1, characterized in that, The formula for calculating the time constant of the non-critical nodes is as follows: In the formula, rc N c represents the time constant of node N. kN This represents the capacitance value of the k-th capacitor connected to node N, where M1 is the number of capacitors connected to node N; g kN M1 represents the conductance of the k-th resistor connected to node N, and M2 represents the number of resistors connected to node N. Since each node is connected to at least one capacitor or resistor, M1 + M2 ≥ M, where M represents the total number of nodes connected to that node.

4. The method for equivalent reduction of large-scale RC networks based on the TICER algorithm according to claim 1, characterized in that, In step (5), before deleting a node, the capacitors and resistors connected to that node need to be redistributed, specifically as follows: Randomly select X resistors from all the unremoved resistors connected to this node, and denote the conductance of the X resistors as (G). 1N G 2N , ..., G kN , ..., G XN ), where G XN G represents the conductance value of the Xth resistor connected to node N. kN This represents the conductance value of the k-th resistor connected to node N; a new resistor is added between the two nodes connected to this node, and the conductance value of the new resistor is: In the formula, Gij represents the conductance of the new resistor added between nodes i and j connected to the node N to be deleted, giN represents the conductance of the resistor between node N and node i, gjN represents the conductance of the resistor between node N and node j, and M represents the total number of nodes connected to node N. Iterate through all the coupling capacitors connected to this node, and assign each coupling capacitor value to the X nodes connected to node N. This creates a new coupling capacitor between the two nodes connected to this node, with the value of the new coupling capacitor being: In the formula, Cij represents the capacitance value of the newly added coupling capacitor between nodes i and j connected to the node N to be deleted, and ciN represents the capacitance value of the i-th coupling capacitor connected to the node N to be deleted.

5. The method for equivalent reduction of large-scale RC networks based on the TICER algorithm according to claim 1, characterized in that, The grounding process involves deleting the coupling capacitor and allocating its value to the grounding capacitor of the net containing the node.

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