A discrete-component-based magnetic card writing circuit and a magnetic card device
By using a discrete component-based magnetic card writing circuit, which utilizes transistor control of the current path and transistor current limiting, the problems of complex structure and high cost of existing magnetic card writing circuits are solved, and the effect of constant current writing is achieved.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- FUJIAN CENTM INFORMATION
- Filing Date
- 2023-01-17
- Publication Date
- 2026-05-15
AI Technical Summary
Existing magnetic card writing circuits lack constant current writing functionality, resulting in complex circuit structures and high costs.
A magnetic card writing circuit based on discrete components is adopted, which uses transistors Q2, Q3, Q5 and Q6 to realize the magnetic card writing operation. The current path is controlled by the inverted output of the driver terminals IO1 and IO2, and the current is limited by the base-emitter voltage of the transistor to ensure that the writing current is constant.
It achieves constant magnetic card writing current, simplifies circuit structure and reduces cost, and improves card writing stability and anti-interference capability.
Smart Images
Figure CN116205245B_ABST
Abstract
Description
Technical Field
[0001] This invention relates to the field of magnetic card reading and writing circuit technology, and in particular to a magnetic card writing circuit and magnetic card device based on discrete components. Background Technology
[0002] A magnetic stripe card is a card-shaped magnetic recording medium that uses a magnetic carrier to record character and number information for identification or other purposes. Magnetic stripe cards are convenient to use, inexpensive to manufacture, and have a wide range of applications, including credit cards, bank cards, admission cards, and various transportation toll cards. Currently, magnetic stripe card writing circuits either lack constant current writing functionality or use operational amplifier circuits to achieve constant current writing, resulting in complex and costly circuits.
[0003] In the prior art related to this invention, such as the Chinese invention patent, patent title: Magnetic Card Data Writing Circuit and Usage, patent number 200410026808.3, which discloses a magnetic card data writing circuit and its usage, the circuit is a magnetic card data writing circuit with a feedback mechanism that can automatically control and adjust the magnetic card data writing speed. Photoelectric detection switches S1 and S2 are respectively connected to CPU chip U1 to transmit the initial speed signal of the magnetic card swiping to CPU chip U1. The input terminal of the writing head J1 is directly connected to CPU chip U1, converting the electrical signal output by CPU chip U1 into a magnetic signal and writing it onto the magnetic card. The output terminal of the reading head J2 is directly connected to CPU chip U1, converting the magnetic data on the magnetic card into an electrical signal and transmitting it to CPU chip U1. The above process solves the problem of miniaturization of the magnetic card writer, and has the advantages of fewer components, simple circuit structure, small size, and wide applicability. It is suitable for various magnetic card writers that require writing operations on magnetic cards. This magnetic card writing circuit does not incorporate a constant current writing function. The success rate or stability of this type of magnetic card circuit is lower than that of a card writing circuit with constant current writing capability.
[0004] Another example is a Chinese utility model patent, titled "A Magnetic Card Reading and Writing Circuit," patent number 201720855147.8, which discloses a magnetic card reading and writing circuit including a control chip, a magnetic card reading circuit, a magnetic card writing circuit, a magnetic card reading interface, a magnetic card power supply circuit, and a magnetic card reset circuit. The magnetic card reading circuit, magnetic card writing circuit, magnetic card reading interface, and magnetic card reset circuit are respectively connected to the control chip, and the magnetic card power supply circuit provides voltage to the magnetic card reading circuit. This novel circuit is self-contained yet its functions are independent, resulting in good magnetic card reading and writing performance. However, this circuit lacks constant current card writing functionality and requires operational amplifier circuits to implement card reading, leading to high costs. Alternatively, some constant current magnetic card drive circuits may incorporate logic gate chips, further increasing costs. Summary of the Invention
[0005] Therefore, there is a need to provide a magnetic card writing circuit and magnetic card device based on discrete components to solve the problems of complex structure and high cost of existing constant current magnetic card circuits.
[0006] To achieve the above objectives, this invention provides a magnetic card writing circuit based on discrete components, including a driving terminal IO1 and a driving terminal IO2. The driving terminal IO1 is connected to the control terminal of transistor Q5 and one end of resistor R2. The other end of resistor R2 is connected to the control terminal of transistor Q2 and the output terminal of transistor Q1. The input terminal of transistor Q5 is connected to one end of the magnetic head connection terminal and the output terminal of transistor Q2. The input terminal of transistor Q2 is connected to the control terminal of transistor Q1, one end of resistor R1, the control terminal of transistor Q4, and the... The input terminal of transistor Q3 is connected to the power supply, the input terminal of transistor Q1 is connected to the positive terminal of the power supply, the other end of resistor R1 and the input terminal of transistor Q4, the output terminal of transistor Q4 is connected to the control terminal of transistor Q3 and one end of resistor R3, the other end of resistor R3 is connected to the drive terminal IO2 and the control terminal of transistor Q6, the input terminal of transistor Q6 is connected to the other end of the magnetic head connection terminal and the output terminal of transistor Q3, and the output terminals of transistor Q5 and transistor Q6 are connected to the negative terminal of the power supply.
[0007] Furthermore, the driving terminal IO1 is connected to the control terminal of transistor Q5 through resistor R4, and the driving terminal IO2 is connected to the control terminal of transistor Q6 through resistor R5. The magnetic card writing circuit also includes an AND gate unit. The two input terminals of the AND gate unit are connected to the driving terminal IO1 and the driving terminal IO2, respectively. The output terminal of the AND gate unit is connected to the control terminals of transistor Q7 and transistor Q8. The input terminal of transistor Q7 is connected to the control terminal of transistor Q5, and the input terminal of transistor Q8 is connected to the control terminal of transistor Q6.
[0008] Furthermore, the AND gate unit includes diode D1, diode D2 and resistor R6. The cathode of diode D1 is connected to the driving terminal IO1, the cathode of diode D2 is connected to the driving terminal IO2, the anode of diode D1 is connected to the anode of diode D2, one end of resistor R6, the control terminal of transistor Q7 and the control terminal of transistor Q8, and the other end of resistor R6 is connected to the positive terminal of the power supply.
[0009] Furthermore, it also includes resistors R7 and R8. The output terminal of the AND gate unit is connected to the control terminal of the transistor Q7 through resistor R7, and the output terminal of the AND gate unit is connected to the control terminal of the transistor Q8 through resistor R8.
[0010] Furthermore, transistors Q7 and Q8 are NPN transistors.
[0011] Furthermore, it also includes a processing chip, whose control pins are connected to the driving terminal IO1 and the driving terminal IO2, respectively.
[0012] Furthermore, it also includes a power chip, the input terminal of which is connected to the power supply, and the output terminal of which is connected to the positive terminal and the negative terminal of the power supply, respectively.
[0013] Furthermore, transistors Q1, Q2, Q3, and Q4 are PNP transistors, while transistors Q5 and Q6 are NPN transistors.
[0014] Furthermore, transistors Q1, Q2, Q3, Q4, Q5, or Q6 are transistors or MOSFETs.
[0015] This invention provides a magnetic card device, including a processing chip, a magnetic head, and a magnetic card writing circuit. The magnetic head connection terminal of the magnetic card writing circuit is connected to the magnetic head, and the driving terminal of the magnetic card writing circuit is connected to the pin of the processing chip. The magnetic card writing circuit is a discrete component-based magnetic card writing circuit as described in any one of the embodiments of this invention.
[0016] Unlike existing technologies, the above technical solution uses transistors Q2, Q3, Q5, and Q6 to implement magnetic card writing operations. During normal card writing, driver terminals IO1 and IO2 are configured as inverted outputs. When driver terminal IO1 is low and driver terminal IO2 is high, transistors Q5 and Q3 are off, and transistors Q6 and Q2 are on. The current path for writing the magnetic card is: positive power supply—transistor Q2—left magnetic head—right magnetic head—transistor Q6—negative power supply. When driver terminal IO1 is high and driver terminal IO2 is low, transistors Q5 and Q3 are on, and transistors Q6 and Q2 are off. The current path for writing the magnetic card is: positive power supply—transistor Q3—right magnetic head—left magnetic head—transistor Q4—negative power supply. When no card writing operation is performed, driver terminals IO1 and IO2 are configured as high-level outputs. Then, the base-emitter voltage U of the transistors is used... be With a certain forward voltage, the current through R1 is limited, and the current I = U be The current flowing through resistor R1 is basically equal to the current flowing through the magnetic head. Therefore, the current flowing through the magnetic head is constant. Even if the magnetic head, magnetic card or the positive voltage of the power supply changes, the constant current can still be achieved. This invention has a simple structure and low cost. Attached Figure Description
[0017] Figure 1 This is a schematic diagram of the circuit structure of a disclosed embodiment of the present invention;
[0018] Figure 2 This is a schematic diagram of the circuit structure of another disclosed embodiment of the present invention;
[0019] Figure 3 This is a schematic diagram of the circuit structure of another disclosed embodiment of the present invention;
[0020] Figure 4 This is a schematic diagram of a circuit structure with a processing chip according to a disclosed embodiment of the present invention;
[0021] Figure 5 This is a schematic diagram of a circuit structure of a disclosed embodiment of the present invention, which includes a processing chip and a power supply chip.
[0022] Figure 6 This is a schematic diagram of the simulation waveform of a 300mA constant current according to a disclosed embodiment of the present invention.
[0023] Figure 7 This is a schematic diagram of the simulation waveform of a 400mA constant current according to a disclosed embodiment of the present invention. Detailed Implementation
[0024] To explain in detail the technical content, structural features, objectives, and effects of the technical solution, the following description is provided in conjunction with specific embodiments and accompanying drawings.
[0025] In this document, the term "embodiment" means that a specific feature, structure, or characteristic described in connection with an embodiment may be included in at least one embodiment of this application. The term "embodiment" appearing in various places throughout the specification does not necessarily refer to the same embodiment, nor does it specifically limit its independence or connection with other embodiments. In principle, in this application, as long as there are no technical contradictions or conflicts, the technical features mentioned in each embodiment can be combined in any way to form corresponding implementable technical solutions.
[0026] Unless otherwise defined, the technical terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application pertains; the use of related terms herein is merely for the purpose of describing particular embodiments and is not intended to limit this application.
[0027] In the description of this application, the term "and / or" is used to describe the logical relationship between objects, indicating that three relationships can exist. For example, A and / or B means: A exists, B exists, and A and B exist simultaneously. Additionally, the character " / " in this document generally indicates that the preceding and following objects have an "or" logical relationship.
[0028] In this application, terms such as “first” and “second” are used only to distinguish one entity or operation from another, and do not necessarily require or imply any actual quantity, hierarchy or order relationship between these entities or operations.
[0029] Unless otherwise specified, the use of terms such as “comprising,” “including,” “having,” or other similar expressions in this application is intended to cover non-exclusive inclusion, which does not exclude the presence of additional elements in a process, method, or product that includes the stated elements, such that a process, method, or product that includes a list of elements may include not only those defined elements but also other elements not expressly listed, or elements inherent to such a process, method, or product.
[0030] As understood in the Examination Guidelines, in this application, expressions such as "greater than," "less than," and "exceeding" are understood to exclude the stated number; expressions such as "above," "below," and "within" are understood to include the stated number. Furthermore, in the description of the embodiments in this application, "multiple" means two or more (including two), and similar expressions related to "multiple" are also understood in this way, such as "multiple groups" and "multiple times," unless otherwise explicitly specified.
[0031] In the description of the embodiments of this application, the space-related expressions used, such as "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "vertical," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," "axial," "radial," and "circumferential," indicate the orientation or positional relationship based on the orientation or positional relationship shown in the specific embodiments or drawings. They are only for the purpose of describing the specific embodiments of this application or for the reader's understanding, and do not indicate or imply that the device or component referred to must have a specific position, a specific orientation, or be constructed or operated in a specific orientation. Therefore, they should not be construed as limitations on the embodiments of this application.
[0032] Unless otherwise expressly specified or limited, the terms "installation," "connection," "linking," "fixing," and "setting," as used in the description of the embodiments of this application, should be interpreted broadly. For example, "connection" can be a fixed connection, a detachable connection, or an integral setting; it can be a mechanical connection, an electrical connection, or a communication connection; it can be a direct connection or an indirect connection through an intermediate medium; it can be the internal connection of two components or the interaction between two components. For those skilled in the art to which this application pertains, the specific meaning of the above terms in the embodiments of this application can be understood according to the specific circumstances.
[0033] Please see Figures 1 to 7 The present invention provides a magnetic card writing circuit based on discrete components, including a driver terminal IO1 and a driver terminal IO2, which are used to connect to the pins of the processing chip to drive the circuit. The driving terminal IO1 is connected to the control terminal of transistor Q5 and one end of resistor R2. The other end of resistor R2 is connected to the control terminal of transistor Q2 and the output terminal of transistor Q1. The input terminal of transistor Q5 is connected to one end of the magnetic head connection terminal and the output terminal of transistor Q2. The input terminal of transistor Q2 is connected to the control terminal of transistor Q1, one end of resistor R1, the control terminal of transistor Q4, and the input terminal of transistor Q3. The input terminal of transistor Q1 is connected to the positive terminal of the power supply, the other end of resistor R1, and the input terminal of transistor Q4. The output terminal of transistor Q4 is connected to the control terminal of transistor Q3 and one end of resistor R3. The other end of resistor R3 is connected to the driving terminal IO2 and the control terminal of transistor Q6. The input terminal of transistor Q6 is connected to the other end of the magnetic head connection terminal and the output terminal of transistor Q3. The output terminals of transistors Q5 and Q6 are connected to the negative terminal of the power supply.
[0034] The circuit operates as follows: The magnetic card writing operation is achieved through transistors Q2, Q3, Q5, and Q6. During a normal writing operation, driver terminals IO1 and IO2 are configured as inverted outputs. When driver terminal IO1 is low and driver terminal IO2 is high, transistors Q5 and Q3 are off, while transistors Q6 and Q2 are on. The current path for writing the magnetic card is: positive power supply—transistor Q2—left magnetic head—right magnetic head—transistor Q6—negative power supply. When driver terminal IO1 is high and driver terminal IO2 is low, transistors Q5 and Q3 are on, while transistors Q6 and Q2 are off. The current path for writing the magnetic card is: positive power supply—transistor Q3—right magnetic head—left magnetic head—transistor Q4—negative power supply. This alternation of current between the left and right magnetic head terminals achieves the writing of the magnetic card. When no writing operation is performed, driver terminals IO1 and IO2 are configured as high-level outputs. Then, the base-emitter voltage U of transistor Q1 or transistor Q4 is used. be With a certain forward voltage, the current through resistor R1 is limited, and the current I = forward voltage U. be The current flowing through resistor R1 is approximately equal to the current flowing through the magnetic head, thus ensuring a constant current flow. Even if the magnetic head, magnetic card, or the positive voltage of the power supply changes, a constant current can still be achieved. This invention features a simple structure and low cost. Even if the processing chip's program malfunctions, or unknown voltage combinations appear at driver IO1 and driver IO2, transistors Q2 and Q5, or Q3 and Q6, will not conduct simultaneously, preventing circuit damage.
[0035] The simulated waveform of the current during driving of this circuit is as follows: Figure 6 and Figure 7 As shown, constant currents of 300mA and 400mA are achieved by adjusting the resistance value of R1. A current probe is used to obtain the writing current of the magnetic card, with a voltage-to-current ratio of 10mV / mA. It can be seen that the voltage of the magnetic head is constant during both high and low voltage levels, indicating that the writing current of the magnetic card is constant.
[0036] Furthermore, such as Figure 2 As shown, the driving terminal IO1 is connected to the control terminal of transistor Q5 through resistor R4, and the driving terminal IO2 is connected to the control terminal of transistor Q6 through resistor R5. The magnetic card writing circuit also includes an AND gate unit. The two input terminals of the AND gate unit are connected to driving terminals IO1 and IO2 respectively, and the output terminal of the AND gate unit is connected to the control terminals of transistors Q7 and Q8. The input terminal of transistor Q7 is connected to the control terminal of transistor Q5, and the input terminal of transistor Q8 is connected to the control terminal of transistor Q6. When no card writing operation is performed, driving terminals IO1 and IO2 are configured to output a high level. When drive terminals IO1 and IO2 are high, the cathodes of diodes D1 and D2 are also high. At this time, the anodes of diodes D1 and D2 are pulled high by resistor R6 and the positive terminal of the power supply, causing transistors Q7 and Q8 to conduct. Consequently, the drive terminals of transistors Q5 and Q6 are pulled down to the negative terminal of the power supply, turning them off. This effectively disconnects transistors Q2, Q3, Q5, and Q6, achieving a floating open circuit for the magnetic head. This avoids interference with the remaining track information when only one or two tracks are being written, improving the card's anti-interference capability.
[0037] In this circuit, the AND gate unit can be implemented using a logic chip. In some embodiments, such as... Figure 3 As shown, the AND gate unit includes diodes D1 and D2 and resistor R6. The cathode of diode D1 is connected to the driving terminal IO1, the cathode of diode D2 is connected to the driving terminal IO2, the anode of diode D1 is connected to the anode of diode D2, one end of resistor R6, the control terminals of transistors Q7 and Q8, and the other end of resistor R6 is connected to the positive terminal of the power supply. The AND gate unit function can be implemented using only two diodes, resulting in a simple circuit and low cost.
[0038] To limit the current draw of transistors Q7 and Q8 during conduction, resistors R7 and R8 are also included. The output of the AND gate is connected to the control terminal of transistor Q7 via resistor R7, and the output of the AND gate is connected to the control terminal of transistor Q8 via resistor R8. Resistors R7 and R8 can reduce the base current of transistors Q7 and Q8 when they are conducting. Transistors Q7 and Q8 are NPN transistors; in some embodiments, they may also be MOSFETs.
[0039] Furthermore, such as Figure 4 As shown, to drive the driver terminals, this circuit also includes a processing chip. The control pins of the processing chip are connected to the driver terminals IO1 and IO2, respectively. By writing driver code into the processing chip, the control pins are driven in stages, thereby changing the voltage levels of the driver terminals IO1 and IO2, thus enabling the writing of data to the magnetic card.
[0040] To achieve voltage regulation and conversion of the power supply, further, such as Figure 5 As shown, it also includes a power supply chip. The input terminal of the power supply chip is connected to the power supply, and the output terminal of the power supply chip is connected to the positive and negative terminals of the power supply, respectively. The power supply chip can be a DC-DC chip or an LDO regulator chip, thereby realizing the voltage conversion of the power supply. The power supply can be a battery or an external DC transformer.
[0041] In the above embodiments, either a MOSFET or a bipolar junction transistor (BJT) can be used. In this circuit, the control terminal of the transistor corresponds to the gate of the MOSFET and the base of the BJT. The input terminal of the transistor corresponds to the end where current flows in, and the output terminal corresponds to the end where current flows out. As an example, transistors Q1, Q2, Q3, and Q4 are PNP transistors, and transistors Q5 and Q6 are NPN transistors. Using BJTs can further reduce circuit costs.
[0042] Based on the circuit described above, the present invention provides a magnetic card device, such as... Figure 4 As shown, the device includes a processing chip, a magnetic head, and a magnetic card writing circuit. The magnetic head connection terminal of the magnetic card writing circuit is connected to the magnetic head, and the driving terminal of the magnetic card writing circuit is connected to the pins of the processing chip. The magnetic card writing circuit is a discrete component-based magnetic card writing circuit as described in any embodiment of the present invention. Magnetic card devices using this circuit can achieve constant current even if the magnetic head, magnetic card, or positive voltage of the power supply changes. The present invention has a simple structure and low cost.
[0043] It should be noted that although the above embodiments have been described herein, this does not limit the scope of patent protection of the present invention. Therefore, any changes and modifications made to the embodiments described herein based on the innovative concept of the present invention, or equivalent structural or procedural transformations made using the content of the present invention's specification and drawings, directly or indirectly applying the above technical solutions to other related technical fields, are all included within the scope of patent protection of the present invention.
Claims
1. A magnetic card writing circuit based on discrete components, characterized in that: The circuit includes drive terminals IO1 and IO2. Drive terminal IO1 is connected to the control terminal of transistor Q5 and one end of resistor R2. The other end of resistor R2 is connected to the control terminal of transistor Q2 and the output terminal of transistor Q1. The input terminal of transistor Q5 is connected to one end of the magnetic head connection terminal and the output terminal of transistor Q2. The input terminal of transistor Q2 is connected to the control terminal of transistor Q1, one end of resistor R1, the control terminal of transistor Q4, and the input terminal of transistor Q3. The input terminal of transistor Q1 is connected to the positive terminal of the power supply, the other end of resistor R1, and the input terminal of transistor Q4. The output terminal of transistor Q4 is connected to the control terminal of transistor Q3 and one end of resistor R3. The other end of resistor R3 is connected to drive terminal IO2 and the control terminal of transistor Q6. The input terminal of transistor Q6 is connected to the other end of the magnetic head connection terminal and the output terminal of transistor Q3. The output terminals of transistors Q5 and Q6 are connected to the negative terminal of the power supply.
2. The magnetic card writing circuit based on discrete components according to claim 1, characterized in that: The driving terminal IO1 is connected to the control terminal of transistor Q5 through resistor R4, and the driving terminal IO2 is connected to the control terminal of transistor Q6 through resistor R5. The magnetic card writing circuit also includes an AND gate unit. The two input terminals of the AND gate unit are connected to the driving terminal IO1 and the driving terminal IO2, respectively. The output terminal of the AND gate unit is connected to the control terminals of transistor Q7 and transistor Q8. The input terminal of transistor Q7 is connected to the control terminal of transistor Q5, and the input terminal of transistor Q8 is connected to the control terminal of transistor Q6.
3. The magnetic card writing circuit based on discrete components according to claim 2, characterized in that: The AND gate unit includes diode D1, diode D2 and resistor R6. The cathode of diode D1 is connected to the driving terminal IO1, the cathode of diode D2 is connected to the driving terminal IO2, the anode of diode D1 is connected to the anode of diode D2, one end of resistor R6, the control terminal of transistor Q7 and the control terminal of transistor Q8, and the other end of resistor R6 is connected to the positive terminal of the power supply.
4. A magnetic card writing circuit based on discrete components according to claim 2 or 3, characterized in that: It also includes resistors R7 and R8. The output terminal of the AND gate unit is connected to the control terminal of the transistor Q7 through resistor R7, and the output terminal of the AND gate unit is connected to the control terminal of the transistor Q8 through resistor R8.
5. A magnetic card writing circuit based on discrete components according to claim 2 or 3, characterized in that: Transistor Q7 and transistor Q8 are NPN transistors.
6. A magnetic card writing circuit based on discrete components according to claim 1, characterized in that: It also includes a processing chip, whose control pins are connected to the driver IO1 and the driver IO2, respectively.
7. A magnetic card writing circuit based on discrete components according to claim 1, characterized in that: It also includes a power chip, the input terminal of which is connected to the power supply, and the output terminal of which is connected to the positive terminal and the negative terminal of the power supply, respectively.
8. A magnetic card writing circuit based on discrete components according to claim 1, characterized in that: Transistors Q1, Q2, Q3, and Q4 are PNP transistors, while transistors Q5 and Q6 are NPN transistors.
9. A magnetic card writing circuit based on discrete components according to claim 1, characterized in that: The transistors Q2, Q3, Q5, or Q6 are either transistors or MOSFETs.
10. A magnetic card device, characterized in that: The device includes a processing chip, a magnetic head, and a magnetic card writing circuit. The magnetic head connection terminal of the magnetic card writing circuit is connected to the magnetic head, and the driving terminal of the magnetic card writing circuit is connected to the pin of the processing chip. The magnetic card writing circuit is a magnetic card writing circuit based on discrete components as described in any one of claims 1 to 9.