Impedance calibration apparatus and method for multi-chip package

Abstract

This application discloses an impedance calibration device and method for multi-chip packages, including a calibration resistor and multiple calibration modules. The calibration resistor and multiple calibration modules are connected, and each calibration module corresponds one-to-one with a specific chip in the multi-chip package. Each calibration module includes a first calibration unit that calibrates the corresponding chip using the calibration resistor; and a second calibration unit that calibrates the corresponding chip using the first calibration unit after the first calibration unit has finished calibration. When multiple calibration modules are used to calibrate the corresponding chip one by one, the first calibration unit of each calibration module (except the first one) begins calibration after the first calibration unit of the previous calibration module has finished calibration and before the second calibration unit has finished calibration. When calibrating a multi-chip package, the first and second calibration units of different calibration modules can simultaneously calibrate the corresponding chip. Therefore, this solution can shorten the impedance calibration time for multi-chip packages.

Description

Technical Field

[0001] This application belongs to the field of chip calibration technology, and in particular relates to an impedance calibration device and method for multi-chip packaged chips. Background Technology

[0002] A multi-chip package consists of multiple chip particles, each of which is equipped with a high-speed transceiver driver interface circuit (hereinafter referred to as the driver circuit) that serves as the physical interface of that chip particle (hereinafter referred to as the particle).

[0003] The driving circuit of particles usually needs to meet the impedance matching requirements specified in relevant standards. That is, the external impedance exhibited by the driving circuit when it is working should match the standard impedance specified in the relevant standards.

[0004] Due to factors such as process, voltage, and temperature (PVT) during chip manufacturing, the external impedance of the driving circuit may fluctuate significantly, resulting in a mismatch between the external impedance of the driving circuit and the standard impedance. Therefore, impedance calibration of the driving circuit of each chip in a multi-chip package is required.

[0005] Impedance calibration requires an external calibration resistor. In existing impedance calibration schemes, multiple drive circuits share a single external calibration resistor. Therefore, only one drive circuit can be calibrated at a time during the calibration process; that is, the drive circuit of one chip is calibrated first, and the calibration of the next chip's drive circuit begins only after the calibration of that chip's drive circuit is completed, and so on.

[0006] This calibration method results in a longer impedance calibration time for multi-chip packages. Summary of the Invention

[0007] Therefore, this application discloses the following technical solution:

[0008] The first aspect of this application provides an impedance calibration device for a multi-chip package, including a calibration resistor and multiple calibration modules, wherein the calibration resistor and the multiple calibration modules are connected, and the multiple calibration modules correspond one-to-one with the driving circuits of multiple chip particles in the multi-chip package.

[0009] The calibration module includes a first calibration unit that calibrates the corresponding drive circuit using the calibration resistor, and a second calibration unit that calibrates the corresponding drive circuit using the first calibration unit after the first calibration unit has finished calibration.

[0010] When multiple calibration modules are used to calibrate the corresponding driving circuits one by one, except for the first calibration module, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration.

[0011] Optionally, the impedance calibration device may further include multiple control modules that correspond one-to-one with the calibration module;

[0012] The control module is used to control the first calibration unit and the second calibration unit of the calibration module to perform calibration.

[0013] Optionally, when the control module controls the first calibration unit and the second calibration unit of the calibration module to perform calibration, it is specifically used for:

[0014] If the control module corresponds to the first calibration module, after receiving the start calibration signal, the control module controls the first calibration unit and the second calibration unit of the first calibration module to perform calibration in sequence;

[0015] If the control module corresponds to a calibration module other than the first calibration module, after receiving the first end signal of the previous calibration module, the control module controls the first calibration unit and the second calibration unit of the corresponding calibration module to perform calibration in sequence; wherein, the first end signal indicates that the first calibration unit of the previous calibration module has ended calibration.

[0016] After the first calibration unit of the corresponding calibration module finishes calibration, it outputs a first end signal to the next calibration module.

[0017] Optionally, the first calibration unit includes a first comparator, a first counter, a first calibration circuit, and a replication circuit;

[0018] The replication circuit has the same circuit structure as the first calibration circuit, and the first calibration circuit has the same circuit structure as the first driving circuit. The first driving circuit refers to the driving circuit in the driving circuit that is calibrated by the first calibration unit.

[0019] The first calibration circuit and the calibration resistor are connected in series;

[0020] One input of the first comparator is connected to the calibration level, and the other input of the first comparator is connected to the common terminal of the first calibration circuit and the calibration resistor;

[0021] The output of the first comparator is connected to the first counter;

[0022] The first counter is used for:

[0023] Based on the comparison result of the first comparator, a first calibration signal is output to adjust the first target impedance until the resistance values ​​of the first target impedance and the calibration resistor meet a preset first quantitative relationship; wherein, the first target impedance refers to the impedance of the first driving circuit, the first calibration circuit and the replication circuit;

[0024] The replication circuit is used as the basis for calibration of the second calibration unit of the same calibration module after the first calibration unit has finished calibration.

[0025] Optionally, the second calibration unit includes a second comparator, a second counter, and a second calibration circuit;

[0026] The second calibration circuit has the same circuit structure as the second driving circuit, and the second driving circuit refers to the driving circuit that is calibrated by the second calibration unit in the driving circuit.

[0027] The second calibration circuit and the replication circuit of the first calibration unit in the same calibration module are connected in series;

[0028] One input of the second comparator is connected to the calibration level, and the other input of the second comparator is connected to the common terminal of the second calibration circuit and the replication circuit;

[0029] The output of the second comparator is connected to the second counter;

[0030] The second counter is used for:

[0031] The second comparator outputs a second calibration signal to adjust the second target impedance based on the comparison result of the second comparator until the resistance values ​​of the second target impedance and the calibration resistor meet a preset second quantitative relationship; wherein, the second target impedance refers to the impedance of the second driving circuit and the second calibration circuit.

[0032] Optionally, the first driving circuit is a pull-down driving circuit, and the second driving circuit is a pull-up driving circuit;

[0033] Alternatively, the first driving circuit may be a pull-up driving circuit, and the second driving circuit may be a pull-down driving circuit.

[0034] Optionally, the first quantitative relationship is:

[0035] The first target impedance and the resistance value of the calibration resistor are equal, or the ratio of the first target impedance and the resistance value of the calibration resistor is a preset first ratio.

[0036] The second quantitative relationship is:

[0037] The second target impedance and the resistance value of the calibration resistor are equal, or the ratio of the second target impedance and the resistance value of the calibration resistor is a preset second ratio.

[0038] Optionally, when the first counter outputs a first calibration signal for adjusting the first target impedance based on the comparison result of the first comparator, it is specifically used for:

[0039] Based on the comparison result of the first comparator and the preset calibration algorithm, a first calibration signal for adjusting the first target impedance is output.

[0040] When the second counter outputs a second calibration signal for adjusting the second target impedance based on the comparison result of the second comparator, it is specifically used for:

[0041] Based on the comparison result of the second comparator and the preset calibration algorithm, a second calibration signal is output to adjust the second target impedance.

[0042] Optionally, the first calibration unit of each of the calibration modules begins calibration after the first calibration unit of the previous calibration module has finished calibration and before the second calibration unit has finished calibration, including:

[0043] When the preset calibration mode is the first calibration mode, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration.

[0044] When the calibration mode is the second calibration mode, the first calibration unit of each calibration module starts calibration after the second calibration unit of the previous calibration module finishes calibration.

[0045] The second aspect of this application provides an impedance calibration method for a multi-chip package, applicable to the impedance calibration apparatus for a multi-chip package provided in any one of the first aspects of this application, the method comprising:

[0046] The corresponding drive circuits are calibrated one by one using multiple calibration modules until each drive circuit is calibrated.

[0047] Except for the first calibration module, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration.

[0048] This application discloses an impedance calibration device and method for multi-chip packages, including a calibration resistor and multiple calibration modules. The calibration resistor and multiple calibration modules are connected, and each calibration module corresponds one-to-one with a specific chip in the multi-chip package. Each calibration module includes a first calibration unit that calibrates the corresponding chip using the calibration resistor; and a second calibration unit that calibrates the corresponding chip using the first calibration unit after the first calibration unit has finished calibration. When multiple calibration modules are used to calibrate the corresponding chip one by one, the first calibration unit of each calibration module (except the first one) begins calibration after the first calibration unit of the previous calibration module has finished calibration and before the second calibration unit has finished calibration. When calibrating a multi-chip package, the first and second calibration units of different calibration modules can simultaneously calibrate the corresponding chip. Therefore, this solution can shorten the impedance calibration time for multi-chip packages. Attached Figure Description

[0049] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only embodiments of this application. For those skilled in the art, other drawings can be obtained based on the provided drawings without creative effort.

[0050] Figure 1 This is a schematic diagram of a driving circuit structure for an existing chip.

[0051] Figure 2 This is a schematic diagram of the impedance calibration device for a multi-particle packaged chip provided in an embodiment of this application;

[0052] Figure 3 This is a schematic diagram of the control logic of an impedance calibration device for a multi-particle packaged chip provided in an embodiment of this application;

[0053] Figure 4 This is a schematic diagram of the circuit structure of a calibration module provided in an embodiment of this application;

[0054] Figure 5 This is a schematic diagram of the circuit structure of another calibration module provided in an embodiment of this application;

[0055] Figure 6 This is a schematic diagram of a set signal generation logic provided in an embodiment of this application;

[0056] Figure 7 This is a schematic diagram illustrating the effect of an impedance device for a multi-particle packaged chip provided in an embodiment of this application;

[0057] Figure 8This is a schematic diagram illustrating the working principle of an impedance calibration device for a multi-particle packaged chip provided in an embodiment of this application.

[0058] Figure 9 This is a timing diagram of the operation of an impedance calibration device for a multi-chip package provided in an embodiment of this application;

[0059] Figure 10 This is a flowchart of an impedance calibration method for a multi-particle packaged chip provided in an embodiment of this application. Detailed Implementation

[0060] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of this application.

[0061] Multi-chip packaged chips refer to chips composed of multiple relatively independent chip particles. A common type of multi-chip packaged chip is a multi-chip packaged memory chip, in which each chip particle can function as an independent memory unit to store data.

[0062] In a multi-chip package, each chip has its own corresponding driving circuit. Please refer to [link / reference]. Figure 1 This is a schematic diagram of a driving circuit for a chip particle provided in an embodiment of this application.

[0063] The driving circuit of the chip includes a pull-up driving circuit 101, a pull-down driving circuit 102, and a pre-driver module 105.

[0064] The pull-up driver circuit 101 can pull the data interface level to the power supply level when driving data (i.e., Figure 1 The VDDQ pull-down driver circuit can pull the level of the data interface to ground when driving data, and can be used as the ODT (On-Die Termination) circuit of the receiving end when receiving data.

[0065] As described in the background section, the driving circuit of a chip needs to be impedance calibrated periodically or irregularly to adjust the external impedance of the driving circuit to within the range specified by relevant standards.

[0066] See also Figure 1Currently, the method for calibrating the driving circuit impedance of a chip is to connect the driving circuit of the chip to an external calibration device. When the calibration device is working, it generates a pull-up calibration signal 103 for the pull-up driving circuit and a pull-down calibration signal 104 for the pull-down driving circuit. The pull-up driving circuit can calibrate its own impedance according to the pull-up calibration signal, and the pull-down driving circuit can calibrate its own impedance according to the pull-down calibration signal. Thus, the external impedance of both the pull-up driving circuit and the pull-down driving circuit is adjusted to the specified range.

[0067] Existing calibration devices require an external calibration resistor during operation, and typically only one external calibration resistor (hereinafter referred to as the calibration resistor) is configured. Furthermore, existing calibration devices generally set up an independent calibration module for each chip, meaning that multiple calibration modules in the calibration device correspond one-to-one with multiple chips in a multi-chip package, and each calibration module is only used to calibrate the driving circuit of the corresponding chip (i.e., to generate the calibration signal for the corresponding driving circuit).

[0068] During calibration, to ensure accuracy, the calibration resistor is typically used by only one calibration module at a time. Therefore, when calibrating the drive circuits of multiple chip components, multiple calibration modules must be calibrated sequentially, and the next module can only begin calibration after the previous one has finished. This results in a significant time consumption for calibrating multiple drive circuits in a multi-chip package.

[0069] To address the aforementioned issues, this application provides an impedance calibration device for multi-chip packaged devices. Please refer to [link to previous document]. Figure 2 This is a schematic diagram of the device.

[0070] The impedance calibration device and method provided in this embodiment can be used to calibrate the drive circuit at the interface of a Toggle standard memory chip.

[0071] The impedance calibration device provided in this embodiment can be a digital control calibration circuit or an analog control calibration circuit.

[0072] The device includes a calibration resistor, multiple calibration modules, and a control module corresponding to each calibration module for controlling the operation of that calibration module. In this embodiment, for ease of explanation, a calibration module, its corresponding control module, and a set of related pins are referred to as a "particle" in the calibration device. The multiple particles of the impedance calibration device correspond one-to-one with the multiple chip particles in a multi-particle packaged chip. The master particle is used to calibrate the master chip particle in the multi-particle packaged chip, and the slave particle is used to calibrate the corresponding slave chip particle in the multi-particle packaged chip.

[0073] In this embodiment, the master particle can be understood as the first particle to start calibration during the calibration process, and the slave particles are numbered according to the order of calibration, with the slave particle that starts calibration first being numbered 1, and the numbers increasing sequentially thereafter.

[0074] The calibration resistor is connected to the calibration module of each particle via the ZQ pin.

[0075] The Master pin of each chip is used to indicate whether the chip belongs to the master chip or the slave chip. If the level of the pin is 1 (indicating a high level, the same below), the corresponding chip belongs to the master chip. If the level of the pin is 0 (indicating a low level, the same below), the corresponding chip belongs to the slave chip.

[0076] The Rx(Flag), Tx(Flag), Rx(CMD), and Tx(CMD) pins of each particle are used to control when the calibration module of this particle and the next particle starts calibration. For any two adjacent particles, the level of Rx(Flag) in the next particle is the same as the level of Tx(Flag) in the previous particle, and the level of Tx(CMD) in the next particle is the same as the level of Rx(CMD) in the previous particle. The levels of Tx(CMD) and Tx(Flag) in a particle can be set by the control module of that particle.

[0077] The following is combined Figure 3 Explain part of the control logic of this impedance calibration device.

[0078] Figure 3 The control logic can be specifically implemented by the control modules of each particle in the impedance calibration device.

[0079] Please see first. Figure 3 311, the control module can perform a first OR operation on the input trigger calibration signal and the level of the Rx(CMD) pin of this particle. The trigger calibration signal may include the Ext.ZQCAL Start signal 301 and the B / G ZQCAL Start signal 302. If either start calibration signal is received, or the level of the Rx(CMD) pin is 1, the OR operation result is 1.

[0080] The control module then performs a first AND operation on the result of the first OR operation in step 311 and the level signal 303 of the Master pin of this chip. If this chip is the master chip, then 303 is 1, and the result of the first AND operation is 1. Correspondingly, the result of the second OR operation based on the result of the first AND operation is also 1.

[0081] Finally, the control module performs a second AND operation on the result of the second OR operation and the stop signal 304 (ZQ Stop). If the control module does not receive the ZQ Stop signal, the result signal 305 (ZQCAL Start) of the second AND operation is 0, indicating that calibration cannot start at this time. If the ZQ Stop signal is received, the result signal 305 (ZQCAL Start) of the second AND operation is 1, indicating that calibration of this particle can start at this time.

[0082] On the other hand, when the Rx (Flag) pin level of this particle is 1, the result of the first NOT operation in 311 is 0. If the Master pin level of this particle is 0 (indicating that this particle is a slave particle), the result of the first OR operation performed by the control module based on the Master pin level of this particle and the result of the first NOT operation is 1, and the result of the second OR operation based on the result of the first OR operation is 1. At this time, if the ZQ Stop signal is received, the output result signal 305 is 1, indicating that this particle can start calibration.

[0083] In summary, given the ZQ Stop signal, the master chip can begin calibrating the corresponding drive circuit through its calibration module when it receives a trigger calibration signal or when the Rx(CMD) pin level of the chip is 1. Similarly, the slave chip can begin calibrating the corresponding drive circuit through its calibration module when the Rx(Flag) pin level is 1.

[0084] Furthermore, please refer to 312. The control module can also perform a third OR operation on signal 301 and the level of the Rx (CMD) pin of this particle, perform a second NOT operation on signal 303 of this particle, and then perform an AND operation on the result of the third OR operation and the result of the second NOT operation, and set the level of the Tx (CMD) pin of this particle according to the operation result.

[0085] By implementing control logic 312, if a slave particle receives signal 301, or the Tx (CMD) pin level is set to 1, then the control module of that slave particle will set the Tx (CMD) pin level of this particle to 1. Correspondingly, the level of the Rx (CMD) pin of the next particle connected after this particle will also be set to 1. Subsequently, the next particle will also set the Tx (CMD) pin level of the next particle to 1 according to control logic 312, and so on, until the Rx (CMD) pin level of the master particle is set to 1, thereby triggering the calibration module of the master particle to start calibration through control logic 311.

[0086] As can be seen, the advantage of implementing control logic 312 is that, regardless of which particle of the impedance calibration device is input to by the external trigger calibration signal 301, the calibration module of the main particle will be triggered to start calibration first, and then the calibration modules of the sub-particles will be triggered one by one in sequence to start calibration.

[0087] It should be noted that, Figure 2 The structure shown is only one specific embodiment of the impedance calibration device of this application. In some optional embodiments, the impedance calibration device of this application may not include a control module, but only include... Figure 2 The calibration resistor and multiple calibration modules are shown. In this case, the control logic implemented by the control module can be realized through the circuit connection relationship between the various calibration modules.

[0088] Each particle in the impedance calibration device provided in this embodiment corresponds to a chip particle, and each particle in the impedance calibration device includes a calibration module. At the same time, each chip particle also has a driving circuit. It can be seen that each calibration module in the impedance calibration device of this embodiment corresponds one-to-one with the driving circuit of each chip particle in the multi-particle packaged chip.

[0089] In this embodiment, each calibration module includes a first calibration unit and a second calibration unit. The first calibration unit is used to calibrate the driving circuit corresponding to its calibration module using a calibration resistor. The second calibration unit is used to calibrate the driving circuit corresponding to its calibration module using the first calibration unit after the first calibration unit belonging to the same calibration module has finished calibration.

[0090] Correspondingly, Figure 2 The neutralization calibration module belongs to the control module of the same particle, and is specifically used to control the first calibration unit and the second calibration unit of the calibration module to perform calibration.

[0091] Furthermore, such as Figure 1 As shown, the driving circuit of each chip can be divided into two parts: a pull-up driving circuit and a pull-down driving circuit. The first calibration unit and the second calibration unit are used to calibrate different parts of these components. Specifically, the first calibration unit is used to calibrate the first driving circuit within the driving circuit, and the second calibration unit is used to calibrate the second driving circuit within the driving circuit.

[0092] In some alternative embodiments, the term "first driving circuit" can refer to the pull-down driving circuit, and the term "second driving circuit" can refer to the pull-up driving circuit.

[0093] In some alternative embodiments, the term "first driving circuit" may refer to the pull-up driving circuit, and the term "second driving circuit" may refer to the pull-down driving circuit.

[0094] When the impedance calibration device in this embodiment follows Figure 3The control logic shown, when calibrating sequentially using the calibration modules of each particle starting from the main particle, can operate on the following principle:

[0095] Except for the first calibration module (that is, the calibration module of the main particle), the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module has finished calibration and before the second calibration unit has finished calibration.

[0096] Why not Figure 2 For example, after the first calibration unit of the calibration module of the main particle finishes calibration, calibration begins from the first calibration unit of the calibration module of particle 1, and at the same time, the second calibration unit of the calibration module of the main particle can also begin calibration; similarly, after the first calibration unit of the calibration module of particle 1 finishes calibration, calibration begins from the first calibration unit of the calibration module of particle 2, and at the same time, calibration begins from the second calibration unit of the calibration module of particle 1.

[0097] Therefore, in the process of calibrating the driving circuits of multiple chip particles, the impedance calibration device of this embodiment can perform calibration simultaneously using two adjacent calibration modules within the same time period, thereby shortening the time required to calibrate the driving circuits of all chip particles.

[0098] Furthermore, in this embodiment, the two adjacent calibration modules are calibrated simultaneously. While the second calibration unit of the preceding calibration module is calibrating, the first calibration unit of the following calibration module is calibrating. This ensures that only one first calibration unit is calibrating at any given time, avoiding the calibration resistor being calibrated by multiple calibration units simultaneously. This shortens the calibration time while also ensuring calibration accuracy.

[0099] The specific structure of the calibration module in the impedance calibration device of this embodiment will be described below.

[0100] Depending on which the first driving circuit and the second driving circuit refer to, the specific structure of the calibration module varies.

[0101] When the first driving circuit is a pull-down driving circuit and the second driving circuit is a pull-up driving circuit, a schematic diagram of the calibration module provided in this embodiment can be found in [reference needed]. Figure 4 .

[0102] For ease of understanding, Figure 4 The connection between the calibration module and the corresponding drive circuit is also shown in the diagram.

[0103] The first calibration unit includes a first comparator 401, a first counter 402, a first calibration circuit 403, and a dummy circuit 404.

[0104] The replication circuit has the same circuit structure as the first calibration circuit, and the first calibration circuit has the same circuit structure as the first drive circuit. The first drive circuit refers to the drive circuit that is calibrated by the first calibration unit in the drive circuit.

[0105] In this embodiment, the first driving circuit is the pull-down driving circuit of the chip.

[0106] The first calibration circuit and the calibration resistor are connected in series;

[0107] One input of the first comparator is connected to the calibration level, and the other input of the first comparator is connected to the common terminal of the first calibration circuit and the calibration resistor;

[0108] The output of the first comparator is connected to the first counter;

[0109] The first counter is used for:

[0110] The first calibration signal is output based on the comparison result of the first comparator to adjust the first target impedance until the resistance values ​​of the first target impedance and the calibration resistor meet the preset first quantitative relationship; wherein, the first target impedance refers to the impedance of the first driving circuit, the first calibration circuit and the replication circuit.

[0111] The replication circuit is used as the basis for calibration of the second calibration unit of the same calibration module after the first calibration unit has finished calibration.

[0112] The second calibration unit includes a second comparator 405, a second counter 406, and a second calibration circuit 407;

[0113] The second calibration circuit has the same circuit structure as the second driving circuit. The second driving circuit refers to the driving circuit that is calibrated by the second calibration unit in the driving circuit.

[0114] The second calibration circuit is connected in series with the replication circuit of the first calibration unit of the same calibration module;

[0115] One input of the second comparator is connected to the calibration level, and the other input of the second comparator is connected to the common terminal of the second calibration circuit and the replication circuit.

[0116] The output of the second comparator is connected to the second counter;

[0117] The second counter is used for:

[0118] The second comparator outputs a second calibration signal to adjust the second target impedance based on the comparison result of the second comparator until the resistance values ​​of the second target impedance and the calibration resistor meet the preset second quantitative relationship; wherein, the second target impedance refers to the impedance of the second driving circuit and the second calibration circuit.

[0119] The connection relationships between the above components can be found in [reference]. Figure 4 I will not go into details.

[0120] Optionally, the first quantitative relationship can be:

[0121] The first target impedance and the resistance value of the calibration resistor are equal, or the ratio of the first target impedance and the resistance value of the calibration resistor is a preset first ratio.

[0122] The second quantitative relationship can be:

[0123] The second target impedance and the resistance of the calibration resistor are equal, or the ratio of the second target impedance and the resistance of the calibration resistor is a preset second ratio.

[0124] The first and second quantitative relationships mentioned above can be adjusted according to the actual situation. Specifically, different first and second quantitative relationships can be set according to the different process of chip particles or circuit power consumption design requirements.

[0125] As an example, both the first and second quantitative relationships can be set to: the corresponding target impedance and the resistance value of the calibration resistor are equal.

[0126] The calibration level can be set according to the first and second quantitative relationships mentioned above, and this embodiment does not impose any limitations.

[0127] For example, when both the first quantitative relationship and the second quantitative relationship are set to have the corresponding target impedance and calibration resistor values ​​equal, the calibration level can be set to half of the power supply level VDDQ.

[0128] The resistance value of the calibration resistor can be set according to the requirements of relevant standards and is not limited.

[0129] In this embodiment, the first calibration unit and the second calibration unit can achieve impedance calibration by decomposing the reference voltage, performing impedance calibration based on the power supply level. In other alternative embodiments, this idea can also be applied to other power supply levels.

[0130] The following example illustrates the working principle of the first and second calibration units, using the example where both the first and second quantitative relationships are set to have the corresponding target impedance and calibration resistor values ​​equal:

[0131] For ease of explanation, the voltage level of the common terminal of the first calibration circuit and the calibration resistor is referred to as the first voltage level, and the voltage level of the common terminal of the second calibration circuit and the replication circuit is referred to as the second voltage level.

[0132] During calibration, the first comparator compares the first level with the calibration level to obtain the corresponding first comparison result.

[0133] After the first comparison result is input into the first counter, the first counter determines the first calibration signal based on the preset calibration algorithm and the first comparison result output by the first comparator. The calibration algorithm can be a bisection method, a linear method, or other existing calibration algorithms, without limitation.

[0134] Specifically, if the first level is greater than the calibration level, the first counter outputs a first calibration signal to reduce the first target impedance; if the first level is less than the calibration level, the first counter outputs a first calibration signal to increase the first target impedance; if the first level is equal to the calibration level, the first counter determines that the first target impedance and the resistance value of the calibration resistor are equal, and the calibration process of the first calibration unit ends.

[0135] The process of the first comparator comparing and then the first counter outputting the first calibration signal can be repeated multiple times until the first target impedance and the resistance value of the calibration resistor are equal.

[0136] from Figure 4 It can be seen that the first calibration signal is simultaneously input into the first calibration circuit, the first driving circuit, and the replication circuit. Therefore, when the calibration process of the first calibration unit ends, the external impedances (i.e., the target impedances mentioned above) of the first calibration circuit, the first driving circuit, and the replication circuit are all equal to the resistance value of the calibration resistor.

[0137] In this embodiment, the first calibration signal is the pull-down calibration signal 104 used to calibrate the pull-down drive circuit.

[0138] After the calibration process of the first calibration unit is completed, the second calibration unit begins calibration.

[0139] The calibration process of the second calibration unit is similar to that of the first calibration unit. That is, the second comparator compares the second level with the calibration level and outputs the first comparison result. The second counter outputs the second calibration signal for adjusting the second target impedance according to the second comparison result and the preset calibration algorithm. This process is repeated until the resistance values ​​of the second target impedance and the calibration resistor are equal (that is, the second level and the calibration level are equal), and the calibration process of the second calibration unit ends.

[0140] The calibration process for the second calibration unit can be found in the calibration process for the first calibration unit described above, and will not be repeated here.

[0141] When the first driving circuit is a pull-up driving circuit and the second driving circuit is a pull-down driving circuit, the structure of the calibration module provided in this embodiment and the corresponding connection relationship can be found in [reference needed]. Figure 5 .

[0142] Optionally, when the control module controls the first and second calibration units of the calibration module to perform calibration, it is specifically used for:

[0143] If the control module corresponds to the first calibration module, after receiving the start calibration signal, the control module controls the first calibration unit and the second calibration unit of the first calibration module to perform calibration in sequence;

[0144] If the control module corresponds to a calibration module other than the first calibration module, after receiving the first end signal of the previous calibration module, the control module controls the first calibration unit and the second calibration unit of the corresponding calibration module to perform calibration in sequence; wherein, the first end signal indicates that the first calibration unit of the previous calibration module has ended calibration.

[0145] After the first calibration unit of the corresponding calibration module finishes calibration, it outputs the first end signal to the next calibration module.

[0146] The following is combined Figure 6 The control logic of the above control module is explained. Figure 6 for Figure 2 The diagram illustrates the logic of how the control module of the particle controls the first and second calibration units to perform calibration.

[0147] The control unit can obtain Figure 3 After signal 305 is shown, an enable signal is output to the first counter of the first calibration unit of the same particle. After the first counter receives the enable signal, it performs calibration according to the aforementioned calibration process, using the first comparison result output by the first comparator.

[0148] When the first counter determines that the values ​​of the first target impedance and the calibration resistor satisfy a first quantitative relationship (e.g., equal), the first counter outputs a first end signal indicating the end of the calibration process. At this time, the calibration process of the first calibration unit ends, and the first calibration unit no longer occupies the calibration resistor.

[0149] like Figure 6 As shown, the first end signal is transmitted to the en (en) pin of the second counter, thereby triggering the second counter to start calibration according to the aforementioned calibration process, using the output of the second comparator.

[0150] On the other hand, the first end signal is transmitted to the OR gate circuit implemented by the control module. According to the operation logic of the OR gate circuit, the control module can generate a set signal after receiving the first end signal. See [link to relevant documentation]. Figure 2 The control module can set the level of the Tx (Flag) pin of this particle to 1 through the set signal, and then set the level of the Rx (Flag) pin of the next particle to 1 through the Tx (Flag) pin.

[0151] Combination Figure 3In control logic 311, when the level of the Rx(Flag) pin of the next particle is set to 1, the control module of the next particle obtains signal 305 through control logic 311, and then outputs to the first calibration unit of the next particle based on signal 305. Figure 6 The enable signal shown controls the first calibration unit of the next particle to begin calibration.

[0152] Therefore, for two adjacent calibration modules, after the first calibration unit of the preceding calibration module has finished calibration, the second calibration unit of the following calibration module and the first calibration unit of the subsequent calibration module will start calibration simultaneously, thus shortening the time required for all calibration modules to be completed.

[0153] The aforementioned first and second end signals can be generated by customized digital circuits, or by Verilog code, or by other technical means that can generate the corresponding signals. This embodiment does not limit this.

[0154] Alternatively, in this embodiment, the control logic of the control module can be switched via control signals.

[0155] Specifically, you can set a first calibration mode and a second calibration mode, such as... Figure 6 As shown, the user can switch between the first calibration mode and the second calibration mode by inputting control signals. When in the first calibration mode, the control module controls multiple calibration modules to perform calibration according to the following control logic:

[0156] The first calibration unit of each calibration module begins calibration after the first calibration unit of the previous calibration module has finished calibration and before the second calibration unit has finished calibration.

[0157] When in the second calibration mode, the control module controls multiple calibration modules to perform calibration according to the following control logic:

[0158] The first calibration unit of each calibration module begins calibration after the second calibration unit of the previous calibration module has finished calibration.

[0159] Please see Figure 7 This is a schematic diagram illustrating the effect of the calibration device provided in this embodiment. 7a represents the operating timing of an existing impedance calibration device, and 7b represents the operating timing of the calibration device provided in this embodiment.

[0160] As can be seen, when the calibration device provided in this embodiment is used for calibration, the calibration process of the first calibration unit of another calibration module has already begun before the calibration process of the second calibration unit of one calibration module has finished. Therefore, the calibration processes of the two calibration modules can partially overlap, meaning that at least two calibration modules can be calibrated simultaneously. Compared to the timing sequence in 7a where only one calibration module is calibrated at a time, the device in this embodiment can obviously shorten the time required for all multiple calibration modules to complete calibration.

[0161] Please see Figure 8 This is an example diagram illustrating the working principle of an impedance calibration device provided in this embodiment. Figure 8 In the example provided in this embodiment, the impedance calibration device is used to calibrate a multi-chip package containing three chip particles, wherein calibration module 1 is used to calibrate the first chip particle, calibration module 2 is used to calibrate the second chip particle, and calibration module 3 is used to calibrate the third chip particle.

[0162] Figure 8 T1 to T4 represent the first to fourth calibration cycles, respectively. A calibration cycle represents the time it takes for a calibration unit to go from the start of calibration to the end of calibration.

[0163] like Figure 8 As shown, during cycle T1, the first calibration unit of calibration module 1 begins calibration, and its first counter outputs the first calibration signal.

[0164] After the first calibration unit of calibration module 1 completes calibration, it enters cycle T2. At this time, the second calibration unit of calibration module 1 begins calibration, and simultaneously, according to... Figure 6 As shown in the control logic, the next calibration module, namely the first calibration unit of calibration module 2, also begins calibration after entering the T2 cycle.

[0165] After the T2 cycle ends, both the second calibration unit of calibration module 1 and the first calibration unit of calibration module 2 finish calibration.

[0166] In the T3 cycle, according to Figure 6 The control logic shown allows for calibration of both the second calibration unit of calibration module 2 and the first calibration unit of calibration module 3 within cycle T3, since the first calibration unit of calibration module 2 has already completed calibration.

[0167] After the T3 cycle ends and the T4 cycle begins, the second calibration unit of calibration module 3 starts calibration, and then the second calibration unit of calibration module 3 ends calibration after the T4 cycle ends.

[0168] It can be seen that the device in this embodiment takes a total of 4 calibration cycles when calibrating 3 chip particles.

[0169] In contrast, existing calibration devices, when used to calibrate three chip particles, such as Figure 8 As shown, only one calibration unit of the calibration module is calibrating at any given time, which means that it takes at least 6 calibration cycles in total.

[0170] Please see Figure 9 This is a signal timing diagram of the calibration module of the main particle and the calibration module of the slave particle 1 in the impedance calibration device provided in this embodiment.

[0171] ZQ Start indicates the start of calibration. MasterPD EN indicates that the first calibration unit in the main particle calibration module has started calibration, and MasterPD Done indicates that the calibration process of the first calibration unit in the main particle calibration module has ended.

[0172] MasterPU EN indicates that the second calibration unit in the calibration module of the main particle has started calibration, and Master ZQ Done indicates that the calibration process of the second calibration unit in the calibration module of the main particle has ended, and correspondingly, the calibration module of the main particle has ended calibration.

[0173] Slave1 PD EN indicates that the calibration begins from the first calibration unit in the calibration module of particle 1, and Slave1PDDone indicates that the calibration process of the first calibration unit in the calibration module of particle 1 ends.

[0174] Slave1 PU EN indicates that calibration begins from the second calibration unit in the calibration module of particle 1, and Slave1ZQDone indicates that the calibration process of the second calibration unit in the calibration module of particle 1 has ended, correspondingly, calibration ends from the calibration module of particle 1.

[0175] According to the impedance calibration device for multi-chip packaged chips provided in the embodiments of this application, the embodiments of this application also provide an impedance calibration method for multi-chip packaged chips, applied to the impedance calibration device for multi-chip packaged chips provided in any embodiment of this application, the method comprising:

[0176] The corresponding drive circuits are calibrated one by one using multiple calibration modules until each drive circuit is calibrated.

[0177] Except for the first calibration module, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration.

[0178] The impedance calibration method provided in this embodiment can be used in both digital control calibration circuits and analog control calibration circuits.

[0179] Please see Figure 10 This is a flowchart of a method for calibrating a multi-chip package containing N chip particles. The method may include the following steps.

[0180] S1, the first calibration unit of the first calibration module completes calibration.

[0181] Combination Figure 2 After each particle in the impedance calibration device receives the trigger calibration signal, the particle shields the signal, the master particle responds to the signal, and the calibration module of the master particle (i.e. the first calibration module) begins calibration.

[0182] S2, the first calibration unit of the second calibration module completes calibration, and the second calibration unit of the first calibration module completes calibration.

[0183] After S1 is completed, the first calibration unit of the first calibration module outputs the first end signal. Figure 6 The control logic, the second calibration module (i.e. Figure 2 The calibration begins with the first calibration unit of the calibration module for particle 1, and simultaneously, the second calibration unit of the first calibration module begins calibration.

[0184] S3, the first calibration unit of the third calibration module completes calibration, and the second calibration unit of the second calibration module completes calibration.

[0185] The subsequent steps follow the same pattern.

[0186] SN, the first calibration unit of the Nth calibration module completes calibration, and the second calibration unit of the (N-1)th calibration module completes calibration.

[0187] After the second-to-last calibration module (i.e., the N-1th calibration module) finishes calibration, it outputs the first end signal, thereby triggering the first calibration unit of the Nth calibration module and the second calibration unit of the N-1th calibration module to start calibration.

[0188] SN+1, the second calibration unit of the Nth calibration module completes calibration.

[0189] After the first calibration unit of the last calibration module (i.e., the Nth calibration module) finishes calibration, since there are no other calibration modules after it, the second calibration unit of the calibration module begins calibration. After the second calibration unit of the last calibration module finishes calibration, the impedance calibration of this multi-chip package containing N chip particles is completed.

[0190] For details on the specific implementation methods and beneficial effects of the above steps, please refer to the working principle and beneficial effects of the impedance calibration device for multi-particle packaged chips provided in the embodiments of this application, which will not be repeated here.

[0191] It should be noted that the various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. The same or similar parts between the various embodiments can be referred to each other.

[0192] For ease of description, the above systems or devices are described separately as various modules or units based on their functions. Of course, in implementing this application, the functions of each unit can be implemented in one or more software and / or hardware components.

[0193] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0194] Finally, it should be noted that in this document, relational terms such as first, second, third, and fourth are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0195] The above description is only a preferred embodiment of this application. It should be noted that for those skilled in the art, several improvements and modifications can be made without departing from the principle of this application, and these improvements and modifications should also be considered within the scope of protection of this application.

Claims

1. An impedance calibration device for a multi-chip package, characterized in that, It includes a calibration resistor and multiple calibration modules, the calibration resistor and the multiple calibration modules are connected, and the multiple calibration modules correspond one-to-one with the driving circuits of multiple chip particles in the multi-particle packaged chip; The calibration module includes a first calibration unit and a second calibration unit. The first calibration unit calibrates a first driving circuit corresponding to the driving circuit of its own calibration module using a calibration resistor. The second calibration unit calibrates a second driving circuit corresponding to the driving circuit of its own calibration module after the first calibration unit of the same calibration module has completed calibration. The first calibration unit includes a first comparator, a first counter, a first calibration circuit, and a replication circuit. The first calibration circuit and the calibration resistor are connected in series. One input of the first comparator is connected to a calibration level, and the other input is connected to a common terminal of the first calibration circuit and the calibration resistor. The output of the first comparator is connected to the first counter. The second calibration unit includes a second comparator, a second counter, and a second calibration circuit. One input of the second comparator is connected to a calibration level, and the other input is connected to a common terminal of the second calibration circuit and the replication circuit. The output of the second comparator is connected to the second counter. The replication circuit serves as the basis for calibration by the second calibration unit of the same calibration module after the first calibration unit has completed calibration. When multiple calibration modules are used to calibrate the corresponding driving circuits one by one, except for the first calibration module, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration.

2. The apparatus according to claim 1, characterized in that, The impedance calibration device also includes multiple control modules that correspond one-to-one with the calibration module; The control module is used to control the first calibration unit and the second calibration unit of the calibration module to perform calibration.

3. The apparatus according to claim 2, characterized in that, When the control module controls the first calibration unit and the second calibration unit of the calibration module to perform calibration, it is specifically used for: If the control module corresponds to the first calibration module, after receiving the start calibration signal, the control module controls the first calibration unit and the second calibration unit of the first calibration module to perform calibration in sequence; If the control module corresponds to a calibration module other than the first calibration module, after receiving the first end signal of the previous calibration module, the control module controls the first calibration unit and the second calibration unit of the corresponding calibration module to perform calibration in sequence; wherein, the first end signal indicates that the first calibration unit of the previous calibration module has ended calibration. After the first calibration unit of the corresponding calibration module finishes calibration, it outputs a first end signal to the next calibration module.

4. The apparatus according to claim 1, characterized in that, The replication circuit has the same circuit structure as the first calibration circuit, and the first calibration circuit has the same circuit structure as the first driving circuit. The first driving circuit refers to the driving circuit in the driving circuit that is calibrated by the first calibration unit. The first counter is used for: Based on the comparison result of the first comparator, a first calibration signal is output to adjust the first target impedance until the resistance values ​​of the first target impedance and the calibration resistor meet a preset first quantitative relationship; wherein, the first target impedance refers to the impedance of the first driving circuit, the first calibration circuit and the replication circuit.

5. The apparatus according to claim 4, characterized in that, The second calibration circuit has the same circuit structure as the second driving circuit, and the second driving circuit refers to the driving circuit that is calibrated by the second calibration unit in the driving circuit. The second calibration circuit and the replication circuit of the first calibration unit in the same calibration module are connected in series; The second counter is used for: The second comparator outputs a second calibration signal to adjust the second target impedance based on the comparison result of the second comparator until the resistance values ​​of the second target impedance and the calibration resistor meet a preset second quantitative relationship; wherein, the second target impedance refers to the impedance of the second driving circuit and the second calibration circuit.

6. The apparatus according to claim 5, characterized in that, The first driving circuit is a pull-down driving circuit, and the second driving circuit is a pull-up driving circuit; Alternatively, the first driving circuit may be a pull-up driving circuit, and the second driving circuit may be a pull-down driving circuit.

7. The apparatus according to claim 5, characterized in that, The first quantitative relationship is: The first target impedance and the resistance value of the calibration resistor are equal, or the ratio of the first target impedance and the resistance value of the calibration resistor is a preset first ratio. The second quantitative relationship is: The second target impedance and the resistance value of the calibration resistor are equal, or the ratio of the second target impedance and the resistance value of the calibration resistor is a preset second ratio.

8. The apparatus according to claim 5, characterized in that, When the first counter outputs a first calibration signal for adjusting the first target impedance based on the comparison result of the first comparator, it is specifically used for: Based on the comparison result of the first comparator and the preset calibration algorithm, a first calibration signal for adjusting the first target impedance is output. When the second counter outputs a second calibration signal for adjusting the second target impedance based on the comparison result of the second comparator, it is specifically used for: Based on the comparison result of the second comparator and the preset calibration algorithm, a second calibration signal is output to adjust the second target impedance.

9. The apparatus according to claim 1, characterized in that, The first calibration unit of each of the aforementioned calibration modules begins calibration after the first calibration unit of the previous calibration module has completed calibration and before the second calibration unit has completed calibration, including: When the preset calibration mode is the first calibration mode, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration. When the calibration mode is the second calibration mode, the first calibration unit of each calibration module starts calibration after the second calibration unit of the previous calibration module finishes calibration.

10. An impedance calibration method for a multi-particle packaged chip, characterized in that, The method, applied to the impedance calibration apparatus for a multi-chip package as provided in any one of claims 1 to 9, comprises: The corresponding drive circuits are calibrated one by one using multiple calibration modules until each drive circuit is calibrated. Except for the first calibration module, the first calibration unit of each calibration module starts calibration after the first calibration unit of the previous calibration module finishes calibration and before the second calibration unit finishes calibration.

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