Replacement and repair method for embedded devices and ROM functions

Abstract

The present invention discloses an embedded device and a replacement and repair method for a ROM function. In the method, the address of the replaced function is written into a breakpoint interrupt register; a transfer parameter temporarily stored in a parameter register is generated, and the transfer parameter of the parameter register and the address of the replaced function in the RETS register are pushed into a stack; after an address comparison circuit captures that the address of the breakpoint interrupt register is the same as that of a PC register, a control circuit is triggered to send an interrupt to a CPU to prevent the replaced function from being executed; the address of the PC register is written into the RETI register, and the address of the breakpoint interrupt program is updated and written into the PC register; the replacement function address is written into the RETI register, and the replacement function address is written into the PC register; the transfer parameter and the replaced function address in the stack are popped out of the stack and saved into the parameter register and the RETS register respectively, and the transfer parameter of the parameter register is operated.

Description

Technical Field

[0001] The present invention relates to the field of ROM program repair, and in particular to an embedded device and a method for replacing and repairing ROM functions. Background Art

[0002] Read-only memory (ROM) stores programs and data and is an essential component of embedded systems. Once the ROM is created and written, it cannot be written again; it can only be read. Because the programs (or code, consisting of a series of machine instructions) in the ROM may contain errors, it is sometimes necessary to repair the ROM code already stored on the chip to avoid re-creating a new ROM.

[0003] There is a solution in the prior art that directly replaces multiple programs that are read consecutively by interrupting them. However, this solution is not applicable when the replaced program needs to use parameters generated by the previous program that has not been replaced. Summary of the Invention

[0004] Based on the above situation, the main purpose of the present invention is to provide an embedded device and a ROM function replacement and repair method to achieve correct replacement of the replaced function and improve the real-time performance of the replacement function execution.

[0005] To achieve the above object, the technical solution adopted by the present invention is as follows:

[0006] A method for replacing and repairing a ROM function is applied to a system including a ROM, a CPU, a stack, an interrupt circuit and a storage medium, wherein the CPU includes a PC register, a parameter register, a RETS register and a RETI register, the ROM stores a parameter generation machine instruction, a stacking machine instruction and a replaced function that are configured to be executed in sequence, the interrupt circuit includes a breakpoint interrupt register, an address comparison circuit and a control circuit, the storage medium stores a breakpoint interrupt program and a replacement function, and the method includes the following steps: a parameter generation step: the parameter generation machine instruction is executed by the CPU to generate a transfer parameter temporarily stored in the parameter register, and the PC register is written with the replaced function address; a stacking step: the stacking machine instruction is executed by the CPU to write the replaced function address in the PC register into the RETS register, and the transfer parameter of the parameter register and the replaced function address in the RETS register are pushed into the stack; an interruption step: the address comparison circuit captures the difference between the replaced function address stored in the breakpoint interrupt register and the PC register. After the addresses of the registers are the same, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function from being executed; after receiving the interrupt, the CPU writes the replaced function address of the PC register into the RETI register, and updates the address of the breakpoint interrupt program into the PC register to start executing the breakpoint interrupt program; breakpoint interrupt processing steps: the breakpoint interrupt program is executed by the CPU as follows: the replacement function address of the replacement function is written into the RETI register, and the PC register is written into the replacement function address of the RETI register, so that the replacement function is executed; replacement function step: the replacement function is executed by the CPU as follows: the passed parameters and the replaced function address in the stack are popped out and saved to the parameter register and the RETS register respectively, and the passed parameters of the parameter register are operated; the replaced function address of the RETS register is taken out, and the replaced function address is increased by the address step to obtain the address of the next machine instruction of the replaced function in the ROM, and the address of the next machine instruction of the replaced function is written into the PC register.

[0007] Preferably, in the interruption step, after the replaced function address of the PC register is written into the RETI register, the replaced function address in the RETI register is pushed into the stack; in the breakpoint interruption processing step, the RETI register is written with the replacement function address of the replacement function, specifically including the following steps: popping the replaced function address in the stack and saving it to the RETI register; modifying the replaced function address in the RETI register to the replacement function address of the replacement function; pushing the replacement function address in the RETI register into the stack; popping the replacement function address in the stack and saving it to the RETI register.

[0008] Preferably, the ROM also stores another parameter generating machine instruction, another stacking machine instruction and another replaced function, and the replaced function, another parameter generating machine instruction, another stacking machine instruction and another replaced function are configured to be executed successively; in the breakpoint interrupt processing step, when the breakpoint interrupt program is executed, the breakpoint interrupt register is written with the other replaced function address of the other replaced function; after the function replacement step, for the other parameter generating machine instruction, another stacking machine instruction and another replaced function, the following steps are executed in sequence: the parameter generating step, the stacking step, the interrupt step, the breakpoint interrupt processing step, and the function replacement step.

[0009] Preferably, the ROM also stores a plurality of program groups, wherein each program group includes another parameter generating machine instruction, another stacking machine instruction and another replaced function configured to be executed successively, and the replaced function and the plurality of program groups are configured to be executed successively; in the breakpoint interrupt processing step, when the breakpoint interrupt program is executed, the next program group after the address in the breakpoint interrupt register is searched from the replaced function address list, and the other replaced function address of the other replaced function in the next program group is written into the breakpoint interrupt register; after the function replacement step, the following steps are executed in sequence for another parameter generating machine instruction, another stacking machine instruction and another replaced function in the next program group: the parameter generating step, the stacking step, the interrupt step, the breakpoint interrupt processing step, and the function replacement step.

[0010] Preferably, the interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes multiple breakpoint interrupt registers; the ROM also stores multiple program groups, wherein each program group includes another parameter generation machine instruction, another stacking machine instruction and another replaced function configured to be executed in sequence, and during the execution of the program group composed of the parameter generation machine instruction, the stacking machine instruction and the replaced function, when different conditions are met, it switches to a corresponding program group for execution; in the breakpoint interrupt processing step, when the breakpoint interrupt program is executed, multiple program groups that may be executed after the address in the breakpoint interrupt register of the control circuit is triggered are searched from the replaced function address list, and another replaced function address of another replaced function in the multiple program groups is written into multiple breakpoint interrupt registers respectively; after the function replacement step, when the execution condition of a certain program group is met, the following steps are executed in sequence for another parameter generation machine instruction, another stacking machine instruction and another replaced function in the certain program group: the parameter generation step, the stacking step, the interrupt step, the breakpoint interrupt processing step, and the function replacement step.

[0011] Preferably, the ROM, CPU, stack and interrupt circuit are integrated in a SOC chip, and the storage medium is located outside the SOC chip.

[0012] The present invention also provides an embedded device, including a ROM, a CPU, a stack, an interrupt circuit and a storage medium, wherein the CPU includes a PC register, a parameter register, a RETS register and a RETI register, the ROM stores a parameter generation machine instruction, a stacking machine instruction and a replaced function configured to be executed in sequence, the interrupt circuit includes a breakpoint interrupt register, an address comparison circuit and a control circuit, and the storage medium stores a breakpoint interrupt program and a replacement function; the parameter generation operation of the CPU: the parameter generation machine instruction is executed by the CPU to generate a transfer parameter temporarily stored in the parameter register, and the PC register is written with the replaced function address; the stacking operation of the CPU: the stacking machine instruction is executed by the CPU to write the replaced function address in the PC register into the RETS register, and the transfer parameter of the parameter register and the replaced function address in the RETS register are pushed into the stack; the interrupt operation of the interrupt circuit: the address comparison circuit captures the replaced function address of the replaced function stored in the breakpoint interrupt register and the address of the PC register After the same, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function from being executed; after receiving the interrupt, the CPU writes the replaced function address of the PC register into the RETI register, and updates the address of the breakpoint interrupt program into the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt processing operation of the CPU: the breakpoint interrupt program is executed by the CPU as follows: the replacement function address of the replacement function is written into the RETI register, and the PC register is written into the replacement function address of the RETI register, so that the replacement function is executed; the replacement function operation of the CPU: the replacement function is executed by the CPU as follows: the passed parameters and the replaced function address in the stack are popped out and saved to the parameter register and the RETS register respectively, and the passed parameters of the parameter register are operated; the replaced function address of the RETS register is taken out, and the replaced function address is increased by the address step to obtain the address of the next machine instruction of the replaced function in the ROM, and the address of the next machine instruction of the replaced function is written into the PC register.

[0013] Preferably, in the interrupt operation of the interrupt circuit, after the replaced function address of the PC register is written into the RETI register, the replaced function address in the RETI register is pushed into the stack; in the breakpoint interrupt processing operation of the CPU, the replacement function address of the replacement function is written into the RETI register, specifically including: popping the replaced function address in the stack and saving it to the RETI register; modifying the replaced function address in the RETI register to the replacement function address of the replacement function; pushing the replacement function address in the RETI register into the stack; and popping the replacement function address in the stack and saving it to the RETI register.

[0014] Preferably, the ROM also stores another parameter generating machine instruction, another stacking machine instruction and another replaced function, and the replaced function, another parameter generating machine instruction, another stacking machine instruction and another replaced function are configured to be executed successively; when the breakpoint interrupt program is executed in the breakpoint interrupt processing operation of the CPU, the breakpoint interrupt register is written with the other replaced function address of the other replaced function; after the replacement function operation of the CPU, for the other parameter generating machine instruction, another stacking machine instruction and another replaced function, the following are executed in sequence: the parameter generating operation of the CPU, the stacking operation of the CPU, the interrupt operation of the interrupt circuit, the breakpoint interrupt processing operation of the CPU, and the replacement function operation of the CPU.

[0015] Preferably, the ROM also stores multiple program groups, wherein each program group includes another parameter generation machine instruction, another stacking machine instruction and another replaced function configured to be executed successively, and the replaced function and multiple program groups are configured to be executed successively; when the breakpoint interrupt program is executed in the breakpoint interrupt processing operation of the CPU, the next program group after the address in the breakpoint interrupt register is searched from the replaced function address list, and the other replaced function address of the other replaced function in the next program group is written into the breakpoint interrupt register; after the replacement function operation of the CPU, for the other parameter generation machine instruction, another stacking machine instruction and another replaced function in the next program group, the following are executed in sequence: the parameter generation operation of the CPU, the stacking operation of the CPU, the interrupt operation of the interrupt circuit, the breakpoint interrupt processing operation of the CPU, and the replacement function operation of the CPU.

[0016] Preferably, the interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; the ROM also stores a plurality of program groups, wherein each program group includes another parameter generating machine instruction, another stacking machine instruction and another replaced function configured to be executed in sequence, and during the execution of the program group consisting of the parameter generating machine instruction, the stacking machine instruction and the replaced function, when different conditions are met, the corresponding program group is switched to be executed; when the breakpoint interrupt program is executed in the breakpoint interrupt processing operation of the CPU, the replaced function address list is searched. Find multiple program groups that may be executed after the address in the breakpoint interrupt register of the control circuit is triggered, and write another replaced function address of another replaced function in the multiple program groups into multiple breakpoint interrupt registers respectively; after the replacement function operation of the CPU, when the execution condition of a certain program group is met, generate a machine instruction, another stacked machine instruction and another replaced function for another parameter in the certain program group, and execute in sequence: the parameter generation operation of the CPU, the stacking operation of the CPU, the interruption operation of the interrupt circuit, the breakpoint interrupt processing operation of the CPU, and the replacement function operation of the CPU.

[0017] Preferably, the ROM, CPU, stack and interrupt circuit are integrated in a SOC chip, and the storage medium is located outside the SOC chip.

[0018] Beneficial effects

[0019] In this solution, a transfer parameter temporarily stored in the parameter register is generated, and the PC register is written with the address of the replaced function; the parameter generation machine instruction is executed by the CPU to generate a transfer parameter temporarily stored in the parameter register, and then the transfer parameter of the parameter register and the address of the replaced function in the RETS register are pushed into the stack; after the address comparison circuit captures that the replaced function address stored in the breakpoint interrupt register is the same as the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function from being executed; then, the address of the PC register is written into the RETI register, and the PC register is Update the address of the breakpoint interrupt program; then, the replacement function address is written into the RETI register, and the replacement function address is written into the PC register; the transfer parameters and the replaced function address in the stack are popped out and saved to the parameter register and the RETS register respectively, and the transfer parameters of the parameter register are operated, thereby realizing the operation of the transfer parameters generated by the machine instructions generated by the replacement function on the parameters, and can operate on the local variables of the function body that calls the replaced function. The number of interrupts used in the entire implementation process is very small, and it avoids setting global variables to implement the operation of the transfer parameters, which simplifies the program execution steps and improves the real-time performance of the program execution.

[0020] Other beneficial effects of the present invention will be explained through the introduction of specific technical features and technical solutions in the specific implementation methods. Those skilled in the art should be able to understand the beneficial technical effects brought about by the introduction of these technical features and technical solutions. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The preferred embodiments of the present invention will be described below with reference to the accompanying drawings.

[0022] Figure 1 A system diagram of an embedded device according to a preferred embodiment of the present invention;

[0023] Figure 2 A schematic diagram of the programs in the ROM and storage medium according to a preferred embodiment of the present invention;

[0024] Figure 3 A schematic diagram of a program in a ROM according to another preferred embodiment of the present invention;

[0025] Figure 4 A flowchart of a method for replacing and repairing a ROM function according to another preferred embodiment of the present invention;

[0026] Figure 5 A schematic diagram of programs in a ROM and a storage medium according to another preferred embodiment of the present invention;

[0027] Figure 6 This is a schematic diagram of a program and breakpoint interrupt register group in a ROM according to a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0028] The present invention is described below based on the following embodiments, but the present invention is not limited to these embodiments. In the following detailed description of the present invention, some specific details are described in detail. In order to avoid obscuring the essence of the present invention, well-known methods, processes, procedures, and components are not described in detail.

[0029] Furthermore, persons of ordinary skill in the art will appreciate that the figures provided herein are for illustration purposes only and are not necessarily drawn to scale.

[0030] Unless the context clearly requires otherwise, throughout the specification and claims, the words "include," "comprising," and similar words should be construed in an inclusive sense rather than an exclusive or exhaustive sense; that is, in the sense of "including but not limited to."

[0031] In the description of the present invention, it should be understood that the terms "first", "second", etc. are used for descriptive purposes only and should not be understood to indicate or imply relative importance. In addition, in the description of the present invention, unless otherwise specified, "plurality" means two or more.

[0032] like Figure 1 As shown, Figure 1This invention relates to an embedded device comprising a system-on-chip (SOC) chip and a storage medium (e.g., FLASH). The SOC chip comprises a ROM, a CPU, an interrupt circuit, and a stack. The CPU comprises a PC (Program Counter) register, a parameter register, a RETS register, and a RETI register. The interrupt circuit comprises a breakpoint interrupt register, an address comparison circuit, and a control circuit. The stack can be located in RAM, which also provides a storage location for temporary data generated during CPU operation. The ROM stores programs executed by the CPU to implement various operations (including various calculations and operations on the contents stored in various registers). Due to various reasons (such as errors in the design and verification stages, etc.), there is a part of the program (or code) stored in the ROM that needs to be repaired, which can be called the program to be repaired. The program to be repaired of the present invention mainly refers to the function that needs to use the transfer parameters generated by the previous machine instruction, hereinafter referred to as the replaced function, wherein the machine instruction that generates the transfer parameter can be called the parameter generation machine instruction, and there is also a push machine instruction between the replaced function and the parameter generation machine instruction, and the replaced function includes multiple machine instructions, which include a pop (POP) machine instruction, related instructions for operating the transfer parameters (for example, performing operations on the transfer parameters, outputting the operation results, or pushing the operation results into the stack, etc.), and a return operation instruction. After the parameter generation machine instruction is executed, the passed parameter is temporarily stored in the parameter register, and then the push machine instruction is executed to push the context data including the passed parameter into the stack. In order to replace and repair the replaced function, the storage medium stores a breakpoint interrupt program (Breakpoint Interrupt Program) and a replacement function. By writing the address (starting address) of the replaced function in the breakpoint interrupt register, when the address comparison circuit captures that the address in the PC register is the same as the address of the breakpoint interrupt register, the trigger control circuit sends an interrupt to the CPU to prevent the replaced function from being executed. The interrupt is a special interrupt with the highest interrupt priority, which can interrupt the operation being executed by the CPU; after receiving the interrupt, the CPU starts to execute the breakpoint interrupt program, and then executes the replacement function. In the replacement function, the passed parameter is popped from the stack and saved to the parameter register by executing the pop machine instruction, thereby implementing related operations on the passed parameter in the execution of the replacement function.

[0033] like Figure 2As shown, the ROM stores the following instructions, configured to be executed sequentially: machine instruction 0...parameter generation machine instruction 1, push machine instruction 1, replaced function RD1, and next machine instruction 1. The replaced function RD1 includes multiple machine instructions: a pop machine instruction RD11, an operation on the passed parameters RD12, an output operation (or push machine instruction) RD13, and a return operation machine instruction RD14. The operation on the passed parameters RD12 can be composed of one or more machine instructions. After being executed by the CPU, parameter generation machine instruction 1 generates passed parameters, which should be used by the replaced function RD1. However, since the replaced function RD1 needs to be replaced and repaired, that is, replaced by a replacement function RT1 in the storage medium (the replacement function RT1 in the storage medium can be stored in the storage medium before the embedded device leaves the factory, or can be updated to the storage medium through an online upgrade after the embedded device leaves the factory), in this solution, the CPU no longer executes the replaced function RD1 but instead executes the replacement function RT1. The replaced function RT1 includes multiple machine instructions: a pop machine instruction RT11, an operation RT12 for passing parameters, an output operation RT13, and a return operation instruction RT14. The operation RT12 for passing parameters and the output operation RT13 can each be composed of one or more machine instructions. In other embodiments, the parameter generation machine instruction 1 and the replaced function RD1 can also be stored in the ROM as follows: Figure 3 The illustrated method exists in which the parameter generation machine instruction 1 and the replaced function RD1 are both local programs within a function A that implements a certain function.

[0034] like Figure 4 The following is a method for replacing and repairing a ROM function of the above embedded device. Figure 2 and Figure 4 , the replacement and repair method is described in detail.

[0035] S100 , reading a replaced function address of a replaced function from a storage medium, and writing the replaced function address into a breakpoint interrupt register.

[0036] The ROM may store an initialization program to determine whether a replacement repair method of a ROM function needs to be executed. In addition, a repair flag is stored in the storage medium (if a replacement repair method needs to be executed, the repair flag is set to repair, and the address (starting address) of the function to be replaced (such as Figure 2As shown, the starting address of the replaced function (i.e., the address of the pop machine instruction RD11) is written into the storage medium. If the replacement repair method does not need to be executed, the repair flag is set to "no repair". After the embedded device is powered on, the CPU executes the initialization program to implement the following steps: the CPU reads the repair flag from the storage medium. If the repair flag indicates "repair", the CPU reads the replaced function address of the replaced function from the storage medium and writes the replaced function address into the breakpoint interrupt register; if the repair flag indicates "no repair", the CPU continues to execute the program in the ROM.

[0037] S110, parameter generation step and stacking step, wherein, the parameter generation step: the parameter generation machine instruction 1 is executed by the CPU to generate the transfer parameters temporarily stored in the parameter register, and then the PC register is written to the replaced function address; then, the stacking step: the stacking machine instruction 1 is executed by the CPU to write the replaced function address in the PC register into the RETS register, and push the transfer parameters of the parameter register and the replaced function address stored in the RETS register into the stack.

[0038] Specifically, after step S100, the CPU continues to execute the parameter generation machine instruction 1, generating a transfer parameter temporarily stored in the parameter register (for example, one or more of registers R0 to R15), which is needed by the replaced function RD1. At this time, the address of the next machine instruction is written into the PC register, i.e., the instruction of the push machine instruction 1. After the parameter generation machine instruction 1 is executed, the push machine instruction 1 is started to be executed, and at this time, the address of the next machine instruction is written into the PC register, i.e., the starting address of the replaced function RD1, i.e., the address of the pop machine instruction RD11. The above-mentioned push machine instruction 1 is executed by the CPU to save the address in the PC register (which is the starting address of the replaced function RD1 at this time) to the RETS register, and push the call context data into the stack, wherein the call context data includes the transfer parameter in the parameter register and the address of the RETS register (which is the starting address of the replaced function RD1 at this time).

[0039] S120, interruption step: after the address comparison circuit captures that the address of the breakpoint interrupt register is the same as that of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function RD1 from being executed; after receiving the interrupt, the CPU writes the replaced function address of the PC register into the RETI register, and updates the address of the breakpoint interrupt program written into the PC register to start executing the breakpoint interrupt program.

[0040] Specifically, after step S110, that is, after the passed parameters and the address of the RETS register (the address of the replaced function RD1 in this case) are saved to the stack, the address comparison circuit starts this round of address comparison (each time the address of the PC register is updated, the address comparison circuit will be triggered to perform a round of comparison, but the comparison action will not be performed until the current machine instruction is executed. For example, in this step, the address comparison circuit will be triggered to perform the comparison operation only after the push machine instruction 1 is executed), that is, to compare whether the addresses of the breakpoint interrupt register and the PC register are the same. Since the address of the PC register is the starting address of the replaced function RD1 (that is, the address of the replaced machine instruction 11) at this time, the address comparison circuit captures that the address of the breakpoint interrupt register is the same as that of the PC register, thereby triggering the control circuit to send an interrupt to the CPU to prevent the replaced function from being executed; after receiving the interrupt, the interrupt processing hardware in the CPU writes the address of the replaced function in the PC register into the RETI register, and updates the address of the breakpoint interrupt program (starting address) written to the PC register to start executing the breakpoint interrupt program.

[0041] S130, breakpoint interrupt processing step: the breakpoint interrupt program is executed by the CPU, the RETI register is written with the replacement function address of the replacement function RT1, and the PC register is written with the replacement function address of the RETI register, so that the replacement function RT1 is executed after exiting the interrupt.

[0042] In some embodiments, in order to better be compatible with existing common interrupt handling mechanisms, in step S120, after the address of the replaced function RD1 in the PC register is written into the RETI register, the interrupt context is pushed into the stack, thereby realizing interrupt scene protection, and the interrupt context includes the replaced function address in the RETI register; in addition, in step S130, the RETI register is written with the replacement function address of the replacement function RT1, specifically including the following steps: the pop machine instruction BP1 is executed by the CPU to pop the interrupt context in the stack, so that the interrupt context is written into the relevant register, wherein the address of the replaced function RD1 is popped and saved to the RETI register; then, the operation BP2 of writing the address of the replacement function into the RETI register is executed, That is, the address of the replaced function RD1 in the RETI register is modified to the replacement function address of the replacement function RT1, and a new interrupt context is formed at this time; then, the push machine instruction BP3 is executed by the CPU to perform the push operation, thereby pushing the new interrupt context into the stack. As mentioned above, the new interrupt context stores the replacement function address in the RETI register; finally, the pop machine instruction BP4 is executed, that is, the interrupt return operation is executed: the new interrupt context will be popped and saved to the relevant register, wherein the address of the replacement function RT1 contained in the new interrupt context in the stack will be popped and saved to the RETI register, and then the PC register is written to the address of the replacement function RT1 in the RETI register, so that the replacement function RT1 starts to be executed after exiting the interrupt. In this way, after the interrupt returns, the address in the RETI register can be updated to the address of the replacement function RT1, rather than the address of the replaced function RD1.

[0043] S140, function replacement step: the replacement function RT1 is executed by the CPU as follows: the passed parameters in the stack and the address of the replaced function RD1 are popped out and saved to the parameter register and the RETS register respectively, and the passed parameters in the parameter register are operated (for example, the passed parameters are operated to obtain the operation result, and the operation result is output); the address of the replaced function RD1 in the RETS register is taken out, and the address of the replaced function is increased by the address step to obtain the address of the next machine instruction 1 after the replaced function RD1 in the ROM, and the address of the next machine instruction 1 of the replaced function RD1 is written into the PC register.

[0044] Specifically, the CPU executes the replacement function RT1, and the following operations are generated: the pop machine instruction RT1 is executed, thereby performing a pop operation to pop the calling context data in the stack and save it to the relevant register, wherein the transfer parameters in the calling context data are popped and saved in the parameter register, and the address of the replaced function RD1 is popped and saved in the RETS register; then, the transfer parameters in the parameter register are operated, for example, the transfer parameters are operated to obtain the operation result (for example, the transfer parameter is multiplied by 10 to replace the operation of multiplying the transfer parameter by 5 in the replaced function), and then the operation result is output (for example, the operation result is printed on the screen of the embedded device), and for example, the operation result is pushed into the stack for R The subsequent executed programs in OM continue to use it (for example, being called by other functions, etc.), and at this point, the functional replacement and repair of the replaced function RD1 is completed; finally, the address of the replaced function RD1 in the RETS register is taken out by the CPU, and the address of the replaced function RD1 is increased by the address step (for example, each time a machine instruction is executed, the address of the PC pointer increases by 1 (that is, the address of the PC register increases by 1), that is, the address step is 1) to obtain the address of the next machine instruction 1 after the replaced function RD1 in the ROM, and write the address of the next machine instruction 1 into the PC register. It can be seen that the address in the PC register points to the address of the normal program in the ROM again, and the CPU will continue to run the program in the ROM normally.

[0045] like Figure 5As shown, in some embodiments, there are two replaced functions in the ROM. For example, after the replaced function RD1, another parameter generation machine instruction 2, another stack push machine instruction 2 and another replaced function RD2 are also stored. Similarly, after the parameter generation machine instruction 2 is executed by the CPU, it can generate a transfer parameter 2, which should be used by the replaced function RD2. The CPU executes the replaced function RD1 by calling the replaced function RD1. Correspondingly, the storage medium also stores a replacement function RT2 to repair and replace the replaced function RD2, and the address of the first replaced function (i.e., the address of the replaced function RD1) needs to be stored in the storage medium. In this case, the breakpoint interrupt program also includes an operation of updating the address of the breakpoint interrupt register (for example, consisting of one or more machine instructions). When the CPU executes the initialization program in step S100, if the repair flag is repair, the replaced function address of the replaced function RD1 is read from the storage medium, and the address of the replaced function RD1 is written into the breakpoint interrupt register. During the process of replacing and repairing the replaced function RD1, when the breakpoint interrupt program is executed in step S130, the address of the breakpoint interrupt register is updated, that is, the breakpoint interrupt register is written with the replaced function address of the replaced function RD2, in preparation for the subsequent replacement and repair of the replaced function RD2. Thereafter, the parameter generation step, the interruption step, the breakpoint interrupt processing step, and the function replacement step are sequentially executed to achieve the repair and replacement of the replaced function RD2 with the replacement function RT2. For details, see steps S110 to S140, which will not be repeated here. It can be seen that when the two replaced functions in the ROM have a strict execution order, with the solution of this embodiment, only one breakpoint interrupt register is required to complete the repair and replacement of the two replaced functions, saving the breakpoint interrupt register and related control circuits, and reducing hardware costs.

[0046] like Figure 5As shown, in some embodiments, the parameter generation machine instruction 1, the stacking machine instruction 1, the replaced function RD1 and the next machine instruction 1 can constitute a program group 1. In addition, the ROM stores multiple program groups, such as program group 2, program group 3 and program group 4, wherein each program group includes a parameter generation machine instruction, a stacking machine instruction, a replaced function and a next machine instruction configured to be executed in sequence, and program groups 1 to 4 are configured to be executed in sequence; in each program group, the parameter generation machine instruction can generate a transfer parameter after being executed by the CPU, and the transfer parameter should be used by the replaced function in the program group. The CPU executes the replaced function by calling the replaced function. Correspondingly, the storage medium also stores replacement functions RT1 to RT4 to repair and replace the replaced functions RD1 to RD4 respectively. Similarly, the address of the first replaced function (i.e., the address of the replaced function RD1) is stored in the storage medium. In this case, when the CPU executes the initialization program in step S100, if the repair flag is repair, the replaced function address of the replaced function RD1 is read from the storage medium, and the address of the replaced function RD1 is written into the breakpoint interrupt register. In the process of replacing and repairing the replaced function RD1, when the breakpoint interrupt program is executed in step S130, the address of the breakpoint interrupt register is updated, the next program group 2 after the address in the breakpoint interrupt register is searched from the replaced function address list, and the replaced function address of the replaced function RD2 in the next program group 2 is written into the breakpoint interrupt register; after step S140, that is, after the replacement and repair of the replaced function RD1 in program group 1 is performed, machine instruction 2 and the replaced function RD2 are generated for the parameters in program group 2, and the following steps are performed in sequence: parameter generation step, interruption step, breakpoint interrupt processing step, and function replacement step, and finally the repair replacement of the replaced function RD2 with the replacement function RT2 is realized. It can be seen that when multiple replaced functions in the ROM have a strict execution order, according to the solution of this embodiment, only one breakpoint interrupt register is needed to complete the repair and replacement of multiple replaced functions, saving the breakpoint interrupt register and related control circuits, and reducing hardware costs.

[0047] like Figure 6As shown, in some embodiments, the interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes multiple breakpoint interrupt registers, such as breakpoint interrupt register 1 to breakpoint interrupt register 4. The address comparison circuit compares the address in each breakpoint interrupt register with the address in the PC register. Therefore, once the address in the PC register is the same as the address in any breakpoint interrupt register, the address comparison circuit triggers the control circuit to send an interrupt to the CPU; the ROM also stores multiple program groups, such as program group 2 to program group 4, wherein each program group includes parameter generation machine instructions, stack push machine instructions, replaced functions, and next functions that are configured to be executed in sequence. A machine instruction, such as program group 2, includes parameter generation machine instruction 2, stack push machine instruction 2, replaced function RD2 and next machine instruction 2 configured to be executed in sequence. In addition, when different conditions are met during the execution of program group 1, the execution of program group 1 will jump to a corresponding program group to be executed. That is, which program group is executed after program group 1 is executed is relatively random. For example, during the execution of program group 1, if condition 2 is met, the execution of program group 1 will jump to program group 2. If condition 3 is met, the execution of program group 1 will jump to program group 3. If condition 4 is met, the execution of program group 1 will jump to program group 4. Correspondingly, the storage medium also stores replacement functions RT1 to replacement functions RT4 to repair and replace replaced functions RD1 to replaced functions RD4 respectively. Similarly, the address of the first replaced function (for example, the address of the replaced function RD1) is stored in the storage medium. In addition, the storage medium also needs to store a list of all replaced function addresses (the address of the first replaced function can be included in the address list).

[0048] In this case, when the CPU executes the initialization program in step S100, if the repair flag is

[0049] In the process of replacing and repairing the replaced function RD1, when the breakpoint interrupt program is executed in step S130, the replaced function address list is searched for multiple program groups that may be executed after the address in the breakpoint interrupt register of the control circuit is triggered (because there are multiple breakpoint interrupt registers in the breakpoint interrupt register group, it is necessary to use the address in the breakpoint interrupt register that triggered the control circuit to send an interrupt as a reference to find the address of the next function to be replaced, otherwise the replaced function address found may not be the next function to be executed), and the replaced function addresses of the replaced functions in the multiple program groups are written into the corresponding breakpoint interrupt registers respectively. Specifically, it is assumed that the address of the replaced function RD1 is written into the breakpoint interrupt register 1 at this time (because there are multiple breakpoint interrupt registers in the breakpoint interrupt register group). Register, that is, the control circuit enters an interrupt triggered by the breakpoint interrupt register 1, so it is necessary to use the address in the breakpoint interrupt register 1 as a reference to find the address of the next function that needs to be replaced). Therefore, by searching the replaced function list, it can be known that program group 2 to program group 4 may be executed after the address of the replaced function RD1. Therefore, the addresses of the replaced functions RD2 to RD4 are written into the corresponding breakpoint interrupt registers respectively, for example, write them into the breakpoint interrupt register 2 to the breakpoint interrupt register 4 respectively. It can be understood that one of the addresses of the replaced functions 2 to 4 can also be written into the breakpoint interrupt register 1, that is, overwriting the address of the replaced function RD1 in the breakpoint interrupt register 1. Because the replaced function RD1 has been executed, its address no longer needs to reside in the breakpoint interrupt register. After step S140, that is, after the replacement repair is performed on the replaced function RD1 in program group 1, when the execution conditions of a certain program group are met, for example, the execution conditions of program group 2 are met, machine instructions 2 and replaced function RD2 are generated for the parameters in the program group 2, and the following steps are executed in sequence: parameter generation step, interruption step, breakpoint interruption processing step, and replacement function step, and finally the repair replacement of the replaced function RD2 with the replacement function RT2 is realized.

[0050] The present invention also provides an embedded device, including a ROM, a CPU, a stack, an interrupt circuit and a storage medium, wherein the CPU includes a PC register, a parameter register, a RETS register and a RETI register, the ROM stores a parameter generation machine instruction, a stacking machine instruction and a replaced function configured to be executed in sequence, the interrupt circuit includes a breakpoint interrupt register, an address comparison circuit and a control circuit, and the storage medium stores a breakpoint interrupt program and a replacement function; the parameter generation operation of the CPU: the parameter generation machine instruction is executed by the CPU to generate a transfer parameter temporarily stored in the parameter register, and the PC register is written with the replaced function address; the stacking operation of the CPU: the stacking machine instruction is executed by the CPU to write the replaced function address in the PC register into the RETS register, and the transfer parameter of the parameter register and the replaced function address in the RETS register are pushed into the stack; the interrupt operation of the interrupt circuit: the address comparison circuit captures the replaced function address of the replaced function stored in the breakpoint interrupt register and the address of the PC register After the same, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function from being executed; after receiving the interrupt, the CPU writes the replaced function address of the PC register into the RETI register, and updates the address of the breakpoint interrupt program into the PC register to start executing the breakpoint interrupt program; the breakpoint interrupt processing operation of the CPU: the breakpoint interrupt program is executed by the CPU as follows: the replacement function address of the replacement function is written into the RETI register, and the PC register is written into the replacement function address of the RETI register, so that the replacement function is executed; the replacement function operation of the CPU: the replacement function is executed by the CPU as follows: the passed parameters and the replaced function address in the stack are popped out and saved to the parameter register and the RETS register respectively, and the passed parameters of the parameter register are operated; the replaced function address of the RETS register is taken out, and the replaced function address is increased by the address step to obtain the address of the next machine instruction of the replaced function in the ROM, and the address of the next machine instruction of the replaced function is written into the PC register.

[0051] Those skilled in the art will appreciate that, provided there is no conflict, the above preferred solutions can be freely combined and superimposed.

[0052] It should be understood that the above-mentioned embodiments are merely illustrative and non-restrictive. Without departing from the basic principles of the present invention, various obvious or equivalent modifications or substitutions that can be made by those skilled in the art to the above-mentioned details will be included in the scope of the claims of the present invention.

Claims

1. A ROM function replacement and repair method is applied to a system including a ROM, a CPU, a stack, an interrupt circuit, and a storage medium, wherein: The CPU includes a PC register, a parameter register, a RETS register, and a RETI register. The ROM stores a parameter generation machine instruction, a stack push machine instruction, and a replaced function that are configured to be executed sequentially. The interrupt circuit includes a breakpoint interrupt register, an address comparison circuit, and a control circuit. The storage medium stores a breakpoint interrupt program and a replacement function. The method includes the following steps: Parameter generation step: the parameter generation machine instruction is executed by the CPU to generate a transfer parameter temporarily stored in the parameter register, and the PC register is written with the replaced function address; Push step: the push machine instruction is executed by the CPU to write the replaced function address in the PC register into the RETS register, and push the passed parameters in the parameter register and the replaced function address in the RETS register into the stack; Interruption step: after the address comparison circuit captures that the replaced function address of the replaced function stored in the breakpoint interrupt register is identical to the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function from being executed; after receiving the interrupt, the CPU writes the replaced function address of the PC register into the RETI register and updates the address of the breakpoint interrupt program into the PC register to start executing the breakpoint interrupt program; Breakpoint interrupt processing step: the breakpoint interrupt program is executed by the CPU, the replacement function address of the replacement function is written into the RETI register, and the replacement function address of the RETI register is written into the PC register, so that the replacement function is executed; Function replacement step: the replacement function is executed by the CPU as follows: the passed parameters and the replaced function address in the stack are popped out and saved to the parameter register and the RETS register respectively, and the passed parameters of the parameter register are operated; the replaced function address of the RETS register is taken out, and the replaced function address is increased by the address step to obtain the address of the next machine instruction of the replaced function in the ROM, and the address of the next machine instruction of the replaced function is written into the PC register.

2. The replacement and repair method according to claim 1, characterized in that: In the interruption step, after writing the replaced function address of the PC register into the RETI register, the replaced function address in the RETI register is pushed into a stack; In the breakpoint interrupt processing step, the RETI register is written with the replacement function address of the replacement function, specifically comprising the following steps: Popping the replaced function address from the stack and saving it to the RETI register; Modify the replaced function address in the RETI register to the replacement function address of the replacement function; Pushing the replacement function address in the RETI register into the stack; The replacement function address in the stack is popped off and saved to the RETI register.

3. The replacement and repair method according to claim 2, characterized in that: The ROM further stores another parameter generating machine instruction, another stacking machine instruction, and another replaced function, wherein the replaced function, the another parameter generating machine instruction, the another stacking machine instruction, and the another replaced function are configured to be executed sequentially; In the breakpoint interrupt processing step, when the breakpoint interrupt program is executed, the breakpoint interrupt register is written with another replaced function address of the another replaced function; After the function replacement step, a machine instruction, another stacked machine instruction and another replaced function are generated for the other parameter, and the following steps are executed in sequence: the parameter generation step, the stacking step, the interruption step, the breakpoint interruption processing step, and the function replacement step.

4. The replacement and repair method according to claim 2, characterized in that: The ROM further stores a plurality of program groups, wherein each program group includes another parameter generation machine instruction, another stack push machine instruction, and another replaced function configured to be executed sequentially, and the replaced function and the plurality of program groups are configured to be executed sequentially; In the breakpoint interrupt processing step, when the breakpoint interrupt program is executed, searching the replaced function address list for the next program group after the address in the breakpoint interrupt register, and writing another replaced function address of another replaced function in the next program group into the breakpoint interrupt register; After the function replacement step, a machine instruction, another stacked machine instruction and another replaced function are generated for another parameter in the next program group, and the following steps are executed in sequence: the parameter generation step, the stacking step, the interruption step, the breakpoint interruption processing step, and the function replacement step.

5. The replacement and repair method according to claim 2, characterized in that: The interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; the ROM further stores a plurality of program groups, wherein each program group includes another parameter generation machine instruction, another stack push machine instruction, and another replaced function configured to be executed sequentially, and when different conditions are met during the execution of the program group consisting of the parameter generation machine instruction, the stack push machine instruction, and the replaced function, a corresponding program group is switched to be executed; In the breakpoint interrupt processing step, when the breakpoint interrupt program is executed, multiple program groups that may be executed after the address in the breakpoint interrupt register of the control circuit is triggered are searched from the replaced function address list, and another replaced function address of another replaced function in the multiple program groups is written into the multiple breakpoint interrupt registers respectively; After the function replacement step, when the execution condition of a certain program group is met, a machine instruction, another stacked machine instruction and another replaced function are generated for another parameter in the certain program group, and the following steps are executed in sequence: the parameter generation step, the stacking step, the interruption step, the breakpoint interruption processing step, and the function replacement step.

6. The replacement and repair method according to any one of claims 1 to 5, characterized in that: The ROM, CPU, stack and interrupt circuit are integrated in the SOC chip, and the storage medium is located outside the SOC chip.

7. An embedded device comprising a ROM, a CPU, a stack, an interrupt circuit, and a storage medium, wherein: The CPU includes a PC register, a parameter register, a RETS register, and a RETI register, wherein the ROM stores parameter generation machine instructions, stack push machine instructions, and replaced functions that are configured to be executed sequentially, the interrupt circuit includes a breakpoint interrupt register, an address comparison circuit, and a control circuit, and the storage medium stores a breakpoint interrupt program and a replacement function; The parameter generation operation of the CPU: the parameter generation machine instruction is executed by the CPU to generate the transfer parameters temporarily stored in the parameter register, and the PC register is written with the replaced function address; The push operation of the CPU: the push machine instruction is executed by the CPU to write the replaced function address in the PC register into the RETS register, and push the passed parameters in the parameter register and the replaced function address in the RETS register into the stack; Interrupt operation of the interrupt circuit: after the address comparison circuit captures that the replaced function address of the replaced function stored in the breakpoint interrupt register is identical to the address of the PC register, the control circuit is triggered to send an interrupt to the CPU to prevent the replaced function from being executed; after receiving the interrupt, the CPU writes the replaced function address of the PC register into the RETI register and updates the PC register with the address of the breakpoint interrupt program to start executing the breakpoint interrupt program; The breakpoint interrupt processing operation of the CPU: the breakpoint interrupt program is executed by the CPU, the replacement function address of the replacement function is written into the RETI register, and the replacement function address of the RETI register is written into the PC register, so that the replacement function is executed; The replacement function operation of the CPU: the replacement function is executed by the CPU as follows: the passed parameters and the replaced function address in the stack are popped out and saved to the parameter register and the RETS register respectively, and the passed parameters of the parameter register are operated; the replaced function address of the RETS register is taken out, and the replaced function address is increased by the address step to obtain the address of the next machine instruction of the replaced function in the ROM, and the address of the next machine instruction of the replaced function is written into the PC register.

8. The embedded device according to claim 7, wherein: In an interrupt operation of the interrupt circuit, after writing the replaced function address of the PC register into the RETI register, the replaced function address in the RETI register is pushed into a stack; In the breakpoint interrupt processing operation of the CPU, the RETI register is written with the replacement function address of the replacement function, specifically including: Popping the replaced function address from the stack and saving it to the RETI register; Modify the replaced function address in the RETI register to the replacement function address of the replacement function; Pushing the replacement function address in the RETI register into the stack; The replacement function address in the stack is popped off and saved to the RETI register.

9. The embedded device according to claim 8, characterized in that: The ROM further stores another parameter generating machine instruction, another stacking machine instruction, and another replaced function, wherein the replaced function, the another parameter generating machine instruction, the another stacking machine instruction, and the another replaced function are configured to be executed sequentially; When the breakpoint interruption program is executed in the breakpoint interruption processing operation of the CPU, the breakpoint interruption register is written with another replaced function address of the another replaced function; After the CPU replaces the function operation, a machine instruction, another stacked machine instruction and another replaced function are generated for the other parameter, and the following are executed in sequence: the CPU parameter generation operation, the CPU stacking operation, the interrupt circuit interrupt operation, the CPU breakpoint interrupt processing operation, and the CPU replacement function operation.

10. The embedded device according to claim 8, wherein: The ROM further stores a plurality of program groups, wherein each program group includes another parameter generation machine instruction, another stack push machine instruction, and another replaced function configured to be executed sequentially, and the replaced function and the plurality of program groups are configured to be executed sequentially; When the breakpoint interrupt program is executed in the breakpoint interrupt processing operation of the CPU, searching the replaced function address list for a next program group following the address in the breakpoint interrupt register, and writing another replaced function address of another replaced function in the next program group into the breakpoint interrupt register; After the CPU replaces the function operation, a machine instruction is generated for another parameter in the next program group, another stacked machine instruction and another replaced function are executed in sequence: the CPU parameter generation operation, the CPU stacking operation, the interrupt circuit interrupt operation, the CPU breakpoint interrupt processing operation, and the CPU replacement function operation.

11. The embedded device according to claim 8, wherein: The interrupt circuit includes a breakpoint interrupt register group, and the breakpoint interrupt register group includes a plurality of breakpoint interrupt registers; the ROM further stores a plurality of program groups, wherein each program group includes another parameter generation machine instruction, another stack push machine instruction, and another replaced function configured to be executed sequentially, and when different conditions are met during the execution of the program group consisting of the parameter generation machine instruction, the stack push machine instruction, and the replaced function, a corresponding program group is switched to be executed; When the breakpoint interrupt program is executed during the breakpoint interrupt processing operation of the CPU, searching the replaced function address list for multiple program groups that may be executed after the address in the breakpoint interrupt register of the control circuit is triggered, and writing another replaced function address of another replaced function in the multiple program groups into the multiple breakpoint interrupt registers respectively; After the CPU replaces the function operation, when the execution condition of a certain program group is met, a machine instruction, another stacked machine instruction and another replaced function are generated for another parameter in the certain program group, and the following are executed in sequence: the parameter generation operation of the CPU, the stacking operation of the CPU, the interrupt operation of the interrupt circuit, the breakpoint interrupt processing operation of the CPU, and the replacement function operation of the CPU.

12. The embedded device according to any one of claims 7 to 11, characterized in that: The ROM, CPU, stack and interrupt circuit are integrated in the SOC chip, and the storage medium is located outside the SOC chip.

Images