Image sensor and method of manufacturing the same
By incorporating shallow trenches, deep trenches, and sidewall isolation layers into the image sensor, the crosstalk problem between adjacent pixel units is resolved, thereby improving the performance of the image sensor.
Patent Information
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- NEXCHIP SEMICON CO LTD
- Filing Date
- 2023-03-31
- Publication Date
- 2026-04-24
AI Technical Summary
In existing image sensors, crosstalk exists between adjacent pixel units, affecting the pixel performance of the image sensor.
By setting shallow trench isolation structures, deep trench isolation structures, and sidewall isolation layers in the substrate, a multilayer oxide layer is formed, and an isolation layer is set between the photoelectric sensing areas to prevent crosstalk.
This effectively prevents crosstalk between adjacent photoelectric sensing areas, thus improving the performance of the image sensor.
Smart Images

Figure CN116314229B_ABST
Abstract
Description
Technical Field
[0001] This invention belongs to the field of semiconductor manufacturing technology, and specifically relates to an image sensor and its manufacturing method. Background Technology
[0002] Image sensors are devices that convert light signals into electrical signals and are widely used in fields such as photography, security systems, smartphones, fax machines, scanners, and medical electronics.
[0003] With the continuous development of integrated circuits, the requirements for pixel performance in image sensors are becoming increasingly stringent. To avoid crosstalk between adjacent pixel units, trench isolation structures are set between them. However, crosstalk still exists between adjacent pixel units. Summary of the Invention
[0004] The purpose of this invention is to provide an image sensor and its manufacturing method. The image sensor provided by this invention can solve the problem of crosstalk between adjacent pixel units and form a high-quality image sensor.
[0005] To solve the above-mentioned technical problems, the present invention is achieved through the following technical solution:
[0006] This invention provides an image sensor, comprising at least:
[0007] A substrate having opposing first and second surfaces;
[0008] A shallow trench isolation structure extends from the second surface into the substrate;
[0009] A bottom isolation layer is disposed in the substrate, the bottom isolation layer being located on the side of the shallow trench isolation structure near the first surface;
[0010] Multiple photosensitive areas are disposed in the substrate, and the photosensitive areas are located on the side of the bottom isolation layer near the first surface;
[0011] A deep trench isolation structure extends from the first surface into the substrate, and a bottom isolation layer is located between the deep trench isolation structure and the shallow trench isolation structure. The deep trench isolation structure and the shallow trench isolation structure are correspondingly disposed, and the deep trench isolation structure is located between adjacent photosensitive areas; and
[0012] A sidewall isolation layer is located between the photoelectric sensing area and the deep trench isolation structure.
[0013] In some embodiments of the present invention, the image sensor further includes a bottom isolation oxide layer disposed in the substrate and located between the shallow trench isolation structure and the bottom isolation layer.
[0014] In some embodiments of the present invention, the image sensor further includes a sidewall isolation oxide layer, which is located between the photoelectric sensing area and the sidewall isolation layer.
[0015] In some embodiments of the present invention, the image sensor further includes a pad oxide layer disposed on the first surface of the substrate.
[0016] In some embodiments of the present invention, the image sensor further includes a multilayer oxide layer disposed on the pad oxide layer.
[0017] In some embodiments of the present invention, the image sensor further includes:
[0018] A grid is disposed on the multilayer oxide layer;
[0019] A color filter structure is disposed on the multilayer oxide layer, and the color filter structure is located between adjacent grids; and
[0020] A microlens structure is disposed on the color filter structure.
[0021] In some embodiments of the present invention, the multilayer oxide layer includes:
[0022] An aluminum oxide layer is disposed on the pad oxide layer;
[0023] A tantalum oxide layer is disposed on the alumina layer; and
[0024] A silicon oxide layer is disposed on the tantalum oxide layer.
[0025] This invention also provides a method for manufacturing an image sensor, comprising the following steps:
[0026] A substrate is provided, the substrate having opposing first and second surfaces;
[0027] A shallow trench isolation structure is formed on the substrate, and the shallow trench isolation structure extends from the second surface into the substrate;
[0028] Ions are implanted into the substrate to form a bottom isolation layer, and the bottom isolation layer is located on the side of the shallow trench isolation structure closer to the first surface;
[0029] Ions are implanted into the substrate to form a photosensitive region, and the photosensitive region is located on the side of the bottom isolation layer near the first surface;
[0030] A deep trench isolation structure is formed on the substrate, the deep trench isolation structure extending from the first surface into the substrate, and a bottom isolation layer is located between the deep trench isolation structure and the shallow trench isolation structure. The deep trench isolation structure and the shallow trench isolation structure are correspondingly disposed, and the deep trench isolation structure is located between adjacent photosensitive areas; and
[0031] A sidewall isolation layer is formed between the photoelectric sensing area and the deep trench isolation structure.
[0032] In some embodiments of the present invention, the method for manufacturing the image sensor further includes the following steps:
[0033] Oxygen ions are implanted into the substrate to form an oxygen-containing layer, and the oxygen-containing layer is located between the shallow trench isolation structure and the bottom isolation layer;
[0034] After annealing, the oxygen ions react with the substrate to form a bottom insulating oxide layer.
[0035] In some embodiments of the present invention, forming the sidewall isolation layer includes the following steps:
[0036] The substrate is etched to form deep trenches;
[0037] An intermediate layer containing boron ions is formed on the sidewall of the deep trench; and
[0038] After annealing, the boron ions in the intermediate layer form the sidewall isolation layer.
[0039] In some embodiments of the present invention, during the formation of the sidewall isolation layer, oxygen is introduced during the annealing process, and silicon ions in the intermediate layer and the substrate react with the oxygen to form a sidewall isolation oxide layer on the sidewall of the deep trench.
[0040] In summary, the image sensor and its manufacturing method provided by this invention can prevent crosstalk between adjacent photoelectric sensing areas, thereby improving the performance of the image sensor.
[0041] Of course, any product implementing this invention does not necessarily need to achieve all of the advantages described above at the same time. Attached Figure Description
[0042] To more clearly illustrate the technical solutions of the embodiments of the present invention, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.
[0043] Figure 1 This is a circuit diagram of an image sensor according to one embodiment of the present invention.
[0044] Figure 2 This is a schematic diagram of a structure in which a metal layer is formed on the second surface of a substrate in one embodiment of the present invention.
[0045] Figure 3 This is a schematic diagram of a structure in which an oxygen-containing layer and a bottom isolation layer are formed in a substrate according to an embodiment of the present invention.
[0046] Figure 4 This is a schematic diagram of a photoelectric sensing region formed in a substrate according to an embodiment of the present invention.
[0047] Figure 5 This is a schematic diagram of a structure in which a pad oxide layer is formed on the first surface of a substrate in one embodiment of the present invention.
[0048] Figure 6 This is a schematic diagram of a patterned photoresist layer formed on a pad oxide layer in one embodiment of the present invention.
[0049] Figure 7 This is a schematic diagram of a deep trench formed in a substrate according to an embodiment of the present invention.
[0050] Figure 8 This is a schematic diagram of the structure of depositing an intermediate layer on the sidewall of a deep trench in one embodiment of the present invention.
[0051] Figure 9 This is a schematic diagram of the structure forming a sidewall isolation layer and a sidewall isolation oxide layer in one embodiment of the present invention.
[0052] Figure 10 This is a schematic diagram of a deep trench isolation structure in one embodiment of the present invention.
[0053] Figure 11 This is a schematic diagram of the structure forming a multilayer oxide layer in one embodiment of the present invention.
[0054] Figure 12 This is a schematic diagram of the structure forming the grating and color filter structure in one embodiment of the present invention.
[0055] Figure 13 This is a schematic diagram of the microlens structure formed in one embodiment of the present invention.
[0056] Label Explanation:
[0057] 101. Substrate; 1001. First surface; 1002. Second surface; 1003. Layer to be doped; 1011. Deep trench; 102. Second trench isolation structure; 103. Etch stop layer; 1031. First etch stop layer; 1032. Second etch stop layer; 104. Connection structure; 105. Interlayer dielectric layer; 106. Metal layer; 1071. Oxide-containing layer; 1072. Bottom isolation oxide layer; 1081. Bottom isolation layer; 1082. Sidewall isolation layer; 109. Photosensitive area; 1101. Pad oxide layer; 1102. Sidewall isolation oxide layer; 111. Patterning Photoresist layer; 1111, opening; 112, intermediate layer; 113, first trench isolation structure; 114, oxide layer; 1141, aluminum oxide layer; 1142, tantalum oxide layer; 1143, silicon oxide layer; 115, grid; 1151, first section; 1152, second section; 116, color filter structure; 1161, red filter; 1162, green filter; 1163, blue filter; 117, microlens structure; PD, photodiode; M1, transmission transistor; M2, reset transistor; M3, source follower; M4, row select transistor; ADC, analog-to-digital converter. Detailed Implementation
[0058] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.
[0059] Please see Figure 1 As shown, the image sensor includes a pixel array and a logic control area. The pixel array contains multiple photodiodes (PDs) arranged in an array, each PD forming a pixel unit. Multiple PDs together form the pixel array. The scene is focused onto the pixel array of the image sensor by an imaging lens. The PDs convert the light intensity of the surface into electrical signals and store them. The logic control area includes multiple logic control devices, such as a transfer transistor M1, a reset transistor M2, a source follower M3, and a row select transistor M4. The connection relationships of the transfer transistor M1, reset transistor M2, source follower M3, and row select transistor M4 are as follows: Figure 1As shown. Transmission transistor M1 controls whether photodiode PD performs photoelectric conversion, and simultaneously effectively reduces pixel thermal noise and dark current. Source follower M3 acts as a buffer amplifier, isolating the column bus with large parasitic capacitance and subsequent readout circuit from the pixel sensitive node. During photoelectric conversion, firstly, enable signal sel controls the switching of row select transistor M4, and enable signal sel also serves as the counting signal for a counter. When the level of enable signal sel changes, the counter starts counting. When the value of the timer equals the value of the corresponding register in the circuit, the reset signal rst is pulled up. The image sensor is reset by activating the reset signal rst, and then the reset information is quantized by the analog-to-digital converter (ADC). After quantization, the integrated signal of photodiode PD in the image sensor is read by activating the read signal tx transistor. Finally, the integrated signal is quantized by the ADC and subtracted from the reset signal rst to complete signal reading.
[0060] Please see Figures 2 to 13 As shown, the present invention provides an image sensor, the image sensor including a substrate 101, and the substrate 101 having a first surface 1001 and a second surface 1002 opposite to each other. A shallow trench isolation structure is provided on the second surface 1002 of the substrate 101, and a deep trench isolation structure is provided on the first surface 1001 of the substrate 101, with the shallow trench isolation structure and the deep trench isolation structure corresponding to each other. On the side near the first surface 1001 of the substrate 101, a plurality of photosensitive areas 109 are also provided, and the photosensitive areas 109 are located between adjacent deep trench isolation structures. An isolation layer is provided on the side of the photosensitive areas 109 near the shallow trench isolation structure, and between each photosensitive area 109 and the deep trench isolation structure. Figure 2 , Figures 11 to 13 As shown, a multilayer oxide layer 114 is further disposed on the first surface 1001 of the substrate 101. A color filter structure 116 and a microlens structure 117 are also disposed on the oxide layer 114.
[0061] Please see Figure 2As shown, in one embodiment of the present invention, the substrate 101 provided by the present invention can be any applicable semiconductor material, such as silicon carbide (SiC), gallium nitride (GaN), aluminum nitride (AlN), indium nitride (InN), germanium silicide (GeSi), sapphire, or silicon wafers, etc., and also includes a stacked structure composed of these semiconductors, or silicon-on-insulator, silicon-on-insulator stacked, silicon-on-insulator stacked, silicon-on-insulator, and germanium-on-insulator, etc., which can be selected according to the fabrication requirements of the image sensor. In this embodiment, the substrate 101 is, for example, a silicon substrate, which can be an undoped substrate or a doped substrate. In this embodiment, the substrate 101 is, for example, a P-type silicon substrate. In this application, the thickness of the substrate 101 is, for example, 3 μm. For ease of description, as... Figure 3 As shown, the side of the substrate 101 where the photoelectric sensing area 109 is disposed is defined as the first surface 1001, and the side opposite to the first surface 1001 is defined as the second surface 1002.
[0062] Please see Figure 2 and Figure 11 As shown, in one embodiment of the present invention, a trench isolation structure is provided in the substrate 101, and includes a first trench isolation structure 113 (e.g., Figure 10 (As shown) and the second trench isolation structure 102. The first trench isolation structure 113 extends from the first surface 1001 of the substrate 101 into the substrate 101, and the second trench isolation structure 102 extends from the second surface 1002 of the substrate 101 into the substrate 101. In this application, the first trench isolation structure 113 is a deep trench isolation structure, and the depth of the first trench isolation structure 113 is greater than half the thickness of the substrate 101. The second trench isolation structure 102 is a shallow trench isolation structure, and the depth of the second trench isolation structure 102 is less than one-third the thickness of the substrate 101. Specifically, the depth of the first trench isolation structure 113 is, for example, 2.2 μm, 2.4 μm, or 2.6 μm, and the depth of the second trench isolation structure 102 is, for example, 0.3 μm, 0.5 μm, or 0.8 μm. In this application, the first trench isolation structure 113 and the second trench isolation structure 102 are correspondingly arranged, that is, the center lines of the first trench isolation structure 113 and the second trench isolation structure 102 in the depth direction are located on the same straight line. The bottom of the first trench isolation structure 113 and the bottom of the second trench isolation structure 102 have a preset distance, and the preset distance is in the range of 10nm~20nm.
[0063] Please see Figure 2As shown, in one embodiment of the present invention, when forming an image sensor, the second surface 1002 of the substrate 101 is first etched to form multiple shallow trenches (not shown in the figure). Specifically, a photoresist layer (not shown in the figure) can be formed on the second surface 1002 of the substrate 101, and a patterned photoresist layer can be formed through processes such as exposure and development. The patterned photoresist layer can define the location of the shallow trenches. Then, using the patterned photoresist layer as a mask, a portion of the substrate 101 located under the patterned photoresist layer is quantitatively removed using etching methods such as dry etching, wet etching, or a combination of dry and wet etching to obtain shallow trenches. After forming the shallow trenches, an isolation medium is deposited in the shallow trenches, and the isolation medium is, for example, an insulating material such as silicon oxide. The top of the isolation medium is then planarized using a planarization process such as Chemical Mechanical Polishing (CMP) to form multiple second trench isolation structures 102.
[0064] Please see Figure 2 As shown, in one embodiment of the present invention, after forming the second trench isolation structure 102, an etch stop layer 103 is formed on the second surface 1002 of the substrate 101, a dielectric layer 105 is formed on the etch stop layer 103, and a metal layer 106 is formed on the dielectric layer 105.
[0065] For details, please refer to Figure 2 As shown, in one embodiment of the present invention, silicon oxide (SiO2) or silicon carbonitride (SiCN) can be deposited as an etch stop layer 103 on the second surface 1002 of the substrate 101 and the surface of the second trench isolation structure 102 using chemical vapor deposition (CVD). In some embodiments, at least two or more etch stop layers 103 can be formed on the second surface 1002 of the substrate 101. In this embodiment, two etch stop layers 103 are formed on the second surface 1002 of the substrate 101, including a first etch stop layer 1031 and a second etch stop layer 1032. Forming at least two etch stop layers 103 on the second surface 1002 of the substrate 101 can prevent cracks from forming in the etch stop layers 103. When at least two etch stop layers 103 are deposited, the etch stop layer 103 deposited in the later deposition can seal the cracks in the etch stop layer 103 deposited in the previous deposition, avoiding the formation of cracks that could affect the metal layer 106.
[0066] Please see Figure 2As shown, in some embodiments of the present invention, after forming the first etch stop layer 1031 and the second etch stop layer 1032, the second etch stop layer 1032 is etched and metal is deposited to form a partial connection structure 104. An interlayer dielectric layer 105 is formed on the etch stop layer 103 and the connection structure 104, covering the etch stop layer 103. In this embodiment, the interlayer dielectric layer 105 can be formed on the etch stop layer 103 and the connection structure 104, for example, by high-density plasma chemical vapor deposition. The material of the interlayer dielectric layer 105 can be silicon oxide. Multiple openings are formed in the interlayer dielectric layer 105, and conductive material is deposited in the openings, for example, by depositing metal material, such as titanium / titanium nitride and tungsten metal, into the openings through a deposition process, thereby forming another partial connection structure 104. A metal layer 106 is formed on the interlayer dielectric layer 105. In other embodiments, two or more metal layers 106 may be provided, and adjacent metal layers 106 are isolated by a dielectric layer 105 and connected by a connection structure 104.
[0067] Please see Figures 2 to 3 As shown, in one embodiment of the present invention, after forming a multilayer metal layer on the second surface 1002 of the substrate 101, a first ion is implanted into the substrate 101 from the first surface 1001 to form an oxygen-containing layer 1071. Then, a second ion is implanted into the substrate 101 from the first surface 1001 to form a bottom isolation layer 1081. Specifically, the first ion can be implanted into the substrate 101 first to form the oxygen-containing layer 1071. The first ion is, for example, an oxygen ion. The oxygen-containing layer 1071 is in contact with the bottom of the second trench isolation structure 102, and the thickness of the oxygen-containing layer 1071 ranges from 5 nm to 10 nm. Next, the second ion is implanted into the substrate 101 to form the bottom isolation layer 1081. The second ion is, for example, a boron ion. The bottom isolation layer 1081 is located on the oxygen-containing layer 1071, and the thickness of the bottom isolation layer 1081 ranges from 5 nm to 10 nm.
[0068] Please see Figure 2 , Figures 3 to 4As shown, in one embodiment of the present invention, after forming an oxygen-containing layer 1071 and a bottom isolation layer 1081, a third ion is implanted into the substrate 101 from the first surface 1001 to form a photosensitive region 109. The photosensitive region 109 forms a photodiode PD, which can convert light signals into electrical signals. One side of the photosensitive region 109 is in contact with the first surface 1001 of the substrate 101, and the other side is in contact with the bottom isolation layer 1081. This application does not limit the type of ions implanted into the substrate 101 when forming the photosensitive region 109, as long as the desired device is formed. In this embodiment, the substrate 101 is P-type, so the ions implanted into the substrate 101 are, for example, N-type ions. Specifically, the implanted ions can be ions with five valence electrons, such as phosphorus ions or arsenic ions. When a phosphorus ion replaces a silicon atom, it provides a negatively charged electron to the valence band of the crystal, thereby forming the photosensitive region 109 of an N-type photodiode. In other embodiments, when the substrate 101 is N-type, P-type ions can be implanted into the substrate 101 to form the photosensitive region 109 of the P-type photodiode. During the formation of the photosensitive region 109, in order to ensure the quality and shape of the photosensitive region formed after ion implantation, multiple ion implantations at different angles can be performed to form the photosensitive region 109 that conforms to the preset pattern.
[0069] Please see Figure 2 , Figures 4 to 5 As shown, in one embodiment of the present invention, after forming the photosensitive region 109, a pad oxide layer 1101 is formed on the first surface 1001 of the substrate 101. Specifically, a layer of silicon oxide (SiO2) can be deposited on the first surface 1001 of the substrate 101 to form the pad oxide layer 1101. The pad oxide layer 1101 can protect the substrate 101 from damage when etching the deep trench 1011.
[0070] Please see Figure 2 , Figures 5 to 7As shown, in one embodiment of the present invention, after forming the pad oxide layer 1101, the first surface 1001 of the substrate 101 is etched to form a plurality of deep trenches 1011 on the first surface 1001 of the substrate 101. Specifically, a patterned photoresist layer 111 is first formed on the pad oxide layer 1101. The patterned photoresist layer 111 has openings 1111, and the openings 1111 define the positions of the deep trenches 1011. Then, using the patterned photoresist layer 111 as a mask, a portion of the substrate 101 located under the patterned photoresist layer 111 is quantitatively removed using etching methods such as dry etching, wet etching, or a combination of dry and wet etching to obtain the deep trenches 1011. In this application, the openings 1111 are located between adjacent photosensitive areas 109, and the edges of the openings 1111 are at a predetermined distance from the photosensitive areas 109. After etching the substrate 101 to form a deep trench 1011, the undoped portion of the substrate 101 between the deep trench 1011 and the photosensitive area 109 is retained to form a doped layer 1003.
[0071] Please see Figures 7 to 8 As shown, in one embodiment of the present invention, after forming the deep trench 1011, an intermediate layer 112 is formed on the sidewall of the deep trench 1011. Specifically, a boron-containing material can be deposited on the sidewall of the deep trench 1011 to form the intermediate layer 112 using solid-phase diffusion. The deposited material may include boron (B) or boron silicide (SiB). When deposited by solid-phase diffusion, the deposited material diffuses into the doped layer 1003 between the deep trench 1011 and the photosensitive region 109, and the doped layer 1003 and the deposited boron-containing material together form the intermediate layer 112.
[0072] Please see Figures 8 to 9 As shown, in one embodiment of the present invention, after forming the intermediate layer 112, the formed structure is annealed, and oxygen is introduced during the annealing process. During the annealing process, oxygen ions in the oxygen-containing layer 1071 react with the substrate 101 to form a bottom isolation oxide layer 1072. Simultaneously, boron ions in the intermediate layer 112 form a sidewall isolation layer 1082, and silicon ions precipitated from the intermediate layer 112 and silicon ions in the substrate 101 react with oxygen to generate a layer of silicon oxide (SiO2) on the surface of the deep trench 1011, forming a sidewall isolation oxide layer 1102. In this application, the annealing temperature is, for example, 350°C to 450°C, and the annealing time is, for example, 25 mins to 35 mins.
[0073] Please see Figures 9 to 10As shown, in one embodiment of the present invention, after annealing, an insulating medium is deposited in the deep trench 1011. The insulating medium is, for example, an insulating material such as silicon oxide. After depositing the insulating medium in the deep trench 1011, the top of the insulating medium can be ground flat by a planarization process such as chemical mechanical polishing (CMP) to form a plurality of first trench isolation structures 113.
[0074] Please see Figures 10 to 11 As shown, in one embodiment of the present invention, after forming the first trench isolation structure 113, a multilayer oxide layer 114 is deposited on the pad oxide layer 1101 and the deep trench isolation structure. In this application, the multilayer oxide layer 114 includes an aluminum oxide layer 1141, a tantalum oxide layer 1142, and a silicon oxide layer 1143. The aluminum oxide layer 1141 is disposed on the pad oxide layer 1101 and the deep trench isolation structure, the tantalum oxide layer 1142 is disposed on the aluminum oxide layer 1141, and the silicon oxide layer 1143 is disposed on the tantalum oxide layer 1142.
[0075] Please see Figure 2 , Figures 9 to 11 As shown, in this invention, a bottom isolation layer 1081 and a bottom isolation oxide layer 1072 are provided on the side of the photosensitive area 109 near the second surface 1002. A sidewall isolation layer 1082 and a sidewall isolation oxide layer 1102 are provided between adjacent photosensitive areas 109, i.e., between the photosensitive area 109 and the deep trench isolation structure. A multilayer oxide layer 114 is provided on the side of the photosensitive area near the first surface 1001. A complete multilayer isolation is formed around the photosensitive area 109, thereby preventing crosstalk between adjacent photosensitive areas 109.
[0076] Please see Figure 2 , Figures 11 to 12 As shown, in one embodiment of the present invention, after forming a multilayer oxide layer 114, a grid 115 is formed on the oxide layer 114. In this application, the orthographic projection of the grid 115 onto the first surface 1001 of the substrate 101 is located in the region where the deep trench isolation structure is located. In this application, the grid 115 includes a first portion 1151 close to the oxide layer 114 and a second portion 1152 away from the oxide layer 114. The first portion 1151 is made of aluminum, and the second portion 1152 is made of silicon oxide.
[0077] Please see Figure 11 and Figure 12As shown, in one embodiment of the present invention, after forming the grid 115, a color filter structure 116 is formed on the oxide layer 114 between adjacent grids 115, and the color filter structure 116 is located on the photoelectric sensing area 109. The color filter structure 116 includes multiple color filters, which form a color filter array. Each color filter corresponds to the photoelectric sensing area 109 of a photodiode PD. In this application, the color filter structure 116 may include at least three primary color filters, such as a red filter 1161, a green filter 1162, and a blue filter 1163, and they can be arranged in any suitable combination. For example, the red filter 1161, green filter 1162, and blue filter 1163 can be arranged alternately. Alternatively, a transparent filter can be provided, and the red filter 1161, green filter 1162, blue filter 1163, and a transparent filter can be arranged alternately. The color filter can be a polymer material, such as a negative photoresist based on an acrylic polymer, and may contain colored dyes. After forming the grid 115, the color filter can be directly vacuum-deposited on the oxide layer 114 between the grids 115. When light passes through the color filter, its color can be changed, maintaining high transmittance in a certain wavelength band (color), thereby enhancing the photoelectric conversion effect.
[0078] Please see Figures 12 to 13 As shown, in one embodiment of the present invention, after forming the color filter structure 116, a microlens structure 117 is formed on the color filter structure 116. The microlens structure 117 is disposed on the color filter structure 116. The refractive index of the microlens structure 117 can be appropriately varied according to the optical requirements of the image sensor. The microlens structure 117 can focus light onto the photodiode PD, and the curvature of the surface of the microlens structure 117 can be changed according to the light focusing requirements. The material of the microlens structure 117 can be resin. After forming the color filter structure 116, the microlens structure 117 can be formed on the color filter through a reflow soldering process. The number of photodiodes and color filter structures can be set according to actual needs; the figures in this application are only examples.
[0079] In summary, this invention provides an image sensor and its fabrication method. In forming the image sensor, a shallow trench isolation structure is first formed on the second surface of a substrate. An etch stop layer, an interlayer dielectric layer, a metal layer, and a connection structure consisting of a connecting metal layer disposed within the interlayer dielectric layer and the etch stop layer are then formed on the second surface of the substrate. Next, multiple ions are implanted sequentially on the first surface of the substrate to form an oxygen-containing layer, a bottom isolation layer, and a photosensitive region. Subsequently, the substrate between the photosensitive regions is etched to form deep trenches, and an intermediate layer is deposited on the sidewalls of the deep trenches. After annealing, a sidewall isolation layer and a sidewall isolation oxide layer are formed on the sides of the photosensitive regions. An isolation dielectric is deposited within the deep trenches to form a deep trench isolation structure. Finally, multiple oxide layers are formed on the first surface of the substrate and the deep trench isolation structure. A grid and a color filter structure are formed on the oxide layers, and a microlens structure is formed on the color filter structure to form the image sensor.
[0080] The embodiments of the present invention disclosed above are merely illustrative of the invention. The embodiments do not exhaustively describe all details, nor do they limit the invention to the specific implementations described. Clearly, many modifications and variations can be made based on the content of this specification. This specification selects and specifically describes these embodiments to better explain the principles and practical applications of the invention, thereby enabling those skilled in the art to better understand and utilize the invention. The invention is limited only by the claims and their full scope and equivalents.
Claims
1. An image sensor, characterized in that, At least including: A substrate having opposing first and second surfaces; A shallow trench isolation structure extends from the second surface into the substrate; A bottom isolation layer is disposed in the substrate, the bottom isolation layer being located on the side of the shallow trench isolation structure near the first surface; A bottom isolation oxide layer is disposed in the substrate and located between the shallow trench isolation structure and the bottom isolation layer; when forming the bottom isolation layer, oxygen ions are implanted into the substrate to form an oxygen-containing layer, and the oxygen-containing layer is located between the shallow trench isolation structure and the bottom isolation layer; After annealing, the oxygen ions react with the substrate to form the bottom isolation oxide layer; Multiple photosensitive areas are disposed in the substrate, and the photosensitive areas are located on the side of the bottom isolation layer near the first surface; A deep trench isolation structure extends from the first surface into the substrate, and the bottom isolation layer is located between the deep trench isolation structure and the shallow trench isolation structure. The deep trench isolation structure and the shallow trench isolation structure are correspondingly arranged, and the deep trench isolation structure is located between adjacent photosensitive areas. as well as A sidewall isolation layer is located between the photoelectric sensing area and the deep trench isolation structure.
2. The image sensor according to claim 1, characterized in that, The image sensor also includes a sidewall isolation oxide layer, which is located between the photoelectric sensing area and the sidewall isolation layer.
3. The image sensor according to claim 1, characterized in that, The image sensor also includes a pad oxide layer disposed on the first surface of the substrate.
4. The image sensor according to claim 3, characterized in that, The image sensor also includes a multilayer oxide layer disposed on the pad oxide layer.
5. The image sensor according to claim 4, characterized in that, The image sensor also includes: A grid is disposed on the multilayer oxide layer; A color filter structure is disposed on the multilayer oxide layer, and the color filter structure is located between adjacent grids; and A microlens structure is disposed on the color filter structure.
6. The image sensor according to claim 4, characterized in that, The multilayer oxide layer includes: An aluminum oxide layer is disposed on the pad oxide layer; A tantalum oxide layer is disposed on the alumina layer; and A silicon oxide layer is disposed on the tantalum oxide layer.
7. A method for manufacturing an image sensor, characterized in that, Includes the following steps: A substrate is provided, the substrate having opposing first and second surfaces; A shallow trench isolation structure is formed on the substrate, and the shallow trench isolation structure extends from the second surface into the substrate; Ions are implanted into the substrate to form a bottom isolation layer, and the bottom isolation layer is located on the side of the shallow trench isolation structure closer to the first surface; Oxygen ions are implanted into the substrate to form an oxygen-containing layer, and the oxygen-containing layer is located between the shallow trench isolation structure and the bottom isolation layer; After annealing, the oxygen ions react with the substrate to form a bottom insulating oxide layer; Ions are implanted into the substrate to form a photosensitive region, and the photosensitive region is located on the side of the bottom isolation layer near the first surface; A deep trench isolation structure is formed on the substrate, the deep trench isolation structure extends from the first surface into the substrate, and the bottom isolation layer is located between the deep trench isolation structure and the shallow trench isolation structure. The deep trench isolation structure and the shallow trench isolation structure are correspondingly arranged, and the deep trench isolation structure is located between adjacent photosensitive areas. as well as A sidewall isolation layer is formed between the photoelectric sensing area and the deep trench isolation structure.
8. The method for manufacturing an image sensor according to claim 7, characterized in that, Forming the sidewall isolation layer includes the following steps: The substrate is etched to form deep trenches; An intermediate layer containing boron ions is formed on the sidewall of the deep trench; and After annealing, the boron ions in the intermediate layer form the sidewall isolation layer.
9. The method for manufacturing an image sensor according to claim 8, characterized in that, During the formation of the sidewall isolation layer, oxygen is introduced during the annealing process, and silicon ions in the intermediate layer and the substrate react with the oxygen to form a sidewall isolation oxide layer on the sidewall of the deep trench.
Citation Information
Patent Citations
Method for improving performance of backside illuminated infrared image sensor
CN105428379A
Back-illuminated image sensor and forming method thereof
CN109037255A
Image sensor device and method for forming same
CN109768056A
Semiconductor structure, preparation method thereof and image sensor
CN115483238A