Cmos image sensor and method of manufacturing the same

By first injecting carbon ions into the CMOS image sensor to create crystal defects and capture fluoride ions, the problem of fluoride ion diffusion caused by high-temperature annealing is solved, dark current characteristics are improved, and the performance of the image sensor is enhanced.

CN116314233BActive Publication Date: 2025-11-04SHANGHAI HUALI MICROELECTRONICS CORP
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Patent Information

Application Number
CN202310465646.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-04-26
Publication Date
2025-11-04
Estimated Expiration
2043-04-26

AI Technical Summary

Technical Problem

High-temperature annealing processes cause fluoride ions to diffuse in CMOS image sensors, reducing the fluoride ion concentration, affecting the dark current improvement effect, and resulting in a decrease in image quality.

Method used

Before fluoride ion implantation, carbon ions are first implanted to create crystal defects. These defects are used to capture fluoride ions. After high-temperature annealing, fluoride ions are left behind to ensure that the fluoride ion concentration does not decrease.

Benefits of technology

By pre-implanting carbon ions, the concentration of fluoride ions remaining after annealing is increased, which effectively improves dark current characteristics and enhances the quality of the image sensor.

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Abstract

The application discloses a CMOS image sensor and a manufacturing method thereof, and belongs to the technical field of semiconductor manufacturing. The manufacturing method of the CMOS image sensor comprises the following steps: providing a substrate, wherein the substrate is provided with a source-drain region for forming a MOS tube; injecting carbon ions with a first predetermined dose into a first ion injection area in the range of the source-drain region, and then injecting fluorine ions with a second predetermined dose into a second ion injection area in the range of the source-drain region, wherein the first ion injection area and the second ion injection area at least partially overlap. By sequentially injecting carbon ions and fluorine ions into the source-drain region of the MOS tube, the characteristics that crystal defects are generated after carbon ion injection are utilized, and the crystal defects are used to capture fluorine ions, so that the fluorine ions remaining in the source-drain region after annealing are guaranteed, and the dark current characteristics are effectively improved.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of semiconductor manufacturing, and in particular to a CMOS image sensor and a manufacturing method thereof. BACKGROUND

[0002] Recently, there is a sharp increase in the demand for high-resolution complementary metal-oxide-semiconductor (CMOS) image sensors. However, as the pixel size is continuously reduced, the quality of the sensor image is gradually degraded, in which the dark current can act as a large noise source, and thus the impact of the dark current gradually increases as the pixel size is reduced, resulting in the degradation of the quality of the sensor image.

[0003] Generally, fluorine ions are implanted to improve the dark current by reducing the trap state density, and the improvement degree of the dark current is 10% to 40%. However, when fluorine is implanted into a silicon wafer, the silicon surface is damaged due to high energy in the ion implantation process, and a process such as annealing or rapid thermal processing (RTP) is required to repair the damaged lattice. When the annealing process is performed at 550°C or higher, fluorine with high electronegativity will bind to silicon at the boundary between the amorphous region and the single crystal region and move to the silicon surface along the epitaxial growth direction, that is, part of the implanted fluorine diffuses to the silicon surface and eventually disappears, and the concentration of the fluorine ions is greatly discounted from the expected, thereby resulting in a limited improvement effect on the dark current. SUMMARY

[0004] The present application aims to provide a CMOS image sensor and a manufacturing method thereof to solve the problem that the concentration of fluorine ions is reduced due to the annealing process.

[0005] To solve the above technical problem, the present application provides a CMOS image sensor and a manufacturing method thereof, comprising the following steps:

[0006] A substrate is provided, and the substrate has a source-drain region for forming a MOS tube;

[0007] A first predetermined dose of carbon ions is implanted in a first ion implantation region within the range of the source-drain region, and then a second predetermined dose of fluorine ions is implanted in a second ion implantation region within the range of the source-drain region, wherein the first ion implantation region and the second ion implantation region at least partially overlap.

[0008] Preferably, an annealing process is performed after the second predetermined dose of fluorine ions is implanted into the source-drain region to improve the lattice defects.

[0009] Preferably, the temperature of the annealing process is 750°C to 850°C.

[0010] Preferably, the first predetermined dose is 4 to 6 times the second predetermined dose.

[0011] Preferably, the first predetermined dosage is 5 times the second predetermined dosage.

[0012] Preferably, before forming the source-drain region on the substrate: a trench structure is etched on the substrate, and an oxide is deposited in the trench structure to form a shallow trench isolation structure, then ions of the first conductivity type are implanted into the substrate to form a well region, polysilicon is deposited on the well region and etched to form a gate.

[0013] Preferably, after forming the gate, ions of the second conductivity type are further implanted into the well region to form the source-drain region on both sides of the gate.

[0014] The present application also provides a CMOS image sensor, comprising:

[0015] a substrate having a source-drain region for forming a MOS tube thereon;

[0016] a first ion implantation region within the range of the source-drain region, the first ion implantation region being implanted with a first predetermined dosage of carbon ions;

[0017] a second ion implantation region within the range of the source-drain region, the second ion implantation region being implanted with a second predetermined dosage of fluorine ions, wherein the first ion implantation region and the second ion implantation region at least partially overlap.

[0018] Preferably, the first predetermined dosage is 4-6 times the second predetermined dosage.

[0019] Preferably, the first predetermined dosage is 5 times the second predetermined dosage.

[0020] In the CMOS image sensor and the manufacturing method thereof provided by the present application, by performing a carbon ion implantation prior to fluorine ion implantation, the diffusion reduction mechanism of carbon can be increased through the interaction of carbon and some existing point defects of silicon, i.e. more crystal defects are generated after carbon implantation, and any fluorine remaining after high-temperature annealing is captured by the crystal defects, so that more fluorine ions remain in the area implanted with carbon, i.e. the fluorine ion concentration is greater than that of the fluorine implantation only, thereby improving the dark current characteristics. BRIEF DESCRIPTION OF DRAWINGS

[0021] Figure 1 is a schematic diagram of a substrate and a source-drain region thereon provided by an embodiment of the present application;

[0022] Figure 2 is a schematic diagram after implanting carbon ions provided by an embodiment of the present application;

[0023] Figure 3is a schematic diagram of the CMOS image sensor after the fluorine ion implantation.

[0024] In the figure,

[0025] 1, substrate; 2, well region; 3, drain region; 4, source region; 5, gate; 6, shallow trench isolation structure; 7, first ion implantation region; 8, second ion implantation region. DETAILED DESCRIPTION

[0026] The CMOS image sensor and the manufacturing method thereof provided by the present application will be further described in detail below in combination with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present application will be more apparent. It should be noted that the accompanying drawings are all in a very simplified form and all use non-precise proportions, only for the purpose of facilitating and clearly assisting the description of the embodiments of the present application.

[0027] The inventors have found that after the fluorine ion implantation, the damage caused by the ion implantation can be repaired by an annealing process, but at the same time, part of the fluorine ions will gradually escape to the surface of the silicon wafer and disappear under the action of high temperature, and the effect that can be achieved by the technical means of improving the dark current characteristics by fluorine ions is limited.

[0028] Based on this, the core idea of the present application is to use the interaction of some existing point defects of carbon and silicon. When carbon ions are implanted, more crystal defects will be generated on the surface of the substrate, and the implanted fluorine ions will be captured by the crystal defects. Compared with only implanting fluorine ions, implanting carbon ions can obviously retain more fluorine ions, thereby ensuring the expected effect of fluorine ion implantation and effectively improving the dark current characteristics.

[0029] Specifically, please refer to Figures 1-3 , which is a schematic diagram of an embodiment of the present application. As shown in Figure 1 , a manufacturing method of a CMOS image sensor comprises the following steps:

[0030] A substrate 1 is provided, and the substrate 1 has source-drain regions for forming MOS tubes thereon;

[0031] A first predetermined dose of carbon ions is implanted in a first ion implantation region 7 within the range of the source-drain regions, and a second predetermined dose of fluorine ions is implanted in a second ion implantation region 8 within the range of the source-drain regions, wherein the first ion implantation region 7 and the second ion implantation region 8 at least partially overlap.

[0032] Wherein, referring to Figure 1 , the source-drain region includes a source region 4 and a drain region 3 separately arranged on both sides of the gate 5.

[0033] In one embodiment, a carbon ion implantation step is performed before fluorine ion implantation into the source and drain regions. The carbon diffusion reduction mechanism is enhanced by the interaction between carbon ions and some existing point defects in the substrate 1. That is, after carbon ion implantation, a large number of crystal defects are generated on the surface of the substrate 1. Therefore, after high-temperature annealing, the residual fluorine ions are captured by the crystal defects, thereby ensuring that more fluorine ions remain in the source and drain regions, which can significantly improve the dark current characteristics.

[0034] Specifically, an annealing process is performed after injecting a second predetermined dose of fluorine ions into the source and drain regions to improve lattice defects.

[0035] Specifically, the annealing temperature is 750℃~850℃.

[0036] Understandably, after carbon and fluorine ions are injected into the source and drain regions of the formed MOSFET, a high-temperature annealing process is usually added to improve the damage. During the annealing process, fluorine ions are captured, effectively suppressing their dissipation under high-temperature conditions.

[0037] In one embodiment, the first predetermined dose is 4 to 6 times the second predetermined dose. Specifically, the first predetermined dose is 5 times the second predetermined dose. That is, the dose of implanted carbon ions is 5 times the dose of fluoride ions, so that the fluoride ions can be captured by the formed crystal defects.

[0038] Specifically, before forming the source and drain regions on the substrate 1: a trench structure is etched on the substrate 1, and an oxide is deposited in the trench structure to form a shallow trench isolation structure 6. Then, ions of a first conductivity type are implanted into the substrate 1 to form a well region 2. Polysilicon is deposited on the well region 2 and etched to form a gate 5.

[0039] Specifically, after forming the gate 5, ions of a second conductivity type are implanted in the well region 2 to form the source and drain regions located on both sides of the gate 5.

[0040] As Figure 1 As shown, before carbon ion implantation, the source region 4, drain region 3, gate 5, and shallow trench isolation structure 6 required for the MOS transistor have been formed on the substrate 1.

[0041] The first and second conductivity type ions have different conductivity types; for example, the first conductivity type is P-type, and the second conductivity type is N-type. Therefore, the first conductivity type substrate 1 can be doped with a P-type dopant, such as boron. However, in other embodiments of the present invention, the charge carrier can be a hole, in which case the first conductivity type is N-type, and the corresponding second conductivity type is P-type.

[0042] For example, the substrate 1 is doped with P-type dopant, and is denoted as P-type substrate 1. The shallow trench isolation structure 6 is formed on the P-type substrate 1 by etching and depositing oxide. Then, ions are injected to form N-well and P-well to form PMOS and NMOS, respectively. The gate 5 is formed on the well region 2. Then, photoresist is formed, and corresponding ions are injected to form the source region 4 and the drain region 3 of the PMOS and NMOS, as shown in Figure 1 For example, the substrate 1 is doped with P-type dopant, and is denoted as P-type substrate 1. The shallow trench isolation structure 6 is formed on the P-type substrate 1 by etching and depositing oxide. Then, ions are injected to form N-well and P-well to form PMOS and NMOS, respectively. The gate 5 is formed on the well region 2. Then, photoresist is formed, and corresponding ions are injected to form the source region 4 and the drain region 3 of the PMOS and NMOS, as shown in

[0043] Based on the same inventive concept, the application further provides a CMOS image sensor, as shown in Figure 3 The CMOS image sensor comprises a substrate 1 having a source-drain region for forming MOS transistors; a first ion injection region 7 in the range of the source-drain region, wherein carbon ions of a first predetermined dose are injected; and a second ion injection region 8 in the range of the source-drain region, wherein fluorine ions of a second predetermined dose are injected, wherein the first ion injection region 7 and the second ion injection region 8 at least partially overlap.

[0044] Specifically, the first predetermined dose is 4-6 times the second predetermined dose. The first predetermined dose is 5 times the second predetermined dose.

[0045] As can be seen from the above, in the CMOS image sensor and the manufacturing method thereof provided by the embodiments of the application, to avoid diffusion of fluorine ions in the annealing process, a carbon ion injection is performed before the step of injecting fluorine ions to generate more lattice defects, and the fluorine ions are captured by the defects in the annealing process, so as to be difficult to escape to the surface of the substrate and disappear, thereby effectively ensuring the concentration of residual fluorine ions.

[0046] The above description is only a description of the preferred embodiments of the application, and does not limit the scope of the application in any way. Any modification or modification of the application by a person skilled in the art based on the above disclosure is within the protection scope of the claims.

Claims

1. A method for manufacturing a CMOS image sensor, characterized in that, Includes the following steps: A substrate is provided having source and drain regions for forming a MOS transistor; Utilizing the diffusion reduction mechanism of carbon, a first predetermined dose of carbon ions is implanted into a first ion implantation region within the source-drain region, and then a second predetermined dose of fluorine ions is implanted into a second ion implantation region within the source-drain region. The first ion implantation region and the second ion implantation region at least partially overlap, and the first predetermined dose is 4 to 6 times the second predetermined dose. After implanting the second predetermined dose of fluorine ions into the source-drain region, an annealing process is performed to improve lattice defects.

2. The method for manufacturing a CMOS image sensor as described in claim 1, characterized in that, The annealing process is carried out at a temperature of 750℃~850℃.

3. The method for manufacturing a CMOS image sensor as described in claim 1, characterized in that, The first predetermined dose is 5 times the second predetermined dose.

4. The method for manufacturing a CMOS image sensor as described in claim 1, characterized in that, Before forming the source and drain regions on the substrate: a trench structure is etched on the substrate, and oxide is deposited in the trench structure to form a shallow trench isolation structure. Then, ions of a first conductivity type are implanted into the substrate to form a well region, and polysilicon is deposited on the well region and etched to form a gate.

5. The method for manufacturing a CMOS image sensor as described in claim 4, characterized in that, After the gate is formed, ions of a second conductivity type are implanted in the well region to form the source and drain regions located on both sides of the gate.

6. A CMOS image sensor, characterized in that, The CMOS image sensor is manufactured using the manufacturing method of any one of claims 1-5, the CMOS image sensor comprising: A substrate having source and drain regions for forming a MOS transistor; The first ion implantation region is located within the range of the source and drain regions, and a first predetermined dose of carbon ions is implanted in the first ion implantation region; The second ion implantation region is located within the source / drain region, and a second predetermined dose of fluorine ions is implanted in the second ion implantation region. The first ion implantation region and the second ion implantation region at least partially overlap, and the first predetermined dose is 4-6 times the second predetermined dose.

7. The CMOS image sensor as described in claim 6, characterized in that, The first predetermined dose is 5 times the second predetermined dose.

Citation Information

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