Ethercat slave servo synchronization device, method, electronic device and storage medium

Abstract

The application discloses an EtherCAT slave station servo synchronization device and method, electronic equipment and a storage medium, and relates to the technical field of servo system control. First, a synchronization signal is generated by an ESC chip at a first period, and then a main control chip captures the synchronization signal and performs a servo synchronization operation. The main control chip further comprises a capture timer and a PWM timer. The capture timer captures the synchronization signal at a second period and records a count value as a capture value. The main control chip adjusts the second period of the capture timer according to the capture value to obtain a second updated period, so that the capture timer and the synchronization signal are synchronized. Then, the second updated period is used to adjust a third period of the PWM timer to obtain a third updated period. The PWM timer is reset according to the third updated period to realize synchronization with the capture timer and the synchronization signal. Thus, the application realizes synchronization only by using a timer peripheral with an input capture function, without using an external interrupt, thereby saving resources and achieving good synchronization effect.

Description

Technical Field

[0001] This application relates to the field of servo system control technology, and in particular to an EtherCAT slave servo synchronization device, method, electronic device, and storage medium. Background Technology

[0002] With the continuous development of industrial technology, the requirements for motion control in industrial technology are becoming increasingly stringent. Practical industrial applications demand high precision, high responsiveness, and high real-time performance. Traditional bus communication methods in industrial technology can no longer meet the needs of high-precision synchronous machining applications. EtherCAT, a real-time Ethernet bus, is increasingly widely used in the industrial automation market due to its advantages such as high communication speed, stable performance, low cost, and ease of expansion.

[0003] To achieve multi-axis synchronization in EtherCAT bus servos, the various operations and synchronization signals of the servo need to be synchronized. In related technologies, CPLD / FPGA is usually used to achieve synchronization, but this increases the cost of development and materials. Alternatively, a general-purpose MCU can be used to achieve synchronization through external interrupts, but this adds additional interrupt overhead, and the delay of the MCU entering the interrupt is not fixed, resulting in limited synchronization effect. Summary of the Invention

[0004] This application aims to at least solve one of the technical problems existing in the prior art. To this end, embodiments of this application provide an EtherCAT slave servo synchronization device, method, electronic device, and storage medium that can achieve high synchronization performance without the need for external interrupts, saving resources.

[0005] In a first aspect, embodiments of this application provide an EtherCAT slave servo synchronization device, applied to a master station system and a slave station system, wherein the master station system is communicatively connected to one or more of the slave station systems, comprising:

[0006] The slave system is equipped with an ESC chip, which is used to generate a synchronization signal in a first cycle.

[0007] The master station system is equipped with a master control chip, which is used to capture the synchronization signal and perform servo synchronization operation on the slave station system according to the synchronization signal; the master control chip also includes a capture timer and a PWM timer;

[0008] The capture timer is used to capture the synchronization signal in a second cycle and record the count value at the moment of capturing the synchronization signal as the capture value. The main control chip adjusts the second cycle according to the capture value to obtain a second update cycle, so as to realize the synchronization of the capture timer and the synchronization signal.

[0009] The main control chip adjusts the third cycle according to the second update cycle to obtain the third update cycle. The PWM timer is used to reset according to the third update cycle to achieve synchronization with the capture timer and the synchronization signal.

[0010] In some embodiments of this application, the PWM timer is also used to generate an interrupt during the third update cycle to perform a servo operation.

[0011] In some embodiments of this application, the servo operation includes at least one of the following: encoder sampling, loop calculation, and PWM output.

[0012] In some embodiments of this application, the apparatus further includes: a regulator for adjusting the load value of the capture timer according to the capture value to obtain a new load value, so as to adjust the second period to obtain the second update period.

[0013] Secondly, embodiments of this application also provide an EtherCAT slave-servo synchronization method, applied to the EtherCAT slave-servo synchronization device as described in the first aspect of this application, the method comprising:

[0014] When the capture timer captures the synchronization signal, the count value of the capture timer at the moment of capturing the synchronization signal is recorded as the capture value; the count value is any value during the process of the capture timer counting from zero to the load value;

[0015] Based on the captured value and the preset captured value, the second period of the captured timer is adjusted to obtain the second update period, so as to realize the synchronization of the captured timer and the synchronization signal;

[0016] Based on the second update cycle, the third update cycle is obtained by adjusting the third cycle of the PWM timer, so as to realize the synchronization of the PWM timer and the capture timer, and to realize the synchronization of the PWM timer and the synchronization signal.

[0017] In some embodiments of this application, the step of adjusting the second period of the capture timer based on the capture value and a preset capture value to obtain the second update period further includes:

[0018] The difference is obtained by subtracting the captured value from the preset captured value;

[0019] The difference is input into the proportional-integral regulator to obtain the new load value of the capture timer;

[0020] When the captured value is greater than the preset captured value, the obtained new loaded value is greater than the loaded value. Based on the new loaded value, the second period of the captured timer is increased to obtain the second update period.

[0021] When the captured value is less than the preset captured value, the new loaded value is smaller than the loaded value. Based on the new loaded value, the second period of the captured timer is reduced to obtain the second update period.

[0022] In some embodiments of this application, the step of adjusting the third period of the PWM timer based on the second update period to obtain the third update period further includes:

[0023] A reset event is generated after the capture timer counts from zero to the new load value using the second update cycle;

[0024] Based on the reset event, the PWM timer is reset, and the third cycle of the PWM timer is adjusted to obtain the third update cycle.

[0025] In some embodiments of this application, before recording the count value of the capture timer at the moment of capturing the synchronization signal as the capture value when the capture timer captures the synchronization signal, the method further includes:

[0026] Configure the counting period of the PWM timer to be the third period;

[0027] The counting period of the capture timer is configured to be the second period, and the second period is an integer multiple of the third period;

[0028] Configure the PWM timer to initially synchronize with the capture timer;

[0029] The capture timer is checked at a preset query period to see if the synchronization signal has been captured.

[0030] In some embodiments of this application, the PWM timer is in a counting mode of up and down, and an interrupt is generated when the count reaches zero to perform a servo operation.

[0031] Thirdly, embodiments of this application also provide an electronic device, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the EtherCAT slave-servo synchronization method as described in the second aspect of this application.

[0032] Fourthly, embodiments of this application also provide a computer-readable storage medium storing a program that is executed by a processor to implement the EtherCAT slave-servo synchronization method as described in the second aspect of this application.

[0033] The embodiments of this application include at least the following beneficial effects:

[0034] This application provides an EtherCAT slave servo synchronization device, method, electronic device, and storage medium. First, the ESC chip in the slave system generates a synchronization signal in a first cycle. Then, the master control chip in the master system captures the synchronization signal and performs servo synchronization operations on the slave system based on the synchronization signal. The master control chip also includes a capture timer and a PWM timer. The capture timer captures the synchronization signal in a second cycle and records the count value of the capture timer at the moment of capturing the synchronization signal as the capture value. The master control chip adjusts the second cycle of the capture timer according to the capture value to obtain a second update cycle, thereby achieving synchronization between the capture timer and the synchronization signal. Then, the third cycle of the PWM timer is adjusted according to the second update cycle to obtain a third update cycle. The PWM timer is then reset according to the third update cycle to achieve synchronization with the capture timer, thus achieving synchronization with the synchronization signal. Therefore, this application only uses a timer peripheral with input capture function on the master control chip, eliminating the need for external interrupts, saving resources, reducing costs, and achieving good synchronization results.

[0035] Additional aspects and advantages of this application will be set forth in part in the description which follows, and in part will be obvious from the description, or may be learned by practice of this application. Attached Figure Description

[0036] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0037] Figure 1 This is a schematic diagram of a servo system topology provided in one embodiment of this application;

[0038] Figure 2 This is a schematic diagram of synchronization signal generation provided in one embodiment of this application;

[0039] Figure 3 This is a flowchart illustrating an embodiment of the EtherCAT slave-servo synchronization method provided in this application;

[0040] Figure 4 This is a schematic diagram of unsynchronized captured values ​​provided in one embodiment of this application;

[0041] Figure 5 This is a schematic diagram of a captured value for implementing synchronization provided in one embodiment of this application;

[0042] Figure 6 yes Figure 3 Flowchart of step S102;

[0043] Figure 7 yes Figure 3 Flowchart of step S103;

[0044] Figure 8 This is a schematic diagram of slave-server synchronization provided in one embodiment of this application;

[0045] Figure 9 yes Figure 3 Flowchart prior to step S101;

[0046] Figure 10 This is a flowchart illustrating an EtherCAT slave-servo synchronization method provided in another embodiment of this application;

[0047] Figure 11 This is a schematic diagram of the structure of an electronic device provided in one embodiment of this application.

[0048] Reference numerals: Electronic device 1000, processor 1001, memory 1002. Detailed Implementation

[0049] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0050] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0051] In the description of this application, it should be understood that the orientation descriptions, such as up, down, front, back, left, right, etc., indicate the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings. They are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation. Therefore, they should not be construed as limitations on this application.

[0052] In the description of this application, "several" means one or more, "more than" means two or more, "greater than," "less than," and "exceeding" are understood to exclude the stated number, while "above," "below," and "within" are understood to include the stated number. The use of "first" and "second" in the description is merely for distinguishing technical features and should not be construed as indicating or implying relative importance, or implicitly indicating the number of indicated technical features, or implicitly indicating the order of the indicated technical features.

[0053] In the description of this application, unless otherwise expressly defined, terms such as "setup," "installation," and "connection" should be interpreted broadly, and those skilled in the art can reasonably determine the specific meaning of the above terms in this application in conjunction with the specific content of the technical solution.

[0054] To better understand the technical solutions provided in this application, the terms used herein are explained accordingly:

[0055] EtherCAT: refers to Ethernet Control Automation Technology, an open architecture fieldbus system based on Ethernet. The CAT in its name is an abbreviation for Control Automation Technology.

[0056] PWM: Pulse Width Modulation (PDI) is an analog control method that modulates the bias of the base of a transistor or the gate of a MOSFET according to changes in the load, thereby changing the conduction time of the transistor or MOSFET and thus changing the output of a switching power supply. This method allows the power supply's output voltage to remain constant under changing operating conditions and is a very effective technique for controlling analog circuits using digital signals from a microprocessor.

[0057] ESC chip: also known as EtherCAT slave controller chip, is a dedicated integrated circuit chip that implements the EtherCAT data link layer protocol, processes EtherCAT data frames, and provides a data interface for slave control devices.

[0058] MCU: Microcontroller Unit (MCU), also known as a single-chip microcomputer or microcontroller, is a chip-level computer that integrates a central processing unit with a reduced frequency and specifications, and peripheral interfaces such as memory, counters, USB, A / D conversion, UART, PLC, DMA, and even LCD driver circuits onto a single chip. It can be used to perform different combinations of control for different applications.

[0059] Servo: According to the requirements of control commands, power is amplified, transformed, and regulated to make the torque, speed, and position output of the drive device flexible and convenient to control. An automatic control system that enables the output of an object's position, orientation, state, etc., to follow any change in the input quantity (or given value) is called a servo system. In an automatic control system, a system that can respond to control signals with a certain degree of accuracy is called a follow-up system, also known as a servo system.

[0060] Reset: In this application, reset refers to clearing the current count value of the timer to zero and starting the count again from zero.

[0061] A carrier wave is a radio wave of a specific frequency, measured in Hz. It is an electromagnetic wave that is modulated in terms of frequency, amplitude, or phase to transmit speech, audio, images, or other signals.

[0062] Bus-based multi-axis servo drive systems are widely used in fields such as robotics, machine tools, and industrial automation equipment. They are particularly prevalent in applications requiring high real-time performance, precision, and synchronization. As the core component of these systems, the synchronization accuracy between slave servo drives directly affects the overall system control performance. Traditional bus communication methods are no longer sufficient for high-precision synchronous machining applications. EtherCAT, a real-time Ethernet bus, has become an indispensable communication method for high-performance servo drives due to its advantages such as fast communication speed, stable performance, low cost, and easy expansion. Consequently, its application in the industrial automation market is becoming increasingly widespread.

[0063] However, since the servo drives of each slave system are independent devices, their CPU operations and crystal oscillators cannot be completely synchronized, resulting in asynchronous motor control interrupt programs and final PWM outputs. Therefore, to achieve multi-axis synchronization in EtherCAT bus servos, the various operations and synchronization signals of the servo need to be synchronized. Related technologies typically use CPLD / FPGA for synchronization, implementing encoder synchronization, loop synchronization, and PWM output synchronization within the FPGA. However, this increases development and material costs. Alternatively, a general-purpose MCU can be used to achieve synchronization via external interrupts, but this adds additional interrupt overhead, and the MCU's interrupt entry delay is not fixed, resulting in limited synchronization effectiveness. Another approach involves adjusting the timer's count value via a synchronization signal interrupt. However, the timing of the main control chip entering the interrupt is affected by the stack and instruction fetch, as well as some uninterruptible critical processes, causing jitter in the timing of the main control chip entering the synchronization interrupt, resulting in poor synchronization. Furthermore, prioritizing synchronous interrupts to the highest level consumes system time resources, which may cause some critical processes to fail to execute "on time". In addition, directly modifying the "count value" is not allowed in general master control chips. Modifying the "count value" may cause some abnormalities, especially in up and down timers.

[0064] Based on this, embodiments of this application provide an EtherCAT slave servo synchronization device, method, electronic device, and storage medium. First, a synchronization signal is generated by the ESC chip in the slave system in a first cycle. Then, the master control chip in the master system captures the synchronization signal and performs servo synchronization operations on the slave system according to the synchronization signal. The master control chip also includes a capture timer and a PWM timer. The capture timer captures the synchronization signal in a second cycle and records the count value of the capture timer at the moment the synchronization signal is captured as the capture value. The master control chip adjusts the second cycle of the capture timer according to the capture value to obtain a second update cycle, thereby achieving synchronization between the capture timer and the synchronization signal. Then, the third cycle of the PWM timer is adjusted according to the second update cycle to obtain a third update cycle. The PWM timer is then reset according to the third update cycle to achieve synchronization with the capture timer, thus achieving synchronization with the synchronization signal. Therefore, this application only uses a timer peripheral with input capture function on the master control chip, eliminating the need for external interrupts, saving resources, reducing costs, and achieving good synchronization results.

[0065] Reference Figure 1The servo system topology diagram shown illustrates that, in some embodiments of this application, the master control chip of the master station system accesses the ESC chip of the slave station system via a PDI interface. The synchronization signal generated by the ESC chip is transmitted to the master control chip. Specifically, the master station system is connected to the RJ45 port of the slave station system via a network cable. The master control chip can be an MCU, and the port connection is made through a Parallel Digital Interface (PDI) interface. The PDI interface can be an SPI bus interface or an HBI bus interface to access the ESC chip of the slave station system. The synchronization signal generated by the ESC chip in the first cycle is connected to the capture input pin of the capture timer of the master station system's MCU via a wire.

[0066] In some embodiments, the first cycle is configured by the master control chip to the ESC chip. For example, the first cycle may be 125µs, 1ms, etc. The master control chip can also read the first cycle information from the ESC chip via the PDI interface. It is understood that the ESC chip will generate a synchronization signal based on the first cycle. However, due to differences in the internal crystal oscillators of different slave systems, if the ESC chip only generates a synchronization signal according to the configured first cycle, it may cause a deviation in the synchronization signals generated by different slave systems. Therefore, after the master system establishes a servo synchronization mechanism, the first cycle of the synchronization signal generated by the ESC chip will be slightly smaller or slightly larger than the set first cycle. (Refer to...) Figure 2 The diagram shown illustrates the generation of the synchronization signal. The synchronization signal generation mechanism is completed by the ESC chip. Thus, after the servo synchronization mechanism is established in this embodiment, it is ensured that the synchronization signals of all slave systems can be generated at the same time.

[0067] In some embodiments, the master control chip has a built-in capture timer. After the ESC chip in the slave system generates a synchronization signal in a first cycle, the master control chip uses the capture timer in a second cycle to capture the synchronization signal generated by the ESC chip, and records the count value of the capture timer at the moment of capturing the synchronization signal as the capture value. Then, the master control chip adjusts the second cycle of the capture timer according to the recorded capture value to obtain a second update cycle. It is understood that the capture timer is reset after each second update cycle, and the count value of the capture timer is cleared to zero, that is, the capture timer starts counting again from zero. Specifically, the second update cycle of the capture timer is synchronized with the first cycle of the ESC chip. It is understood that the second update cycle can be an integer multiple of the first cycle, or the first cycle can be an integer multiple of the second update cycle; this embodiment does not impose any restrictions on this. Therefore, when the capture timer captures the synchronization signal according to the second update cycle, the recorded capture values ​​are the same count value, thereby achieving synchronization between the capture timer and the synchronization signal.

[0068] In some embodiments, the main control chip has a built-in PWM timer. It can be understood that the main control chip generates a carrier wave in a third cycle using the PWM timer to transmit data and achieve communication between the master station system and each slave station system. The main control chip also adjusts the third cycle of the PWM timer according to the second update cycle of the capture timer to obtain a third update cycle. Then, the PWM timer generates a carrier wave according to the third update cycle and performs a reset operation according to the third update cycle, that is, the count value of the PWM timer is cleared to zero and starts counting again from zero. This simultaneous reset with the capture timer achieves synchronization with the capture timer, thereby achieving synchronization with the synchronization signal.

[0069] In some embodiments, the main control chip generates an interrupt to execute servo operations simultaneously with the PWM timer reset; that is, an interrupt is generated when the PWM timer is reset or when the count value reaches zero. It is understood that servo operations include at least one of encoder sampling, loop calculation, and PWM output. Specifically, the servo motor encoder is a sensor installed on the servo motor to measure the magnetic pole position, servo motor rotation angle, and speed. Since servo motors are mostly synchronous motors, and the rotor's magnetic pole position is required to start the servo motor with high torque, encoder sampling of the servo system is essential during synchronization. Servo loop calculation includes current loop, speed loop, and position loop. The current loop is due to the torque generated by the load during servo motor driving, which increases the current flowing into the motor. If the current flowing into the motor is too high, it may cause the motor to burn out. Therefore, a current sensing device is added to the motor's output position. When the motor current exceeds a certain current, the servo driver is cut off to protect the motor. The speed loop is used to detect whether the motor's rotational speed matches the commanded rotational speed. The speed loop controls the motor's rotational speed relative to the command provided by the main control chip. The position loop is used to detect whether the servo motor has moved to the commanded position after the master control chip outputs the position control command. PWM is used for motor speed control, power modulation, communication, etc. Servo operations that output PWM during interruptions achieve synchronization and communication between the master and slave systems.

[0070] In some embodiments, the EtherCAT slave servo synchronization device further includes a regulator, specifically a proportional-integral regulator, used to adjust the load value of the capture timer to obtain a new load value based on the capture value recorded by the capture timer. It can be understood that the load value is the maximum count value of the capture timer within a second cycle; that is, the capture timer counting from zero to the load value constitutes one second cycle. Therefore, the regulator obtains a new load value by adjusting the load value of the capture timer, thereby adjusting the second cycle to obtain a second update cycle. Further, the capture timer starts counting from zero, and a reset occurs when it reaches the new load value, i.e., the count value is cleared and then counting continues from zero. Thus, the larger the new load value of the capture timer, the larger the second update cycle; conversely, the smaller the new load value of the capture timer, the smaller the second update cycle.

[0071] This invention also provides an EtherCAT slave-servo synchronization method, applied to the aforementioned EtherCAT slave-servo synchronization device, with reference to... Figure 3 As shown, in some embodiments of this application, the EtherCAT slave servo synchronization method includes, but is not limited to, the following steps S101 to S103.

[0072] Step S101: When the capture timer captures the synchronization signal, the count value of the capture timer at the moment of capturing the synchronization signal is recorded as the capture value.

[0073] In some embodiments, the synchronization signal is generated in a first cycle and transmitted to the capture timer capture input pin of the main control chip, as shown below. Figure 4 The diagram illustrates unsynchronized capture values. When the synchronization signal changes from low to high, the capture timer records the current count value as the capture value. Since the capture timer counts from zero to the loaded value in the second cycle and then resets, when the capture timer and synchronization signal are not synchronized, the capture values ​​recorded by the capture timer for each synchronization signal are different. The capture value is any value recorded by the capture timer during the count from zero to the loaded value. For example, the capture value recorded for the synchronization signal in the first cycle is capture A, the capture value recorded for the synchronization signal in the second cycle is capture B, and the capture value recorded for the synchronization signal in the third cycle is capture C. As shown in the diagram, capture A, capture B, and capture C are all different from each other; therefore, the capture timer and synchronization signal are not synchronized.

[0074] Step S102: Based on the captured value and the preset captured value, adjust the second cycle of the capture timer to obtain the second update cycle.

[0075] In some embodiments, after the master station system determines that a synchronization signal has been generated, it compares the captured value latched at the time of the synchronization signal occurrence with a preset captured value, and adjusts the second period of the capture timer according to the relationship between each captured value and the preset captured value to obtain a second update period. For example, refer to... Figure 5 The diagram shown illustrates the capture value for achieving synchronization. For each synchronization signal generated in the first cycle, the capture value recorded by the capture timer is capture D. Capture D can be any count value or a preset capture value. That is, the capture value recorded by the capture timer is consistent with the preset capture value. This embodiment does not impose any restrictions on this. Thus, the capture values ​​are dynamically adjusted to make each capture value the same, thereby achieving synchronization between the capture timer and the synchronization signal.

[0076] Step S103: Based on the second update cycle, adjust the third cycle of the PWM timer to obtain the third update cycle.

[0077] In some embodiments, the PWM timer is synchronized with the capture timer through the internal configuration of the main control chip. Specifically, based on the second update cycle of the capture timer, the third cycle of the PWM timer is adjusted to obtain a third update cycle. This ensures that at the end of each second update cycle, i.e., when the capture timer generates a reset, the PWM timer is reset, thereby the main control chip resets using the PWM timer with the third update cycle. It can be understood that when the capture timer resets with the second update cycle, the PWM timer resets with the third update cycle. Therefore, after both the capture timer and the PWM timer are reset simultaneously, they both start counting from zero, thus achieving synchronization between the PWM timer and the capture timer. Since synchronization between the capture timer and the synchronization signal has been achieved, synchronization between the PWM timer and the synchronization signal generated by the ESC chip can be further achieved.

[0078] Reference Figure 6 As shown, in some embodiments of this application, step S102 may include, but is not limited to, steps S201 to S203.

[0079] Step S201: Subtract the captured value from the preset captured value to obtain the difference value.

[0080] In some embodiments, the EtherCAT slave servo synchronization device is further provided with a subtractor. When the capture timer captures the synchronization signal, the recorded capture value and the preset capture value are subtracted. That is, the capture value and the preset capture value are input into the subtractor, and the subtractor performs the subtraction operation to obtain the difference value.

[0081] Step S202: Input the difference into the proportional-integral regulator to obtain the new load value of the capture timer.

[0082] Understandably, due to differences in crystal oscillators and other components between the master station system and different slave station systems, it is necessary to dynamically adjust the load value of the capture timer to ensure that the capture values ​​corresponding to the synchronization signals generated in each recorded first cycle are identical. In some embodiments, the difference obtained through the subtractor is input into a proportional-integral (PI) controller. The integral action refers to the proportional effect of the controller's output on the integral of the input deviation with respect to time. After passing through the PI controller, the difference is output as a new load value for the capture timer. This "proportional + integral" adjustment method results in rapid convergence and good robustness.

[0083] Step S203: When the captured value is greater than the preset captured value, the new loaded value is greater than the loaded value, and the second period of the capture timer is increased based on the new loaded value to obtain the second update period; when the captured value is less than the preset captured value, the new loaded value is less than the loaded value, and the second period of the capture timer is decreased based on the new loaded value to obtain the second update period.

[0084] In some embodiments, if the recorded capture value is greater than the preset capture value, it indicates that the capture timer is counting too fast. In this case, the second cycle of the capture timer needs to be increased. Therefore, the new load value obtained by the regulator is greater than the load value, and the time for the capture timer to count from zero to the new load value is longer than the time for counting from zero to the load value. This increases the second cycle of the capture timer, resulting in a second update cycle. Conversely, if the recorded capture value is less than the preset capture value, it indicates that the capture timer is counting too slowly. In this case, the second cycle of the capture timer needs to be decreased. Therefore, the new load value obtained by the regulator is smaller than the load value, and the time for the capture timer to count from zero to the new load value is shorter than the time for counting from zero to the load value. This decreases the second cycle of the capture timer, resulting in a second update cycle. It is understood that the load value or new load value of the capture register can be set through the internal registers of the main control chip.

[0085] Reference Figure 7 As shown, in some embodiments of this application, step S103 may include, but is not limited to, steps S301 to S302.

[0086] Step S301: A reset event is generated after the capture timer counts from zero to the new load value in the second update cycle.

[0087] In some embodiments, the capture timer starts counting from zero. When it counts to the new load value corresponding to the second update cycle, a reset is generated, that is, the count value is cleared to zero, and then it continues to count from zero. At this time, the main control chip will generate a reset event after the capture timer is reset.

[0088] Step S302: Based on the reset event, reset the PWM timer and adjust the third cycle of the PWM timer to obtain the third update cycle.

[0089] In some embodiments, the PWM timer is reset based on a reset event generated by the capture timer, i.e., the PWM timer's count value is cleared to zero, and then counting resumes from zero. This adjusts the third cycle of the PWM timer to obtain the third update cycle, thereby achieving synchronization between the PWM timer and the capture timer. It is understood that the reset function can be implemented by configuring the peripherals of the main control chip.

[0090] In some embodiments, the PWM timer's counting mode is up-down counting, and an interrupt is generated when the PWM timer's count value reaches zero. This interrupt is used to perform servo operations, such as encoder sampling, loop calculation, PWM output, or at least one of these. (Refer to...) Figure 8 The diagram shown illustrates slave servo synchronization. The ESC chip generates a synchronization signal in the first cycle, and the capture timer captures the synchronization signal and records the capture value in the second update cycle. The capture timer and the synchronization signal are synchronized, so all capture values ​​remain consistent. After the capture timer counts from zero to the new load value corresponding to the second update cycle, a reset and a corresponding reset event are generated. The PWM timer is reset according to the reset event during the upward and downward counting process, thereby synchronizing with the capture timer and the synchronization signal. Furthermore, the PWM timer generates an interrupt when the count reaches zero to execute servo operations.

[0091] Reference Figure 9 As shown, in some embodiments of this application, before step S101, there may be steps S401 to S404, including but not limited to.

[0092] Step S401: Configure the counting period of the PWM timer to the third cycle.

[0093] In some embodiments, when the master station system and the slave station system start working, the capture timer and the PWM timer are initialized and configured. Specifically, the counting period of the PWM timer is configured to be the third period. It can be understood that the master control chip also generates a carrier wave through the PWM timer, so the third period is the carrier wave period.

[0094] Step S402: Configure the counting period of the capture timer to the second period.

[0095] In some embodiments, the counting period of the capture timer is configured as a second period, which is an integer multiple of the third period of the PWM timer, i.e., the second period is an integer multiple of the carrier period. For example, the second period can be the same as the third period, or it can be two, three, or five times the third period, etc. The embodiments of this application do not limit this.

[0096] Step S403: Configure the PWM timer and the capture timer to synchronize initially.

[0097] Step S404: Check whether the capture timer has captured the synchronization signal at a preset query period.

[0098] In some embodiments, after configuring the PWM timer and the capture timer to initially synchronize, the main control chip continuously queries whether the capture timer has captured the synchronization signal at a preset query period.

[0099] Reference Figure 10 The flowchart of the EtherCAT slave servo synchronization method shown below illustrates that, in some embodiments, when the master and slave systems start working, the PWM timer and capture timer are initialized. First, the PWM timer's counting period is configured to the third cycle, then the capture timer's counting period is configured to the second cycle. Next, the PWM timer and capture timer are initially synchronized. Then, the capture timer is continuously checked to see if it has captured the synchronization signal. If it has, the capture value recorded by the capture timer when it captured the synchronization signal is obtained. This captured value is compared with a preset capture value. If the captured value is greater than the preset capture value, the capture timer is slowed down (i.e., its second cycle is increased to obtain a second update cycle). If the captured value is less than the preset capture value, the capture timer is sped up (i.e., its second cycle is decreased to obtain a second update cycle). This process continues until the captured value matches the preset capture value, thus achieving synchronization of the capture timer, PWM timer, and synchronization signal. Therefore, using only the capture timer and PWM timer of the master control chip, high-precision synchronization of PWM output, encoder sampling, and loop operations with the synchronization signal can be achieved without complex calculations or occupying critical system processes, saving resources and costs.

[0100] Figure 11 An electronic device 1000 provided in an embodiment of this application is shown. The electronic device 1000 includes: a processor 1001, a memory 1002, and a computer program stored in the memory 1002 and executable on the processor 1001. When the computer program is executed, it is used to perform the EtherCAT slave-servo synchronization method described above.

[0101] The processor 1001 and the memory 1002 can be connected via a bus or other means.

[0102] The memory 1002, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs, such as the EtherCAT slave-servo synchronization method described in the embodiments of this application. The processor 1001 implements the above-described EtherCAT slave-servo synchronization method by running the non-transitory software program and instructions stored in the memory 1002.

[0103] The memory 1002 may include a program storage area and a data storage area. The program storage area may store the operating system and application programs required for at least one function. The data storage area may store the EtherCAT slave-servo synchronization method described above. Furthermore, the memory 1002 may include high-speed random access memory (RAM) and non-transitory memory, such as at least one storage device, flash memory, or other non-transitory solid-state storage device. In some embodiments, the memory 1002 may optionally include remotely located memories 1002 relative to the processor 1001, which can be connected to the electronic device 1000 via a network. Examples of such networks include, but are not limited to, the Internet, intranets, local area networks (LANs), mobile communication networks, and combinations thereof.

[0104] The non-transient software program and instructions required to implement the above-described EtherCAT slave-servo synchronization method are stored in memory 1002. When executed by one or more processors 1001, the above-described EtherCAT slave-servo synchronization method is executed, for example, executing... Figure 3 Method steps S101 to S103, Figure 6 Method steps S201 to S203, Figure 7 Method steps S301 to S302, Figure 9 The method steps S401 to S404.

[0105] This application also provides a storage medium, which is a computer-readable storage medium storing a computer program that, when executed by a processor, implements the aforementioned EtherCAT slave-servo synchronization method. The memory, as a non-transitory computer-readable storage medium, can be used to store non-transitory software programs and non-transitory computer-executable programs. Furthermore, the memory may include high-speed random access memory and non-transitory memory, such as at least one disk storage device, flash memory device, or other non-transitory solid-state storage device. In some embodiments, the memory may optionally include memory remotely located relative to the processor, and these remote memories can be connected to the processor via a network. Examples of such networks include, but are not limited to, the Internet, corporate intranets, local area networks, mobile communication networks, and combinations thereof.

[0106] The EtherCAT slave servo synchronization device, method, electronic device, and storage medium provided in this application first generate a synchronization signal in a first cycle through the ESC chip in the slave system. Then, the master control chip in the master system captures the synchronization signal and performs servo synchronization operation on the slave system according to the synchronization signal. The master control chip also includes a capture timer and a PWM timer. The capture timer captures the synchronization signal in a second cycle and records the count value of the capture timer at the moment of capturing the synchronization signal as the capture value. The master control chip adjusts the second cycle of the capture timer according to the relationship between the capture value and the preset capture value to obtain a second update cycle, thereby realizing the synchronization of the capture timer and the synchronization signal. Then, the third cycle of the PWM timer is adjusted according to the second update cycle to obtain a third update cycle. Then, the PWM timer is reset according to the third update cycle to achieve synchronization with the capture timer, thereby achieving synchronization with the synchronization signal. Therefore, this application can complete the high-precision synchronization operation with the synchronization signal, such as PWM output, encoder sampling, and loop calculation, without using external interrupts or performing complex calculations, and without occupying critical system processes, using only the capture timer and PWM timer of the master control chip, saving resources and costs.

[0107] The device embodiments described above are merely illustrative. The units described as separate components may or may not be physically separate; that is, they may be located in one place or distributed across multiple network units. Some or all of the modules can be selected to achieve the purpose of this embodiment according to actual needs.

[0108] Those skilled in the art will understand that all or some of the steps and systems in the methods disclosed above can be implemented as software, firmware, hardware, and suitable combinations thereof. Some or all of the physical components can be implemented as software executed by a processor, such as a central processing unit, digital signal processor, or microprocessor, or as hardware, or as an integrated circuit, such as an application-specific integrated circuit. Such software can be distributed on a computer-readable medium, which can include computer storage media (or non-transitory media) and communication media (or transient media). As is known to those skilled in the art, the term computer storage media includes volatile and non-volatile, removable and non-removable media implemented in any method or technology for storing information (such as computer-readable instructions, data structures, program modules, or other data). Computer storage media includes, but is not limited to, RAM, ROM, EEPROM, flash memory or other memory technologies, CD-ROM, digital versatile disc (DVD) or other optical disc storage, magnetic cartridges, magnetic tape, storage device storage or other magnetic storage devices, or any other medium that can be used to store desired information and is accessible to a computer. Furthermore, as is known to those skilled in the art, communication media typically include computer-readable instructions, data structures, program modules, or other data in modulated data signals such as carrier waves or other transmission mechanisms, and may include any information delivery medium.

[0109] It should also be understood that the various implementation methods provided in this application can be arbitrarily combined to achieve different technical effects. The above is a detailed description of the preferred embodiments of this application, but this application is not limited to the above-described embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of this application.

Claims

1. An EtherCAT slave station servo synchronization device, applied to a master station system and a slave station system, the master station system being in communication connection with more than one slave station system, characterized in that, include: The slave system is equipped with an ESC chip, which is used to generate a synchronization signal in a first cycle. The master station system is equipped with a master control chip, which is used to capture the synchronization signal and perform servo synchronization operation on the slave station system according to the synchronization signal; the master control chip also includes a capture timer and a PWM timer; The capture timer is used to capture the synchronization signal in a second cycle and record the count value at the moment of capturing the synchronization signal as the capture value. The main control chip adjusts the second cycle according to the capture value to obtain a second update cycle, so as to realize the synchronization of the capture timer and the synchronization signal. The main control chip adjusts the third cycle according to the second update cycle to obtain the third update cycle. The PWM timer is used to reset according to the third update cycle to achieve synchronization with the capture timer and the synchronization signal. The device further includes: a regulator, configured to adjust the load value of the capture timer according to the capture value to obtain a new load value, so as to adjust the second cycle to obtain the second update cycle; The second update cycle is obtained by adjusting the load value of the capture timer based on the captured value to obtain a new load value, and adjusting the second cycle accordingly. This includes: The difference between the captured value and the preset captured value is obtained; the difference is input to the proportional-integral regulator to obtain the new load value of the capture timer; when the captured value is greater than the preset captured value, the obtained new load value is greater than the load value, and the second period of the capture timer is increased based on the new load value to obtain the second update period; when the captured value is less than the preset captured value, the obtained new load value is less than the load value, and the second period of the capture timer is decreased based on the new load value to obtain the second update period. The main control chip adjusts the third cycle according to the second update cycle to obtain the third update cycle, including: A reset event is generated after the capture timer counts from zero to the new load value using the second update cycle; based on the reset event, the PWM timer is reset, and the third cycle of the PWM timer is adjusted to obtain the third update cycle.

2. The EtherCAT slave servo synchronization apparatus according to claim 1, characterized by, The PWM timer is also used to generate an interrupt during the third update cycle to perform servo operations.

3. The EtherCAT slave servo synchronization apparatus according to claim 2, characterized by, The servo operation includes at least one of the following: encoder sampling, loop calculation, and PWM output.

4. An EtherCAT slave station servo synchronization method, characterized by, Applied to the EtherCAT slave servo synchronization device as described in any one of claims 1 to 3, the method comprises: When the capture timer captures the synchronization signal, the count value of the capture timer at the moment of capturing the synchronization signal is recorded as the capture value; the count value is any value during the process of the capture timer counting from zero to the load value; Based on the captured value and the preset captured value, the second period of the captured timer is adjusted to obtain the second update period, so as to realize the synchronization of the captured timer and the synchronization signal; Based on the second update cycle, the third update cycle is obtained by adjusting the third cycle of the PWM timer, so as to realize the synchronization of the PWM timer and the capture timer, and to realize the synchronization of the PWM timer and the synchronization signal.

5. The EtherCAT slave servo synchronization method of claim 4, wherein, Before recording the count value of the capture timer at the moment of capturing the synchronization signal as the capture value when the capture timer captures the synchronization signal, the method further includes: Configure the counting period of the PWM timer to be the third period; The counting period of the capture timer is configured to be the second period, and the second period is an integer multiple of the third period; Configure the PWM timer to initially synchronize with the capture timer; The capture timer is checked at a preset query period to see if the synchronization signal has been captured.

6. The EtherCAT slave servo synchronization method according to any one of claims 4 to 5, characterized in that, The PWM timer is in a counting mode of up and down, and generates an interrupt to execute servo operation when the count reaches zero.

7. An electronic device, comprising: It includes a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the EtherCAT slave servo synchronization method as described in any one of claims 4 to 5.

8. A computer-readable storage medium, characterized in that, The storage medium stores a program that is executed by a processor to implement the EtherCAT slave servo synchronization method as described in any one of claims 4 to 5.

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