Diode and method for manufacturing the same

Abstract

A diode and a manufacturing method thereof. The diode includes: a first substrate (100), the first substrate (100) being an n-type doped substrate and having a doping concentration equal to or greater than 1×10<supgt;18< / supgt; cm<supgt;‑3< / supgt>; a metal atom layer (110) located on a first surface of the first substrate (100), an epitaxial structure (120) located on the metal atom layer (110); a first electrode (140) located on the epitaxial structure (120); and a second electrode (150) located on a second surface of the first substrate (100) opposite to the first surface, and the forward conduction voltage drop of the diode can be significantly reduced.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor devices, and more particularly, to a diode and a method for manufacturing the same. Background Art

[0002] Generally speaking, for power devices, a vertical-structure Schottky diode can conduct a larger current compared to a lateral-structure Schottky diode. Therefore, the vertical-structure Schottky diode is more suitable for use as a power device. A power device using an insulating substrate such as a sapphire substrate cannot provide a vertical-structure Schottky diode, and a conductive substrate is usually used to implement such a vertical-structure Schottky diode. However, in the prior art, due to a certain voltage drop between the semiconductor layer and the conductive substrate, the forward voltage drop of the corresponding vertical-structure Schottky diode is relatively high. In addition, for a PN junction diode, there is also a problem that the forward voltage drop of the diode is relatively high due to a certain voltage drop between the semiconductor layer and the substrate. In addition, there are various problems with the peeling process, which seriously affect the manufacturing cost and yield of light-emitting diodes. For example, the laser peeling method (mainly used for sapphire substrates) has a high cost, and the chemical etching peeling method (mainly used for silicon substrates) results in poor efficiency and yield, and the peeled substrate cannot be reused. Therefore, there is an urgent need for a diode that can significantly reduce the forward conduction voltage drop of the entire device. Summary of the Invention

[0003] In view of this, an object of the present invention is to provide a diode and a method for manufacturing such a diode, so as to significantly reduce its forward conduction voltage drop.

[0004] To achieve the above object, the technical solutions adopted in the embodiments of the present invention are as follows:

[0005] In a first aspect, the diode provided by the embodiments of the present invention may include:

[0006] A first substrate, the first substrate being an n-type doped substrate and having a doping concentration equal to or greater than 1×10 18 cm -3 ;

[0007] A metal atomic layer, the metal atomic layer being located on the first substrate;

[0008] An epitaxial structure, the epitaxial structure being located on the metal atomic layer;

[0009] A first electrode, located on the epitaxial structure;

[0010] A second electrode, located on a second surface of the first substrate opposite to the first surface.

[0011] Preferably, the epitaxial structure includes: an N-type semiconductor layer; an intrinsic semiconductor layer located on the N-type semiconductor layer; and a P-type semiconductor layer located on the intrinsic semiconductor layer.

[0012] Preferably, the doping concentration of the N-type semiconductor layer is equal to or greater than 1×10 18 cm -3 .

[0013] Preferably, the epitaxial structure includes: an N-type semiconductor layer, and the N-type semiconductor layer further includes a groove; and a P-type semiconductor layer located in the groove.

[0014] Preferably, the N-type semiconductor layer is a lightly doped semiconductor layer, the P-type semiconductor layer is a heavily doped semiconductor layer, and the N-type semiconductor layer and the P-type semiconductor layer have a single-layer structure or a multi-layer structure.

[0015] Preferably, the first substrate has a pattern, and the number of the patterns is at least one.

[0016] Preferably, the metal atomic layer has a pattern, and the pattern is a continuous pattern or a discontinuous pattern.

[0017] Preferably, the material of the metal atomic layer is one of Al and Mg.

[0018] Preferably, the first electrode is in Schottky contact with the epitaxial structure, and the second electrode is in ohmic contact with the first substrate.

[0019] Preferably, a nucleation layer or a buffer layer is further included between the metal atomic layer and the epitaxial structure.

[0020] Preferably, the diode further includes a second substrate located between the first substrate and the second electrode, the second substrate is an n-type doped substrate and its doping concentration is less than 1×10 18 cm -3 , and the second electrode is in ohmic contact with the second substrate.

[0021] Preferably, the N-type conductor layer and the P-type semiconductor layer are semiconductor layers made of one or more materials of GaN, AlN, AlGaN, InGaN, InN, InAlGaN, and AlInN.

[0022] Preferably, both the first electrode and the second electrode are single-layer metals or multi-layer hybrid metals. Preferably, the diode further includes a passivation layer located on the epitaxial structure, and the passivation layer is formed by one or a combination of aluminum nitride, silicon dioxide, silicon oxynitride, and aluminum oxide.

[0023] Preferably, the diode is a vertical - structure light - emitting diode, and the horizontal width of the vertical - structure light - emitting diode is less than 500 um.

[0024] Preferably, the horizontal width of the vertical - structure light - emitting diode is less than 100 um.

[0025] In a second aspect, the manufacturing method of the diode provided by the embodiments of the present invention may include:

[0026] Forming a metal atomic layer on the first surface of the first substrate, where the first substrate is an n - type doped substrate and its doping concentration is equal to or greater than 1×10 18 cm -3 ;

[0027] Forming an epitaxial structure on the metal atomic layer;

[0028] Forming a first electrode on the epitaxial structure;

[0029] Forming a second electrode on the second surface of the first substrate opposite to the first surface.

[0030] For the diode and its manufacturing method provided by the embodiments of the present invention, by performing high - concentration n - type doping on the first substrate and fabricating a metal atomic layer, the potential barrier between the epitaxial structure and the first substrate can be reduced, so that electrons can pass through the potential barrier between the first substrate, the metal atomic layer, and the epitaxial structure when the diode conducts forward. Therefore, the forward conduction voltage drop of the diode can be significantly reduced. In addition, by setting a metal atomic layer between the substrate and the epitaxial structure, there is no need to perform peeling after forming the epitaxial layer, which reduces the damage to the device and omits the preparation steps, effectively saving the manufacturing cost of the diode and improving the manufacturing efficiency.

[0031] To make the above - mentioned and other objects, features, and advantages of the present invention more obvious and understandable, the following specifically enumerates preferred embodiments and, in conjunction with the accompanying drawings, makes a detailed description as follows. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions in the embodiments of the present invention or the prior art, the following will briefly introduce the drawings required for use in the embodiments. Obviously, the following - described drawings are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings. As shown in the drawings, the above - mentioned and other objects, features, and advantages of the present invention will be more clear. The same reference numerals in all the drawings indicate the same parts. The drawings are not deliberately drawn to scale in actual size, and the focus is on showing the gist of the present invention.

[0033] Figure 1Schematic cross-sectional view of a diode provided by an embodiment of the present invention;

[0034] Figure 2 Schematic cross-sectional view of a diode provided by another embodiment of the present invention;

[0035] Figure 3 Schematic cross-sectional view of a diode provided by another embodiment of the present invention;

[0036] Figure 4 Schematic cross-sectional view of a diode provided by another embodiment of the present invention;

[0037] Figure 5 Schematic cross-sectional view of a diode provided by another embodiment of the present invention;

[0038] Figure 6 Schematic cross-sectional view of a diode provided by another embodiment of the present invention;

[0039] Figure 7 Schematic cross-sectional view of a diode provided by another embodiment of the present invention;

[0040] Figure 8 Process flow chart of a method for manufacturing a diode provided by an embodiment of the present invention;

[0041] Figures 9 to 13 Schematic structural diagrams of manufacturing respective components of the diode in respective process steps of the method for manufacturing a diode provided by an embodiment of the present invention.

[0042] Main element symbol description: first substrate 100, metal atomic layer 110, epitaxial structure 120, N-type semiconductor layer 121, intrinsic semiconductor layer 122, P-type semiconductor layer 123, first electrode 140, second electrode 150, second substrate 101, passivation layer 160. Detailed implementation manners

[0043] Next, the technical solutions in the embodiments of the present invention will be clearly and completely described in conjunction with the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without creative efforts shall fall within the protection scope of the present invention.

[0044] It should be noted that like reference numerals and letters denote like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures. Also, in the description of the present invention, the terms "first", "second", etc. are used only for descriptive distinction and should not be construed as indicating or implying relative importance. In the description of the embodiments of the present invention, it will be understood that when a layer (or film), region, pattern or structure is referred to as being "on" or "under" another substrate, another layer (or film), another region, another pad or another pattern, it may be "directly" or "indirectly" on another substrate, layer (or film), region, pad or pattern, or there may also be one or more intermediate layers. The position of such layers has been described with reference to the figures. For convenience or clarity purposes, the thickness and dimensions of each layer shown in the figures may be enlarged, omitted or schematically drawn. Additionally, the dimensions of the components do not fully reflect the actual dimensions.

[0045] Please refer to Figure 1 , the diode 1A provided by the first embodiment of the present invention may include: a first substrate 100, the first substrate 100 being an n-type doped substrate and having a doping concentration equal to or greater than 1×10 18 cm -3 ; a metal atom layer 110 located on the first surface of the first substrate 100; an epitaxial structure 120 located on the metal atom layer 110; a first electrode 140 located on the epitaxial structure 120; and a second electrode 150 located on the second surface of the first substrate 100 opposite to the first surface. The second electrode 150 is in ohmic contact with the first substrate 100.

[0046] The first substrate 100 may be a GaN substrate, an Si substrate, a silicon carbide substrate or other suitable non-insulating substrate, and preferably may be an Si substrate. The elements used to achieve n-type doping in the first substrate 100 may be selected from silicon, germanium, tin, selenium and tellurium.

[0047] The epitaxial structure 120 may be composed of an N-type semiconductor layer, an intrinsic semiconductor layer, and a P-type semiconductor layer stacked, that is, a PIN structure is formed; it may also be composed of an N-type semiconductor layer, the N-type semiconductor layer further including a groove, and a P-type semiconductor layer located in the groove, that is, a JBS structure is formed. Among them, the doping concentration of the N-type semiconductor layer is equal to or greater than 1×10 18 cm -3。The N-type semiconductor layer and the P-type semiconductor layer can be semiconductor layers made of a material selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The elements used to achieve n-type doping in the N-type semiconductor structure can be selected from silicon, germanium, tin, selenium, and tellurium. It should be noted that the N-type semiconductor layer and the P-type semiconductor layer themselves can have a two-layer or multi-layer structure, but it is necessary to ensure that the doping concentration of the n-type doping of the layer in contact with the first substrate 100 in the two-layer or multi-layer structure of the N-type semiconductor layer is greater than 1×10 18 cm -3 。

[0048] In a specific embodiment, the first electrode 140 can be a single-layer metal or a multi-layer hybrid metal. Similarly, the second electrode 150 can also be a single-layer metal or a multi-layer hybrid metal. Specifically, the first electrode 140 can be formed by one or a combination of gold (Au), nickel (Ni), titanium (Ti), chromium (Cr), palladium (Pd), cobalt (Co), nickel chromium (NiCr), germanium (Ge), platinum (Pt), copper (Cu), silver (Ag), and tungsten (W).

[0049] In the diode 1A provided in the first embodiment of the present invention, since the first substrate 100 has a high concentration of n-type doping and the metal atomic layer 110 is fabricated on the first substrate 100, the barrier between the epitaxial structure 120 and the first substrate 100 can be reduced, so that electrons can pass through the barriers between the first substrate 100, the metal atomic layer 110, and the epitaxial structure 120 when the diode conducts forward. Therefore, the forward conduction voltage drop of the diode can be significantly reduced. In addition, by providing the metal atomic layer 110 between the substrate and the epitaxial layer, there is no need to perform peeling after forming the epitaxial layer, reducing damage to the device and omitting the preparation steps, effectively saving the preparation cost of the diode and improving the preparation efficiency.

[0050] As Figure 2 shown, a schematic cross-sectional view of a diode 1B provided in another embodiment of the present invention is shown. Figure 2 The difference between the embodiment shown and the embodiment shown in Figure 1 is mainly as follows: Figure 2 The epitaxial structure 120 in the diode 1B shown includes an N-type semiconductor layer 121, an intrinsic semiconductor layer 122, and a P-type semiconductor layer 123 stacked, that is, a PIN structure is formed. The intrinsic semiconductor layer 122 is located between the N-type semiconductor layer 121 and the P-type semiconductor layer 123. The first electrode 140 is located on the P-type semiconductor layer 123, and the first electrode 140 is in ohmic contact with the P-type semiconductor layer 123. Regarding Figure 2For the remaining part of the diode 1B shown, reference can be made to Figure 1 the corresponding part of the diode 1A shown, which will not be elaborated here.

[0051] The N-type semiconductor layer 121, the intrinsic semiconductor layer 122, and the P-type semiconductor layer 123 can all be semiconductor layers made of one or more materials selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The elements used to achieve n-type doping in the N-type semiconductor layer 121 can be selected from silicon, germanium, tin, selenium, and tellurium, and the elements used to achieve p-type doping in the P-type semiconductor layer 123 can be selected from magnesium, zinc, calcium, strontium, and barium.

[0052] Similar to the diode 1A described in the previous embodiment, since both the N-type semiconductor layer 121 and the first substrate 100 have a high concentration of n-type doping, and a metal atomic layer 110 is fabricated between the N-type semiconductor layer 121 and the first substrate 100, Figure 2 the diode 1B shown can also have a significantly reduced forward conduction voltage drop.

[0053] As Figure 3 shown, a schematic cross-sectional view of a diode 1C provided by another embodiment of the present invention is shown, Figure 3 The difference between the shown embodiment and Figure 2 the shown embodiment mainly lies in: Figure 3 The epitaxial structure 120 in the diode 1C shown is composed of an N-type semiconductor layer, where the N-type semiconductor layer further includes a groove, and a P-type semiconductor layer located in the groove, that is, a JBS structure is formed. The N-type semiconductor layer 121 and the P-type semiconductor layer 123 can both be semiconductor layers made of one or more materials selected from GaN, AlN, AlGaN, InGaN, InN, InAlGaN, AlInN, AlGaAs, GaP, GaAs, GaAsP, and AlGaInP. The elements used to achieve n-type doping in the N-type semiconductor layer 121 can be selected from silicon, germanium, tin, selenium, and tellurium, and the elements used to achieve p-type doping in the P-type semiconductor layer 123 can be selected from magnesium, zinc, calcium, strontium, and barium. Among them, the P-type semiconductor layer can be fabricated by a secondary epitaxy method to achieve the purpose of minimizing the dislocation density.

[0054] As Figure 4 shown, a schematic cross-sectional view of a diode 1D provided by another embodiment of the present invention is shown, Figure 4 The difference between the shown embodiment and Figure 1The differences of the illustrated embodiment mainly lie in that: it further includes a second substrate 101 located between the first substrate 100 and the second electrode 150. The second substrate 101 is an n-type doped substrate and its doping concentration is less than 1×10 18 cm -3 , and the second electrode 150 is in ohmic contact with the second substrate 101. Regarding the remaining part of the diode 1D shown in Figure 4 , reference can be made to the corresponding part of the diode 1A shown in Figure 1 , and details will not be repeated here.

[0055] The second substrate 101 can also be made of GaN, Si, silicon carbide or other suitable non-insulating materials. The first substrate 100 is preferably made of the same material as the second substrate 101. For example, both are made of Si. The elements used to achieve n-type doping in the second substrate 101 can be selected from silicon, germanium, tin, selenium and tellurium. There is no special limitation on the doping concentration of n-type doping in the second substrate 101, as long as it can meet the requirement of forming an ohmic contact between the second substrate 101 and the second electrode 150. Preferably, the doping concentration of n-type doping in the second substrate 101 is less than the doping concentration of n-type doping in the first substrate 100 to reduce the process difficulty. The thickness of the first substrate 100 can be less than, greater than or equal to the thickness of the second substrate 101.

[0056] As Figure 5 shown, a schematic cross-sectional view of a diode 1E provided by another embodiment of the present invention is shown. Figure 5 The differences between the illustrated embodiment and the embodiment shown in Figure 1 mainly lie in that: Figure 5 The diode 1E shown also includes a passivation layer 160 located on the epitaxial structure 120. The passivation layer 160 can be formed by one or a combination of aluminum nitride, silicon dioxide, silicon oxynitride, aluminum oxide, or can be other suitable dielectric layers, etc. Regarding the remaining part of the diode 1E shown in Figure 5 , reference can be made to the corresponding part of the diode 1A shown in Figure 1 , and details will not be repeated here.

[0057] Figure 5 The passivation layer 160 in the diode 1E shown can effectively suppress the effect of dynamic performance degradation caused by defects and surface states in the epitaxial structure 120, thereby reducing the influence of surface states and defects on the device characteristics, and can protect the surface of the epitaxial structure 120 from pollution and damage during the process.

[0058] As Figure 6 shown, a schematic cross-sectional view of a diode 1F provided by another embodiment of the present invention is shown. Figure 6 The differences between the illustrated embodiment andFigure 1 The differences between the illustrated embodiments are mainly as follows: Figure 6 In the diode 1F shown, the first substrate 100 has a patterned structure, so that the metal atomic layer located on the first substrate 100 also has a patterned structure. In this factual example, the pattern of the metal atomic layer 110 is a continuous pattern. Compared with Figure 1 the diode 1A shown, in this embodiment, the continuously imaged metal atomic layer 110 can increase the contact area with the first substrate 100, thereby more effectively reducing the forward conduction voltage drop of the diode.

[0059] As Figure 7 shown, a schematic cross-sectional view of a diode 1G provided by another embodiment of the present invention is shown. Figure 7 The differences between the illustrated embodiment and Figure 6 the illustrated embodiment are mainly as follows: Figure 7 In the diode 1G shown, the pattern of the metal atomic layer 110 is a discontinuous pattern. Compared with Figure 1 the diode 1A shown, in this embodiment, the discontinuously imaged metal atomic layer 110 can effectively reduce the forward conduction voltage drop of the diode while enabling the N-type semiconductor layer 121 to have sufficient nucleation regions in the initial growth stage through the discontinuous metal atomic layer 110, and the process of growing the N-type semiconductor layer 121 on the substrate is already very mature, which also ensures the epitaxial quality of the N-type semiconductor layer 121 in the epitaxial structure 120.

[0060] Figure 8 A process flow chart of a method for manufacturing a diode provided by an embodiment of the present invention is shown. The following combines Figures 9 to 13 to explain this flow chart in detail. It should be understood that the manufacturing method provided by the embodiments of the present invention is not limited to Figure 8 the order described below. It should be understood that in other embodiments, the order of some steps of the method described in the present invention can be interchanged according to actual needs, or some of the steps can also be omitted or deleted.

[0061] Step S601, forming a first substrate 100, where the first substrate 100 is an n-type doped substrate and its doping concentration is equal to or greater than 1×10 18 cm -3 .

[0062] Specifically, as Figure 9 shown, for example, a Si substrate can be formed and the Si substrate can be n-type doped with a doping concentration of not less than 1×10 18 cm -3 to form the first substrate 100.

[0063] Step S602, form a metal atomic layer 110 on the first surface of the first substrate 100.

[0064] Specifically, as Figure 10 shown, the material of the metal atomic layer is Al or Mg.

[0065] Step S603, form an epitaxial structure 120 on the metal atomic layer 110.

[0066] Specifically, as Figure 11 shown, an epitaxial layer included in the epitaxial structure 120, such as an N-type semiconductor layer, an intrinsic semiconductor layer, and a P-type semiconductor layer, etc., can be fabricated by, for example, Metal Organic Vapour Phase Epitaxial (MOVPE) method. The in-situ fabrication method is not excluded, that is, during the preparation process, different process flows are carried out in the same equipment. During the above process, taking out can be performed, or the taking-out action can be not performed until the in-situ process ends.

[0067] Step S604, form a first electrode 140 on the epitaxial structure 120.

[0068] Specifically, as Figure 12 shown, for example, gold (Au) can be deposited by resistance heating deposition as the first electrode 140. At the same time, as Figure 2 shown, when the surface layer of the epitaxial structure 120 far from the first substrate 100 is a P-type doped semiconductor layer 123, make the first electrode 140 have an ohmic contact with the P-type doped semiconductor layer 123. As Figure 3 shown, when the surface layer of the epitaxial structure far from the first substrate 100 includes an N-type semiconductor layer 121 and a P-type semiconductor layer 123, make the first electrode 140 have a Schottky contact and an ohmic contact with the epitaxial structure 120.

[0069] Step S605, deposit a second electrode 150 on the second surface of the first substrate 100 opposite to the first surface.

[0070] Specifically, as Figure 13 shown, for example, Ti / Al / Ti / Au can be deposited on the surface (i.e., the second surface) of the first substrate 100 far from the metal atomic layer 110 by Electron Beam Deposition (EBD) method. Subsequently, for example, heat the deposited intermediate product at 600 °C in a nitrogen atmosphere for about 2 minutes to form an alloy, thereby obtaining the second electrode 150, and the second electrode 150 has an ohmic contact with the first substrate 100.

[0071] Further, after depositing the first electrode 140, the method may further include: depositing a passivation layer on the epitaxial structure 120.

[0072] Further, before depositing the second electrode 150 on the second surface of the first substrate 100 opposite to the first surface, the method may further include: forming a second substrate 101 on the second surface of the first substrate 100 opposite to the first surface, where the second substrate 101 is an n-type doped substrate and its doping concentration is less than 1×10 18 cm -3 . Correspondingly, depositing the second electrode 150 on the second surface of the first substrate 100 opposite to the first surface may include: depositing the second electrode 150 that makes an ohmic contact with the second substrate 101 on the surface of the second substrate 101 away from the first substrate 100.

[0073] Among them, the definitions and descriptions of the components in the method embodiments can refer to the corresponding parts in the previous device embodiments, and will not be elaborated here.

[0074] In summary, for the diode and its manufacturing method provided by the embodiments of the present invention, by performing high-concentration n-type doping on the first semiconductor layer and the first substrate respectively, the barrier between the first semiconductor layer and the first substrate can be reduced, so that electrons can pass through the barrier between the first substrate and the first semiconductor layer when the diode conducts forward, and thus the forward conduction voltage drop of the diode can be significantly reduced. In addition, such a diode has a simple structure and correspondingly low manufacturing cost.

[0075] It should also be noted that in the description of the present invention, unless otherwise clearly defined and limited, the terms "arrange", "install", "connect", and "couple" should be understood in a broad sense. For example, it may be a fixed connection, a detachable connection, or an integral connection; it may be a mechanical connection or an electrical connection; it may be a direct connection or an indirect connection through an intermediate medium, and it may be the internal communication of two components. For those of ordinary skill in the art, the specific meanings of the above terms in the present invention can be understood according to specific situations. In addition, the technical solutions provided in the embodiments of the present invention can be combined for use.

[0076] In the description of the present invention, it should be noted that the orientation or positional relationship indicated by the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc. is based on the orientation or positional relationship shown in the drawings, or the orientation or positional relationship in which the product of the present invention is usually placed during use. It is only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be construed as a limitation to the present invention. In addition, the terms "first", "second", "third", etc. are only used for distinguishing descriptions and cannot be understood as indicating or implying relative importance.

[0077] The above are only the preferred embodiments of the present invention and are not used to limit the present invention. For those skilled in the art, the present invention can have various changes and modifications. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included within the protection scope of the present invention.

Claims

1. A diode, characterized in that, The diode includes: A first substrate, the first substrate being an n-type doped substrate and having a doping concentration equal to or greater than 1×10 18 cm -3 ; a metal atomic layer located on a first surface of the first substrate; an epitaxial structure located on the metal atomic layer; a first electrode located on the epitaxial structure; a second electrode located on a second surface of the first substrate opposite to the first surface.

2. The diode according to claim 1, characterized in that, The epitaxial structure includes: an N-type semiconductor layer; an intrinsic semiconductor layer located on the N-type semiconductor layer; a P-type semiconductor layer located on the intrinsic semiconductor layer.

3. The diode according to claim 2, characterized in that, The doping concentration of the N-type semiconductor layer is equal to or greater than 1×10 18 cm -3 .

4. The diode according to claim 1, characterized in that, The epitaxial structure includes: an N-type semiconductor layer including a groove; a P-type semiconductor layer located in the groove.

5. The diode according to claim 4, wherein The N-type semiconductor layer is a lightly doped semiconductor layer, the P-type semiconductor layer is a heavily doped semiconductor layer, and the N-type semiconductor layer and the P-type semiconductor layer have a single-layer structure or a multi-layer structure.

6. The diode according to claim 1, wherein The metal atomic layer has a pattern, and the pattern is a continuous pattern or a discontinuous pattern.

7. The diode according to claim 1, wherein The material of the metal atomic layer is one of Al and Mg.

8. The diode according to claim 1, wherein The first electrode is in Schottky contact with the epitaxial structure, and the second electrode is in ohmic contact with the first substrate.

9. The diode according to claim 1, characterized in that, The diode further includes a second substrate located between the first substrate and the second electrode. The second substrate is an n-type doped substrate with a doping concentration less than 1×10 18 cm -3 , and the second electrode is in ohmic contact with the second substrate.

10. The diode according to any one of claims 1 to 9, characterized in that, The diode is a vertical structure light-emitting diode, and the horizontal width of the vertical structure light-emitting diode is less than 500 um.

11. The diode according to claim 10, characterized in that, The horizontal width of the vertical structure light-emitting diode is less than 100 um.

12. A manufacturing method of a diode, characterized in that, It includes: A metal atomic layer is formed on a first surface of a first substrate, the first substrate being an n-type doped substrate and having a doping concentration equal to or greater than 1×10 18 cm -3 ; forming an epitaxial structure on the metal atomic layer; forming a first electrode on the epitaxial structure; forming a second electrode on a second surface of the first substrate opposite to the first surface.

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