Card reader and electronic device with card reading function

By introducing capacitors and bridging card reading circuits into the card reader, combined with selection and control circuits, signal conversion for different types of SD cards is achieved, solving the problem that existing card readers cannot support multiple SD cards simultaneously, and improving compatibility and signal quality.

CN116362275BActive Publication Date: 2026-05-26REALTEK SEMICON CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
REALTEK SEMICON CORP
Filing Date
2021-12-20
Publication Date
2026-05-26

AI Technical Summary

Technical Problem

Existing card readers cannot simultaneously support SD Express cards, UHS-II SD cards, and traditional SD cards, resulting in inconvenience in use.

Method used

Design a card reader or electronic device, comprising a chip, a memory card slot, a card reader, a capacitor, and a bridging card reader circuit. The capacitor enables AC coupling of signals, and the selection circuit and control circuit identify the card type. The device converts different types of SD card signals into PCIe signals to achieve compatibility.

Benefits of technology

It enables simultaneous reading of SD Express cards, UHS-II SD cards, and traditional SD cards, improving the compatibility and signal quality of the card reader.

✦ Generated by Eureka AI based on patent content.

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Patent Text Reader

Abstract

A card reader and an electronic device having a card reading function are disclosed. The electronic device includes: a chip, a memory card slot, a card reader, and a capacitor. The memory card slot is used to receive a memory card. The card reader is coupled to the chip via a Fast Peripheral Component Interconnect (FPCI) interface and receives from the memory card slot at least one of a first FPCI signal, a Type II UHT card signal, and a conventional security digital card (SDC) signal, wherein the Type II UHT card signal includes a DC component and an AC component. The capacitor is used to establish the FPCI interface. The card reader includes a bridging card reader circuit for converting the conventional SDC signal or the Type II UHT card signal into a second FPCI signal for transmission through the FPCI interface.
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Description

Technical Field

[0001] This invention relates to Secure Digital (SD) memory cards, and more particularly to SD card reading devices, electronic devices, and methods for determining the type of SD card. Background Technology

[0002] Currently, the most common secure digital storage cards are of three types: traditional SD cards, SD cards supporting the Peripheral Component Interconnect Express (PCIe) interface (i.e., SD Express cards), and SD cards supporting the Ultra High Speed ​​type II (UHS-II) interface (UHS-II SD cards). Both SD Express and UHS-II SD cards are backward compatible with traditional SD cards. However, because SD Express and UHS-II SD cards have identical signal contact arrangements, but the PCIe interface is AC-coupled while the UHS-II interface is DC-coupled, card readers cannot simultaneously support both SD Express and UHS-II SD cards, causing considerable inconvenience to users. For example, a card reader that does not support UHS-II SD cards can only read UHS-II SD cards based on the specifications of traditional SD cards.

[0003] Therefore, a card reader or electronic device that can support multiple SD cards is needed. Summary of the Invention

[0004] In view of the shortcomings of the prior art, one object of the present invention is to provide a card reader or electronic device that can support a variety of SD cards, so as to improve the shortcomings of the prior art.

[0005] An embodiment of the present invention provides an electronic device with a card reading function, comprising: a chip, a memory card slot, a card reader, and a capacitor. The memory card slot is used to receive a memory card. The card reader is coupled between the chip and the memory card slot, coupled to the chip via a Fast Peripheral Component Interconnect (FPCI) interface, and receives from the memory card slot at least one of a first FPCI signal, a Type II UHT card signal, and a conventional security digital card signal, wherein the Type II UHT card signal includes a DC component and an AC component. The capacitor is coupled between the chip and the card reader to establish the FPCI interface. The card reader includes a bridging card reader circuit, which converts the conventional security digital card signal or the Type II UHT card signal into a second FPCI signal for transmission via the FPCI interface.

[0006] Another embodiment of the present invention provides a card reader device, comprising: a first pin, a second pin, a bridging card reader circuit, a selection circuit, and a control circuit. The first pin is used to receive a Type II Ultra-High Speed ​​Security Digital Card (UHS-1) signal or a First Fast Peripheral Component Interconnect (FSI) signal. The second pin is used to receive a Conventional Security Digital Card (CSDC) signal. The bridging card reader circuit is coupled to the first pin and the second pin, and is used to convert the Type II UHS-1 or Conventional Security Digital Card (CSDC) signal into a Type II FSI signal. The selection circuit receives the Type II FSI signal or the Type II FSI signal. The control circuit is coupled to the selection circuit, and is used to detect the type of a memory card, and control the selection circuit to output the Type II FSI signal or the Type II FSI signal according to the type of the memory card.

[0007] Another embodiment of the present invention provides a card reader device, comprising: a first pin, a second pin, a bridging card reader circuit, a capacitor, a selection circuit, and a control circuit. The first pin is used to receive a first signal. The second pin is used to receive a second signal. The bridging card reader circuit is coupled to the first pin and the second pin, and is used to convert the first signal or the second signal into a Fast Peripheral Component Interconnect (FPCI) signal. The capacitor has a first terminal and a second terminal, the first terminal being electrically connected to the first pin to receive the first signal, and the second terminal outputting or receiving a third signal, wherein the first signal includes an AC component and a DC component, and the third signal includes the AC component but does not include the DC component. The selection circuit receives the third signal and the FPCI signal. The control circuit is coupled to the selection circuit, and is used to detect the type of a memory card, and control the selection circuit to output the third signal or the FPCI signal according to the type of the memory card.

[0008] Compared to existing technologies, the card reader of the present invention and the electronic device with card reading function can support at least SD Express cards, UHS-II SD cards and traditional SD cards simultaneously.

[0009] The features, implementation, and technical effects of this invention are described in detail below with reference to the accompanying drawings. Attached Figure Description

[0010] Figures 1-12 This is a functional block diagram of an embodiment of the electronic device of the present invention;

[0011] Figure 13 Displays the pin numbers of the security digital card;

[0012] Figure 14 A flowchart showing an embodiment of the memory card type identification method of the present invention;

[0013] Symbol Explanation

[0014] 10A, 10B, 10C, 10D, 10E, 10F, 10G, 10H, 10I, 10J, 10K, 10L: Electronic devices

[0015] 20: SD card

[0016] 12: Chip

[0017] C1, C2, C3: Capacitors

[0018] 11A, 11B, 11C, 11D, 11E, 11F, 11G, 11H, 11I, 11J, 11K, 11L: Card reader

[0019] 18: Memory card slot

[0020] S0, S1, S2, S4, S5, S6, S7, S9: Signals

[0021] P1, P3, P2, P4: Pins

[0022] 105, 140: Selection circuit

[0023] 120: Control Circuit

[0024] 130: Bridged card reader circuit

[0025] 135: UHS-II Physical Layer

[0026] S3, S8: Control signals

[0027] Pa, Pb: Endpoints

[0028] 145: Switching Circuit

[0029] 150: Terminal adjustment circuit

[0030] S11, S12, S13, S14, S15, S16, S21, S22, S23, S24, S25, S26, S27, S31, S32, S33, S34: Steps Detailed Implementation

[0031] The technical terms used in the following description are based on the customary terms in this technical field. If this specification provides explanations or definitions for certain terms, the explanations or definitions in this specification shall prevail.

[0032] The present invention discloses a card reader or electronic device supporting various SD cards, and a method for identifying SD card types. Since some components of the card reader and electronic device of the present invention may be known individually, details of known components will be omitted in the following description without affecting the full disclosure and implementability of the invention. Furthermore, part or all of the process of the method for identifying SD card types of the present invention may be in the form of software and / or firmware, and can be executed by the card reader of the present invention or its equivalent. Without affecting the full disclosure and implementability of the method invention, the following description of the method invention will focus on the steps rather than the hardware.

[0033] Figure 1 This is a functional block diagram of an embodiment of the electronic device of the present invention. The electronic device 10A has a card reading function and can access an SD card 20. The electronic device 10A includes a chip 12, a capacitor C1, a card reader 11A, a capacitor C2, and a memory card slot 18. The card reader 11A is coupled between the chip 12 and the memory card slot 18. More specifically, the card reader 11A is coupled to the chip 12 via capacitor C1 and to the memory card slot 18 via capacitor C2. The memory card slot 18 is used to receive the SD card 20 (i.e., for inserting the SD card 20).

[0034] One end of capacitor C1 is coupled or electrically connected to chip 12, and the other end is coupled or electrically connected to card reader 11A. Capacitor C1 acts as an AC coupling capacitor. When the signal transmission direction is from chip 12 to card reader 11A, the signal S0 between chip 12 and capacitor C1 contains both AC and DC components, while the signal S1 between capacitor C1 and card reader 11A contains only the AC component and not the DC component. When the signal transmission direction is from card reader 11A to chip 12, signal S1 contains both AC and DC components, while signal S0 contains only the AC component and not the DC component. Because PCIe signals are transmitted through AC coupling, one of the purposes of capacitor C1 is to provide a PCIe signal connection between chip 12 and card reader 11A, that is, to establish a PCIe interface between chip 12 and card reader 11A.

[0035] One end of capacitor C2 is coupled or electrically connected to pin P1 of card reader 11A, and the other end of capacitor C2 is coupled or electrically connected to pin P3 of memory card slot 18. Capacitor C2 acts as an AC coupling capacitor. When the signal transmission direction is from memory card slot 18 to card reader 11A, signal S5 between pin P3 and capacitor C2 contains both AC and DC components, while signal S2 between capacitor C2 and pin P1 contains only the AC component and not the DC component. When the signal transmission direction is from card reader 11A to memory card slot 18, signal S2 may contain both AC and DC components, while signal S5 contains only the AC component and not the DC component. It is worth noting that when the signal transmitted between pin P1 and pin P3 is a PCIe signal, both signal S5 and signal S2 are PCIe signals.

[0036] The card reader 11A also includes pins P2 and P4. Pin P2 is coupled or electrically connected to pin P3, and pin P4 is coupled or electrically connected to at least one pin (not shown) of the memory card slot 18. When the SD card 20 is a conventional SD card, the card reader 11A accesses the SD card 20 at least through pin P4 (signal S7 is a signal conforming to the conventional SD card specification, hereinafter referred to as the conventional SD card signal). When the SD card 20 is a UHS-II SD card (in this case, signal S5 is a signal conforming to the UHS-II SD card specification, hereinafter referred to as the UHS-II SD card signal), the card reader 11A accesses the SD card 20 at least through pin P2, but not through pin P1. In this case, pin P1 becomes a sideband signal for auxiliary use, such as providing a clock or some control signals. When the SD card 20 is an SD Express card (at this time, signal S5 is the SD Express card signal), the card reader 11A accesses the SD card 20 at least through pin P1, but not through pin P2.

[0037] In some embodiments, chip 12, capacitors C1, C2, 11A and memory card slot 18 are disposed on the circuit board (not shown) of electronic device 10A, and the aforementioned signals S0, S1, S2, S5 and S7 are transmitted via traces on the circuit board or wires.

[0038] The card reader 11A includes a selection circuit 105 (e.g., a multiplexer, MUX), a control circuit 120, and a bridged card reader circuit 130. The control circuit 120 is coupled to the selection circuit 105 and the bridged card reader circuit 130 and is used to control the selection circuit 105 and the bridged card reader circuit 130.

[0039] The bridging card reader circuit 130 converts a conventional SD card signal (i.e., signal S7) into a PCIe signal (i.e., signal S4). The bridging card reader circuit 130 includes a UHS-II physical layer 135 used to convert UHS-II SD card signals (e.g., signal S5) into signal S4. In other words, the bridging card reader circuit 130 is a bridging card reader circuit for conventional SD cards and UHS-II SD cards. The bridging card reader circuits for conventional SD cards and UHS-II SD cards are well known to those skilled in the art, and therefore their details will not be elaborated upon. For the conventional SD card part, please refer to the Physical Layer Simplified Specification on the SD Association website https: / / www.sdcard.org / downloads / pls / ; and for the UHS-II part, please refer to the UHS-II Simplified Addendum.

[0040] Selection circuit 105 receives signals S2 and S4. Control circuit 120 controls selection circuit 105 via control signal S3. When SD card 20 is an SD Express card, control circuit 120 controls selection circuit 105 to select terminal Pa; that is, to form a path between capacitor C1 and pin P1 (i.e., signal connection: signal S1 = signal S2), and to form an open circuit between capacitor C1 and bridge card reader circuit 130 (i.e., no signal connection: signal S1 ≠ signal S4). When SD card 20 is a UHS-II SD card or a conventional SD card, control circuit 120 controls selection circuit 105 to select terminal Pb; that is, to form a path between capacitor C1 and bridge card reader circuit 130 (signal S1 = signal S4), and to form an open circuit between capacitor C1 and pin P1 (signal S1 ≠ signal S2).

[0041] When SD card 20 is an SD Express card, chip 12 accesses the SD card through the following path. When SD card 20 is a UHS-II SD card, chip 12 accesses the SD card through the following path. When SD card 20 is a traditional SD card, chip 12 accesses the SD card through the following path. In other words, the card reader 11A supports access to multiple SD cards, and the electronic device 10A using the card reader 11A has the ability to access multiple SD cards.

[0042] Figure 1 Chip 12 is connected to or communicates with card reader 11A via a PCIe interface; in other words, the presence of capacitor C1 ensures that the signal transmission between chip 12 and card reader 11A conforms to PCIe specifications. Therefore, in some embodiments, capacitor C2 can be omitted to save cost or circuit area.

[0043] Figure 2 This is a functional block diagram of another embodiment of the electronic device of the present invention. Electronic device 10B includes a chip 12, a capacitor C1, a card reader 11B, and a memory card slot 18. The card reader 11B is the same as the card reader 11A in FIG1. ​​Electronic device 10B is similar to electronic device 10A, except that electronic device 10B does not include a capacitor C2. Figure 2 In this embodiment, capacitor C1 is responsible for AC coupling of the signal. Compared to Figure 1 , Figure 2 Because the embodiment omits capacitor C2, it can save costs and circuit board area.

[0044] Figure 3 This is a functional block diagram of another embodiment of the electronic device of the present invention. Electronic device 10C includes a chip 12, a capacitor C1, a card reader 11C, a capacitor C2, and a memory card slot 18. Card reader 11C is similar to card reader 11A, but card reader 11C also includes a selection circuit 140. Selection circuit 140 is coupled to or electrically connected to control circuit 120, pin P1, pin P2, selection circuit 105, and bridging card reader circuit 130.

[0045] The control circuit 120 controls the selection circuit 140 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the selection circuit 140 to form a path between the selection circuit 105 and pin P1 (signal S9 = signal S2), and to form an open circuit between the bridging card reader circuit 130 and pin P2 (i.e., the bridging card reader circuit 130 and pin P2 are not signal-connected or electrically connected); when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the selection circuit 140 to form an open circuit between the selection circuit 105 and pin P1, and to form a path between the bridging card reader circuit 130 and pin P2 (signal S6 = signal S5, i.e., the bridging card reader circuit 130 and pin P2 are signal-connected or electrically connected). In some embodiments, the selection circuit 140 may be a multiplexer.

[0046] When an open circuit is formed between the bridge card reader circuit 130 and pin P2, most of the signal S5 will be transmitted to pin P1 through capacitor C2, which helps improve the quality of signal S2 (e.g., reducing signal attenuation or interference). In other words, compared to... Figure 1 Implementation examples, Figure 3 The implementation can improve the quality of the PCIe signals (i.e., signals S2 and S9) of the SD Express card.

[0047] Figure 4 This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10D includes a chip 12, a capacitor C1, a card reader 11D, a capacitor C2, and a memory card slot 18. The card reader 11D is similar to the card reader 11A, but the card reader 11D also includes a switching circuit 145. The switching circuit 145 is coupled to or electrically connected to the control circuit 120, pin P2, and bridged card reader circuit 130.

[0048] The control circuit 120 controls the switch circuit 145 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the switch circuit 145 to create an open circuit between the bridge card reader circuit 130 and pin P2; when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the switch circuit 145 to create a closed circuit between the bridge card reader circuit 130 and pin P2 (signal S6 = signal S5).

[0049] Similarly, when an open circuit is formed between the bridging card reader circuit 130 and pin P2, the quality of the PCIe signal (i.e., signal S2) of the SD Express card can be improved.

[0050] Figure 5This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10E includes a chip 12, a capacitor C1, a card reader 11E, and a memory card slot 18. The card reader 11E is similar to the card reader 11B, but the card reader 11E does not include pin P2; therefore, the bridged card reader circuit 130 receives signal S5 through pin P1 instead of pin P2. Compared to... Figure 2 In this embodiment, because the card reader 11E has fewer pins, the card reader 11E has a smaller area and lower cost. Furthermore, reducing the number of pins also reduces the number of traces on the circuit board, further reducing the area and cost of the circuit board.

[0051] Furthermore, because the frequency of signal S5 is approximately in the gigahertz (GHz) range, such high-speed signals are highly sensitive to trace bifurcation. A bifurcation needs to be less than 1 / 8 of the wavelength to minimize its impact on the original signal. Therefore, in-chip routing allows for better impedance matching of the transmission line. For example, the trace length (distance between pin P1 and the bridge card reader circuit 130) for an 8GHz PCIe signal should be less than 1 / 8 of the wavelength (approximately 4mm). For this length, it is easier to adjust the trace length within the chip (i.e., within the card reader 11E) than on the circuit board.

[0052] Figure 6 This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10F includes a chip 12, a capacitor C1, a card reader 11F, and a memory card slot 18. The card reader 11F is similar to the card reader 11E, but the card reader 11F also includes a selection circuit 140. The selection circuit 140 is coupled to or electrically connected to the control circuit 120, pin P1, the selection circuit 105, and the bridged card reader circuit 130.

[0053] The control circuit 120 controls the selection circuit 140 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the selection circuit 140 to create a path between the selection circuit 105 and pin P1 (signal S9 = signal S5), and to create an open circuit between the bridging card reader circuit 130 and pin P1; when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the selection circuit 140 to create an open circuit between the selection circuit 105 and pin P1, and to create a path between the bridging card reader circuit 130 and pin P1 (signal S6 = signal S5).

[0054] When an open circuit is formed between the bridging card reader circuit 130 and pin P1, the impedance between the bridging card reader circuit 130 and pin P1 increases. As a result, most of the signal S5 will be transmitted to the selection circuit 105 through the selection circuit 140 (i.e., signal S9 = signal S5), which helps improve the quality of signal S9. In other words, compared to... Figure 5 Implementation examples, Figure 6 The implementation can improve the quality of the PCIe signals (i.e., signals S5 and S9) of the SD Express card.

[0055] Figure 7 This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10G includes a chip 12, a capacitor C1, a card reader 11G, and a memory card slot 18. The card reader 11G is similar to the card reader 11E, but the card reader 11G also includes a switching circuit 145. The switching circuit 145 is coupled to or electrically connected to a control circuit 120, a pin P1, a selection circuit 105, and a bridged card reader circuit 130.

[0056] The control circuit 120 controls the switch circuit 145 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the switch circuit 145 to create an open circuit between the bridge card reader circuit 130 and pin P1; when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the switch circuit 145 to create a closed circuit between the bridge card reader circuit 130 and pin P1 (signal S6 = signal S5).

[0057] Similarly, when an open circuit is formed between the bridging card reader circuit 130 and pin P1, the quality of the PCIe signal (i.e., signal S5) of the SD Express card can be improved.

[0058] Figure 8 This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10H includes a chip 12, a capacitor C1, a card reader 11H, and a memory card slot 18. The card reader 11H is similar to the card reader 11E, but the card reader 11H also includes a terminal adjustment circuit 150. The terminal adjustment circuit 150 is coupled to or electrically connected to a control circuit 120, a pin P1, a selection circuit 105, and a bridged card reader circuit 130.

[0059] The control circuit 120 controls the terminal adjustment circuit 150 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the terminal adjustment circuit 150 to a first impedance (a relatively high impedance, for example, reducing interference to the PCIe signal (i.e., signal S5) caused by the stub connecting the bridging card reader circuit 130); when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the terminal adjustment circuit 150 to a second impedance (a relatively low impedance, for example, creating a path between the bridging card reader circuit 130 and pin P1 (signal S6 = signal S5)). In some embodiments, the first impedance is greater than the second impedance.

[0060] Figure 9 This is a functional block diagram of another embodiment of the electronic device of the present invention. Electronic device 10I includes a chip 12, a capacitor C1, a card reader 11I, and a memory card slot 18. Card reader 11I is similar to card reader 11E, but card reader 11I also includes a capacitor C3. The first terminal of capacitor C3 is coupled or electrically connected to pin P1 and the bridging card reader circuit 130; the second terminal of capacitor C3 is coupled or electrically connected to the selection circuit 105 (i.e., the second terminal outputs or receives signal S2). In other words, in Figure 9 In the embodiment, when the signal transmission direction is from the memory card slot 18 to the card reader 11I, signal S5 contains both DC and AC components, while signal S2 contains only the AC component but not the DC component; when the signal transmission direction is from the card reader 11I to the memory card slot 18, signal S2 may contain both DC and AC components, while signal S5 contains only the AC component but not the DC component. It is worth noting that when the signal transmitted between terminal Pa and pin P1 is a PCIe signal, both signal S5 and signal S2 are PCIe signals. Compared to... Figure 1 In this embodiment, the card reader 11I has fewer pins, so the number of traces on the circuit board can be reduced, thereby reducing the area and cost of the circuit board.

[0061] Figure 10 This is a functional block diagram of another embodiment of the electronic device of the present invention. Electronic device 10J includes a chip 12, a capacitor C1, a card reader 11J, and a memory card slot 18. Card reader 11J is similar to card reader 11I, but card reader 11J also includes a selection circuit 140. Selection circuit 140 is coupled or electrically connected to control circuit 120, pin P1, capacitor C3, and bridged card reader circuit 130. One end of capacitor C3 is coupled or electrically connected to selection circuit 140; the other end of capacitor C3 is coupled or electrically connected to selection circuit 105.

[0062] The control circuit 120 controls the selection circuit 140 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the selection circuit 140 to create a circuit between capacitor C3 and pin P1, and to create an open circuit between the bridge card reader circuit 130 and pin P1; when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the selection circuit 140 to create an open circuit between capacitor C3 and pin P1, and to create a circuit between the bridge card reader circuit 130 and pin P1 (signal S6 = signal S5).

[0063] When an open circuit is formed between the bridge card reader circuit 130 and pin P1, the impedance between the bridge card reader circuit 130 and pin P1 increases; as a result, most of the signal S5 will be transmitted to capacitor C3 through the selection circuit 140, which helps to improve the quality of the PCIe signal of the SD Express card (i.e., signal S5 and signal S2).

[0064] Figure 11 This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10K includes a chip 12, a capacitor C1, a card reader 11K, and a memory card slot 18. The card reader 11K is similar to the card reader 11I, but the card reader 11K also includes a switching circuit 145. The switching circuit 145 is coupled to or electrically connected to the control circuit 120, pin P1, capacitor C3, and bridged card reader circuit 130.

[0065] The control circuit 120 controls the switch circuit 145 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the switch circuit 145 to create an open circuit between the bridge card reader circuit 130 and pin P1; when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the switch circuit 145 to create a closed circuit between the bridge card reader circuit 130 and pin P1 (signal S6 = signal S5).

[0066] Similarly, when an open circuit is formed between the bridging card reader circuit 130 and pin P1, the quality of the PCIe signals (i.e., signals S5 and S2) of the SD Express card can be improved.

[0067] Figure 12This is a functional block diagram of another embodiment of the electronic device of the present invention. The electronic device 10L includes a chip 12, a capacitor C1, a card reader 11L, and a memory card slot 18. The card reader 11L is similar to the card reader 11I, but the card reader 11L also includes a terminal adjustment circuit 150. The terminal adjustment circuit 150 is coupled to or electrically connected to the control circuit 120, pin P1, capacitor C3, and the bridging card reader circuit 130.

[0068] The control circuit 120 controls the terminal adjustment circuit 150 via control signal S8 according to the type of SD card 20. More specifically, when the SD card 20 is an SD Express card, the control circuit 120 controls the terminal adjustment circuit 150 to a first impedance (a relatively high impedance, for example, reducing interference to the PCIe signal (i.e., signal S5) by reducing the trace branch connecting the bridge card reader circuit 130); when the SD card 20 is a UHS-II SD card, the control circuit 120 controls the terminal adjustment circuit 150 to a second impedance (a relatively low impedance, for example, creating a path between the bridge card reader circuit 130 and pin P1 (signal S6 = signal S5)). In some embodiments, the first impedance is greater than the second impedance.

[0069] The aforementioned pins P1, P2, P3, and P4 can each represent one or more pins. Those skilled in the art can design the control circuit 120 based on the above disclosure; that is, the control circuit 120 can be an application-specific integrated circuit (ASIC) or implemented using circuits or hardware such as a programmable logic device (PLD).

[0070] In summary, this invention provides a variety of card reading devices that support various SD cards. This invention also provides a variety of electronic devices employing these card reading devices.

[0071] Figure 13 Displays the pin numbers of the Secure Digital Card (traditional SD card, UHS-II SD card, and SD Express card). These pin numbers conform to the Secure Digital Card specification defined by the Secure Digital Association (SDA). For a description of these pins and more details, please refer to the Physical Layer Simplified Specification on the SDA website: https: / / www.sdcard.org / downloads / pls / . Figure 13The pin or signal names listed (such as clock RCLK+ / -, clock REFCLK+ / -, signal PERST#, CLKREQ#, etc.) can all be found in the Security Digital Card Specification for definitions or related implementation details.

[0072] exist Figures 1 to 12 In this embodiment, the control circuit 120 communicates with the SD card 20 (including, but not limited to, transmitting / receiving clock signals, commands, data, etc.) via pins P1, P2, P4 and / or other pins (not shown) of the card reader (e.g., any of 11A to 11L). For simplicity, in Figures 1 to 12 The connections between these pins and the control circuit 120 and the memory card slot 18 are omitted.

[0073] Figure 14 A flowchart illustrating an embodiment of the memory card type identification method of the present invention is shown. This process can be executed by a card reader and includes the following steps.

[0074] Step S11: Perform the UHS-II SD card initialization procedure on SD card 20. Step S21: Determine if SD card 20 is a UHS-II SD card. If the determination result is yes, proceed to step S31; otherwise, proceed to step S12. Step S31: Continue the UHS-II SD card initialization procedure (see the Secure Digital Card Specification for details).

[0075] Step S12: Control pin 4 is essentially 0 volts (V) and control pin 14 is essentially 0V (i.e., equivalent to turning off pins 4 and 14). Note that "essentially a voltage" means equal to or approximately that voltage.

[0076] Step S13: Perform the SD Express card initialization procedure on SD card 20. Step S22: Determine if SD card 20 is an SD Express card. If the determination result is yes, proceed to step S32; otherwise, proceed to step S14. Step S32: Continue the SD Express card initialization procedure (see the Secure Digital Card Specification for details).

[0077] Step S14: Step S14 is the same as step S12.

[0078] Step S15: Perform a traditional SD card initialization procedure on SD card 20. Step S23: Determine whether SD card 20 is a traditional SD card. If the determination result is yes, proceed to step S33; otherwise, proceed to step S34.

[0079] Step S33: Continue with the traditional SD card initialization procedure (see the Secure Digital Card Specification for details).

[0080] Step S34: Control pin 4 is actually 0V because SD card 20 is another type of memory card or not a memory card.

[0081] Although the above embodiments use conventional SD cards, SD Express cards, and UHS-II SD cards as examples, this is not a limitation of the present invention. Those skilled in the art can appropriately apply the present invention to other types of SD memory cards based on the disclosure of the present invention.

[0082] Since those skilled in the art can understand the implementation details and variations of the method invention through the disclosure of the apparatus invention in this case, to avoid redundancy, repeated descriptions are omitted here without affecting the disclosure requirements and implementability of the method invention. Please note that the shapes, sizes, and proportions of the elements in the aforementioned figures are merely illustrative and are intended for those skilled in the art to understand the invention, and are not intended to limit the invention. Furthermore, in some embodiments, the order of the steps mentioned in the aforementioned flowchart may be adjusted according to actual operation, and they may even be performed simultaneously or partially simultaneously.

[0083] While the embodiments of the present invention have been described above, these embodiments are not intended to limit the present invention. Those skilled in the art can make changes to the technical features of the present invention based on its explicit or implicit content. All such changes fall within the scope of patent protection sought by the present invention. In other words, the scope of patent protection of the present invention shall be determined by the claims of this specification.

Claims

1. An electronic device with a card reader function, comprising: One chip; A memory card slot is used to receive a memory card; A card reader is coupled between the chip and the memory card slot, is coupled to the chip via a Fast Peripheral Component Interconnect (FPCI) interface, and receives at least one of the following from the memory card slot: a first FPCI signal, a second type ultra-high-speed security digital card (UHVDC) signal, and a conventional security digital card (SDC) signal. The signal of this second type of ultra-high-speed secure digital card includes a DC component and an AC component; and A capacitor is coupled between the chip and the card reader to establish the fast peripheral component interconnection interface; The card reader includes a bridging card reader circuit, which is used to convert the conventional security digital card signal or the second type ultra-high speed security digital card signal into a second fast peripheral component interconnect signal for transmission through the fast peripheral component interconnect interface.

2. The electronic device as claimed in claim 1, wherein, The capacitor is a first capacitor, the card reader has a first pin and a second pin, and the electronic device further includes: A second capacitor has a first terminal and a second terminal. The first terminal is electrically connected to the first pin of the card reader, and the second terminal is electrically connected to the second pin of the card reader and the memory card slot.

3. The electronic device as claimed in claim 2, wherein, The card reader also includes: A selection circuit, electrically connecting the first pin and the second pin; and A control circuit, coupled to the selection circuit, is used to control the selection circuit; Specifically, when the memory card is a Secure Digital Fast Card, the control circuit controls the selection circuit to prevent the bridging card reader circuit from forming a signal connection with the second pin; and when the memory card is a Type II Ultra-High Speed ​​Secure Digital Card, the control circuit controls the selection circuit to prevent the bridging card reader circuit from forming a signal connection with the second pin.

4. The electronic device as claimed in claim 2, wherein, The card reader also includes: A switching circuit, electrically connecting the first pin and the second pin; and A control circuit, coupled to the switching circuit, is used to control the switching circuit. Specifically, when the memory card is a secure digital fast card, the control circuit controls the switch circuit to prevent the bridging card reader circuit from forming a signal connection with the second pin; and when the memory card is a second type ultra-high speed secure digital card, the control circuit controls the switch circuit to prevent the bridging card reader circuit from forming a signal connection with the second pin.

5. The electronic device as claimed in claim 1, wherein, The card reader also includes: One pin electrically connects the bridge card reader circuit and the memory card slot; A selection circuit is coupled to the pin and receives the first fast peripheral component interconnect signal through the pin; as well as A control circuit, coupled to the selection circuit, is used to detect the type of the memory card and, based on the type of the memory card, control the selection circuit to output the first fast peripheral component interconnect signal or the second fast peripheral component interconnect signal.

6. The electronic device as claimed in claim 1, wherein, The card reader also includes: One pin connects to the memory card slot. A switching circuit electrically connects the pin to the bridged card reader circuit; and A control circuit, coupled to the switching circuit, is used to control the switching circuit. Specifically, when the memory card is a Secure Digital Fast Card, the control circuit controls the switch circuit to prevent the bridging card reader circuit from forming a signal connection with the pin; and when the memory card is a Type II Ultra-High Speed ​​Secure Digital Card, the control circuit controls the switch circuit to prevent the bridging card reader circuit from forming a signal connection with the pin.

7. The electronic device as claimed in claim 1, wherein, The card reader also includes: One pin connects to the memory card slot. A terminal adjustment circuit, electrically connected to the pin and the bridged card reader circuit; and A control circuit, coupled to the terminal adjustment circuit, is used to control the terminal adjustment circuit; Specifically, when the memory card is a Secure Digital Fast Card, the control circuit sets the impedance of the terminal adjustment circuit to a first impedance; and when the memory card is a Type II Ultra-High Speed ​​Secure Digital Card, the control circuit sets the impedance of the terminal adjustment circuit to a second impedance, wherein the first impedance is greater than the second impedance.

8. The electronic device as claimed in claim 1, wherein, The capacitor is a first capacitor, and the card reader also includes: One pin electrically connects the memory card slot and the bridged card reader circuit; A second capacitor is electrically connected to this pin; A selection circuit is coupled to the second capacitor and receives the first fast peripheral component interconnect signal through the second capacitor; as well as A control circuit, coupled to the selection circuit, is used to detect the type of the memory card and, based on the type of the memory card, control the selection circuit to output the first fast peripheral component interconnect signal or the second fast peripheral component interconnect signal.

9. A card reader, comprising: A first pin is used to receive a Type II ultra-high-speed secure digital card signal or a first fast peripheral component interconnection signal; The second pin is used to receive signals from a conventional security digital card. A bridge card reader circuit, coupled to the first pin and the second pin, is used to convert the second type of ultra-high speed security digital card signal or the conventional security digital card signal into a second fast peripheral component interconnection signal; A selection circuit that receives either the first fast peripheral component interconnect signal or the second fast peripheral component interconnect signal; and A control circuit, coupled to the selection circuit, is used to detect the type of a memory card and, based on the type of the memory card, control the selection circuit to output the first fast peripheral component interconnect signal or the second fast peripheral component interconnect signal.

10. A card reader, comprising: The first pin is used to receive a first signal; The second pin is used to receive a second signal; A bridged card reader circuit, coupled to the first pin and the second pin, is used to convert the first signal or the second signal into a fast peripheral component interconnect signal; A capacitor has a first terminal and a second terminal. The first terminal is electrically connected to a first pin to receive a first signal, and the second terminal outputs or receives a third signal. The first signal contains an AC component and a DC component, while the third signal contains the AC component but not the DC component; A selection circuit receives the third signal and the fast peripheral component interconnect signal; and A control circuit, coupled to the selection circuit, is used to detect the type of a memory card and, based on the type of the memory card, control the selection circuit to output the third signal or the fast peripheral component interconnect signal.