Wide bandgap semiconductor termination structure and method of fabricating the same
By introducing a superjunction termination region and an auxiliary field-limiting ring termination region into the wide bandgap semiconductor termination structure, the electric field distribution is optimized, solving the reliability problem of the device under high voltage, high temperature and high humidity environments, and achieving a more stable electric field distribution and higher withstand voltage capability.
Patent Information
- Application Number
- CN202310416732.8
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-04-18
- Publication Date
- 2025-10-17
- Estimated Expiration
- 2043-04-18
AI Technical Summary
Existing wide-bandgap semiconductor terminal structures are prone to problems such as electric field concentration, breakdown and burnout, charge accumulation and moisture corrosion under high voltage, high temperature and high humidity environments, resulting in poor device reliability.
A wide bandgap semiconductor terminal structure is designed, including a substrate, an N-type electric field stop layer, a P-type buried layer, an N-type epitaxial layer, a P-type charge shielding layer, a P-type field limiting ring and a field oxide dielectric layer. A superjunction terminal region and an auxiliary field limiting ring terminal region are constructed to optimize the electric field distribution.
This improves the stability and reliability of the device in extreme environments, avoids electric field spikes, enhances resistance to external charges, and reduces the terminal footprint.
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Figure CN116364760B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] The present application relates to the technical field of semiconductor, in particular to a wide band gap semiconductor terminal structure and a manufacturing method thereof. BACKGROUND
[0002] Silicon carbide (SiC) and gallium nitride (GaN) are third-generation wide band gap semiconductor materials, which have more advantages than silicon (Si) in terms of band gap width, breakdown field strength, electron saturation drift speed and other physical properties. The prepared power devices such as diodes, transistors and power modules have more excellent electrical properties, which can overcome the defects of silicon-based power devices that cannot meet the application requirements of high power, high voltage, high frequency and high temperature, and are also one of the breakthrough paths that can surpass Moore's law, so they are widely used in new energy fields (photovoltaic, energy storage, charging piles, electric vehicles, etc.).
[0003] At present, the ultra-wide band gap semiconductor materials with a band gap width greater than silicon carbide (SiC) and gallium nitride (GaN) mainly include gallium oxide (Ga2O3), diamond (C), aluminum nitride (AlN), etc. With its superior optical and electrical properties, it has been considered as an exciting and challenging new research field. The larger band gap width enables devices to be applied in many extreme harsh environments: higher drilling speed and lower failure rate in the context of geothermal energy production and oil and gas exploration, higher operating temperature of aluminum plants, steel plants and coal-fired and gas-fired power plants controlled by electronic sensors in high temperature conditions, thereby improving the energy efficiency of these industrial processes.
[0004] Silicon carbide devices can be P-type doped by ion implantation or epitaxial growth, but it is difficult to achieve P-type doping by ion implantation for materials with a band gap width greater than silicon carbide, such as gallium nitride, gallium oxide, diamond, aluminum nitride (AlN), etc. P-type is generally achieved by epitaxial growth or special processes such as oxidation.
[0005] The terminal of the wide band gap semiconductor material has the following problems in actual process manufacturing and application:
[0006] 1. The high electric field of the drift region causes a very high electric field at the terminal, and the electric field is particularly concentrated at the edge of the terminal, thereby causing the edge of the terminal to be easily broken down and burned at high cathode voltage, and poor resistance to electrostatic effects in harsh environments and high voltage spikes in circuits;
[0007] 2. Since the wide band gap semiconductor device is mainly applied in high voltage, high temperature and high humidity environments, charge accumulation, moisture corrosion and ion migration may occur at the terminal. The resistance of ordinary terminal structures, such as field limiting rings and junction terminal extensions, to extreme conditions is weak, the terminal electric field is unevenly distributed, the withstand voltage is reduced, and even abnormal breakdown and burning occur in advance.
[0008] Therefore, in order to solve the above-mentioned defects of the existing wide band gap semiconductor terminal structure, the technical field needs to design a new wide band gap semiconductor terminal structure as a more ideal semiconductor material. SUMMARY
[0009] Based on the above description, the present application provides a wide band gap semiconductor terminal structure and a manufacturing method thereof, so as to optimize the distribution of the terminal electric field, so that the distribution of the electric field is not affected when working for a long time in a high-voltage, high-temperature, and high-humidity environment, avoiding the phenomena of breakdown and burnout in advance, and improving the reliability of the device.
[0010] The technical scheme for solving the above-mentioned technical problems is as follows:
[0011] In a first aspect, the present application provides a wide band gap semiconductor terminal structure, comprising: a substrate, an N-type electric field cutoff layer, a first P-type buried layer, a first N-type epitaxial layer, a P-type charge shielding layer, a P-type field limiting ring, and a field oxide dielectric layer.
[0012] The N-type electric field cutoff layer and the first P-type buried layer are sequentially embedded in the upper part of the substrate, the first N-type epitaxial layer is arranged on the upper surface of the first P-type buried layer and the substrate, the P-type charge shielding layer is embedded in the first region of the first N-type epitaxial layer, and the P-type field limiting ring is embedded in the second region of the N-type epitaxial layer.
[0013] The field oxide dielectric layer is arranged on the first N-type epitaxial layer, the field oxide dielectric layer in the first region is in contact with the upper surface of the P-type charge shielding layer, so as to form a super-junction terminal region, and the field oxide dielectric layer in the second region is filled in the P-type field limiting ring, so as to form an auxiliary field limiting ring terminal region.
[0014] On the basis of the above technical scheme, the present application can be further improved as follows.
[0015] Further, the N-type epitaxial layer is provided with a groove, the groove is arranged along the depth direction of the N-type epitaxial layer from the upper surface thereof, and the P-type field limiting ring is arranged along the groove wall.
[0016] Further, the groove is a plurality of grooves.
[0017] The plurality of grooves are sequentially and spacedly arranged along the length direction of the N-type epitaxial layer.
[0018] Further, the substrate comprises an N-type substrate and a second N-type epitaxial layer.
[0019] The second N-type epitaxial layer is arranged on the N-type substrate, and the N-type electric field cutoff layer is arranged on the second N-type epitaxial layer.
[0020] Further, the wide-bandgap semiconductor termination structure further comprises an anode and a cathode.
[0021] The anode is located in the super-junction termination region, and is arranged on the upper surface of the P-type charge shielding layer, and one side of the anode is in contact with one side of the field oxide dielectric layer.
[0022] The cathode is arranged on the lower surface of the N-type substrate.
[0023] Further, in the second N-type epitaxial layer, a region far away from the first region and the second region is further provided with a second P-type buried layer.
[0024] The second P-type buried layer and the first N-type epitaxial layer and the second N-type epitaxial layer form a parasitic NPN transistor structure.
[0025] Further, the first P-type buried layer is provided with an N-type isolation layer at a distal end portion of the auxiliary field limiting ring termination region to form an N-type isolation region.
[0026] In a second aspect, the application further provides a manufacturing method for manufacturing the wide-bandgap semiconductor termination structure according to any one of the first aspect, comprising:
[0027] An N-type electric field cutoff layer and a first P-type buried layer are sequentially manufactured on a substrate;
[0028] A first N-type epitaxial layer is grown on the upper surface of the substrate and the first P-type buried layer;
[0029] Dry etching is performed on a second region of the first N-type epitaxial layer to obtain a groove;
[0030] Ion implantation is performed on a first region of the first N-type epitaxial layer to obtain a P-type charge shielding region;
[0031] A P-type field limiting ring is manufactured along the groove wall of the groove;
[0032] A field oxide dielectric is deposited on the upper end surface of the first region and the second region to obtain a field oxide dielectric layer.
[0033] On the basis of the above technical solution, the application can be further improved as follows.
[0034] Further, before sequentially manufacturing an N-type electric field cutoff layer and a first P-type buried layer on a substrate, the method further comprises:
[0035] A second N-type epitaxial layer is grown on the substrate to obtain the substrate.
[0036] Further, after obtaining the field oxide dielectric layer, the method further comprises:
[0037] A metal is deposited on the upper surface of the P-type charge shielding layer to manufacture an anode.
[0038] Depositing a metal on the lower surface of the substrate to make a cathode.
[0039] Compared with the prior art, the technical scheme has the following beneficial technical effects:
[0040] The wide band gap semiconductor terminal structure provided by the application is provided with a substrate, an N-type electric field cutoff layer, a first P-type buried layer, a first N-type epitaxial layer, a P-type charge shielding layer, a P-type field limiting ring and a field oxide medium layer, the N-type electric field cutoff layer and the P-type buried layer are sequentially constructed on the surface of the substrate, the P-type charge shielding layer and the P-type field limiting ring are constructed on the surface of the first N-type epitaxial layer, further, the field oxide medium layer is arranged on the first N-type epitaxial layer, the field oxide medium layer in the first region is in contact with the upper surface of the P-type charge shielding layer, so as to construct a super junction terminal region, and the field oxide medium layer in the second region is filled in the P-type field limiting ring, so as to construct an auxiliary field limiting ring terminal region, by such arrangement, compared with the prior art, the wide band gap semiconductor terminal structure can have the following advantages:
[0041] First, the super junction terminal region: the electric field is higher and constant (lower than the breakdown field strength), more voltage can be borne than the ordinary terminal structure, the area occupied by the terminal can be reduced, and the reliability of resisting external charge interference is high.
[0042] Second, the auxiliary field limiting ring terminal region: by penetrating into the P-type field limiting ring of the first N-type epitaxial layer, the high electric field entering the auxiliary field limiting ring terminal region from the super junction terminal region can be smoothly lowered, so as to avoid the occurrence of electric field peaks, and the whole terminal structure is more stable.
[0043] In summary, the wide band gap semiconductor terminal structure provided by the application can effectively improve the stability and reliability of the device performance. BRIEF DESCRIPTION OF DRAWINGS
[0044] Figure 1 A three-dimensional structure schematic diagram of the wide band gap semiconductor terminal structure provided by the first embodiment of the application is shown in the figure;
[0045] Figure 2 A cross-sectional structure schematic diagram of the wide band gap semiconductor terminal structure provided by the first embodiment of the application is shown in the figure;
[0046] Figure 3 A charge distribution schematic diagram of the wide band gap semiconductor terminal structure provided by the first embodiment of the application is shown in the figure;
[0047] Figure 4 A cross-sectional structure schematic diagram of the wide band gap semiconductor terminal structure provided by the second embodiment of the application is shown in the figure;
[0048] Figure 5 A cross-sectional structure schematic diagram of the wide band gap semiconductor terminal structure provided by the third embodiment of the application is shown in the figure;
[0049] Figure 6 A flow chart of a method for fabricating a wide bandgap semiconductor termination structure for embodiment four of the present application
[0050] Reference signs:
[0051] 1, substrate; 101, N-type substrate; 102, second N-type epitaxial layer;
[0052] 2, N-type field stop layer;
[0053] 3, first P-type buried layer;
[0054] 4, first N-type epitaxial layer; 401, trench;
[0055] 5, P-type charge shielding layer;
[0056] 6, P-type field limiting ring;
[0057] 7, field oxide dielectric layer;
[0058] 8, anode;
[0059] 9, cathode;
[0060] 10, second P-type buried layer;
[0061] 11, N-type isolation layer. DETAILED DESCRIPTION
[0062] In order to facilitate the understanding of the present application, the present application will be described more fully below with reference to the accompanying drawings. The embodiments of the present application are shown in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0063] The super-wide bandgap semiconductor materials with a wider bandgap than SiC and GaN mainly include gallium oxide (Ga2O3), diamond (C), aluminum nitride (AlN), etc. With their superior optical and electrical properties, they have been considered as an exciting and challenging new research field.
[0064] In power switching applications, Baliga's figure-of-merit (BFOM) is an index used to represent the applicability of semiconductor materials in power electronics, which is expressed as: BFOM = εμE 3 where ε is the dielectric constant, μ is the mobility, E is the breakdown field strength of the semiconductor, and the BFOM value is generally positively correlated with the sixth power of the bandgap width Eg. Therefore, a larger bandgap width means that the wide bandgap semiconductor has lower power loss and higher conversion efficiency in the application of power devices, thereby realizing more excellent and ideal power electronics applications.
[0065] Silicon carbide (SiC) devices can be P-type doped by ion implantation or epitaxial growth, but materials with wider band gap than silicon carbide, such as gallium nitride (GaN), gallium oxide (Ga2O3), diamond (C), aluminum nitride (AlN), etc., are more difficult to achieve P-type doping by ion implantation, and can be achieved by epitaxial growth or special processes such as oxidation to achieve P-type.
[0066] The existing semiconductor terminal structure is sensitive to line width during the manufacturing process, and JTE is sensitive to the dose of doping. Since wide band gap semiconductor devices are mainly used in high voltage, high temperature and high humidity environments, charge accumulation, moisture corrosion, ion migration and other phenomena may occur at the terminal. The resistance of the ordinary terminal structure to these extreme conditions is weak, the terminal electric field is unevenly distributed, the withstand voltage is reduced, and even abnormality such as early breakdown and burnout occurs, causing device reliability problems.
[0067] The present application provides a wide band gap semiconductor terminal structure which can effectively solve the above problems. The embodiments of the present application will be further described in detail below in combination with the drawings and examples. The following examples are used to illustrate the present application, but cannot be used to limit the scope of the present application.
[0068] Example 1
[0069] As shown in Figure 1 and Figure 2 The wide band gap semiconductor terminal structure provided by the present embodiment comprises a substrate 1, an N-type electric field cutoff layer 2, a first P-type buried layer 3, a first N-type epitaxial layer 4, a P-type charge shielding layer 5, a P-type field limiting ring 6 and a field oxide dielectric layer 7.
[0070] The substrate 1 comprises an N-type substrate 101 and a second N-type epitaxial layer 102; the second N-type epitaxial layer 102 is arranged on the N-type substrate 101, and the N-type electric field cutoff layer 2 is arranged on the second N-type epitaxial layer 102.
[0071] The N-type electric field cutoff layer 2 and the first P-type buried layer 3 are sequentially embedded in the upper part of the substrate 1, the first N-type epitaxial layer 4 is arranged on the upper surface of the first P-type buried layer 3 and the substrate 1, the P-type charge shielding layer 5 is embedded in the first region of the first N-type epitaxial layer 4, and the P-type field limiting ring 6 is embedded in the second region of the N-type epitaxial layer.
[0072] The field oxide dielectric layer 7 is arranged on the first N-type epitaxial layer 4, and the field oxide dielectric layer 7 in the first region is in contact with the upper surface of the P-type charge shielding layer 5 to form a super junction terminal region, i.e. the P-type charge shielding layer 5, the first N-type epitaxial layer 4, the first P-type buried layer 3 and the N-type electric field cutoff layer 2 in the first region form a super junction terminal region.
[0073] The field oxide layer 7 in the second region fills in the P-type field limiting ring 6 to form an auxiliary field limiting ring terminal region, i.e., the P-type field limiting ring 6, the first N-type epitaxial layer 4, the first P-type buried layer 3 and the N-type electric field cutoff layer 2 in the second region form the auxiliary field limiting ring terminal region.
[0074] The wide band gap semiconductor terminal structure further comprises an anode 8 and a cathode 9; the anode 8 is located in the super-junction terminal region, and the anode 8 is arranged on the upper surface of the P-type charge shielding layer 5, and one side of the anode 8 is in contact with one side of the field oxide layer 7; the cathode 9 is arranged on the lower surface of the N-type substrate 101.
[0075] The super-junction terminal region has the advantages that the electric field is high and constant (lower than the breakdown field strength), and can bear more voltage than the ordinary terminal structure, and can reduce the area occupied by the terminal. Figure 3 , the specific analysis is as follows:
[0076] 1. The P-type charge shielding layer 5: After the lower end of the P-type charge shielding layer 5 is depleted, a negative net charge is formed, and these high-density net charges can shield the influence of the metal ions of the upper anode 8, the trap charges at the interface between the field oxide and the first N-type epitaxial layer 4, and the movable charges in the field oxide on the electric field distribution in the first N-type epitaxial layer 4, to ensure the stability of the electric field.
[0077] 2. The N-type electric field cutoff layer 2: The N-type electric field cutoff layer 2 has a relatively high concentration, and after ionization, a high-concentration positive charge is formed, which can shield the influence of impurity charges, epitaxial defect charges and the like in the second N-type epitaxial layer 102 on the electric field of the first P-type buried layer 3.
[0078] 3. The first N-type epitaxial layer 4: This is the main voltage-bearing region, and since charge balance is achieved in the first N-type epitaxial layer 4, the electric field can be maintained high and constant (lower than the breakdown field strength), so that more voltage can be borne.
[0079] 4. The first P-type buried layer 3: The first P-type buried layer 3, the first N-type epitaxial layer 4 and the P-type charge shielding region form a "PNP" super-junction structure.
[0080] The auxiliary field limiting ring terminal region has the advantages that the P-type field limiting ring 6 is deep into the first N-type epitaxial layer 4, so that the high electric field entering the auxiliary field limiting ring terminal region from the super-junction terminal region can be smoothly lowered, and electric field peaks can be avoided, so that the entire terminal structure is more stable. Figure 3 , the specific analysis is as follows:
[0081] 1. The P-type field limiting ring 6: The multi-stage groove 401 can make the P-type region deeper, reduce the charge dose of the N-type epitaxial layer 2, and gradually lower the electric field;
[0082] 2. The first P-type buried layer 3: The electric field peak at the edge of the field limiting ring is reduced, and random breakdown at the edge of the field limiting ring is avoided.
[0083] Furthermore, in order to facilitate the arrangement of the P-type field limiting ring 6 , a trench 401 is further provided in the N-type epitaxial layer. The trench 401 extends from the upper surface of the N-type epitaxial layer along its depth direction. The P-type field limiting ring 6 is arranged along the wall of the trench 401 .
[0084] The channel here can be a single-stage channel or a multi-stage channel, preferably a multi-stage channel. There is no limitation on the specific structure of the channel, and it can be set according to actual needs.
[0085] In addition, there may be a plurality of trenches 401 ; the plurality of trenches 401 are sequentially spaced apart along the length direction of the N-type epitaxial layer.
[0086] like Figure 1 As shown, in a specific example, there are three grooves 401, and the three grooves 401 are arranged in sequence along a straight line. The spacing distance is not limited and can be equidistant or unequal, and both fall within the protection scope of this embodiment.
[0087] The wide bandgap semiconductor terminal structure provided by an embodiment of the present invention is provided with a substrate 1, an N-type electric field stop layer 2, a first P-type buried layer 3, a first N-type epitaxial layer 4, a P-type charge shielding layer 5, a P-type field limiting ring 6 and a field oxide dielectric layer 7. The N-type electric field stop layer 2 and the P-type buried layer are sequentially constructed on the surface of the substrate 1, and the P-type charge shielding layer 5 and the P-type field limiting ring 6 are constructed on the surface of the first N-type epitaxial layer 4. Furthermore, the field oxide dielectric layer 7 is provided on the first N-type epitaxial layer 4. The field oxide dielectric layer 7 located in the first region contacts the upper surface of the P-type charge shielding layer 5 to form a super junction termination region; the field oxide dielectric layer 7 located in the second region is filled in the P-type field limiting ring 6 to form an auxiliary field limiting ring termination region.
[0088] With such a configuration, compared to the prior art, the wide bandgap semiconductor terminal structure can have the following advantages:
[0089] First, the superjunction terminal region: The electric field is high and constant (lower than the breakdown field strength), which can bear more voltage than the ordinary terminal structure, can reduce the area occupied by the terminal, and has high reliability in resisting interference from external charges.
[0090] Second, the auxiliary field limiting ring terminal region: By penetrating into the P-type field limiting ring 6 in the first N-type epitaxial layer 4, the high electric field entering the auxiliary field limiting ring terminal region from the super junction terminal region can be steadily decreased, avoiding electric field spikes and making the entire terminal structure more stable.
[0091] In summary, the wide bandgap semiconductor terminal structure provided by the embodiments of the present invention can effectively improve the stability and reliability of device performance.
[0092] Example 2
[0093] Based on the above embodiment 1, Figure 4 As shown, in the second N-type epitaxial layer 102 , a second P-type buried layer 10 is further provided in an area away from the first area and the second area; the second P-type buried layer 10 and the first N-type epitaxial layer 4 and the second N-type epitaxial layer 102 form a parasitic NPN transistor structure.
[0094] In a specific example, while the first P-type buried layer 3 is formed at the terminal, a second P-type buried layer 10 can be formed under the cutting path, thereby constructing a parasitic NPN transistor, reducing the potential of the epitaxial surface of the cutting path, and preventing arc discharge between the cutting path and the anode metal during electrical testing, reliability testing (HTRB, H3TRB, etc.), and long-term operation.
[0095] Example 3
[0096] Based on the above embodiment 1, Figure 5 As shown, an N-type isolation layer 11 is provided at the distal end of the first P-type buried layer 3 beyond the auxiliary field limiting ring terminal region to form an N-type isolation region.
[0097] In a specific example, the construction process of the first P-type buried layer 3 can be epitaxial growth of the entire layer, and then an N-type isolation region is formed at the far end of the first P-type buried layer 3 by ion implantation, and the first N-type epitaxial layer 4 and the second N-type epitaxial layer 102 are disconnected by the N-type isolation region.
[0098] Example 4
[0099] The embodiment of the present invention also provides a method for manufacturing the wide bandgap semiconductor terminal structure described in the first embodiment, such as Figure 6 As shown, including:
[0100] Step S1: Grow a second N-type epitaxial layer on a substrate to obtain a base. The substrate here is a wide bandgap semiconductor material (SiC / GaN / Ga2O3 / C / AlN, etc.).
[0101] Step S2: forming an N-type electric field stop layer and a first P-type buried layer in sequence on the second N-type epitaxial layer.
[0102] Specifically, an N-type electric field stop layer is formed by ion implantation; and a first P-type buried layer is formed by ion implantation, secondary epitaxy, growth of a P-type oxide, and the like.
[0103] Step S3: growing a first N-type epitaxial layer on the upper surface of the substrate and the first P-type buried layer.
[0104] Step S4: dry-etching the second region of the first N-type epitaxial layer to form trenches, preferably multi-level trenches.
[0105] Step S5: ion implantation is performed on the first region of the first N-type epitaxial layer, and a P-type charge shielding region can be obtained by ion implantation, secondary epitaxy, growth of P-type oxide, etc.
[0106] Step S6: a P-type field limiting ring is made along the groove wall of the trench by ion implantation, secondary epitaxy, growth of P-type oxide, etc.
[0107] Step S7: field oxide medium is deposited on the upper end surface of the first region and the second region, and a field oxide medium layer is obtained after etching.
[0108] Step S8: metal is deposited on the upper surface of the P-type charge shielding layer to make an anode, and metal is deposited on the lower surface of the substrate to make a cathode.
[0109] Since the manufacturing method is used for manufacturing a wide-bandgap semiconductor terminal structure, the beneficial effects of the wide-bandgap semiconductor terminal structure are also applicable to the manufacturing method, and the beneficial effects can be referred to the first embodiment, which will not be described here.
[0110] In the description of the specification, the description referring to the terms "specific example" or "some examples" means that the specific features, structures, materials or characteristics described in combination with the embodiment or example are contained in at least one embodiment or example of the embodiments of the present application. In the specification, the specific features, structures, materials or characteristics described can be combined in any appropriate manner in any one or more embodiments or examples. In addition, the person skilled in the art can combine and combine the different embodiments or examples described in the specification and the features of the different embodiments or examples without contradiction.
[0111] Finally, it should be pointed out that: the above examples are only used to illustrate the technical solutions of the present application, and not to limit it; although the present application has been described in detail with reference to the foregoing examples, those skilled in the art should understand that: it can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the spirit and scope of the technical solutions of the embodiments of the present application.
Claims
1. A wide bandgap semiconductor terminal structure, characterized in that: include: Substrate, N-type electric field stop layer, first P-type buried layer, first N-type epitaxial layer, P-type charge shielding layer, P-type field limiting ring and field oxide dielectric layer; The N-type electric field stop layer and the first P-type buried layer are sequentially embedded in the upper portion of the substrate, the first N-type epitaxial layer is covered on the first P-type buried layer and the upper surface of the substrate, the P-type charge shielding layer is embedded in the first region of the first N-type epitaxial layer, and the P-type field limiting ring is embedded in the second region of the N-type epitaxial layer; The field oxide dielectric layer is arranged on the first N-type epitaxial layer, and the field oxide dielectric layer located in the first region contacts the upper surface of the P-type charge shielding layer to form a super junction termination region; the field oxide dielectric layer located in the second region is filled in the P-type field limiting ring to form an auxiliary field limiting ring termination region.
2. The wide bandgap semiconductor terminal structure according to claim 1, characterized in that: The first N-type epitaxial layer is provided with a trench, which extends from the upper surface of the first N-type epitaxial layer along the depth direction thereof, and the P-type field limiting ring is provided along the trench wall.
3. The wide bandgap semiconductor terminal structure according to claim 2, characterized in that: There are multiple grooves; The plurality of trenches are sequentially spaced apart along the length direction of the first N-type epitaxial layer.
4. The wide bandgap semiconductor terminal structure according to claim 1, wherein: The substrate includes an N-type substrate and a second N-type epitaxial layer; The second N-type epitaxial layer is disposed on the N-type substrate, and the N-type electric field stop layer is disposed on the second N-type epitaxial layer.
5. The wide bandgap semiconductor terminal structure according to claim 4, characterized in that: The wide bandgap semiconductor terminal structure further includes an anode and a cathode; The anode is located in the super junction terminal region, the anode is provided on the upper surface of the P-type charge shielding layer, and one side of the anode contacts one side of the field oxide dielectric layer; The cathode is arranged on the lower surface of the N-type substrate.
6. The wide bandgap semiconductor terminal structure according to claim 4, characterized in that: In the second N-type epitaxial layer, a second P-type buried layer is further provided in an area away from the first area and the second area; The second P-type buried layer, the first N-type epitaxial layer and the second N-type epitaxial layer form a parasitic NPN transistor structure.
7. The wide bandgap semiconductor terminal structure according to claim 1, wherein: An N-type isolation layer is provided at a distal end of the first P-type buried layer beyond the auxiliary field limiting ring terminal region to form an N-type isolation region.
8. A method for manufacturing a wide bandgap semiconductor terminal structure according to any one of claims 1 to 7, characterized in that: include: An N-type electric field stop layer and a first P-type buried layer are sequentially formed on the substrate; growing a first N-type epitaxial layer on the upper surfaces of the substrate and the first P-type buried layer; performing dry etching on the second region of the first N-type epitaxial layer to form a trench; Performing ion implantation on the first region of the first N-type epitaxial layer to obtain a P-type charge shielding region; forming a P-type field limiting ring along the groove wall; A field oxygen dielectric is deposited on the upper end surfaces of the first region and the second region to obtain a field oxygen dielectric layer.
9. The production method according to claim 8, characterized in that: Before sequentially forming an N-type electric field stop layer and a first P-type buried layer on the substrate, the method further includes: A second N-type epitaxial layer is grown on the substrate to obtain the base.
10. The manufacturing method according to claim 9, characterized in that: After obtaining the field oxide dielectric layer, the method further includes: Depositing metal on the upper surface of the P-type charge shielding layer to form an anode; A cathode is prepared by depositing metal on the lower surface of the substrate.
Citation Information
Patent Citations
Wide bandgap semiconductor terminal structure
CN220106543U