Signal amplification device and preparation method thereof
The problem of high noise of Josephson parameter amplifiers is solved by using air-filled parallel plate capacitors and flip-soldering technology, achieving higher gain and operating bandwidth.
Patent Information
- Application Number
- CN202310185308.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-03-01
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2043-03-01
AI Technical Summary
The existing Josephson parameter amplifiers have high noise, which is mainly due to the dielectric loss of the capacitor-filled dielectric and the meter/interface defects, resulting in the performance of the signal amplifier being limited.
A resonant system composed of air-filled parallel plate capacitors is formed by aligning and pressing the upper and lower plates through flip welding technology to avoid the use of dielectric materials such as amorphous silicon, simplifying the preparation process and reducing the impact of photoresist residues.
Lower dielectric loss and higher internal quality factors are achieved, improving the gain and operating bandwidth of the signal amplifier and reducing noise levels.
Smart Images

Figure CN116388714B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of quantum computing technology, and in particular to a signal amplification device and a method for preparing the signal amplification device. Background Art
[0002] Superconducting qubits are the most promising way to achieve quantum computing superiority in the field of quantum computing. In order to improve the reading fidelity of superconducting qubit signals, multi-stage signal amplifiers are required to obtain a higher signal-to-noise ratio. As the first stage of amplification in the superconducting qubit reading circuit, the performance of the parametric amplifier plays a key role in the reading fidelity. The Josephson Parametric Amplifier (JPA) has the characteristics of high gain and near-quantum limit noise, making it a key device in the current research and application of superconducting qubits.
[0003] Parametric amplification is a phenomenon that exists in the fields of optics, electricity, and mechanics. The general characteristics of the parametric amplification process are that a certain energy storage parameter in the resonant system is periodically modulated by a pump source, causing energy transfer between the modulation source and the resonant system. For the Josephson parametric amplifier to which the present invention relates, the resonant system is composed of a lossless Josephson junction as a nonlinear inductor (L), and a capacitor (C) to form a nonlinear LC resonant circuit. The input signal to be amplified (ωs) and the pump signal (ωp) are simultaneously input into the resonant system. When the nonlinear Josephson inductor is periodically modulated, the pump energy drives the circuit to the nonlinear working area. When the pump frequency (ωp) is at a suitable frequency and amplitude, the parametric amplification converts the pump energy into the input signal (ωs) and the idler signal (ωi), and the input signal ωs is amplified. Noise is one of the important indicators of parametric amplifiers. The smaller the noise, the better the performance. Josephson parametric amplifiers can theoretically obtain quantum limit noise, which is ideally half a photon noise. However, in reality, the noise of the Josephson parametric amplifier is greater than half a photon. In addition to the influence of the measurement circuit and the environment, material loss and surface / interface defects are the main sources of noise, such as the dielectric loss of the capacitor filling material and the interface defects with the upper and lower electrodes.
[0004] Capacitors are the core components of parametric amplifiers, and they can be in the form of interdigital capacitors and parallel plate capacitors. Interdigital capacitors have the characteristics of low loss and high integration, but their capacitance value is small and their structural inductance is large, so they are rarely used in parametric amplifier devices in the range of 4 to 8 GHz. Capacitors composed of parallel plates can provide a uniform electric field between plates and a small structural inductance, thus becoming the main form of capacitors in parametric amplifiers in the range of 4 to 8 GHz. The dielectric between the parallel plates is a key parameter that determines the properties of the capacitor. The dielectric constant determines the size of the capacitor; the dielectric loss determines the energy loss of the capacitor, and thus determines the quality factor Q value of the resonant cavity. In order to reduce the noise introduced by the capacitor filling medium, researchers have explored the selection of materials with lower dielectric loss, such as amorphous silicon, silicon nitride, silicon oxide and calcium fluoride, among which amorphous silicon has the lowest dielectric loss. However, another more important disadvantage of dielectric materials is surface / interface defects, which come from their preparation methods, mainly chemical vapor deposition and physical vapor deposition. These technologies inevitably introduce internal (such as dislocations, grain boundaries, gaps, holes) and interface defects. In order to reduce the interface defects between the amorphous silicon and the electrode material, the researchers deposited silicon nitride on both sides of the amorphous silicon to improve the interface matching with the electrode material. However, the increase in the number of interfaces has resulted in insignificant effects. Therefore, in order to reduce noise, dielectric materials should be avoided as much as possible. Air-filled capacitors have smaller losses than other dielectric material capacitors, so they are more suitable for the extremely low noise requirements of parametric amplifiers. The difficulty lies in processing the upper and lower plates of air capacitors that meet the shape and size requirements on a micron scale, such as plate flatness, spacing, etc., and requiring repeated controllable parameters to achieve a suitable capacitance value. Some researchers have used exposure, etching and stripping methods to prepare air capacitors with insulating materials as support columns, or capacitors with aluminum as sacrificial layers, and have achieved certain results, but there is still much room for improvement. In short, the materials and preparation methods of parallel plate capacitors, process stability and convenience are the focus of current research and development of Josephson parametric amplifiers. Summary of the invention
[0005] In view of at least one drawback of the prior art, in a first aspect, the present invention provides a signal amplification device, comprising:
[0006] a first substrate and a second substrate;
[0007] Inductive components, including Josephson junctions;
[0008] The capacitor assembly comprises an upper plate and a lower plate which are substantially parallel to each other, wherein the medium between the upper plate and the lower plate is air, wherein
[0009] The lower electrode plate and the inductor assembly are integrated on the first substrate, the upper electrode plate is integrated on the second substrate, and the first substrate and the second substrate are connected via a metal bonding column.
[0010] According to the first aspect of the present invention, a portion of the metal bonding pillars are integrated on the first substrate and the second substrate respectively, and the metal bonding pillars on the first substrate and the second substrate are connected by flip-chip bonding.
[0011] According to the first aspect of the present invention, the signal amplification device further includes:
[0012] A signal input and output component, integrated on the first substrate, for inputting a signal to be amplified and outputting an amplified signal;
[0013] The waveguide transmission line is integrated on the first substrate and is configured to connect the inductor element, the lower plate and the signal input and output component in series.
[0014] According to the first aspect of the present invention, the signal input-output component is disposed in an area on the first substrate other than an area corresponding to the second substrate.
[0015] According to the first aspect of the present invention, the inductor component comprises a single Josephson junction or a loop structure composed of multiple Josephson junctions.
[0016] According to the first aspect of the present invention, the capacitance value of the capacitor assembly is determined according to the areas of the corresponding parts of the upper electrode plate and the lower electrode plate and the distance between the upper electrode plate and the lower electrode plate, wherein the distance between the upper electrode plate and the lower electrode plate is determined according to the height of the metal bonding column.
[0017] According to the first aspect of the present invention, the upper electrode plate and the lower electrode plate are made of superconducting metal or superconducting metal compound, and the thickness of the upper electrode plate and the lower electrode plate is 10 nm to 1000 nm.
[0018] According to the first aspect of the present invention, in the signal amplification device:
[0019] The upper electrode plate and the lower electrode plate are prepared by one or more of physical vapor deposition, chemical vapor deposition, and chemical liquid deposition methods;
[0020] The Josephson junction includes one or more of an aluminum junction and a niobium junction, and the Josephson junction is prepared by an electron beam evaporation coating method;
[0021] The metal bonding column is prepared by a low melting point solder metal; and / or
[0022] The waveguide transmission line is made of superconducting metal or superconducting metal compound, including one or more of microstrip line, coplanar waveguide and slot line structure, and the waveguide transmission line is prepared by one or more of physical vapor deposition or chemical vapor deposition methods.
[0023] According to the first aspect of the present invention, the metal bonding column is connected to the upper plate and grounded; or
[0024] The upper electrode plate is in a potential suspension state.
[0025] According to the first aspect of the present invention, the signal input and output component is further configured as follows:
[0026] Input a signal to be amplified, enter the resonant cavity composed of the capacitor component and the inductor component along the first branch of the waveguide transmission line, input a pump signal along the first branch, transfer energy to the signal to be amplified, and generate a companion signal; or
[0027] The signal input and output component is further configured to:
[0028] A signal to be amplified is inputted, and enters the resonant cavity composed of the capacitor component and the inductor component along the first branch of the waveguide transmission line, and a pump signal is inputted along the second branch of the waveguide transmission line to generate a magnetic field and modulate the signal to be amplified.
[0029] According to the first aspect of the present invention, the resonant cavity formed by the capacitor component and the inductor component adopts a three-wave mixing or four-wave mixing working mode.
[0030] In a second aspect, the present invention further provides a method for preparing the signal amplification device as described in the first aspect of the present invention, comprising:
[0031] preparing the first substrate and the second substrate;
[0032] On the first substrate, the lower plate of the capacitor component, the signal input and output component and the waveguide transmission line are prepared by etching process, the Josephson junction is prepared by diagonal evaporation technology, and the metal bonding column is prepared by standard stripping process;
[0033] On the second substrate, an upper plate of the capacitor assembly is prepared by an etching process, and a metal bonding column is prepared by a stripping process;
[0034] Using a flip-chip bonder to align and bond the corresponding metal bonding pillars of the first substrate and the second substrate;
[0035] A wire binding machine is used to connect the signal input and output components with the external transmission line.
[0036] The signal amplifying device provided by the present invention adopts a resonant system composed of air capacitors, has lower dielectric loss and higher internal quality factor, and thus the signal amplifying device obtains higher gain and working bandwidth.
[0037] The present invention provides a signal amplifying device including an air-filled parallel plate capacitor and a method for preparing the signal amplifying device. The preparation method adopts flip-chip welding technology to prepare the lower plate and the upper plate of the parallel plate capacitor separately, and then align and press them together. From the material point of view, no filling medium such as amorphous silicon and silicon nitride is used, and the preparation equipment using these materials is not required, while avoiding the performance impact caused by medium material defects and medium loss; from the process point of view, the deposition, etching, exposure and development process steps are reduced, the preparation process is simplified, and the adverse effects of photoresist residues are reduced. At the same time, the upper and lower plates can obtain the same flatness, and the overall performance is high. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] In order to more clearly illustrate the technical solutions in the embodiments of the present application, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without exceeding the scope of protection required by the present application.
[0039] Figure 1 A signal amplifying device provided by an embodiment of the present invention is shown;
[0040] Figure 2 The first substrate and its underlying circuit, the second substrate and its underlying circuit, which are respectively prepared in the signal amplification device provided by one embodiment of the present invention, are shown;
[0041] Figure 3 The present invention shows a process for preparing a first substrate in a signal amplifying device provided by an embodiment of the present invention;
[0042] Figure 4 The process of bonding the first substrate and the second substrate by flip-chip bonding in the signal amplification device provided by one embodiment of the present invention is shown;
[0043] Figure 5 A method for preparing a signal amplifying device provided by an embodiment of the present invention is shown. DETAILED DESCRIPTION
[0044] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without creative work are within the scope of protection of the present application.
[0045] From the perspective of materials, no matter what kind of vapor deposition method is used to prepare the parametric amplifier device including the parallel plate capacitor and what kind of dielectric material, internal and interface defects will occur, which will become a factor affecting the quality of the parallel plate capacitor and the resonant cavity. In the existing technology, some researchers have begun to explore the use of two-dimensional and topological new materials for parallel plate capacitor filling dielectrics, but there are still many problems to be overcome before practical application.
[0046] From a process perspective, the process of filling the medium in the parallel plate is relatively complicated, and the exposure and etching processes must be repeated many times. The process stability and photoresist residue lead to the limitation of the yield and actual amplification efficiency. Taking amorphous silicon as the filling medium as an example, there are two processes for preparing amorphous silicon after the bottom circuit is completed, one is the etching process, and the other is the stripping process. The etching process is to first deposit a layer of amorphous silicon on the surface of the substrate, and then evenly apply the photoresist, expose and develop the designated position, leaving the photoresist at the parallel plate, and then use ion etching technology to etch away the amorphous silicon at other positions; the stripping process is to first evenly apply the photoresist, expose and develop the designated position, and then deposit a layer of amorphous silicon, and then soak and strip. From the above description, it can be seen that no matter which process is used, deposition, etching, exposure, and development technology and equipment are required. The process steps are relatively complicated, and any problem in any step will lead to chip failure.
[0047] The dielectric loss of air (or vacuum) is extremely low, which has significant advantages over any other filling medium. Therefore, from a material perspective, air capacitors are an ideal choice for internal capacitors of parametric amplifiers. The main difficulty of air capacitors is how to prepare them in quantum chips at the micron scale. Some researchers have explored the feasibility of air capacitors. They use the method of potential suspension support columns to place equally spaced insulating support columns between the upper and lower parallel plates to form parallel plate capacitors in which most of the space is filled with air. However, this method still has the following problems. First, the preparation of support columns still requires the use of deposition, etching, exposure and development micro-nano processing processes, and the process steps are complicated; secondly, the flatness of the upper surface parallel plate is poor, and it is easy to collapse in places where there are no support columns, thereby affecting the yield and performance stability. Parallel plate capacitors that use aluminum as a sacrificial layer also require micro-nano processing processes such as deposition and etching. Sacrificial layer residues are more common, which will result in a low yield.
[0048] The present invention provides a signal amplifying device including an air-filled parallel plate capacitor, and provides a method for preparing the signal amplifying device. The preparation method adopts flip-chip welding technology to prepare the lower plate and the upper plate of the parallel plate capacitor separately, and then align and press them together. From the material point of view, no filling medium such as amorphous silicon and silicon nitride is used, and the preparation equipment using these materials is not required, while avoiding the performance impact caused by medium material defects and medium loss; from the process point of view, the process steps such as deposition, etching, exposure and development are reduced, the preparation process is simplified, and the adverse effects of photoresist residue are reduced. At the same time, the upper and lower plates can obtain the same flatness, and the overall performance is high.
[0049] According to one embodiment of the present invention, Figure 1 As shown, the present invention provides a signal amplifying device 100, comprising: a first substrate I and a second substrate II; an inductor component 110 and a capacitor component 120. Wherein:
[0050] The inductor component 110 includes a Josephson junction;
[0051] The capacitor assembly 120 includes an upper plate II-1 and a lower plate I-1 that are substantially parallel to each other, and the medium between the upper plate II-1 and the lower plate I-1 is air.
[0052] The lower electrode plate I-1 and the inductor assembly 110 are integrated on the first substrate I, the upper electrode plate II-1 is integrated on the second substrate II, and the first substrate I and the second substrate II are connected via metal bonding columns.
[0053] Capacitor assembly 120 and inductor assembly 110 are core components of signal amplification device 100, forming a capacitor-inductor resonant cavity, which is used to exchange pump energy to the input signal to be amplified, thereby completing the process of signal amplification. Wherein, capacitor assembly 120 is a parallel plate structure, and its lower plate I-1 is located on the first substrate I, and the inductor assembly 110 is distributed on the first substrate I at the same time, and the upper plate II-2 of capacitor assembly 120 is located on the second substrate II. The first substrate I and the second substrate II are placed relative to each other up and down, and are supported and separated by metal bonding columns (I-2 and II-2, which are solder metals with low melting points such as indium and tin). Optionally, part of the metal bonding columns are prepared on the first substrate I and the second substrate II respectively, and then the metal bonding columns on the first substrate I and the second substrate II are aligned one by one by flip-chip welding technology, and pressure is applied. After the moisturizing delay, the first substrate I and the second substrate II are bonded, and the height of the bonding metal column is controlled by adjusting the pressure size.
[0054] According to one embodiment of the present invention, Figure 2 As shown, the first substrate I and the second substrate II prepared before bonding, and the components and circuits located on the first substrate I and the second substrate II are as shown in FIG. Figure 2As shown. In the signal amplification device 100 provided by the present invention: the lower plate I-1 of the capacitor component, the partial metal bonding column I-2 (a part of the bonding metal column), the inductor component I-3, the signal input and output component I-4 and the waveguide transmission line I-5 are prepared on the first substrate I. The upper plate II-1 of the capacitor component and the partial metal bonding column II-2 (another part of the bonding metal column) are prepared on the second substrate II. The first substrate I and the second substrate II are connected through the partial metal bonding columns I-2 and II-2. Optionally, the flip-chip technology is used to bond the aligned partial metal bonding columns I-2 and II-2 by applying pressure. In this example, four partial metal bonding columns I-2 are prepared on the first substrate I, and four partial metal bonding columns II-2 are prepared at corresponding positions on the second substrate II, and then four complete metal bonding columns are formed through bonding to support the first substrate I and the second substrate II. Those skilled in the art will understand that more or fewer partial metal bonding columns can be prepared to achieve the effect of bonding and supporting the first substrate I and the second substrate II. Such an implementation is also feasible in the present invention and falls within the scope of protection of the present invention.
[0055] In the signal amplifying device 100 provided by the present invention:
[0056] The signal input and output component I-4 is integrated on the first substrate I, and is used to input the signal to be amplified and output the amplified signal.
[0057] The waveguide transmission line I-5 is integrated on the first substrate I and is configured to serially connect the inductor element I-3, the lower plate I-1 and the signal input and output component I-4.
[0058] Optionally, the signal input and output component I-4 is configured in the form of a wire binding plate auxiliary element. The inductor component I-3 and the wire binding plate auxiliary element I-4 are distributed on the first substrate I at the same time. The lower plate I-1 of the capacitor component, the inductor component I-3 and the wire binding plate auxiliary element I-4 are connected in series through a waveguide transmission line I-5. The upper plate II-1 of the capacitor component is located on the substrate II. The first substrate I and the second substrate II are placed opposite to each other up and down, and are supported and separated by the metal bonding column after bonding. The spacing between the first substrate I and the second substrate II is controlled by the height of the metal bonding column. The upper plate II-1 of the capacitor component is opposite to the lower plate I-1, and similarly, the spacing between the upper plate II-1 and the lower plate I-1 is controlled by the height of the metal bonding column. Optionally, the metal bonding column (generated by bonding part of the metal bonding column I-2 and II-2) is prepared by a low melting point solder metal such as indium and tin.
[0059] According to an embodiment of the present invention, in the signal amplifying device 100 provided by the present invention, the signal input-output component I-4 is disposed in an area on the first substrate I outside an area corresponding to the second substrate II.
[0060] refer to Figure 2 In the signal amplifying device 100, the size of the second substrate II is smaller than that of the first substrate I. When the first substrate I is bonded to the second substrate II, the wire binding plate area needs to be exposed to connect the parametric amplifier and the external transmission line.
[0061] According to one embodiment of the present invention, in the signal amplification device 100 provided by the present invention, the upper electrode plate II-1 and the lower electrode plate I-1 are made of superconducting metal or superconducting metal compound, and the thickness of the upper electrode plate II-1 and the lower electrode plate I-1 is 10nm to 1000nm.
[0062] According to one embodiment of the present invention, in the signal amplification device 100 provided by the present invention, the capacitance value of the capacitor assembly is determined according to the area of the corresponding parts of the upper electrode plate II-1 and the lower electrode plate I-1, and the distance between the upper electrode plate II-1 and the lower electrode plate I-1, wherein the distance between the upper electrode plate II-1 and the lower electrode plate I-1 is determined according to the height of the metal bonding column.
[0063] In the signal amplification device 100 provided by the present invention, the upper and lower plates of the parallel plate capacitor are made of superconducting metals or compounds, such as aluminum (Al), niobium (Nb), tantalum (Ta), niobium nitride (NbN), and tantalum nitride (TaN). The upper plate is attached to the second substrate II, and the lower plate is attached to the first substrate I. The thickness of the upper and lower plates is between tens of nanometers and hundreds of nanometers, and the typical value is 100 nanometers. The spacing d and area A of the upper and lower plates are determined by the set capacitance value C according to the formula C=εA / d. The upper and lower plates are relative to each other. If the areas of the upper and lower plates are not equal, the area A is equal to the overlapping area of the upper and lower plates in the direction perpendicular to the plates. The parallel plate capacitance value C is between tens of fF and tens of pF.
[0064] According to an embodiment of the present invention, in the signal amplification device 100 provided by the present invention, the bonding metal column is connected to the upper electrode plate and grounded; or
[0065] The upper electrode plate is in a potential suspension state.
[0066] The partial bonding metal pillar II-2 on the second substrate II may be connected to the upper plate II-1 or not. When the partial bonding metal pillar II-2 is connected to the upper plate II-1, the partial bonding metal pillar I-2 on the first substrate I is required to be grounded, and at this time, the upper plate II-1 of the capacitor is grounded to the partial bonding metal pillar I-2 through the partial bonding metal pillar II-2. When the partial bonding metal pillar II-2 is not connected to the upper plate II-1, the electrode of the upper plate II-1 of the capacitor assembly is in a floating potential state.
[0067] According to an embodiment of the present invention, in the signal amplifying device 100 provided by the present invention, the inductor component 110 includes a loop structure consisting of a single Josephson junction or a plurality of Josephson junctions.
[0068] The inductor component can be a single Josephson junction or a loop structure consisting of two Josephson junctions (SQUIDs). The characteristic of SQUIDs is that the inductor is modulated by the current or magnetic flux, forming a nonlinear characteristic.
[0069] According to an embodiment of the present invention, in the signal amplification device 100 provided by the present invention, the upper electrode plate and the lower electrode plate are prepared by physical vapor deposition, chemical vapor deposition, or chemical liquid deposition;
[0070] The Josephson junction includes one or more of an aluminum junction and a niobium junction, and the Josephson junction is prepared by an electron beam evaporation coating method;
[0071] The waveguide transmission line is composed of superconducting metal or superconducting metal compound and is prepared by physical vapor deposition or chemical vapor deposition.
[0072] The upper and lower plates of the parallel plate capacitor can be prepared by physical vapor deposition, chemical vapor deposition, or chemical liquid deposition. The microstructure of the upper and lower plates can be polycrystalline, single crystal, or epitaxial single crystal.
[0073] The inductance value L of the Josephson junction is between a few hundred pH and a few hundred nH. According to the operating frequency f range requirements, the specific values of C and L are determined according to the formula f = 2π√L / C. The Josephson junction can be an aluminum junction (Al / Al2O3 / Al), a niobium junction (Nb / Nb2O3 / Nb), or other junctions with nonlinear inductance. It can be prepared by electron beam evaporation or other vapor deposition methods.
[0074] The wire binding plate is composed of superconducting metal or compound and is prepared by physical vapor deposition or chemical vapor deposition technology.
[0075] Waveguide transmission lines are composed of superconducting metals or compounds and can be microstrip lines, coplanar waveguides, or slot line structures. Superconducting metals can be prepared on single crystal silicon wafers or sapphire (Al2O3) substrates using physical vapor deposition or chemical vapor deposition techniques.
[0076] According to an embodiment of the present invention, in the signal amplifying device 100 provided by the present invention, the signal input and output component is further configured to: input a microwave signal to be amplified, enter the resonant cavity composed of the capacitor component and the inductor component along the first branch of the waveguide transmission line, input a pump signal along the first branch, transfer energy to the signal to be amplified, and generate a companion signal; or
[0077] The signal input and output component is further configured to: input the microwave signal to be amplified, enter the resonant cavity composed of the capacitor component and the inductor component along the first branch of the waveguide transmission line, input the pump signal along the second branch of the waveguide transmission line, generate a magnetic field and modulate the signal to be amplified.
[0078] According to an embodiment of the present invention, in the signal amplifying device 100 provided by the present invention, the resonant system formed by the capacitor component and the inductor component adopts a three-wave mixing or four-wave mixing working mode.
[0079] The inductance of the inductor component can be modulated in the form of microwave current to amplify the signal. It works in the form of three-wave mixing or four-wave mixing. The working mode of four-wave mixing is: the microwave signal to be amplified (frequency ωs) enters the LC resonant cavity along the waveguide transmission line, and the pump signal (frequency ωp) is sent along the same waveguide transmission line. At this time, the pump energy is transferred to the signal to be amplified and generates a companion signal (frequency ωi), and satisfies 2ωp≈ωs+ωi; in the case of three-wave mixing, ωp≈ωs+ωi.
[0080] When the inductor component adopts SQUIDs as described in the above embodiment, the above microwave current modulation inductor method can be used to amplify the signal, or another microwave transmission line can be set next to the inductor loop SQUIDs, and a microwave signal is passed to generate a magnetic field to modulate the SQUIDs inductance in the form of magnetic flux and amplify the signal. It also works in the same way of three-wave mixing or four-wave mixing. The operating frequency is the same as the above embodiment.
[0081] According to an embodiment of the present invention, in the signal amplifying device 100 provided by the present invention, in order to increase the working bandwidth and gain of the signal amplifying device, a quarter-wavelength (or a quarter-wavelength plus a half-wavelength) waveguide can be connected in series between the capacitor component (I-1) and the wire binding board auxiliary component (I-4) to play the role of an impedance matcher. Figure 2 The dotted box in the figure marks a quarter waveguide, which is used to match the impedance of the LC resonant system with the external impedance and increase the working bandwidth of the signal amplification device.
[0082] The signal amplifying device provided by one or more of the above embodiments of the present invention adopts a resonant system composed of air capacitors, has lower dielectric loss and higher internal quality factor, and thus the signal amplifying device obtains higher gain and working bandwidth.
[0083] According to one embodiment of the present invention, the present invention further provides a method 10 for preparing the signal amplification device 100 provided in one or more embodiments above, comprising: steps S101 to S105. In which:
[0084] In step S101, substrate processing is performed to prepare the first substrate and the second substrate.
[0085] In step S102, on the first substrate, the lower plate of the capacitor component, the signal input and output component and the waveguide transmission line are prepared by a standard etching process, the Josephson junction is prepared by a diagonal evaporation technique, and the metal bonding column is prepared by a standard stripping process.
[0086] In step S103, on the second substrate, the upper plate of the capacitor assembly is prepared by a standard etching process, and the metal bonding column is prepared by a standard stripping process.
[0087] In step S104, a flip chip bonding machine is used to align and bond the corresponding metal bonding pillars of the first substrate and the second substrate.
[0088] In step S105, a wire binding machine is used to connect the signal input and output components with an external transmission line.
[0089] Specifically, the process for preparing the substrate 1 includes:
[0090] (1) Substrate pretreatment. Clean the substrate, ultrasonically clean it with acetone, ultrasonically clean it with isopropanol, and blow it dry with nitrogen. Place it in a heat treatment furnace and anneal it at 800℃~1200℃ for 1~3 hours.
[0091] (2) Prepare the bottom circuit and device by using standard etching process. A layer of superconducting metal or compound (including but not limited to Ta, Nb, Al, TiN, NbN, TaN) is deposited on a clean first substrate I by magnetron sputtering (or electron beam evaporation), and then an exposure process (including but not limited to laser direct writing, electron beam exposure or ultraviolet exposure) is used to obtain the lower plate of the capacitor component, waveguide transmission line, wire binding plate and other patterns, and then an etching process (including but not limited to reactive ion etching RIE, ion inductive coupling etching ICP, etc.) is used to remove the excess superconducting metal or compound to obtain the first substrate I of the lower plate (I-1), waveguide transmission line (I-5) and wire binding plate element (I-4) of the integrated capacitor component.
[0092] (3) Preparation of Josephson junction by diagonal evaporation technology: After the first substrate I prepared in the previous step is coated, exposed and developed, a Josephson junction is prepared by diagonal evaporation coating technology to obtain the first substrate I of the integrated inductor element (I-3).
[0093] (4) Prepare metal bonding pillars by using a standard stripping process. The first substrate I in the previous step is uniformly coated with photoresist, exposed, and developed in sequence to obtain a metal pillar pattern; then, metal pillars are prepared by deposition (electron beam evaporation, magnetron sputtering, etc.); finally, the photoresist is removed by immersion in an organic solvent to obtain the first substrate I with a bonding metal pillar (I-2).
[0094] The first substrate I process flow is as follows Figure 3 The left dashed box shows the process of preparing the bottom circuit (capacitor bottom plate, wire binding plate, waveguide transmission line) by standard etching process, the middle dashed box shows the process of preparing Josephson junction (inductor component) by standard stripping process, and the right dashed box shows the process of preparing bonding metal column by standard stripping process.
[0095] Specifically, the process for preparing substrate II includes:
[0096] (1) The upper plate of the capacitor is prepared by a standard etching process. The process steps are the same as those for preparing the lower plate of the capacitor assembly on the first substrate I, and a second substrate II with an upper plate of the integrated capacitor assembly is obtained.
[0097] (2) Prepare metal bonding pillars using a standard stripping process. The second substrate II from the previous step is uniformly coated with photoresist, exposed, and developed in sequence to obtain a metal pillar pattern; then, metal pillars are prepared by deposition (electron beam evaporation, magnetron sputtering, etc.); finally, the photoresist is removed by immersion in an organic solvent to obtain a second substrate II with a bonding metal pillar (II-2).
[0098] (3) The processes for preparing the capacitor plates and bonding metal pillars on the first substrate I and the second substrate II are the same, and the preparation can be done in different areas on the same substrate surface or separately. These preparation methods are all within the scope of protection of the present invention.
[0099] Specifically, the flip chip bonding process includes:
[0100] The corresponding parts of the bonding metal support pillars on the first substrate I and the second substrate II are aligned one by one by using a flip-chip bonding machine. The first substrate I and the second substrate II are bonded after applying pressure and heat preservation delay, and the pressure is adjusted to control the height of the bonding metal pillars until the spacing between the lower plate I-1 of the capacitor assembly on the first substrate I and the upper plate II-1 of the capacitor assembly on the second substrate II is a set value. The wire binding plate (I-4) is connected to the external transmission line by a wire binding machine.
[0101] Figure 4 The flip-chip soldering process is schematically shown, and the shadows in the figure mark the lower plate I-1 and the upper plate II-1 of the parallel plate capacitor.
[0102] The technical solution and technical effects of the present invention are further illustrated below by a specific embodiment.
[0103] This embodiment provides specific steps for preparing a parallel plate air capacitor parametric amplifier on a sapphire substrate, with a designed operating frequency of 6 GHz.
[0104] (1) Substrate treatment. The substrate is made of sapphire (Al2O3) with a thickness of 500 μm. After ultrasonic cleaning with acetone and isopropanol, it is vacuum annealed at 1200°C for 1 hour. The circuits of substrate I and substrate II can be prepared on the same substrate at the same time.
[0105] (2) Etching process to prepare the bottom circuit elements of substrate I. 100nm superconducting metal niobium is deposited by magnetron sputtering. After evenly coating S1813 photoresist, the photoresist is exposed by laser direct writing process to define the capacitor lower plate, wire binding plate, and waveguide transmission line elements on substrate I. The above elements are all made of Nb material. The size of the capacitor lower plate is 200um×200um, the size of the wire binding plate is 50um×50um, the waveguide transmission line is a coplanar waveguide, the center line width is 10um, and the gap width between the center line and the two sides is 20um. The size of the capacitor upper plate on substrate II is 200um×200um. After development, the above pattern is protected by photoresist, and the niobium film is etched by reactive ion etching.
[0106] (3) Prepare the Josephson inductor on substrate I by stripping process. Apply LOR10B and S1813 photoresists in sequence, expose and develop, and then use diagonal evaporation coating technology to prepare a Josephson ring consisting of two Josephson junctions. Adjust the area and oxidation conditions of the Josephson junction region, and adjust its room temperature resistance to 70 ohms, corresponding to an inductance of 90 pH.
[0107] (4) Prepare the bonding metal pillars on substrates I and II by stripping process. The photoresist is evenly coated with a thickness of 3 μm, and the photoresist is exposed by laser direct writing process to define the metal pillar pattern. After development, the photoresist at the metal pillar position is removed, and indium is evaporated by electron beam, and then the photoresist is removed by soaking in organic solvent, and indium is deposited at the corresponding positions of substrates I and II.
[0108] (5) A dicing machine cuts a sapphire substrate including substrate I and substrate II. The size of substrate I is 7 mm×7 mm, and the size of substrate II is 4 mm×4 mm.
[0109] (6) Pressure welding of substrates I and II. Use a scriber to align the indium pillars on substrates I and II, and weld the indium pillars together under a pressure of 20N until the distance between the upper and lower plates of the capacitor is 300nm.
[0110] (7) Install the sample box. Use Al wire to connect the wire binding board and the sample box, and package the parametric amplifier chip composed of substrate I and substrate II in the sample box.
[0111] The signal amplifying device including air-filled parallel plate capacitors provided by one or more of the above embodiments of the present invention, and the method for preparing the signal amplifying device provided by one or more of the above embodiments of the present invention, the preparation method adopts flip-chip welding technology, prepares the lower plate and the upper plate of the parallel plate capacitor separately, and then aligns and presses them together. From the material point of view, no filling medium such as amorphous silicon and silicon nitride is used, and the preparation equipment using these materials is not required, while avoiding the performance impact caused by medium material defects and medium loss; from the process point of view, the deposition, etching, exposure and development process steps are reduced, the preparation process is simplified, and the adverse effects of photoresist residues are reduced. At the same time, the upper and lower plates can obtain the same flatness, and the overall performance is high.
[0112] The embodiments of the present application are described in detail above. Specific examples are used herein to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method and its core idea of the present application. At the same time, changes or deformations made by those skilled in the art based on the ideas of the present application, the specific implementation methods and the scope of application of the present application, all belong to the scope of protection of the present application. In summary, the content of this specification should not be construed as a limitation on the present application.
Claims
1. A signal amplification device, characterized in that: include: a first substrate and a second substrate; Inductive components, including Josephson junctions; A capacitor assembly, comprising an upper plate and a lower plate which are substantially parallel, wherein the medium between the upper plate and the lower plate is air; A signal input and output component, integrated on the first substrate, for inputting a signal to be amplified and outputting an amplified signal; a waveguide transmission line, integrated on the first substrate, configured to serially connect the inductor component, the lower plate and the signal input and output component; The lower electrode plate and the inductor assembly are integrated on the first substrate, and the upper electrode plate is integrated on the second substrate. A portion of metal bonding columns are respectively integrated on the first substrate and the second substrate. The first substrate and the second substrate are connected by flip-chip bonding through the respective portions of metal bonding columns. The signal input and output component is further configured to: Input a signal to be amplified, enter the resonant cavity composed of the capacitor component and the inductor component along the first branch of the waveguide transmission line, input a pump signal along the first branch, transfer energy to the signal to be amplified, and generate a companion signal; or The signal input and output component is further configured to: A signal to be amplified is inputted, and enters the resonant cavity composed of the capacitor component and the inductor component along the first branch of the waveguide transmission line, and a pump signal is inputted along the second branch of the waveguide transmission line to generate a magnetic field and modulate the signal to be amplified. 2 . The signal amplifying device according to claim 1 , wherein the signal input-output component is disposed in an area on the first substrate other than an area corresponding to the second substrate.
3. The signal amplifying device according to claim 1 or 2, wherein the inductor component comprises a loop structure consisting of a single Josephson junction or a plurality of Josephson junctions.
4. The signal amplifying device according to claim 1 or 2, wherein the capacitance value of the capacitor component is determined according to the area of the corresponding parts of the upper electrode plate and the lower electrode plate, and the distance between the upper electrode plate and the lower electrode plate, wherein: The distance between the upper electrode plate and the lower electrode plate is determined according to the height of the metal bonding column. 5 . The signal amplifying device according to claim 1 , wherein the upper electrode plate and the lower electrode plate are made of superconducting metal or superconducting metal compound, and the thickness of the upper electrode plate and the lower electrode plate is 10 nm to 1000 nm.
6. The signal amplification device according to claim 1 or 2, wherein The upper electrode plate and the lower electrode plate are prepared by one or more of physical vapor deposition, chemical vapor deposition, and chemical liquid deposition methods; The Josephson junction includes one or more of an aluminum junction and a niobium junction, and the Josephson junction is prepared by an electron beam evaporation coating method; The metal bonding column is prepared by a low melting point solder metal; and / or The waveguide transmission line is made of superconducting metal or superconducting metal compound, including one or more of microstrip line, coplanar waveguide and slot line structure, and the waveguide transmission line is prepared by one or more of physical vapor deposition or chemical vapor deposition methods.
7. The signal amplifying device according to claim 1 or 2, wherein the metal bonding column is connected to the upper plate and grounded; or The upper electrode plate is in a potential suspension state.
8. The signal amplifying device according to claim 1 or 2, wherein the resonant cavity formed by the capacitor component and the inductor component adopts a three-wave mixing or four-wave mixing working mode.
9. A method for preparing the signal amplification device according to any one of claims 1 to 8, characterized in that: include: preparing the first substrate and the second substrate; On the first substrate, the lower plate of the capacitor component, the signal input and output component and the waveguide transmission line are prepared by etching process, the Josephson junction is prepared by diagonal evaporation technology, and the metal bonding column is prepared by standard stripping process; On the second substrate, an upper plate of the capacitor assembly is prepared by an etching process, and a metal bonding column is prepared by a stripping process; Using a flip-chip bonder to align and bond the corresponding metal bonding pillars of the first substrate and the second substrate; A wire binding machine is used to connect the signal input and output components with the external transmission line.
Citation Information
Patent Citations
Quantum parameter amplifier
CN110120792A
Systems and methods for fabrication of superconducting integrated circuits with improved coherence
WO2022178130A1