Integration method of silicon photonic control device and silicon photonic control device

Abstract

An embodiment of the present invention provides a method for integrating a silicon photonic control device and a silicon photonic control device. The method comprises forming an optical device on a first substrate to form an optical device structure; bonding one end of the optical device structure to a second substrate; thinning the first substrate and performing a flattening operation; integrating a piezoelectric element on the thinned surface of the first substrate; filling the first substrate and the piezoelectric element with a dielectric to form a dielectric layer; and connecting the dielectric layer to a drive circuit to form a piezoelectric control device. Bonding can be used at the back end of the silicon photonic process to integrate the piezoelectric wafer on the reverse side of the substrate where the optical structure has been formed. The bonding process of the piezoelectric control device improves the process tolerance, making it compatible with existing processes and having little impact on existing silicon photonic processes. This facilitates large-scale production, reduces process difficulty during production, and thereby improves product yield.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to an integration method of a silicon light control device and a silicon light control device. Background Art

[0002] Controlling silicon photonic devices with piezoelectric materials has become a research hotspot in recent years. However, existing piezoelectric elements are often manufactured using a sol-gel method, which utilizes compounds containing highly chemically active components as precursors. These raw materials are uniformly mixed in a liquid phase and undergo hydrolysis and condensation reactions to form a stable, transparent sol system in the solution. After aging, the sol particles slowly polymerize to form a three-dimensional gel network. The gel network is then filled with a solvent that has lost its fluidity, forming a gel and ultimately the desired PZT thin film.

[0003] However, existing solutions are very sensitive to substrate requirements during the preparation of piezoelectric control devices and have poor repeatability. At the same time, the use of traditional thin film preparation methods to obtain piezoelectric devices still has problems such as low reliability of the generated products and high process difficulty. Summary of the Invention

[0004] In view of this, the purpose of the present invention is to provide an integration method of a silicon photonic control device and a silicon photonic control device, so as to alleviate the technical problems that the PZT film obtained in the process of preparing the piezoelectric layer is easy to crack and it is difficult to obtain a relatively thick PZT film.

[0005] In a first aspect, an embodiment of the present invention provides a method for integrating a silicon optical control device, wherein the method includes: forming an optical device on a first substrate to form an optical device structure; bonding one end of the optical device of the optical device structure to a second substrate; thinning the first substrate and performing a flattening operation; integrating a piezoelectric element on the surface of the thinned first substrate; and connecting the piezoelectric element to a driving circuit to form a piezoelectric control device.

[0006] Furthermore, the step of thinning the first substrate includes: partially or completely removing material of the first substrate.

[0007] Furthermore, if the first substrate is an SOI substrate, wherein the SOI substrate includes an underlying silicon layer and a buried oxide layer; the step of thinning the first substrate includes: removing the underlying silicon layer of the first substrate; and removing part of the buried oxide layer of the first substrate, and retaining part of the buried oxide layer.

[0008] Furthermore, the step of integrating a piezoelectric element on the surface of the first substrate after thinning includes: integrating a piezoelectric chip on the first substrate after thinning, the piezoelectric chip including a piezoelectric layer and a third substrate; removing the third substrate and forming an electrode layer on the piezoelectric layer; and performing photolithography and etching on the piezoelectric layer and the electrode layer to form a piezoelectric element.

[0009] Furthermore, after integrating the piezoelectric element on the surface of the first substrate after thinning, the method also includes: filling the first substrate and the piezoelectric element with a dielectric to form a dielectric layer; and electrically connecting the driving circuit and the piezoelectric element through silicon vias in the dielectric layer.

[0010] Furthermore, the step of electrically connecting the driving circuit to the piezoelectric element by means of through silicon vias includes: forming a first conductive hole and a second conductive hole in the dielectric layer that communicate with the outside; and filling the first conductive hole and the second conductive hole with conductive materials respectively to form an electrical connection portion.

[0011] Furthermore, the step of connecting the dielectric layer to the driving circuit to form the piezoelectric control device includes: vertically connecting the driving circuit to the electrical connection portion by flip-chip bonding.

[0012] In a second aspect, an embodiment of the present invention further provides a silicon photonic control device, wherein the silicon photonic control device is manufactured by any one of the above methods; the silicon photonic control device includes: an optical device structure, a piezoelectric element and a driving circuit; wherein the piezoelectric element is connected to the driving circuit through an electrical connection part.

[0013] Furthermore, the optical device structure includes: a first substrate, a second substrate and an optical device; wherein the optical device structure is arranged on the top surface of the first substrate, and the optical device structure is bonded to the second substrate; and the bottom surface of the first substrate is integrated with a piezoelectric element.

[0014] Furthermore, the first substrate and the piezoelectric element are filled with dielectric material to form a dielectric layer; the dielectric layer is provided with a first conductive hole and a second conductive hole communicating with the outside; the first conductive hole and the second conductive hole are respectively filled with conductive materials; the driving circuit is electrically connected to the piezoelectric element through the first conductive hole and the second conductive hole.

[0015] The embodiments of the present invention bring the following beneficial effects:

[0016] An embodiment of the present invention provides a method for integrating a silicon photonic control device. The method comprises forming an optical device on a first substrate to form an optical device structure; bonding one end of the optical device structure to a second substrate; thinning and flattening the first substrate; integrating a piezoelectric element on the thinned surface of the first substrate; filling the first substrate and the piezoelectric element with a dielectric to form a dielectric layer; and connecting the dielectric layer to a drive circuit to form a piezoelectric control device. Bonding can be used at the back end of the silicon photonic process to integrate the piezoelectric wafer on the reverse side of the substrate where the optical structure has been formed. After wafer bonding, the process tolerance of the piezoelectric control device is improved, making it compatible with existing CMOS processes with minimal impact on existing silicon photonic processes, facilitating large-scale production, and reducing process difficulty during production, thereby improving product yield.

[0017] Other features and advantages of the present disclosure will be set forth in the following description, or some features and advantages may be inferred or unambiguously determined from the description, or may be learned by practicing the above-mentioned technology of the present disclosure.

[0018] In order to make the above-mentioned objectives, features and advantages of the present disclosure more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the specific embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the specific embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0020] Figure 1 A flow chart of a method for integrating a silicon photonic control device provided by an embodiment of the present invention;

[0021] Figure 2 A flow chart of another method for integrating a silicon photonic control device provided by an embodiment of the present invention;

[0022] Figure 3 A schematic structural diagram of a silicon photonic control device provided by an embodiment of the present invention;

[0023] Figure 4 A schematic structural diagram of an electronic device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0024] To make the objectives, technical solutions, and advantages of the embodiments of the present invention more clear, the technical solutions of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the embodiments described are only part of the embodiments of the present invention, not all of them. All other embodiments obtained by ordinary technicians in this field based on the embodiments of the present invention without making any creative efforts shall fall within the scope of protection of the present invention.

[0025] In recent years, as society enters the era of high-speed information, the demand for communication capacity and speed has grown exponentially. At the same time, data centers and high-performance computing are facing bottlenecks in electrical interconnect speed, bandwidth, and energy consumption. Silicon-based optoelectronics technology has become key to overcoming these bottlenecks. Due to their small size, low power consumption, low cost, and high integration, silicon-based optoelectronic chips have been widely used in mid-infrared communications, microwave optoelectronics, lab-on-a-chip, quantum communications, optoelectronic computing, and chip-scale LiDAR.

[0026] Optical phase modulators (phase shifters) are the most fundamental control units in silicon-based optoelectronic chips and are a major research area in optical interconnect systems, optical signal processing, and silicon photonics. Currently, there are three main phase control mechanisms for silicon-based optical waveguides: free carrier dispersion (FCD), thermo-optical (TO), and electro-optical (EO). All three methods require a constant current during the phase modulation process, resulting in a continuous energy consumption. As the integration density of optoelectronic chips increases, the need to reduce energy consumption becomes increasingly urgent. Therefore, developing low-power optical waveguide phase control devices has become a key issue in increasing the integration density of optoelectronic chips.

[0027] Controlling silicon photonic devices using piezoelectric materials has become a research hotspot in recent years. Due to their unique bistable structure and properties, piezoelectrically controlled silicon photonic devices theoretically have zero static power consumption. This provides an effective method for reducing power consumption and increasing the integration density of silicon-based optoelectronic devices.

[0028] However, the preparation of existing piezoelectric control devices often involves directly growing piezoelectric thin films on silicon substrates to form piezoelectric elements. However, this preparation method has the following problems: (1) lattice mismatch; (2) thermal expansion coefficient mismatch; (3) poor film-substrate bonding; (4) high film preparation or annealing crystallization temperature (exceeding the thermal budget of silicon material 450°C); and (5) poor piezoelectric performance.

[0029] Based on this, embodiments of the present invention provide a method for integrating a silicon photonic control device, and a silicon photonic control device.

[0030] To facilitate understanding of this embodiment, a method for integrating a silicon photonic control device disclosed in an embodiment of the present invention is first introduced in detail. Figure 1 A flow chart of a method for integrating a silicon photonic control device is shown, wherein the method comprises the following steps:

[0031] Step S101, forming an optical device on a first substrate to form an optical device structure;

[0032] Specifically, SOI silicon-on-insulator (SOI) (underlying silicon / buried oxide layer / underlying silicon) can be selected as the first substrate material, with no particular limitation on the specific material. An optical device structure is formed on the first substrate. The optical device structure includes, but is not limited to, a waveguide, a modulator, a dielectric layer, and the like. The waveguide material includes, but is not limited to, silicon and / or silicon nitride.

[0033] Step S102, bonding one end of the optical device structure to the second substrate;

[0034] Specifically, after the above steps, the optical device structure formed in step S101 can be flipped over and connected to a second substrate via bonding. The second substrate can be a silicon substrate or other semiconductor substrate; the bonding method can be wafer-to-wafer bonding, or other bonding methods can be used. The bonding method is not specifically limited herein.

[0035] Step S103, thinning the first substrate and performing a planarization operation;

[0036] In practical applications, the first substrate may be partially or completely removed and planarized to constrain the optical mode in the optical structure and reduce optical loss. Specifically, when the first substrate is an SOI substrate, the underlying silicon layer of the SOI substrate is removed, and a portion of the buried oxide layer of the SOI substrate is removed, leaving a certain thickness of the buried oxide layer.

[0037] Step S104, integrating a piezoelectric element on the surface of the first substrate after the thinning process;

[0038] Specifically, the prefabricated piezoelectric element can be connected to the first substrate in step S103 by bonding. The piezoelectric wafer includes a piezoelectric layer and a third substrate. The bonding method can be die-to-wafer bonding.

[0039] Step S105 , connecting the piezoelectric element to a driving circuit to form a piezoelectric control device.

[0040] In practical applications, under an external driving voltage, the piezoelectric element can generate stress through the inverse piezoelectric effect. This stress is transmitted to the waveguide layer of the optical device structure, thereby adjusting the refractive index of the waveguide and then adjusting the phase of the optical signal.

[0041] An embodiment of the present invention provides an integration method for silicon photonic control devices. A bonding method is adopted at the back end of the silicon photonic process to integrate the piezoelectric wafer on the reverse side of the substrate where the optical structure has been formed. After the wafers are bonded, the process tolerance is improved, and the device is compatible with the existing CMOS process with minimal impact on the existing silicon photonic process, which is conducive to large-scale production.

[0042] Furthermore, by removing the substrate and bonding the back surface for integration, it is also applicable to the bonding of III-V lasers, demonstrating process versatility. Furthermore, the method provided by the embodiments of the present invention first bonds the piezoelectric wafer to the optical structure wafer, and then forms the piezoelectric element through a subsequent process. This process does not require strict alignment, is easy to process, and produces a high yield. Furthermore, because the piezoelectric material and the optical structure are connected by bonding, the processing temperature is relatively low, which does not exceed the thermal budget of the silicon material, while also ensuring the reliability of the device.

[0043] Based on the above embodiments, Figure 2 A flow chart of another method for integrating silicon photonic control devices is shown. Figure 2 As shown, the method specifically includes the following steps:

[0044] Step S201, forming an optical device on a first substrate to form an optical device structure;

[0045] Step S202, bonding one end of the optical device structure to the second substrate;

[0046] Step S203, partially or completely removing the material of the first substrate and performing a planarization operation;

[0047] In practical applications, a variety of substrate materials can be used as the first substrate. If the first substrate is an SOI substrate, wherein the SOI substrate includes an underlying silicon layer and a buried oxide layer, the process of thinning the first substrate can be implemented by the following steps A1-A2, including:

[0048] Step A1, removing the bottom silicon layer of the first substrate;

[0049] In step A2, a portion of the buried oxide layer of the first substrate is removed, and a portion of the buried oxide layer is retained.

[0050] Step S204, integrating a piezoelectric wafer on the thinned first substrate, the piezoelectric wafer including a piezoelectric layer and a third substrate;

[0051] Specifically, the above integration method may adopt a bonding integration method, and the bonding method may adopt a die to wafer bonding method.

[0052] Step S205, removing the third substrate and forming an electrode layer on the piezoelectric layer;

[0053] In practical applications, the third substrate of the piezoelectric wafer is removed and an electrode layer is formed to collect external voltage. The third substrate can include one or more semiconductor substrate materials, such as a silicon / silicon dioxide substrate.

[0054] Step S206, performing photolithography and etching on the piezoelectric layer and the electrode layer to form a piezoelectric element;

[0055] Step S207, filling the first substrate and the piezoelectric element with a dielectric to form a dielectric layer;

[0056] In practical applications, in order to improve the stability of the overall piezoelectric control device, the piezoelectric element can be encapsulated on the first substrate by filling a certain medium to form a dielectric layer. The above-mentioned filling medium includes but is not limited to silicon dioxide or silicon nitride.

[0057] Step S208 : electrically connecting the driving circuit to the piezoelectric element through a through-silicon via in the dielectric layer.

[0058] Specifically, the process of electrically connecting the driving circuit and the piezoelectric element through the through-silicon via (TSV) can be implemented by the following steps B1-B2:

[0059] Step B1, forming a first conductive hole and a second conductive hole communicating with the outside in the dielectric layer;

[0060] Step B2: Fill the first conductive via and the second conductive via with conductive materials respectively to form electrical connection portions.

[0061] In practical applications, the piezoelectric element can be electrically connected to the driving circuit by means of TSV (Through Silicon Via). The electrical connection structure includes: a first conductive column, a second conductive column, and a filling medium. Here, the formation process of the first conductive column and the second conductive column can be to first form a via hole and then fill the via hole with a conductive material. In some specific examples, the material filled in the through hole includes but is not limited to copper, tungsten, polysilicon, etc.

[0062] Specifically, in practical applications, the driving circuit can be vertically connected to the electrical connection portion by flip-chip bonding, so that the driving circuit can provide electrical energy to the piezoelectric element.

[0063] Corresponding to the above method embodiments, an embodiment of the present invention further provides a silicon light control device, wherein the silicon light control device is manufactured by any one of the above methods; Figure 3 As shown, the silicon light control device includes: an optical device structure 100, a piezoelectric element 200 and a driving circuit 300;

[0064] The piezoelectric element is connected to the driving circuit via an electrical connection portion.

[0065] Specifically, the optical device structure includes: a first substrate 101, a second substrate 102 and an optical device 103;

[0066] The optical device 103 is arranged on the top surface of the first substrate 101, and the optical device 103 is bonded to the second substrate 102;

[0067] A piezoelectric element 200 is integrated on the bottom surface of the first substrate 101 .

[0068] The first substrate 101 and the piezoelectric element 200 are filled with dielectric material to form a dielectric layer 210;

[0069] The dielectric layer is provided with a first conductive hole 211 and a second conductive hole 212 communicating with the outside;

[0070] Wherein, the first conductive hole and the second conductive hole are respectively filled with conductive materials;

[0071] The driving circuit 300 is electrically connected to the piezoelectric element 200 through the first conductive via 211 and the second conductive via 212 .

[0072] The embodiment of the present invention further provides an electronic device, such as Figure 4 As shown, it is a structural diagram of the electronic device, wherein the electronic device includes a processor 41 and a memory 42, the memory 42 stores machine executable instructions that can be executed by the processor 41, and the processor 41 executes the machine executable instructions to implement the above-mentioned silicon photonic control device integration method.

[0073] exist Figure 4 In the illustrated embodiment, the electronic device further includes a bus 43 and a communication interface 44 , wherein the processor 41 , the communication interface 44 and the memory 42 are connected via the bus.

[0074] The memory 42 may include a high-speed random access memory (RAM) and may also include a non-volatile memory, such as at least one disk storage. The communication connection between the system network element and at least one other network element is achieved through at least one communication interface 44 (which may be wired or wireless), and the Internet, wide area network, local area network, metropolitan area network, etc. may be used. The bus may be an ISA bus, a PCI bus, or an EISA bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one bidirectional arrow is used in the diagram, but this does not mean that there is only one bus or one type of bus.

[0075] Processor 41 may be an integrated circuit chip with signal processing capabilities. During implementation, each step of the above method may be completed by hardware integrated logic circuits or software instructions in processor 41. The above processor 41 may be a general-purpose processor, including a central processing unit (CPU), a network processor (NP), etc.; it may also be a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field-programmable gate array (FPGA), or other programmable logic devices, discrete gate or transistor logic devices, or discrete hardware components. It may implement or execute the various methods, steps, and logic block diagrams disclosed in the embodiments of the present invention. The general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in conjunction with the embodiments of the present invention may be directly implemented and executed by a hardware decoding processor, or by a combination of hardware and software modules in the decoding processor. The software module may be located in a storage medium well-known in the art, such as random access memory, flash memory, read-only memory, programmable read-only memory, electrically erasable programmable memory, registers, or the like. The storage medium is located in the memory, and the processor 41 reads the information in the memory 42 and completes the steps of the silicon photonic control device integration method of the aforementioned embodiment in combination with its hardware.

[0076] An embodiment of the present invention also provides a machine-readable storage medium, which stores machine-executable instructions. When the machine-executable instructions are called and executed by a processor, the machine-executable instructions prompt the processor to implement the above-mentioned silicon photonic control device integration method. The specific implementation can be found in the aforementioned method embodiment and will not be repeated here.

[0077] The computer program product of the silicon photonic control device integration method and electronic device provided in the embodiments of the present invention includes a computer-readable storage medium storing program code. The instructions included in the above program code can be used to execute the above-mentioned silicon photonic control device integration method in the previous method embodiment. The specific implementation can be referred to the method embodiment and will not be repeated here.

[0078] If the above functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a non-volatile computer-readable storage medium that is executable by a processor. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, server, or network device, etc.) to execute all or part of the steps of the above methods of each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0079] In addition, in the description of the embodiments of the present invention, unless otherwise expressly specified or limited, the terms "mounted," "connected," and "connected" should be understood in a broad sense. For example, they may refer to fixed connections, detachable connections, or integral connections; they may refer to mechanical connections or electrical connections; they may refer to direct connections or indirect connections through an intermediate medium; and they may refer to internal communication between two components. Those skilled in the art will understand the specific meanings of the above terms in the present invention based on the specific circumstances.

[0080] In the description of the present invention, it should be noted that the terms "center," "upper," "lower," "left," "right," "vertical," "horizontal," "inner," and "outer," etc., indicating orientations or positional relationships, are based on the orientations or positional relationships shown in the accompanying drawings and are intended solely to facilitate and simplify the description of the present invention. They are not intended to indicate or imply that the devices or components referred to must have, be constructed, or operate in a specific orientation, and therefore should not be construed as limitations on the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and should not be construed as indicating or implying relative importance.

[0081] Finally, it should be noted that the above embodiments are only specific implementation methods of the present invention, which are used to illustrate the technical solutions of the present invention, rather than to limit them. The scope of protection of the present invention is not limited thereto. Although the present invention has been described in detail with reference to the above embodiments, those skilled in the art should understand that any person skilled in the art can modify or easily conceive of changes to the technical solutions described in the above embodiments within the technical scope disclosed by the present invention, or replace some of the technical features therein with equivalents. Such modifications, changes or replacements do not deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should be included in the scope of protection of the present invention. Therefore, the scope of protection of the present invention should be based on the scope of protection of the above claims.

Claims

1. A method for integrating a silicon photonic control device, characterized in that: The method comprises: forming an optical device on the first substrate to form an optical device structure; bonding one end of the optical device structure to a second substrate; performing a thinning process and a planarization operation on the first substrate; integrating a piezoelectric element by bonding a prefabricated piezoelectric wafer on the surface of the first substrate after thinning; The piezoelectric element is connected to a driving circuit to form a piezoelectric control device.

2. The method for integrating a silicon photonic control device according to claim 1, wherein: The step of thinning the first substrate includes: The material of the first substrate is partially or completely removed.

3. The method for integrating a silicon photonic control device according to claim 1, wherein: If the first substrate is an SOI substrate, wherein the SOI substrate includes an underlying silicon layer and a buried oxide layer, the step of thinning the first substrate includes: then removing the bottom silicon layer of the first substrate; Part of the buried oxide layer of the first substrate is removed, and part of the buried oxide layer is retained.

4. The method for integrating a silicon light control device according to claim 1, wherein: The step of integrating a piezoelectric element on the surface of the first substrate after thinning includes: integrating a piezoelectric wafer on the first substrate after the thinning process, wherein the piezoelectric wafer includes a piezoelectric layer and a third substrate; removing the third substrate and forming an electrode layer on the piezoelectric layer; The piezoelectric layer and the electrode layer are subjected to photolithography and etching to form the piezoelectric element.

5. The method for integrating a silicon light control device according to claim 1, wherein: After integrating the piezoelectric element on the surface of the first substrate after the thinning process, the method further includes: Filling the first substrate and the piezoelectric element with a dielectric to form a dielectric layer; The driving circuit is electrically connected to the piezoelectric element by means of through silicon vias in the dielectric layer.

6. The method for integrating a silicon light control device according to claim 5, wherein: The step of electrically connecting the driving circuit to the piezoelectric element through a through silicon via comprises: forming a first conductive hole and a second conductive hole communicating with the outside in the dielectric layer; The first conductive via and the second conductive via are respectively filled with conductive materials to form electrical connection portions.

7. The method for integrating a silicon photonic control device according to claim 6, wherein: The step of connecting the dielectric layer to a driving circuit to form a piezoelectric control device includes: The driving circuit is vertically connected to the electrical connection portion by flip-chip bonding.

8. A silicon photonic control device, characterized in that: The silicon light control device is made by the method according to any one of claims 1 to 7; the silicon light control device comprises: an optical device structure, a piezoelectric element and a driving circuit; Wherein, the piezoelectric element is connected to the driving circuit through an electrical connection portion.

9. The silicon photonic control device according to claim 8, wherein: The optical device structure comprises: a first substrate, a second substrate and an optical device; Wherein, the optical device is arranged on the top surface of the first substrate, and the optical device structure is bonded to the second substrate; The piezoelectric element is integrated on the bottom surface of the first substrate.

10. The silicon photonic control device according to claim 9, wherein: The first substrate and the piezoelectric element are filled with a dielectric material to form a dielectric layer; The dielectric layer is provided with a first conductive hole and a second conductive hole communicating with the outside; the first conductive hole and the second conductive hole are respectively filled with conductive materials; The driving circuit is electrically connected to the piezoelectric element through the first conductive hole and the second conductive hole.

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