Pvt deviation automatic calibration circuit of voltage sag monitoring circuit

Abstract

The present application relates to a kind of PVT deviation automatic calibration circuit suitable for voltage sag monitoring circuit, to solve the problem of large amount of hardware cost needed by traditional chip based on lookup table calibration, and the problem that offline calibration by software can lead to result lag.The present application proposes a kind of lightweight linear calibration method to establish the fixed mapping relationship between calibration result and voltage under PVT variation.Through normalization and multi-dimensional calibration information fusion technology, the reduction of hardware cost and the control of calibration error are realized.

Description

Technical Field

[0001] This invention discloses an automatic PVT deviation calibration circuit suitable for voltage descent monitoring circuits, which relates to the field of electronic technology and belongs to the technical field of low-power integrated circuit design. Background Technology

[0002] With advancements in VLSI technology, an increasing number of transistors are being integrated into server processors for high-performance parallel computing. Sudden changes in workload in such processors can cause abrupt current surges; for example, most arithmetic units in the processor simultaneously transition from idle to active states, a phenomenon known as a di / dt event. These current surges also cause voltage drops in the power network. This can lead to insufficient timing margins or even failure to meet minimum requirements, resulting in computational errors. Voltage drops can typically be categorized into three phases, with the first-order voltage drop being the most difficult to monitor. Its frequency and amplitude depend on the package inductance and on-chip capacitors, ranging from tens to hundreds of megahertz in frequency and tens to hundreds of millivolts in amplitude. IC designers often use voltage monitoring circuits, along with LDOs, DC-DC converters, and other methods, to adjust the voltage and prevent system errors. However, as integrated circuit process dimensions shrink, the impact of process-voltage-temperature (PVT) deviations on the circuit increases, making the output characteristics of voltage monitoring circuits unstable.

[0003] Conventional voltage monitoring circuits employ on-chip online calibration based on lookup tables to handle PVT deviations, requiring significant hardware resources to store and allocate calibration data. Off-chip calibration via software, on the other hand, results in lag. High-resolution voltage sensors are more sensitive to PVT variations, potentially leading to system misjudgments. Therefore, a lightweight linear calibration method to address PVT deviations is needed to establish a fixed mapping between calibration results and voltage under PVT variations. Summary of the Invention

[0004] This invention proposes an automatic calibration circuit for PVT deviation in voltage descent monitoring circuits. By using techniques such as normalization and merging of multi-dimensional calibration information, it solves the problems of high hardware cost and interpretation of calibration errors in existing circuits.

[0005] To achieve the above objectives, the technical solution adopted by the present invention is as follows:

[0006] The automatic PVT deviation calibration circuit of the voltage droop monitoring circuit includes a voltage monitoring module, a normalization module, an on-chip temperature sensor, a calibration factor module, and a multiply-accumulate module. The voltage monitoring module monitors the on-chip voltage in real time and outputs a voltage code value with a fast response speed. The normalization module receives the output of the voltage monitoring module and the sampling clock frequency, normalizing the output code value of the voltage monitoring module under different sampling clock frequencies, enabling subsequent calibration processes at different sampling clock frequencies to be performed using the same circuit. The on-chip temperature sensor generates the real-time on-chip temperature and provides it to the calibration factor module. The calibration factor module stores the calibration factor and receives the output of the voltage monitoring module and the output of the on-chip temperature sensor to select the calibration factor under the current PVT condition. The multiply-accumulate module receives the output of the voltage monitoring module and the output of the calibration factor module and calculates the calibration code value according to the calibration formula.

[0007] Furthermore, the voltage monitoring module consists of a ring oscillator, a sampling register, and quantization logic. The ring oscillator maps voltage changes to device delay changes. The sampling register samples the toggling position of the ring oscillator. Within one sampling period T, the quantization logic combines the results of coarse and fine quantization to calculate the final voltage quantization result and outputs the voltage code value A in real time. When the sampling period switches from T to T / 2... n When n is a positive integer greater than or equal to 1, the sampling clock frequency is switched from f to 2. n When *f, the voltage code value output by the voltage monitoring module changes from A to A / 2. n .

[0008] Furthermore, the normalization module consists of a MUX selector and a barrel shifter, using the voltage code value A at the sampling clock frequency f as the normalization reference. When the sampling clock frequency f switches to 2... n When *f, the voltage code value output by the voltage monitoring module changes from A to A / 2. n The barrel shifter shifts n bits to the left.

[0009] Furthermore, the on-chip temperature sensor consists of an inverter chain that maps temperature changes to device delay changes. It is sampled using a trigger and quantized within one sampling period to output the temperature code value B in real time.

[0010] Furthermore, the calibration factor module consists of a calibration factor table and a MUX selector. The voltage code value A is the horizontal index of the calibration factor table, and the temperature code value B is the vertical index of the calibration factor table. By inputting the horizontal and vertical indices into the MUX selector, the calibration factor a in the calibration factor table is selected. x and b x The output is sent to the multiply-accumulate module.

[0011] Furthermore, obtaining the calibration factor table requires an external calibration. At a sampling clock frequency f, the code values ​​of the voltage monitoring module within the voltage range [m,n] are recorded, and the scan is repeated within the temperature range [p,q] to obtain multiple sets of voltage code values. Piecewise linear fitting is then performed on these multiple sets of voltage code values ​​to obtain different calibration factors a. x and b x And write it into the calibration factor table.

[0012] Furthermore, the multiply-accumulate module consists of a floating-point multiplier and an adder, receiving the output A from the voltage monitoring module and the output a from the calibration factor module. x and b x The calibration formula is used to calculate and output the calibration code value CA. The calibration formula is as follows:

[0013] CA = a x *A[L / 2:0]+b x +{A[L-1:L / 2+1],(L / 2+1)'b0}.

[0014] Where L is the bit width of the voltage code value A.

[0015] The present invention, by adopting the above technical solution, has the following beneficial effects:

[0016] 1) The normalization module of this invention normalizes the voltage code values ​​under different sampling clock frequencies. Subsequently, the same set of calibration factor module and multiply-accumulate module can be used to process different sampling clock frequencies, which significantly reduces the circuit area.

[0017] 2) This invention performs piecewise linear fitting on multiple sets of voltage code values ​​and combines sampling horizontal indexing and vertical indexing, which significantly reduces storage and indexing costs;

[0018] 3) The critical path of the automatic PVT deviation calibration circuit of the present invention mainly includes a MUX, a floating-point multiplier and an adder, which can output calibration code values ​​at high speed. Attached Figure Description

[0019] Figure 1 This is a flowchart of the automatic PVT deviation calibration circuit of the voltage drop monitoring circuit of the present invention;

[0020] Figure 2 This is a schematic diagram of the voltage monitoring module of the present invention;

[0021] Figure 3 This is a schematic diagram of the normalization module of the present invention;

[0022] Figure 4 This is a schematic diagram of the on-chip temperature sensor of the present invention;

[0023] Figure 5This is a flowchart illustrating the process of obtaining the calibration factor table of the present invention.

[0024] Figure 6 This is a schematic diagram of the multiply-accumulate module of the present invention.

[0025] Figure 7 This is a schematic diagram of the automatic calibration circuit for PVT deviation in the voltage drop monitoring circuit of the present invention. Detailed Implementation

[0026] To better understand the purpose, structure, and function of this invention, the automatic PVT deviation calibration circuit of the voltage descent monitoring circuit of this invention will be described in further detail below with reference to the accompanying drawings.

[0027] Figure 1 This is a flowchart of the automatic PVT deviation calibration process for a voltage sag monitoring circuit. The automatic PVT deviation calibration circuit includes a voltage monitoring module, a normalization module, an on-chip temperature sensor, a calibration factor module, and a multiply-accumulate module. The voltage monitoring module monitors the on-chip voltage in real time and outputs a fast-response voltage code value. The normalization module receives the output of the voltage monitoring module and the sampling clock frequency, normalizing the output code values ​​of the voltage monitoring module at different sampling clock frequencies, allowing subsequent calibration processes at different sampling clock frequencies to be performed using the same circuit. The on-chip temperature sensor generates the real-time on-chip temperature and provides it to the calibration factor module. The calibration factor module stores the calibration factor and receives the outputs of the voltage monitoring module and the on-chip temperature sensor, selecting the calibration factor under the current PVT condition. The multiply-accumulate module receives the outputs of the voltage monitoring module and the calibration factor module, and calculates the calibration code value according to the calibration formula.

[0028] Figure 2 This is a schematic diagram of the voltage monitoring module. The module uses a ring oscillator to map voltage changes to device delay changes. A register samples the toggling position of the ring oscillator. Within one sampling period T, the quantization logic combines the results of coarse and fine quantization to calculate the final voltage quantization result, outputting a 10-bit voltage code value A in real time. When the sampling period switches from T to T / 2... n When n is a positive integer greater than or equal to 1, the sampling clock frequency is switched from f to 2. n When *f, the voltage code value output by the voltage monitoring module changes from A to A / 2. n If the voltage code value is A at a sampling clock frequency of 500MHz; when the sampling clock frequency is switched to 1GHz, the voltage code value is A / 2; when the sampling clock frequency is switched to 2GHz, the voltage code value is A / 4.

[0029] Figure 3This is a schematic diagram of the normalization module of the present invention. The normalization module consists of a MUX selector and a barrel shifter, using the voltage code value A at the sampling clock frequency f as the normalization reference. When the sampling clock frequency f switches to 2... n When *f, the voltage code value output by the voltage monitoring module changes from A to A / 2. n The barrel shifter is shifted left by n bits. If the voltage code value A at 500MHz is used as the normalization reference, when the sampling clock frequency switches to 1GHz, the voltage code value is A / 2, requiring a left shift of 1 bit to obtain the normalized voltage code value A; when the sampling clock frequency switches to 2GHz, the voltage code value is A / 4, requiring a left shift of 2 bits to obtain the normalized voltage code value A. The code values ​​at 500MHz, 1GHz, and 2GHz are all normalized to A, allowing the same circuit to be used for subsequent calibration processes at different sampling clock frequencies.

[0030] Figure 4 This is a schematic diagram of the on-chip temperature sensor of the present invention. The on-chip temperature sensor consists of an inverter chain, which maps temperature changes to device delay changes, uses a trigger to sample it, and quantizes the logic and outputs the temperature code value B in real time within one sampling period.

[0031] Figure 5 The flowchart below illustrates the process of obtaining the calibration factor table for this invention. Obtaining the calibration factor table requires an external calibration. At a sampling clock frequency f, the code values ​​of the voltage monitoring module within the voltage range [m, n] are recorded, and the scan is repeated within the temperature range [p, q] to obtain multiple sets of voltage code values. Piecewise linear fitting is then performed on the multiple sets of voltage code values ​​to obtain different calibration factors a. x and b x And write it into the calibration factor table. Figure 5 For example, at a sampling rate of 500MHz, the voltage code value A of the voltage monitoring module is recorded in the voltage range of [0.5, 1.1]V, and the scanning is repeated in the temperature range of [-40, 125]℃ to obtain multiple sets of voltage code values.

[0032] Figure 6 This is a schematic diagram of the multiply-accumulate module of the present invention. The multiply-accumulate module consists of a floating-point multiplier and an adder, and receives the output A of the voltage monitoring module and the output a of the calibration factor module. x and b x The calibration formula is used to calculate and output the calibration code value CA. The calibration formula is as follows:

[0033] CA = a x *A[5:0]+b x +{A[9:6],6'b0}.

[0034] Figure 7The diagram shows the calibration effect of the calibration circuit of this invention, demonstrating the calibration effect at three temperatures. The calibration error at different voltages is less than 1 LSB.

[0035] It is understood that the present invention has been described through some embodiments, and those skilled in the art will recognize that various changes or equivalent substitutions can be made to these features and embodiments without departing from the spirit and scope of the invention. Furthermore, under the teachings of the present invention, these features and embodiments can be modified to adapt to specific situations and materials without departing from the spirit and scope of the invention. Therefore, the present invention is not limited to the specific embodiments disclosed herein, and all embodiments falling within the scope of the claims of this application are within the protection scope of the present invention.

Claims

1. An automatic PVT deviation calibration circuit for voltage descent monitoring circuits, characterized in that, Includes a voltage monitoring module, a normalization module, an on-chip temperature sensor, a calibration factor module, and a multiply-accumulate module; The voltage monitoring module is used to monitor the on-chip voltage in real time and output voltage code values ​​with fast response speed; The normalization module is used to receive the output of the voltage monitoring module and the sampling clock frequency, and normalize the output code value of the voltage monitoring module under different sampling clock frequencies, so that the same circuit can be used to implement the calibration process of different sampling clock frequencies. The on-chip temperature sensor is used to generate real-time on-chip temperature and provide it to the calibration factor module; The calibration factor module is used to store calibration factors and receive the outputs from the voltage monitoring module and the on-chip temperature sensor to select the calibration factor. The multiply-accumulate module is used to receive the output of the voltage monitoring module and the output of the calibration factor module, and calculate the calibration code value according to the calibration formula; The calibration factor module consists of a calibration factor table and a MUX selector. Voltage code value A is the horizontal index of the calibration factor table, and temperature code value B is the vertical index. Inputting the horizontal and vertical indices into the MUX selector selects the calibration factor 'a' from the calibration factor table. x and b x The output is sent to the multiply-accumulate module; Obtaining the calibration factor table requires an external calibration. At a sampling clock frequency f, the code values ​​of the voltage monitoring module within the voltage range [m, n] are recorded, and the scan is repeated within the temperature range [p, q] to obtain multiple sets of voltage code values. Piecewise linear fitting is then performed on these multiple sets of voltage code values ​​to obtain different calibration factors a. x and b x And write it into the calibration factor table; The multiply-accumulate module consists of a floating-point multiplier and an adder, and receives the output A from the voltage monitoring module and the output a from the calibration factor module. x and b x The calibration formula is used to calculate and output the calibration code value CA. The calibration formula is as follows: ； Where L is the bit width of the voltage code value A.

2. The automatic PVT deviation calibration circuit of the voltage descent monitoring circuit according to claim 1, characterized in that, The voltage monitoring module consists of a ring oscillator, a sampling register, and quantization logic. The ring oscillator maps voltage changes to device delay changes. The sampling register samples the toggling position of the ring oscillator. Within one sampling period T, the quantization logic combines the results of coarse quantization and fine quantization to calculate the final voltage quantization result and outputs the voltage code value A in real time. When the sampling period is switched from T to T / 2 n When n is a positive integer greater than or equal to 1, the sampling clock frequency switches from f to n. At that time, the voltage code value output by the voltage monitoring module changed from A to A / 2. n .

3. The automatic PVT deviation calibration circuit of the voltage descent monitoring circuit according to claim 2, characterized in that, The normalization module consists of a MUX selector and a barrel shifter, using the voltage code value A at the sampling clock frequency f as the normalization reference; when the sampling clock frequency f switches to... At that time, the voltage code value output by the voltage monitoring module changed from A to A / 2. n The barrel shifter shifts n bits to the left.

4. The automatic PVT deviation calibration circuit of the voltage descent monitoring circuit according to claim 3, characterized in that, The on-chip temperature sensor consists of an inverter chain that maps temperature changes to device delay changes. It is sampled using a trigger and quantized within one sampling period to output the temperature code value B in real time.

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