Display module

Abstract

The application discloses a display module, and belongs to the technical field of display. The display module comprises a display panel, the display panel comprising a plurality of pixel units arranged in rows and columns; a first power voltage output end and a second power voltage output end located at opposite sides of the display panel, respectively used for providing a first power voltage and a second power voltage for the pixel units; a data voltage generation module used for providing a data voltage for the pixel units; and a voltage compensation circuit used for compensating the data voltage according to the first power voltage and the second power voltage. The voltage compensation circuit is electrically connected with the first power voltage output end, the second power voltage output end and the data voltage generation module, so that the compensation of the data voltage can be performed to compensate for different voltage drops of the power voltage at the two sides of the display panel, and the display uniformity of a large-size display panel is improved.

Description

TECHNICAL FIELD

[0001] The present application belongs to the technical field of display, and particularly relates to a display module. BACKGROUND

[0002] OLED (Organic Light-Emitting Diode) has a different light-emitting principle from LCD (Liquid Crystal Display), and has advantages of self-emission, wide viewing angle, almost infinite contrast, low power consumption and extremely high response speed, and has been widely applied to terminal devices.

[0003] At present, for a middle or large size OLED panel, the constant voltage provided by the power supply chip is prone to obvious voltage drop phenomenon, so that the sizes of the constant voltage received by each pixel driving circuit are greatly different, which affects the display uniformity of the display screen as a whole and the display effect is poor. SUMMARY

[0004] The present application aims to at least solve one of the technical problems existing in the prior art. To this end, the present application provides a display module which can effectively improve the voltage drop phenomenon of the power supply voltage and improve the display uniformity.

[0005] In a first aspect, the present application provides a display module, comprising:

[0006] a display panel, the display panel comprising a plurality of pixel units arranged in rows and columns;

[0007] a first power supply voltage output end and a second power supply voltage output end located at opposite sides of the display panel, the first power supply voltage output end and the second power supply voltage output end are both electrically connected with each of the pixel units and are respectively used for providing a first power supply voltage and a second power supply voltage for the pixel units;

[0008] a data voltage generation module, the data voltage generation module is electrically connected with each of the pixel units and is used for providing a data voltage for the pixel units;

[0009] a voltage compensation circuit, used for compensating the data voltage according to the first power supply voltage and the second power supply voltage, the voltage compensation circuit is electrically connected with the first power supply voltage output end, the second power supply voltage output end and the data voltage generation module.

[0010] The display module provided by the present application compensates the data voltage by setting the voltage compensation circuit, so as to compensate the different voltage drops of the power supply voltage at the two sides of the display panel, thereby ensuring that the sizes of the power supply voltage transmitted to each pixel unit are consistent and improving the display uniformity of the large size display panel.

[0011] According to the display module, the voltage compensation circuit comprises a reference voltage generation circuit and a compensation circuit which are electrically connected, the reference voltage generation circuit is also electrically connected with the first power voltage output end and the second power voltage output end, and is configured to generate a reference voltage according to the first power voltage and the second power voltage, and provide the reference voltage to the compensation circuit.

[0012] The compensation circuit is also electrically connected with the data voltage generation module, and is configured to generate a compensated high voltage and a compensated low voltage according to the reference voltage, and provide the compensated high voltage and the compensated low voltage to the data voltage generation module.

[0013] The data voltage generation module is configured to generate a data voltage according to the compensated high voltage and the compensated low voltage, and provide the data voltage to the pixel unit.

[0014] According to the display module, the reference voltage generation circuit comprises a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor and a fifth resistor, wherein:

[0015] One end of the first resistor and one end of the second resistor are respectively electrically connected with a reverse input end of the first operational amplifier, the other end of the first resistor is electrically connected with an output end of the first operational amplifier, and the other end of the second resistor is grounded; one end of the third resistor, one end of the fourth resistor and one end of the fifth resistor are respectively electrically connected with a forward input end of the first operational amplifier, the other end of the third resistor is electrically connected with the first power voltage output end, the other end of the fourth resistor is electrically connected with the second power voltage output end, and the other end of the fifth resistor is grounded; a forward power supply end of the first operational amplifier is electrically connected with a first preset power supply end, and a reverse power supply end of the first operational amplifier is grounded.

[0016] The first resistor, the second resistor, the third resistor and the fourth resistor have a first resistance value, the fifth resistor has a second resistance value, and the first resistance value and the second resistance value have a first preset resistance value ratio.

[0017] According to the display module, the first preset power supply end comprises a chip power supply end, and the chip power supply end is configured to provide a driving voltage of a source driving chip.

[0018] According to the display module, the compensation circuit comprises a first compensation sub-circuit and a second compensation sub-circuit, and the first compensation sub-circuit and the second compensation sub-circuit are electrically connected with a second preset power supply end and the reference voltage generation circuit.

[0019] The first compensation sub-circuit is used to generate the compensated high voltage based on the voltage provided by the second preset power supply terminal and the reference voltage;

[0020] The second compensation sub-circuit is used to generate the compensated low voltage based on the voltage provided by the second preset power supply terminal and the reference voltage.

[0021] According to the display module of this application, the second preset power supply terminal is used to provide the conduction voltage corresponding to the pixel unit.

[0022] According to the display module of this application, the first compensation sub-circuit includes a first operational amplifier follower circuit and an adder electrically connected to each other. The first operational amplifier follower circuit is also electrically connected to the second preset power supply terminal, and is used to divide the voltage output from the second preset power supply terminal to generate a first component voltage, and provide the first component voltage to the adder. The adder is also electrically connected to the reference voltage generation circuit, and is used to add the first component voltage and the reference voltage to obtain the compensated high voltage.

[0023] According to the display module of this application, the first operational amplifier follower circuit includes a second operational amplifier, a sixth resistor, and a seventh resistor. One end of the sixth resistor is electrically connected to the second preset power supply terminal, and the other end is electrically connected to the positive input terminal of the second operational amplifier and the seventh resistor. The other end of the seventh resistor is grounded. The output terminal of the second operational amplifier is electrically connected to the negative input terminal of the second operational amplifier and the adder. The positive power supply terminal of the second operational amplifier is electrically connected to the third preset power supply terminal, and the negative power supply terminal of the second operational amplifier is grounded.

[0024] The resistance value of the sixth resistor and the resistance value of the seventh resistor have a second preset resistance ratio.

[0025] According to the display module of this application, the adder includes a third operational amplifier, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor. One end of the eighth resistor is electrically connected to the ninth resistor and the negative input terminal of the third operational amplifier, and the other end is electrically connected to the output terminal of the third operational amplifier. The other end of the ninth resistor is grounded. One end of the tenth resistor is electrically connected to the first operational amplifier follower circuit, and the other end is electrically connected to the eleventh resistor, the twelfth resistor, and the positive input terminal of the third operational amplifier. The other end of the eleventh resistor is electrically connected to the reference voltage generation circuit, and the other end of the twelfth resistor is grounded. The positive power supply terminal of the third operational amplifier is electrically connected to the third preset power supply terminal, and the negative power supply terminal of the third operational amplifier is grounded.

[0026] The ninth resistor, the tenth resistor, the eleventh resistor, and the twelfth resistor have a third resistance value, the eighth resistor has a fourth resistance value, and there is a third preset resistance ratio between the third resistance value and the fourth resistance value.

[0027] According to the display module of this application, the third preset power supply terminal includes a chip power supply terminal, which is used to provide the driving voltage of the source driving chip.

[0028] According to the display module of this application, the second compensation sub-circuit includes a second operational amplifier follower circuit and a subtractor electrically connected to each other. The second operational amplifier follower circuit is also electrically connected to the second preset power supply terminal, and is used to divide the voltage output from the second preset power supply terminal to generate a second component voltage, and provide the second component voltage to the subtractor. The subtractor is also electrically connected to the reference voltage generation circuit, and is used to subtract the reference voltage and the second component voltage to obtain the compensated low voltage.

[0029] According to the display module of this application, the second operational amplifier follower circuit includes a fourth operational amplifier, a thirteenth resistor, and a fourteenth resistor. One end of the thirteenth resistor is electrically connected to the second preset power supply terminal, and the other end is electrically connected to the positive input terminal of the fourth operational amplifier and the fourteenth resistor. The other end of the fourteenth resistor is grounded. The output terminal of the fourth operational amplifier is electrically connected to the negative input terminal of the fourth operational amplifier and to the subtractor. The positive power supply terminal of the fourth operational amplifier is electrically connected to the fourth preset power supply terminal, and the negative power supply terminal of the fourth operational amplifier is grounded.

[0030] The resistance value of the thirteenth resistor and the resistance value of the fourteenth resistor have a fourth preset resistance ratio.

[0031] According to the display module of this application, the subtractor includes a fifth operational amplifier, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and an eighteenth resistor. One end of the fifteenth resistor is electrically connected to the sixteenth resistor and the negative input terminal of the fifth operational amplifier, and the other end is electrically connected to the output terminal of the fifth operational amplifier. The other end of the sixteenth resistor is electrically connected to the second operational amplifier follower circuit. One end of the seventeenth resistor is electrically connected to the reference voltage generation circuit, and the other end is electrically connected to the eighteenth resistor and the positive input terminal of the fifth operational amplifier. The other end of the eighteenth resistor is grounded. The positive power supply terminal of the fifth operational amplifier is electrically connected to the fourth preset power supply terminal, and the negative power supply terminal of the fourth operational amplifier is grounded.

[0032] The fifteenth resistor, the sixteenth resistor, the seventeenth resistor, and the eighteenth resistor have the same resistance value.

[0033] According to the display module of this application, the display module further includes a chip power supply, and a first flexible circuit board and a second flexible circuit board electrically connected to the chip power supply. The chip power supply is used to provide an initial power supply voltage to the first flexible circuit board and the second flexible circuit board. The first flexible circuit board and the second flexible circuit board are respectively located on opposite sides of the display panel, and the first flexible circuit board includes a first power supply voltage output terminal, and the second flexible circuit board includes a second power supply voltage output terminal.

[0034] According to the display module of this application, the display module further includes multiple first power lines, multiple second power lines, and multiple data lines. The multiple first power lines and the multiple second power lines are cross-connected to form a mesh structure. The mesh structure is electrically connected to the pixel unit, the first power voltage output terminal, and the second power voltage output terminal, for providing the first power voltage and the second power voltage to the pixel unit. Each data line is electrically connected to the data voltage generation module and a column of pixel units, for providing the data voltage to the pixel unit in the corresponding column. Attached Figure Description

[0035] The above and / or additional aspects and advantages of this application will become apparent and readily understood from the description of the embodiments taken in conjunction with the following drawings, in which:

[0036] Figure 1 This is a schematic diagram of the structure of the display module provided in the embodiment of this application;

[0037] Figure 2 This is a schematic diagram illustrating the data voltage compensation process provided in the embodiments of this application;

[0038] Figure 3 This is a schematic diagram of the reference voltage generation circuit provided in the embodiments of this application;

[0039] Figure 4 This is a schematic diagram of the structure of the first compensation sub-circuit provided in the embodiments of this application;

[0040] Figure 5 This is a schematic diagram of the structure of the second compensator circuit provided in the embodiment of this application. Detailed Implementation

[0041] The embodiments of this application are described in detail below. Examples of these embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals denote the same or similar elements or elements having the same or similar functions throughout. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain this application, and should not be construed as limiting this application.

[0042] The following is for reference. Figures 1 to 5 This application describes a display module provided in an embodiment. For details, please refer to... Figure 1 , Figure 1 This is a schematic diagram of the structure of the display module 10 provided in this application embodiment. The display module 10 includes: a display panel 11, which includes a plurality of pixel units PX arranged in rows and columns; a first power supply voltage output terminal M1 and a second power supply voltage output terminal M2 located on opposite sides of the display panel 11, both of which are electrically connected to each pixel unit PX and are used to provide a first power supply voltage and a second power supply voltage to the pixel unit PX, respectively; a data voltage generation module 12, which is electrically connected to each pixel unit PX and is used to provide a data voltage to the pixel unit PX; and a voltage compensation circuit 13, which is used to compensate the data voltage according to the first power supply voltage and the second power supply voltage, and is electrically connected to the first power supply voltage output terminal M1, the second power supply voltage output terminal M2, and the data voltage generation module 12.

[0043] The first power supply voltage output terminal M1 and the second power supply voltage output terminal M2 can be considered as two power supply terminals that provide constant voltage. These two constant voltages are supplied to the display panel 11 (each pixel unit PX) through power lines distributed in a grid. The first power supply voltage output terminal M1 and the second power supply voltage output terminal M2 are located on opposite sides of the display panel 11, for example, on the two short sides of the display panel 11. These two constant voltage power supplies are output voltages after the same power supply voltage is input to different circuit boards. The data voltage generation module 12 mainly includes the gamma circuit inside the SDIC (Source Driver IC) for outputting the corresponding voltage (data signal) for different grayscale values.

[0044] In some embodiments, please continue to see Figure 1 The display module 10 also includes a chip power supply, and a first flexible circuit board 14 and a second flexible circuit board 15 electrically connected to the chip power supply. The chip power supply is used to provide an initial power supply voltage to the first flexible circuit board 14 and the second flexible circuit board 15. The first flexible circuit board 14 and the second flexible circuit board 15 are located on opposite sides of the display panel 11, and the first flexible circuit board 14 includes a first power supply voltage output terminal M1, and the second flexible circuit board 15 includes a second power supply voltage output terminal M2.

[0045] The initial power supply voltage can be considered as the required voltage ELVDD for the display panel 11. The first flexible circuit board 14 and the second flexible circuit board 15 are FPC boards, each including an input terminal and an output terminal. During the display driving stage, the initial power supply voltage provided by the chip power supply is simultaneously transmitted to the input terminals of the first flexible circuit board 14 and the second flexible circuit board 15, and then transmitted to the display panel 11 (pixel unit PX) via their output terminals (first power supply voltage output terminal M1 and second power supply voltage output terminal M2), thereby realizing the dual-sided driving power supply of the display panel 11.

[0046] In some embodiments, please continue to see Figure 1 The display module 10 also includes multiple first power lines, multiple second power lines, and multiple data lines. The multiple first power lines and multiple second power lines are cross-connected to form a mesh structure 16. The mesh structure 16 is electrically connected to the pixel unit PX, the first power voltage output terminal M1, and the second power voltage output terminal M2, for providing the first power voltage and the second power voltage to the pixel unit PX. Each data line is electrically connected to the data voltage generation module 12 and a column of pixel units PX, for providing the data voltage to the corresponding column of pixel units PX.

[0047] The first and second power lines extend in different directions and intersect to form a mesh structure 16. For example, the first power line extends along the x-direction and is spaced apart along the y-direction, while the second power line extends along the y-direction and is spaced apart along the x-direction, with the x and y directions perpendicular to each other. Pixel units PX are arranged in a matrix in the display panel 11. Each pixel unit PX is a pixel driving circuit. During the display driving phase, the first power supply voltage output terminal M1 and the second power supply voltage output terminal M2 serve as power sources, simultaneously supplying power to the matrix-distributed pixel units PX (mainly anodes) from opposite sides of the display panel 11 through the mesh structure 16. Data lines can extend along the y-direction and be spaced apart along the x-direction, with one data line corresponding to one column of pixel units PX. The display module 10 also includes multiple scan lines, which extend along the x-direction and are spaced apart along the y-direction. Each scan line is electrically connected to a row of pixel units PX to provide scan signals to the corresponding row of pixel units PX.

[0048] For example, the display panel 11 may include first scan lines SL1 to nth scan lines SLn spaced apart along the y-direction, first data lines DL1 to mth data lines DLm spaced apart along the x-direction, and pixel units PX, where n and m are positive integers. The pixel unit PX (or pixel driving circuit) may be the smallest unit of light emission in the display panel 11. The pixel units PX may be located at the intersections of the first scan lines SL1 to nth scan lines SLn and the first data lines DL1 to mth data lines DLm. In the display panel 11, the pixel units PX may be arranged in an n×m matrix. In response to fluctuations (or changes) in the power supply voltage ELVDD within a frame period, the pixel units PX may emit light simultaneously.

[0049] In some embodiments, please continue to see Figure 1 The display module 10 may further include a scan driver 17 and a timing controller 18. The data voltage generation module 12, scan driver 17, timing controller 18, and chip power supply can be integrated on a logic board (TCON board). The timing controller 18 can generate image data suitable for the display panel 11 based on the input image data, provide the image data to the data voltage generation module 12, and control the scan driver 17, data voltage generation module 12, and chip power supply. For example, the timing controller 18 can receive control signals CTL from external circuitry (e.g., a system board). The timing controller 18 can generate a first control signal CTL1, a second control signal CTL2, and a third control signal to control the scan driver 17, data voltage generation module 12, and chip power supply, respectively. The first control signal CTL1 may include a scan start signal, a scan clock signal, etc. The second control signal CTL2 may include a horizontal start signal, a load signal, image data, etc. The third control signal may include a switch control signal, etc.

[0050] The scan driver 17 can generate a scan signal based on the first control signal CTL1 and can provide the scan signal to the first scan line SL1 to the nth scan line SLn. For example, the scan driver 17 can sequentially supply the scan signal to the first scan line SL1 to the nth scan line SLn. The data voltage generation module 12 can convert image data in digital signal form into an analog data signal in response to the second control signal CTL2 and can supply the analog data signal (data voltage) to the first data line DL1 to the mth data line DLm. The pixel unit PX can receive the data signal (i.e., the data signal transmitted through the first data line DL1 to the mth data line DLm) in response to the scan signal (i.e., the scan signal transmitted through the first scan line SL1 to the nth scan line SLn) and can emit light with a brightness corresponding to the data signal. The chip power supply can generate a power supply voltage with a voltage level that fluctuates (or changes) within a frame period in response to a third control signal. For example, the chip power supply can generate a power supply voltage ELVDD in response to the third control signal.

[0051] It should be noted that since the display module 10 in this embodiment adopts dual-sided driving, if the first power supply voltage output terminal M1 and the second power supply voltage output terminal M2 provide the same voltage to the display panel 11, then even if there is a certain trace impedance in the power line, the current value transmitted by the mesh at different positions in the mesh structure 16 should be consistent (i.e., the current transmitted to each pixel unit PX is the same). Compared with other display modules that adopt single-sided driving (powering the pixel unit only from one side of the display panel), there will be no obvious voltage drop (IR Drop) phenomenon due to whether the pixel unit is close or far from the chip power supply, thus improving display uniformity.

[0052] However, in actual use, although the first flexible circuit board 14 and the second flexible circuit board 15 receive the same initial power supply voltage ELVDD from the chip power supply, the first flexible circuit board 14 and the second flexible circuit board 15 usually have different resistance values ​​and different connected loads. For example, the load of the first flexible circuit board 14 may include the touch screen driver chip, and the load of the second flexible circuit board 15 may include the source driver chip. Therefore, the initial power supply voltage will produce different voltage drops on both sides of the display panel 11, resulting in a certain difference between the first power supply voltage ELVDD-1 output by the first power supply voltage output terminal M1 and the second power supply voltage ELVDD-2 output by the second power supply voltage output terminal M2. The two are not equal, which in turn causes the current value transmitted by the mesh at different positions in the mesh structure 16 to be different (that is, the current transmitted to each pixel unit PX is different), which cannot solve the voltage drop problem and results in poor display uniformity.

[0053] To at least address some of the aforementioned technical problems, this application embodiment designs a voltage compensation circuit 13. This voltage compensation circuit 13 can compensate for the data voltage based on the first power supply voltage ELVDD-1 and the second power supply voltage ELVDD-2, and is based on the known calculation formula for the pixel luminous current Ioled of the display panel 11:

[0054] The aspect ratio is given, cox is the gate capacitance, ELVDD is the voltage supplied by the chip power supply, and Vdata is the data voltage.

[0055] It is easy to know that the pixel light-emitting current Ioled is related to the magnitude of ELVDD and Vdata. The different voltage drops of ELVDD can be compensated by compensating the data voltage Vdata. That is, the problem of different voltage drops of ELVDD caused by different loads and resistance values ​​of flexible circuit boards on both sides of the display panel 11 is compensated and improved. This ensures that the power supply voltage transmitted to each pixel unit PX is consistent and improves the display uniformity of the display panel 11.

[0056] In some embodiments, see Figure 2 , Figure 2 This is a schematic diagram illustrating the data voltage compensation process provided in an embodiment of this application. The voltage compensation circuit 13 includes a reference voltage generation circuit 131 and a compensation circuit 132 electrically connected. The reference voltage generation circuit 131 is also electrically connected to the first power supply voltage output terminal M1 and the second power supply voltage output terminal M2, and is used to generate a reference voltage ELVDD-M based on the first power supply voltage ELVDD-1 and the second power supply voltage ELVDD-2, and provide the reference voltage ELVDD-M to the compensation circuit 132. The compensation circuit 132 is also electrically connected to the data voltage generation module 12, and is used to generate a compensated high voltage VGMP and a compensated low voltage VGSP based on the reference voltage ELVDD-M, and provide the compensated high voltage VGMP and the compensated low voltage VGSP to the data voltage generation module 12. The data voltage generation module 12 is used to generate a data voltage Vdata based on the compensated high voltage VGMP and the compensated low voltage VGSP, and provide the data voltage Vdata to the pixel unit PX.

[0057] Both the reference voltage generation circuit 131 and the compensation circuit 132 can be designed using operational amplifiers with some resistors. The first power supply voltage ELVDD-1 output from the first power supply voltage output terminal M1 and the second power supply voltage ELVDD-2 output from the second power supply voltage output terminal M2 are provided to the reference voltage generation circuit 131 via the aforementioned mesh structure 16. The compensated high voltage VGMP and the compensated low voltage VGSP are obtained by balancing the voltage drop difference of the initial power supply voltage ELVDD on both sides of the display panel 11.

[0058] In some embodiments, see Figure 2 and Figure 3 , Figure 3 This is a schematic diagram of the reference voltage generation circuit 131 provided in an embodiment of this application. The reference voltage generation circuit 131 includes a first operational amplifier N1, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, and a fifth resistor R5. One end of the first resistor R1 and the second resistor R2 are electrically connected to the inverting input terminal of the first operational amplifier N1, and the other end of the first resistor R1 is electrically connected to the output terminal of the first operational amplifier N1. The other end of the second resistor R2 is grounded. One end of the third resistor R3, the fourth resistor R4, and the fifth resistor R5 are electrically connected to the non-inverting input terminal of the first operational amplifier N1. The third resistor R3... The other end of the resistor is electrically connected to the first power supply voltage output terminal M1, the other end of the fourth resistor R4 is electrically connected to the second power supply voltage output terminal M2, and the other end of the fifth resistor R5 is grounded; the positive power supply terminal of the first operational amplifier N1 is electrically connected to the first preset power supply terminal Q1, and the negative power supply terminal of the first operational amplifier N1 is grounded; the first resistor R1, the second resistor R2, the third resistor R3, and the fourth resistor R4 have the first resistance value R1, the fifth resistor R5 has the second resistance value R2, and there is a first preset resistance ratio between the first resistance value R1 and the second resistance value R2.

[0059] The first preset resistance ratio can be 2:1. The reference voltage generation circuit 131 can obtain the reference voltage by averaging the first power supply voltage ELVDD-1 and the second power supply voltage ELVDD-2, that is, the reference voltage ELVDD-M = (ELVDD-1 + ELVDD-2) / 2. The first preset power supply terminal Q1 can be an additionally designed power supply terminal, or it can be a reuse of an existing power supply terminal in the logic board. For example, the first preset power supply terminal Q1 can include a chip power supply terminal, which is used to provide the driving voltage AVDD of the source driver chip. That is, the power supply terminal in the logic board used to provide power to the source driver chip can be reused as the first preset power supply terminal Q1 to simplify the structure of the display module 10.

[0060] In some embodiments, see Figure 2 , Figure 4 and Figure 5 , Figure 4 This is a schematic diagram of the structure of the first compensation sub-circuit 1321 provided in the embodiments of this application. Figure 5 This is a schematic diagram of the structure of the second compensation sub-circuit 1322 provided in an embodiment of this application. The compensation circuit 132 includes a first compensation sub-circuit 1321 and a second compensation sub-circuit 1322. Both the first compensation sub-circuit 1321 and the second compensation sub-circuit 1322 are electrically connected to the second preset power supply terminal Q2 and the reference voltage generation circuit 131. The first compensation sub-circuit 1321 is used to generate the compensated high voltage VGMP based on the voltage provided by the second preset power supply terminal Q2 and the reference voltage ELVDD-M. The second compensation sub-circuit 1322 is used to generate the compensated low voltage VGSP based on the voltage provided by the second preset power supply terminal Q2 and the reference voltage ELVDD-M.

[0061] The second preset power supply terminal Q2 can be an additional power supply terminal or a reuse of an existing power supply terminal. For example, the second preset power supply terminal Q2 is used to provide the conduction voltage VGH corresponding to the pixel unit PX. That is, the power supply terminal in the logic board used to provide the high voltage of the GOA clock signal can be reused as the second preset power supply terminal Q2. The conduction voltage VGH refers to the turn-on voltage of the switching transistor in the pixel unit PX.

[0062] In some embodiments, please continue to see Figure 4 and Figure 5 The first compensation sub-circuit 1321 includes a first operational amplifier follower circuit 13211 and an adder 13212 that are electrically connected. The first operational amplifier follower circuit 13211 is also electrically connected to the second preset power supply terminal Q2 and is used to divide the voltage (conduction voltage VGH) output by the second preset power supply terminal Q2 to generate a first component voltage Vout1 and provide the first component voltage Vout1 to the adder 13212. The adder 13212 is also electrically connected to the reference voltage generation circuit 131 and is used to add the first component voltage Vout1 and the reference voltage ELVDD-M to obtain the compensated high voltage VGMP.

[0063] The second compensation sub-circuit 1322 includes a second operational amplifier follower circuit 13221 and a subtractor 13222 that are electrically connected. The second operational amplifier follower circuit 13221 is also electrically connected to the second preset power supply terminal Q2 and is used to divide the voltage (conduction voltage VGH) output by the second preset power supply terminal Q2 to generate a first component voltage Vout2, and provide the second component voltage Vout2 to the subtractor 13222. The subtractor 13222 is also electrically connected to the reference voltage generation circuit 131 and is used to subtract the reference voltage ELVDD-M and the second component voltage Vout2 to obtain the compensated low voltage VGSP.

[0064] The adder 13212 can add the first component voltage Vout1 and the reference voltage ELVDD-M in a 1:1 ratio, or it can add them in other ratios. The subtractor 13222 can subtract the second component voltage Vout2 and the reference voltage ELVDD-M in a 1:1 ratio, or it can subtract them in other ratios, depending on the requirements.

[0065] In some embodiments, please continue to see Figure 4 The first operational amplifier follower circuit 13211 includes a second operational amplifier N2, a sixth resistor R6, and a seventh resistor R7. One end of the sixth resistor R6 is electrically connected to the second preset power supply terminal Q2, and the other end is electrically connected to the positive input terminal of the second operational amplifier N2 and the seventh resistor R7. The other end of the seventh resistor R7 is grounded. The output terminal of the second operational amplifier N2 is electrically connected to the negative input terminal of the second operational amplifier N2 and the adder 13212. The positive power supply terminal of the second operational amplifier N2 is electrically connected to the third preset power supply terminal Q3, and the negative power supply terminal of the second operational amplifier N2 is grounded. The resistance values ​​of the sixth resistor R6 and the seventh resistor R7 have a second preset resistance ratio.

[0066] The adder 13212 includes a third operational amplifier N3, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, an eleventh resistor R11, and a twelfth resistor R12. One end of the eighth resistor R8 is electrically connected to the ninth resistor R9 and the negative input terminal of the third operational amplifier N3, and the other end is electrically connected to the output terminal of the third operational amplifier N3. The other end of the ninth resistor R9 is grounded. One end of the tenth resistor R10 is electrically connected to the first operational amplifier follower circuit 13211, and the other end is connected to the eleventh resistor R11, the twelfth resistor R12, and the third operational amplifier N3. The positive input terminal is electrically connected; the other end of the eleventh resistor R11 is electrically connected to the reference voltage generation circuit 131, and the other end of the twelfth resistor R12 is grounded; the positive power supply terminal of the third operational amplifier N3 is electrically connected to the third preset power supply terminal Q3, and the negative power supply terminal of the third operational amplifier N3 is grounded; the ninth resistor R9, the tenth resistor R10, the eleventh resistor R11 and the twelfth resistor R12 have a third resistance value R3, the eighth resistor R8 has a fourth resistance value R4, and there is a third preset resistance ratio between the third resistance value R3 and the fourth resistance value R4.

[0067] The third preset power supply terminal Q3 can be an additional power supply terminal or a reused power supply terminal that is already in the logic board. For example, the third preset power supply terminal Q3 can reuse a power supply terminal with the first preset power supply terminal Q1. That is, the third preset power supply terminal Q3 includes a chip power supply terminal, which is used to provide the driving voltage AVDD of the source driver chip.

[0068] The second preset resistance ratio can be determined based on the magnitude of the conduction voltage VGH, for example, 11:4. The third preset resistance ratio can be 2:1. In this case, the adder 13212 adds the first component voltage Vout1 and the reference voltage ELVDD-M in a 1:1 ratio, or it can be added in other ratios. That is, the compensated high voltage VGMP = ELVDD-M + Vout1, and the compensated low voltage VGSP = ELVDD-M - Vout2.

[0069] In some embodiments, please continue to see Figure 5The second operational amplifier follower circuit 13221 includes a fourth operational amplifier N4, a thirteenth resistor R13, and a fourteenth resistor R14. One end of the thirteenth resistor R13 is electrically connected to the second preset power supply terminal Q2, and the other end is electrically connected to the positive input terminal of the fourth operational amplifier N4 and the fourteenth resistor R14. The other end of the fourteenth resistor R14 is grounded. The output terminal of the fourth operational amplifier N4 is electrically connected to the negative input terminal of the fourth operational amplifier N4 and to the subtractor 13222. The positive power supply terminal of the fourth operational amplifier N4 is electrically connected to the fourth preset power supply terminal Q4, and the negative power supply terminal of the fourth operational amplifier N4 is grounded. The resistance values ​​of the thirteenth resistor R13 and the fourteenth resistor R14 have a fourth preset resistance ratio.

[0070] The subtractor 13222 includes a fifth operational amplifier N5, a fifteenth resistor R15, a sixteenth resistor R16, a seventeenth resistor R17, and an eighteenth resistor R18. One end of the fifteenth resistor R15 is electrically connected to the sixteenth resistor R16 and the negative input terminal of the fifth operational amplifier N5, and the other end is electrically connected to the output terminal of the fifth operational amplifier N5. The other end of the sixteenth resistor R16 is electrically connected to the second operational amplifier follower circuit 13221. One end of the seventeenth resistor R17 is electrically connected to the reference voltage generation circuit 131, and the other end is electrically connected to the eighteenth resistor R18 and the positive input terminal of the fifth operational amplifier N5. The other end of the eighteenth resistor R18 is grounded. The positive power supply terminal of the fifth operational amplifier N5 is electrically connected to the fourth preset power supply terminal Q4, and the negative power supply terminal of the fourth operational amplifier N4 is grounded. The fifteenth resistor R15, the sixteenth resistor R16, the seventeenth resistor R17, and the eighteenth resistor R18 have the same resistance value.

[0071] The fourth preset power supply terminal Q4 can be an additional power supply terminal or a reused power supply terminal that already exists in the logic board. For example, the fourth preset power supply terminal Q4 can reuse a power supply terminal with the first preset power supply terminal Q1. That is, the fourth preset power supply terminal Q4 includes a chip power supply terminal, which is used to provide the driving voltage AVDD of the source driver chip.

[0072] The fourth preset resistance ratio can be determined according to the value of VGH, such as 9:6. The fourth preset resistance ratio can be 1:1. In this case, the device subtracts the second component voltage Vout2 from the reference voltage ELVDD-M in a 1:1 ratio, that is, the compensated high voltage VGSP = ELVDD-M - Vout2.

[0073] In some embodiments, the first compensation sub-circuit 1321, the second compensation sub-circuit 1322, and the reference voltage generation circuit 131 can all be equipped with some 0-ohm resistors as needed to facilitate debugging or design compatibility. Please continue reading Figure 4 and Figure 5 The output terminals of the adder 13212 in the first compensation sub-circuit 1321 and the subtractor 13222 in the second compensation sub-circuit 1322 can also be provided with an adjusting resistor R19 of the same resistance value. The resistance value of the adjusting resistor R19 is much smaller than the resistance values ​​of other resistors in the first compensation sub-circuit 1321 and the second compensation sub-circuit 1322. For example, if the resistance values ​​of the first compensation sub-circuit 1321 and the second compensation sub-circuit 1322 are tens or hundreds of kiloohms, then the resistance value of the adjusting resistor R19 can be tens of ohms, so as to match the impedance of the first compensation sub-circuit 1321 and the second compensation sub-circuit 1322 with the impedance of the data voltage signal as much as possible.

[0074] As described above, the display module 10 provided in this application embodiment includes a voltage compensation circuit 13, a data voltage generation module 12, and a first power supply voltage output terminal M1 and a second power supply voltage output terminal M2 located on opposite sides of the display panel 11. The first power supply voltage output terminal M1 and the second power supply voltage output terminal M2 are both electrically connected to each pixel unit PX, and are used to provide the pixel unit PX with a first power supply voltage ELVDD-1 and a second power supply voltage ELVDD-2, respectively. The data voltage generation module 12 is electrically connected to each pixel unit PX and is used to provide the pixel unit PX with a data voltage. The voltage compensation circuit 13 is used to compensate the data voltage according to the first power supply voltage ELVDD-1 and the second power supply voltage ELVDD-2. The voltage compensation circuit 13 is electrically connected to the first power supply voltage output terminal M1, the second power supply voltage output terminal M2, and the data voltage generation module 12. The display module 10 provided in this application embodiment can compensate for different voltage drops in the power supply voltage ELVDD by compensating the data voltage Vdata. In other words, it compensates for and improves the problem of different voltage drops in ELVDD caused by different loads and resistance values ​​of the flexible circuit boards on both sides of the display panel 11, and tries to ensure that the power supply voltage transmitted to each pixel unit PX is consistent, thereby improving the uniformity of the display brightness and color of the large-size display panel 11 and improving the display effect.

[0075] The terms "first," "second," etc., used in the specification and claims of this application are used to distinguish similar objects and not to describe a specific order or sequence. It should be understood that such use of data can be interchanged where appropriate so that embodiments of this application can be implemented in orders other than those illustrated or described herein, and the objects distinguished by "first," "second," etc., are generally of the same class and the number of objects is not limited; for example, a first object can be one or more. Furthermore, in the specification and claims, "and / or" indicates at least one of the connected objects, and the character " / " generally indicates that the preceding and following objects are in an "or" relationship.

[0076] In the description of this application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "upper", "lower", "front", "rear", "left", "right", "vertical", "horizontal", "top", "bottom", "inner", "outer", "clockwise", "counterclockwise", "axial", "radial", "circumferential", etc., indicating the orientation or positional relationship based on the orientation or positional relationship shown in the accompanying drawings, are only for the convenience of describing this application and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, or be constructed and operated in a specific orientation, and therefore should not be construed as a limitation of this application.

[0077] In the description of this application, "multiple" means two or more.

[0078] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with that embodiment or example is included in at least one embodiment or example of this application. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0079] Although embodiments of this application have been shown and described, those skilled in the art will understand that various changes, modifications, substitutions and alterations can be made to these embodiments without departing from the principles and spirit of this application, the scope of which is defined by the claims and their equivalents.

Claims

1. A display module, characterized in that, include: The display panel includes a plurality of pixel units arranged in rows and columns; The first power voltage output terminal and the second power voltage output terminal are located on opposite sides of the display panel. Both the first power voltage output terminal and the second power voltage output terminal are electrically connected to each pixel unit and are used to provide the first power voltage and the second power voltage to the pixel unit, respectively. A data voltage generation module is electrically connected to each pixel unit and is used to provide data voltage to the pixel unit. A voltage compensation circuit is used to compensate the data voltage based on the first power supply voltage and the second power supply voltage. The voltage compensation circuit is electrically connected to the first power supply voltage output terminal, the second power supply voltage output terminal, and the data voltage generation module. The voltage compensation circuit includes a reference voltage generation circuit and a compensation circuit that are electrically connected. The reference voltage generation circuit is also electrically connected to the first power supply voltage output terminal and the second power supply voltage output terminal, and is used to generate a reference voltage according to the first power supply voltage and the second power supply voltage, and provide the reference voltage to the compensation circuit. The compensation circuit is also electrically connected to the data voltage generation module, and is used to divide the voltage output from the second preset power supply terminal to generate a first component voltage, and add the first component voltage and the reference voltage to obtain the compensated high voltage. The voltage output from the second preset power supply terminal is divided to generate a second component voltage, and the reference voltage and the second component voltage are subtracted to obtain the compensated low voltage. The compensated high voltage and the compensated low voltage are provided to the data voltage generation module; The data voltage generation module is used to generate a data voltage based on the compensated high voltage and the compensated low voltage, and to provide the data voltage to the pixel unit.

2. The display module according to claim 1, characterized in that, The reference voltage generation circuit includes a first operational amplifier, a first resistor, a second resistor, a third resistor, a fourth resistor, and a fifth resistor, wherein: One end of the first resistor and one end of the second resistor are electrically connected to the inverting input terminal of the first operational amplifier, and the other end of the first resistor is electrically connected to the output terminal of the first operational amplifier. The other end of the second resistor is grounded. One end of the third resistor, the fourth resistor, and the fifth resistor are electrically connected to the non-inverting input terminal of the first operational amplifier, and the other end of the third resistor is electrically connected to the first power supply voltage output terminal. The other end of the fourth resistor is electrically connected to the second power supply voltage output terminal. The other end of the fifth resistor is grounded. The positive power supply terminal of the first operational amplifier is electrically connected to the first preset power supply terminal, and the negative power supply terminal of the first operational amplifier is grounded. The first resistor, the second resistor, the third resistor, and the fourth resistor have a first resistance value, the fifth resistor has a second resistance value, and there is a first preset resistance ratio between the first resistance value and the second resistance value.

3. The display module according to claim 2, characterized in that, The first preset power supply terminal includes a chip power supply terminal, which is used to provide the driving voltage for the source drive chip.

4. The display module according to claim 1, characterized in that, The compensation circuit includes a first compensation sub-circuit and a second compensation sub-circuit, both of which are electrically connected to a second preset power supply terminal and the reference voltage generation circuit. The first compensation sub-circuit is used to generate the compensated high voltage based on the voltage provided by the second preset power supply terminal and the reference voltage; The second compensation sub-circuit is used to generate the compensated low voltage based on the voltage provided by the second preset power supply terminal and the reference voltage.

5. The display module according to claim 4, characterized in that, The second preset power supply terminal is used to provide the conduction voltage corresponding to the pixel unit.

6. The display module according to claim 4, characterized in that, The first compensation sub-circuit includes a first operational amplifier follower circuit and an adder that are electrically connected. The first operational amplifier follower circuit is also electrically connected to the second preset power supply terminal and is used to divide the voltage output from the second preset power supply terminal to generate a first component voltage and provide the first component voltage to the adder. The adder is also electrically connected to the reference voltage generation circuit and is used to add the first component voltage and the reference voltage to obtain the compensated high voltage.

7. The display module according to claim 6, characterized in that, The first operational amplifier follower circuit includes a second operational amplifier, a sixth resistor, and a seventh resistor. One end of the sixth resistor is electrically connected to the second preset power supply terminal, and the other end is electrically connected to the positive input terminal of the second operational amplifier and the seventh resistor. The other end of the seventh resistor is grounded. The output terminal of the second operational amplifier is electrically connected to the negative input terminal of the second operational amplifier and the adder. The positive power supply terminal of the second operational amplifier is electrically connected to the third preset power supply terminal, and the negative power supply terminal of the second operational amplifier is grounded. The resistance value of the sixth resistor and the resistance value of the seventh resistor have a second preset resistance ratio.

8. The display module according to claim 7, characterized in that, The adder includes a third operational amplifier, an eighth resistor, a ninth resistor, a tenth resistor, an eleventh resistor, and a twelfth resistor. One end of the eighth resistor is electrically connected to the ninth resistor and the negative input terminal of the third operational amplifier, and the other end is electrically connected to the output terminal of the third operational amplifier. The other end of the ninth resistor is grounded. One end of the tenth resistor is electrically connected to the first operational amplifier follower circuit, and the other end is electrically connected to the eleventh resistor, the twelfth resistor, and the positive input terminal of the third operational amplifier. The other end of the eleventh resistor is electrically connected to the reference voltage generation circuit, and the other end of the twelfth resistor is grounded. The positive power supply terminal of the third operational amplifier is electrically connected to the third preset power supply terminal, and the negative power supply terminal of the third operational amplifier is grounded. The ninth resistor, the tenth resistor, the eleventh resistor, and the twelfth resistor have a third resistance value, the eighth resistor has a fourth resistance value, and there is a third preset resistance ratio between the third resistance value and the fourth resistance value.

9. The display module according to claim 7, characterized in that, The third preset power supply terminal includes a chip power supply terminal, which is used to provide the driving voltage for the source drive chip.

10. The display module according to claim 4, characterized in that, The second compensation sub-circuit includes a second operational amplifier follower circuit and a subtractor electrically connected to each other. The second operational amplifier follower circuit is also electrically connected to the second preset power supply terminal, and is used to divide the voltage output from the second preset power supply terminal to generate a second component voltage, and provide the second component voltage to the subtractor. The subtractor is also electrically connected to the reference voltage generation circuit, and is used to subtract the reference voltage and the second component voltage to obtain the compensated low voltage.

11. The display module according to claim 10, characterized in that, The second operational amplifier follower circuit includes a fourth operational amplifier, a thirteenth resistor, and a fourteenth resistor. One end of the thirteenth resistor is electrically connected to the second preset power supply terminal, and the other end is electrically connected to the positive input terminal of the fourth operational amplifier and the fourteenth resistor. The other end of the fourteenth resistor is grounded. The output terminal of the fourth operational amplifier is electrically connected to the negative input terminal of the fourth operational amplifier and to the subtractor. The positive power supply terminal of the fourth operational amplifier is electrically connected to the fourth preset power supply terminal, and the negative power supply terminal of the fourth operational amplifier is grounded. The resistance value of the thirteenth resistor and the resistance value of the fourteenth resistor have a fourth preset resistance ratio.

12. The display module according to claim 11, characterized in that, The subtractor includes a fifth operational amplifier, a fifteenth resistor, a sixteenth resistor, a seventeenth resistor, and an eighteenth resistor. One end of the fifteenth resistor is electrically connected to the sixteenth resistor and the negative input terminal of the fifth operational amplifier, and the other end is electrically connected to the output terminal of the fifth operational amplifier. The other end of the sixteenth resistor is electrically connected to the second operational amplifier follower circuit. One end of the seventeenth resistor is electrically connected to the reference voltage generation circuit, and the other end is electrically connected to the eighteenth resistor and the positive input terminal of the fifth operational amplifier. The other end of the eighteenth resistor is grounded. The positive power supply terminal of the fifth operational amplifier is electrically connected to the fourth preset power supply terminal, and the negative power supply terminal of the fourth operational amplifier is grounded. The fifteenth resistor, the sixteenth resistor, the seventeenth resistor, and the eighteenth resistor have the same resistance value.

13. The display module according to any one of claims 1-12, characterized in that, The display module further includes a chip power supply, and a first flexible circuit board and a second flexible circuit board electrically connected to the chip power supply. The chip power supply is used to provide an initial power supply voltage to the first flexible circuit board and the second flexible circuit board. The first flexible circuit board and the second flexible circuit board are located on opposite sides of the display panel, and the first flexible circuit board includes a first power supply voltage output terminal, and the second flexible circuit board includes a second power supply voltage output terminal.

14. The display module according to any one of claims 1-12, characterized in that, The display module further includes multiple first power lines, multiple second power lines, and multiple data lines. The multiple first power lines and the multiple second power lines are cross-connected to form a mesh structure. The mesh structure is electrically connected to the pixel unit, the first power voltage output terminal, and the second power voltage output terminal, for providing the first power voltage and the second power voltage to the pixel unit. Each data line is electrically connected to the data voltage generation module and a column of pixel units, for providing the data voltage to the pixel unit in the corresponding column.

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