Solid-state imaging device with high dynamic range

Abstract

The present application provides a solid-state imaging device with a high dynamic range. The image sensor according to the present application includes a plurality of pixels arranged in an array on a substrate, wherein the pixel includes: at least one photodiode; at least one well contact coupled to the photodiode; at least one floating diffusion region storing electrons transferred from the photodiode during readout; at least one transfer gate including a channel region having a source terminal coupled to the photodiode and a drain terminal coupled to the floating diffusion region; at least one hole collection well coupled to the photodiode; a deep trench isolation (DTI) structure surrounding the photodiode; at least one source follower transistor, such that the gate of the source follower transistor coupled to the source follower transistor faces the hole collection well; a first reset transistor providing a reset operation of the floating diffusion region and / or the photodiode; a second reset transistor providing a reset operation of the hole collection well, wherein the hole collection well serves as a back gate of the source follower transistor.

Description

Technical Field

[0001] The present application relates to a solid-state image sensor, an imaging device and an electronic device. More specifically, the present application relates to a pixel structure with a high dynamic range. Background Art

[0002] The number of pixels of CMOS image sensors (CIS) has increased with the demand for high-resolution images. CIS installed in mobile devices (such as mobile phones) must be miniaturized. Therefore, both increasing the number of pixels and miniaturization of CIS require miniaturization of each pixel.

[0003] The pixel for CIS includes a photodiode for converting an impact electromagnetic wave into a pixel charge and storing the charge, and an in-pixel transistor readout section for controlling the storage and readout of the converted pixel charge. When an electromagnetic wave strikes the photodiode, electrons and holes (hereinafter referred to as pixel charges) are generated by photoelectric conversion. The photodiode stores the generated pixel charge and transfers the pixel charge to the in-pixel transistor readout section through a transfer gate coupled to the photodiode and the floating diffusion region.

[0004] The capacity of a photodiode to store pixel charges is called the full well capacity. Since the full well capacity is larger, the photodiode can store more pixel charges, and the pixel has a high dynamic range. However, since the size of the full well capacity depends on the volume of the photodiode, the miniaturization of the pixel leads to a decrease in the full well capacity, and a pixel with a high dynamic range cannot be obtained. Therefore, the dynamic range of the pixel is reduced.

[0005] For example, in order to address the dynamic range of CIS pixels, U.S. Patent No. 9,923,016 discloses the use of hole signals as well as electron signals as pixel charges. When the incident electromagnetic wave is low, the generated electrons are read out from the photodiode according to the conventional method. When more electromagnetic waves hit the pixel, a coupling capacitor with sensitivity to the holes stored outside the photodiode is used.

[0006] Fig.14 FIG. 1 shows a pixel having a conventional configuration using electrons and holes as pixel charges. The circuit diagram of such a pixel is shown in FIG. Fig.15 shown.

[0007] For example, the pixel 101 is formed on a substrate 102 .

[0008] The substrate 102 includes a photodiode 108 that generates pixel charges in response to incident electromagnetic waves and stores the charges. For example, when the substrate 102 includes a p-type doped Si material, the photodiode 108 may be an n-type doped n-well region disposed in the substrate 102 .

[0009] The substrate 102 further includes a well contact 134 coupled to the photodiode 108, a floating diffusion region 112 temporarily storing pixel charges stored in and transferred from the photodiode 108, and a transfer gate 114 including a channel region having a source terminal coupled to the photodiode 108 and a drain terminal coupled to the floating diffusion region 112, and controlling the transfer of pixel charges from the photodiode 108 to the floating diffusion region 112 in response to an applied voltage. The well contact 134, the floating diffusion region 112, and the transfer gate 114 are disposed on the first surface of the substrate 102. For example, when the photodiode is an n-type well, the well contact 134 may be a p+ doped region, and the floating diffusion region 112 may be an n+ doped region. When the photodiode is a p-type well, the well contact 134 may be an n+ doped region, and the floating diffusion region 112 may be a p+ doped region. The transfer gate 114 may include an electrode including a conductive material disposed on a gate insulating film located on a surface of a channel region between a source terminal coupled to the photodiode 108 and a drain terminal coupled to the floating diffusion region 112. When a voltage is applied to the transfer gate 114, pixel charges generated in the photodiode 108 are transferred to the floating diffusion region 112 through the transfer gate 114.

[0010] The pixel 101 further includes: a p-type well region 134 on a first surface of the substrate 102; a conductive material 142 disposed to surround the photodiode 108 and insulated from the substrate 102 by a deep trench isolation (DTI) insulating layer 140; a coupling capacitor 136 coupled to the conductive material 142; and a decoupling transistor 138 coupling the coupling capacitor 136 and the floating diffusion region 112.

[0011] In the pixel 101 having such a configuration, the reset transistor 120 and the decoupling transistor 138 are turned on, and before determining the electromagnetic wave amount, the floating diffusion 112 is reset with a reset potential such as the device voltage 122. The output voltage Vout in the reset state is recorded as a reference voltage.

[0012] Then, when the electromagnetic wave hits the photodiode 108 from the side of the substrate 102, the electromagnetic wave is absorbed in the photodiode 108, and electrons and holes are generated as pixel charges.

[0013] When the generated electrons are transferred to the floating diffusion area 112, the potential of the floating diffusion area 112 becomes lower than the reset potential. Therefore, the voltage applied to the gate of the source follower transistor 118 becomes lower, and the output voltage Vout changes. When the coupling capacitor 136 is charged by the generated holes, the potential of the floating diffusion area 112 is affected by the decoupling transistor 138. Therefore, the output voltage Vout further changes. The amount of electrons and holes generated by the electromagnetic wave that strikes the photodiode 108 is determined by using the reference voltage and the output voltage Vout, and the amount of the incident electromagnetic wave is determined.

[0014] The photodiode can have a configuration called a single photon avalanche diode (SPAD). A pixel with such a photodiode includes a high electric field region in the pixel. The electrons and holes generated by repeated photoelectron conversion are accelerated by the high electric field to collide with atoms in the pixel and further generate electrons and holes, and finally an electron avalanche amplification that generates a large number of electrons and holes occurs. Therefore, even if the intensity of the incident electromagnetic wave is small, SPAD can generate a large amount of pixel charge, so it can help to achieve high sensitivity of imaging and high accuracy of distance measurement using image sensors.

[0015] However, such a conventional pixel 101 has a large coupling capacitor 136, which makes it difficult to miniaturize the pixel. Summary of the invention

[0016] Problems that this application needs to solve

[0017] The present application provides an image sensor including a pixel structure with a high dynamic range, which is used to solve the above-mentioned technical problems.

[0018] Means of solving the problem

[0019] A first aspect of the present application provides an image sensor, the image sensor comprising a plurality of pixels arranged in an array on a substrate,

[0020] Wherein, the pixels include:

[0021] at least one photodiode disposed in the substrate and generating electrons and holes in response to incident electromagnetic waves;

[0022] at least one well contact, coupled to the photodiode, disposed on the first surface side of the substrate, providing electrical separation of the photodiode from adjacent photodiodes and providing potential fixation of the photodiode;

[0023] at least one floating diffusion region disposed on the first surface side of the substrate and temporarily storing electrons transferred from the photodiode at the time of readout;

[0024] at least one transfer gate disposed on the first surface side of the substrate, the transfer gate including a channel region having a source terminal coupled to the photodiode and a drain terminal coupled to the floating diffusion region and controlling transfer of pixel charge from the photodiode to the floating diffusion region in response to an applied voltage;

[0025] at least one hole collecting well coupled to the photodiode, disposed on the first surface side of the substrate, and collecting holes generated in the photodiode;

[0026] a deep trench isolation (DTI) structure extending from a second surface side of the substrate opposite to the first surface side into the substrate to surround the photodiode and provide insulation from adjacent pixels;

[0027] at least one source follower transistor disposed on the first surface side of the substrate such that a gate of the source follower transistor coupled to the photodiode faces the hole collecting well on the first surface side of the substrate;

[0028] a first reset transistor disposed on the first surface side of the substrate and providing a reset operation of the floating diffusion region and / or the photodiode;

[0029] a second reset transistor disposed on the first surface side of the substrate and providing a reset operation of the hole collecting well,

[0030] wherein the drain of the source follower transistor is coupled to a device voltage,

[0031] wherein the source of the source follower transistor is coupled to the output line through the row selection transistor,

[0032] The hole collecting well is used as a back gate of the source follower transistor.

[0033] According to a first aspect of the present application, the pixel may include a semiconductor on insulator (SOI) structure, wherein the SOI structure is composed of a base substrate, an SOI layer, and a buried oxide film layer inserted between the base substrate and the SOI layer.

[0034] The substrate may be the base substrate,

[0035] The source follower transistor, the first reset transistor, and the second reset transistor may be disposed on the SOI layer.

[0036] According to the first aspect of the present application, the DTI structure may extend from the second surface side of the substrate into the substrate.

[0037] According to the first aspect of the present application, the DTI structure may include a groove extending from the second surface side of the substrate into the substrate, a DTI insulating layer covering the sidewall of the groove, and a conductive material insulated from the substrate by the DTI insulating layer and filling the groove.

[0038] According to the first aspect of the present application, the DTI structure may include a groove extending from the second surface side of the substrate into the substrate and filled with an insulating material.

[0039] According to the first aspect of the present application, the at least one photodiode, the at least one well contact and the at least one transfer gate may be a plurality of photodiodes, a plurality of well contacts and a plurality of transfer gates, respectively.

[0040] The at least one floating diffusion region, the at least one hole collecting well and the at least one source follower transistor may be a single floating diffusion region, a single hole collecting well and a single source follower transistor, respectively.

[0041] Electrons generated in each of the plurality of photodiodes may be transferred to the single floating diffusion region through each of the plurality of transfer gates,

[0042] Holes generated in each of the plurality of photodiodes may be collected by the single hole collecting well.

[0043] According to the first aspect of the present application, each of the plurality of well contacts may be coupled to at least two photodiodes.

[0044] A second aspect of the present application provides a method for manufacturing an image sensor comprising a plurality of pixels, the method comprising the following steps:

[0045] providing a substrate composed of a semiconductor;

[0046] forming at least one photodiode in the substrate by doping;

[0047] forming at least one hole collecting well disposed on the first surface side of the substrate, coupled to the photodiode, and collecting holes generated in the photodiode;

[0048] forming at least one transfer gate disposed on the first surface side of the substrate, the transfer gate including a channel region having a source terminal coupled to the photodiode and a drain terminal coupled to the floating diffusion region and controlling transfer of pixel charge from the photodiode to the floating diffusion region in response to an applied voltage;

[0049] forming on the first surface side of the substrate:

[0050] at least one well contact coupled to the photodiode, providing electrical separation of the photodiode from adjacent photodiodes and providing potential fixation of the photodiode;

[0051] at least one floating diffusion region temporarily storing electrons transferred from the photodiode during readout;

[0052] at least one source follower transistor having a gate facing the hole collecting well;

[0053] a first reset transistor, providing a reset operation of the floating diffusion area and / or the photodiode;

[0054] a second reset transistor, providing a reset operation of the hole collection well;

[0055] forming a deep trench isolation (DTI) structure disposed on a second surface side of the substrate opposite to the first surface side, the DTI structure extending from the second surface side into the substrate to surround the photodiode and provide insulation from adjacent pixels,

[0056] wherein the drain of the source follower transistor is coupled to a device voltage,

[0057] wherein the source of the source follower transistor is coupled to the output line through the row selection transistor,

[0058] The hole collecting well is used as a back gate of the source follower transistor.

[0059] According to a second aspect of the present application, the pixel may include a semiconductor on insulator (SOI) structure, wherein the SOI structure is composed of a base substrate, an SOI layer, and a buried oxide film layer inserted between the base substrate and the SOI layer.

[0060] The substrate may be the base substrate,

[0061] The method of manufacturing the image sensor may further include, before the step of forming the at least one transfer gate, the step of removing a region of the SOI layer where the transfer gate is to be formed.

[0062] The source follower transistor, the first reset transistor, and the second reset transistor may be formed on the SOI layer.

[0063] According to the second aspect of the present application, forming the DTI structure may include forming a DTI insulating layer covering a sidewall of a groove extending into the substrate, and filling the groove with a conductive material.

[0064] According to a second aspect of the present application, forming the DTI structure may include filling a groove extending into the substrate with an insulating material.

[0065] According to the second aspect of the present application, the method for manufacturing the image sensor may further include the following steps:

[0066] Before forming the at least well contact, forming the at least one transfer gate and forming the at least one floating diffusion region, removing the SOI layer and the buried oxide film layer by epitaxial growth to form an epitaxial semiconductor layer in the region of the exposed base substrate;

[0067] polishing the epitaxial semiconductor layer to planarize the SOI layer and the epitaxial semiconductor layer,

[0068] Wherein, the at least one well contact, the at least one transfer gate and the at least one floating diffusion region may be formed on the epitaxial semiconductor layer.

[0069] A third aspect of the present application provides a method for operating an image sensor according to any one of the first aspects, wherein the image sensor comprises a plurality of pixels arranged in an array on a substrate, the method comprising:

[0070] a shutter step, including turning on the first reset transistor and the second reset transistor to reset the floating diffusion region and the photodiode and the hole collection well, and turning on the transfer gate during the reset operation;

[0071] a charge storing step, comprising maintaining the on state of the first reset transistor, and turning off the second reset transistor and the transfer gate to store electrons and holes generated by electromagnetic waves incident on the photodiode and the hole collecting well, respectively;

[0072] Electronic readout steps, including:

[0073] When the first reset transistor is turned off and the row selection transistor is turned on, reading out the output voltage output to the output line as a first reference voltage;

[0074] turning on the transfer gate to transfer the electrons stored in the photodiode to the floating diffusion region;

[0075] disconnecting the transfer gate and reading out the output voltage output to the output line as a first output voltage;

[0076] determining the amount of the incident electromagnetic wave based on the electrons by performing correlated double sampling using the first reference voltage and the first output voltage;

[0077] The hole readout step comprises:

[0078] while turning on the first reset transistor and maintaining the on state of the row selection transistor, reading out the output voltage output to the output line as a second output voltage;

[0079] After turning on the second reset transistor and then turning off the second reset transistor, reading out the output voltage output to the output line as a second reference voltage;

[0080] By using the second reference voltage and the second output voltage, the amount of the incident electromagnetic wave is determined based on the holes.

[0081] According to a third aspect of the present application, if the amount of the electromagnetic wave determined in the electronic readout step is less than a predetermined threshold value, the amount of the electromagnetic wave determined in the electronic readout step can be determined as the amount of the electromagnetic wave incident on the photodiode,

[0082] If the amount of the electromagnetic wave determined in the electron readout step is greater than or equal to the predetermined threshold, the amount of the electromagnetic wave determined in the hole readout step may be determined as the amount of the electromagnetic wave incident on the photodiode.

[0083] According to a third aspect of the present application, the pixel may include a deep trench isolation (DTI) structure surrounding the photodiode, the DTI structure consisting of a groove filled with an insulating material or a DTI insulating layer covering the sidewall of the groove and a conductive material insulated from the substrate by the DTI insulating layer,

[0084] The sidewalls of the groove may function as part of the hole collecting well.

[0085] According to a third aspect of the present application, the sidewall of the groove may be covered with the DTI insulating layer.

[0086] The groove may be filled with the conductive material insulated from the substrate by the DTI insulating layer,

[0087] By applying a negative voltage across the conductive material, holes generated in the photodiode may be collected to the sidewalls of the recess.

[0088] Effects of this application

[0089] According to aspects of the present application, an image sensor including a pixel structure having a high dynamic range may be provided. BRIEF DESCRIPTION OF THE DRAWINGS

[0090] Figure 1 A block diagram of an image sensor provided by an embodiment of the present application is shown.

[0091] Figure 2A A cross-sectional view of a pixel provided by one embodiment of the present application is shown.

[0092] Figure 2B Shows Figure 2A A plan view of the pixel shown in .

[0093] Figure 3 A cross-sectional view of a pixel provided by one embodiment of the present application is shown.

[0094] Figure 4 Shows Figure 2A and Figure 2B or Figure 3 Circuit diagram of the pixel shown in .

[0095] Figure 5 Shows the operation Figures 2A to 4 A timing diagram of the method for a pixel is shown in FIG.

[0096] Figure 6 A cross-sectional view of a pixel provided by another embodiment of the present application is shown.

[0097] Fig. 7A A circuit diagram of a pixel provided by another embodiment of the present application is shown.

[0098] Figure 7B Shows Fig. 7A A plan view of the pixel shown in .

[0099] Fig. 8A A circuit diagram of a pixel provided by another embodiment of the present application is shown.

[0100] Figure 8B Shows Fig. 8AA plan view of the pixel shown in .

[0101] Fig. 9A A cross-sectional view showing a step of a method for manufacturing a pixel provided by an embodiment of the present application is shown.

[0102] Fig. 9B A cross-sectional view showing a step of a method for manufacturing a pixel provided by an embodiment of the present application is shown.

[0103] Fig. 9C A cross-sectional view showing a step of a method for manufacturing a pixel provided by an embodiment of the present application is shown.

[0104] Fig.9D A cross-sectional view showing a step of a method for manufacturing a pixel provided by an embodiment of the present application is shown.

[0105] Fig.9E A cross-sectional view showing a step of a method for manufacturing a pixel provided by an embodiment of the present application is shown.

[0106] Fig.10 A cross-sectional view of a pixel provided by another embodiment of the present application is shown.

[0107] Fig.11 A partial cross-sectional view of an image sensor combined with pixels provided by one embodiment of the present application is shown.

[0108] Fig.12 A block diagram of an imaging system provided by an embodiment of the present application is shown.

[0109] Fig.13 An application example of a camera system provided by an embodiment of the present application is shown.

[0110] Fig.14 A cross-sectional view of a conventional pixel is shown.

[0111] Fig.15 Shows Fig.14 Circuit diagram of the pixel shown. DETAILED DESCRIPTION

[0112] Figure 1 A block diagram of an image sensor 201 provided by an embodiment of the present application is shown. The image sensor 201 includes a pixel array 209 . The pixel array 209 has pixels 1 arranged in an array. Figure 2A A cross-sectional view of a pixel 1 provided in accordance with an embodiment of the present application is shown. Figure 2B Shows Figure 2A A plan view of a pixel 1 is shown in FIG. Figure 3 A cross-sectional view of an alternative pixel 1 provided by one embodiment of the present application is shown. Figure 4 Shows Figure 2A and Figure 2B and / or Figure 3 A circuit diagram of a pixel 1 is shown in FIG. Figure 5 Shows Figures 2A to 4 A timing diagram of the operation of pixel 1 is shown in FIG.

[0113] The image sensor 201 may include: a pixel array 209 having pixels 1 arranged in an array; a control circuit 205 for controlling pixels in the pixel array 209; a readout circuit 210 for reading out signals from the pixels; and a signal processing circuit 206 for processing the signals read out by the readout circuit 210.

[0114] exist Figure 2A and Figure 2B In the embodiment, a pixel 1 is formed on a substrate 2 composed of a semiconductor. The substrate 2 may be composed of Si, SiGe, Ge, III-V semiconductors or any other photosensitive material. A photosensitive material refers to a material that generates electrons and holes by photoelectron conversion in response to incident electromagnetic waves.

[0115] The substrate 2 includes a photodiode 8 that generates and stores electrons and holes in response to incident electromagnetic waves. For example, if the substrate 2 is composed of a p-type doped Si material, the photodiode 8 may be an n-type doped n-well region disposed in the substrate 2 .

[0116] The substrate 2 further includes: a well contact 10 coupled to the photodiode 8, providing electrical separation of the photodiode 8 from adjacent photodiodes and providing potential fixation of the photodiode 8; a floating diffusion region 12, temporarily storing electrons transferred from the photodiode 8 during readout; and a transfer gate 14, including a channel region having a source terminal coupled to the photodiode 8 and a drain terminal coupled to the floating diffusion region 12, and controlling the transfer of electrons from the photodiode 8 to the floating diffusion region 12 in response to an applied voltage. The well contact 10, the floating diffusion region 12, and the transfer gate 14 can be disposed on the first surface side (readout surface) of the substrate 2. For example, if the photodiode 8 is an n-type, the well contact 10 can be a p+ doped region, and the floating diffusion region 12 can be an n+ doped region. If the photodiode 8 is a p-type, the well contact 10 can be an n+ doped region, and the floating diffusion region 12 can be a p+ doped region. In the following, the case of the n-type photodiode 8 is discussed as an example. The transfer gate 14 may include an electrode made of a conductive material and provided on a gate insulating film provided on the surface of the channel region. When a voltage is applied to the transfer gate 14 , electrons generated in the photodiode 8 are transferred to the floating diffusion region 12 through the transfer gate 14 .

[0117] The substrate 2 further includes a hole collecting well 11 coupled to the photodiode 8. For example, the hole collecting well 11 may be a p+ doped region. The hole collecting well 11 may be disposed on a readout surface of the substrate 2. Holes generated in the photodiode 8 may be collected by the hole collecting well 11.

[0118] In the array of pixels 1, the electrons and holes generated in the photodiode 8 may leak from the photodiode 8 to other parts, such as adjacent pixels, and the electrons and holes to be stored may be reduced. Electrons and holes may also flow from the photodiode of an adjacent pixel to the photodiode 8, which results in an increase in the electrons and holes to be stored. The charge flowing into or out of the photodiode 8, regardless of the incident electromagnetic wave, is called crosstalk. If crosstalk occurs, the amount of electrons and holes will not correspond to the amount of electromagnetic waves incident on the photodiode 8. Therefore, crosstalk is a noise source that hinders the accurate measurement of the amount of electromagnetic waves. In order to suppress this crosstalk, the substrate 2 also includes a deep trench isolation (DTI) structure that surrounds the photodiode 8 and provides insulation from adjacent photodiodes. For example, the DTI structure can be a groove 16 arranged in the substrate 2 and filled with an insulating material 52. The DTI structure can prevent electrons and holes from leaking from the photodiode 8 and flowing into the photodiode 8, and can reduce crosstalk. Alternatively, a well with the same polarity as the hole storage layer can be formed on one side of the DTI structure, or a material with a fixed charge can fill the DTI structure. This configuration can also increase the full well capacity for hole storage.

[0119] The readout surface of the substrate 2 includes an intra-pixel transistor readout portion, which includes a plurality of transistors that provide readout and amplification of electrons from the floating diffusion region 12 and provide reset operations for the floating diffusion region 12 and / or the photodiode 8 and the hole collection well 11. For example, the intra-pixel transistor readout portion may include a source follower transistor 18, a first reset transistor 20, and a second reset transistor 21. The transistors in the intra-pixel transistor readout portion may be separated by a shallow trench isolation (STI) structure 54. The source follower transistor 18 includes a drain 26, a source 28, and a gate 30. The gate 30 of the source follower transistor 18 is coupled to the floating diffusion region 12. The drain 26 is coupled to the device voltage 22. The source 28 of the source follower transistor 18 is coupled to the drain of a row select transistor 24, and the source of the source follower transistor of the pixel is in the same row of the array of pixels 1. The source of the row select transistor 24 is coupled to the output line. The gate 30 of the source follower transistor 18 is arranged to face the hole collecting well 11. Therefore, the hole collecting well 11 can be used as the back gate of the source follower transistor 18. The drain of the first reset transistor 20 is coupled to the device voltage 22, for example, and the source is coupled to the floating diffusion area 12. The drain of the second reset transistor 21 is coupled to the hole collecting well 11, for example, and the source is coupled to the hole collecting well reset voltage. The transistors formed on the readout surface of the substrate 2 can be separated from each other by a shallow trench isolation (STI) structure 54. The DTI structure can extend from a second surface of the substrate 2 opposite to the first surface to the source follower transistor 18.

[0120] Alternatively, the pixel 1 may include a structure including a substrate 2 composed of a semiconductor, a semiconductor layer 4, and a buried oxide film layer 6 inserted between the substrate 2 and the semiconductor layer 4, such as Figure 3 As shown. The substrate 2, the buried oxide film layer 6 and the semiconductor layer 4 may have a semiconductor on insulator (SOI) structure. In this case, the substrate 2 is a base substrate and the semiconductor layer 4 is an SOI layer. The substrate 2 and the semiconductor layer 4 may be composed of Si, SiGe, Ge, III-V semiconductors or any other photosensitive materials. The source follower transistor 18, the first reset transistor 20, the second reset transistor 22 and the row selection transistor 24 may be on the semiconductor layer 4. Since the DTI structure is formed by the insulating material 52 embedded in the groove 16 and the buried oxide film layer 6, the DTI structure can still extend from the second surface of the substrate 2 to the source follower transistor 18. Forming the pixel 1 on the SOI substrate may be beneficial for achieving low power consumption and high-speed readout. In the following, the case where the pixel 1 is formed on the SOI substrate is discussed as an example. However, as Figure 2A and Figure 2B As shown, the pixel formed on the bulk substrate 2 is also similarly configured, except that the transistor is formed on the readout surface of the bulk substrate 2, rather than the semiconductor layer of the SOI substrate. Therefore, it should be understood that the following features can be similarly applied.

[0121] refer to Figures 1 to 5 A method of operating the pixel 1 having such a configuration is discussed.

[0122] In the shutter step 40, the transfer gate 14, the first reset transistor 20 and the second reset transistor 21 are turned on. Therefore, the photodiode 8 and the floating diffusion area 12 are reset, for example, by the device voltage 22, and the hole collection well 11 is reset by the ground voltage or a negative voltage.

[0123] Then, in the charge storage step 42, only the first reset transistor 20 is kept in the on state, and the transfer gate 14 and the second reset transistor 21 are turned off. During this time, the electromagnetic wave incident on the photodiode 8 generates electrons and holes. The electrons are stored in the photodiode 8, and the holes are collected by the hole collection well 11. Since the first reset transistor 20 is kept in the on state, the reset voltage (for example, Figure 4 The device voltage in the illustrated case) is applied to the floating diffusion area 12, and thus the floating diffusion area 12 is reset.

[0124] Then, in the electron readout step 44, the first reset transistor 20 is turned off and the row selection transistor 24 is turned on. The potential of the floating diffusion area 12 and the gate 30 of the source follower transistor 18 to which the floating diffusion area 12 is coupled is in a reset state, for example, the potential of the device voltage. On the other hand, the holes collected by the hole collection well 11 have a back gate bias effect on the source follower transistor 18. In other words, since the positive back gate bias is applied to the source follower transistor 18, the threshold voltage Vth of the source follower transistor 18 is modulated. The holes collected by the hole collection well 11 have the effect of modulating the output voltage Vout. The output voltage Vout in this state is a voltage based on the reset potential of the floating diffusion area 12, taking into account the influence of the output voltage modulated by the back gate bias effect of the hole collection well 11. The output voltage Vout is recorded as a first reference voltage. Then, the transfer gate 14 is turned on for a predetermined time to transfer the electrons stored in the photodiode 8 to the floating diffusion area 12. Since the transferred electrons lower the potential of the floating diffusion area 12, the potential of the gate of the source follower transistor 18 to which the floating diffusion area 12 is coupled is lowered, and the output voltage Vout is also lowered. The amount of electrons transferred to the floating diffusion area 12, that is, the amount of electromagnetic waves incident on the photodiode 8, is obtained by performing correlated double sampling using the first output voltage Vout and the output voltage in the above-mentioned reset state. Since the modulation of the output voltage Vout caused by the back gate bias effect does not change before and after the electrons are transferred to the floating diffusion area 12, the modulation of the output voltage Vout is canceled by correlated double sampling. At the end of the electronic readout step 44, the first reset transistor 20 is turned on again to reset the floating diffusion area 12.

[0125] Then, in the hole readout step 46, the second output voltage Vout is recorded. Since the floating diffusion area maintains a reset state, the modulation of the output voltage Vout is based only on the back gate bias effect of the hole collecting well 11. Then, the second reset transistor 21 is turned on and off. Therefore, the hole collecting well 11 is reset, and the back gate bias effect is eliminated. The output voltage Vout in this state is a second reference voltage based on the state in which both the floating diffusion area 12 and the hole collecting well 11 are reset. The amount of holes collected in the hole collecting well 11, that is, the amount of electromagnetic waves incident on the photodiode 8 is obtained by using the output voltage Vout before and after the hole collecting well 11 is reset.

[0126] Finally, the row select transistor 24 is turned off and the operation of the pixel 1 ends.

[0127] There is a disadvantage that when the amount of holes is small, the back gate bias effect generated by the holes collected in the hole collection well 11 has poor linearity, in other words, the amount of electromagnetic waves incident on the photodiode 8 is small. When the amount of electromagnetic waves incident on the photodiode 8 is small, it is preferred to determine the amount of electromagnetic waves through an electronic readout step. The electronic readout mode has a low dark current, and the back gate bias effect caused by holes is small and can be ignored. On the other hand, when the amount of electromagnetic waves incident on the photodiode 8 is large, even if the transfer gate 14 is not turned on, saturated electrons will flow out to the floating diffusion area 12. Therefore, when the amount of incident electromagnetic waves is large, for example, greater than or equal to a predetermined threshold, it is preferred to determine the amount of electromagnetic waves through a hole readout step. In this way, switching between the electronic readout mode and the hole readout mode based on the amount of electromagnetic waves incident on the photodiode 8 can expand the dynamic range of the pixel 1.

[0128] This embodiment describes an example of reading out data consisting of all pixels 1 in an array frame by frame by sequentially reading out pixel charges stored in all pixels 1 in the array using row selection transistors. However, alternatively, an image sensor that operates in a manner called an event-driven type can be implemented by using the pixels 1 of this embodiment, rather than reading data frame by frame. In an event-driven image sensor, data can be output asynchronously at any time in response to changes in the intensity of electromagnetic waves incident on the pixel. Specifically, for example, when the pixel charge generated by the electromagnetic wave incident on the pixel and stored in the pixel exceeds a predetermined threshold, data can be output in combination with the coordinates and time information of the pixel to indicate that the intensity of the electromagnetic wave exceeds the threshold or the intensity of the electromagnetic wave.

[0129] Figure 6 FIG. 2 shows a cross-sectional view of a pixel 1 provided by another embodiment. Figure 6 The pixel 1 shown has Figure 2A , Figure 2B and Figure 3 The pixel 1 shown is similarly configured, but the sidewalls of the groove 16 are covered with a DTI insulating layer 36 and filled with a conductive material 38 such as a metal. The groove 16 and the DTI insulating layer 36 of the pixel 1 configured in this manner serve as a DTI structure to prevent dark current. In addition, a negative voltage is applied to the conductive material 38, and the holes generated in the photodiode 8 are attracted to the region 50 adjacent to the DTI structure. The region 50 is coupled to the hole collection well 11. Therefore, the region 50, which is part of the sidewall of the groove 16 of the DTI structure, also serves as part of the hole collection well and contributes to the back gate bias effect on the source follower transistor 18. Since the hole collection well can be collected, the back gate bias effect on the source follower transistor 18 can be facilitated. Figure 2A , Figure 2B and Figure 3The pixel 1 shown in FIG. 1 has more holes, so the full well capacity of holes can be increased and the dynamic range of the pixel 1 can be further improved. In order to collect holes more efficiently, the region 50 can be more preferably p-type doped, as well as the hole collection well 11.

[0130] Fig. 7A A circuit diagram of a pixel 1 provided in yet another embodiment is shown. Figure 7B Shows Fig. 7A A plan view of a pixel 1 is shown in FIG. Figures 2A to 4 Unlike the pixel 1 shown in FIG. 1 , a pixel includes multiple photodiodes and multiple transfer gates. Fig. 7A and Figure 7B The pixel 1 shown in includes, for example, four photodiodes 8-1 to 8-4, four well contacts 10-1 to 10-4, and four transfer gates 14-1 to 14-4, but the pixel 1 may include a different number of photodiodes, well contacts, and transfer gates. The four photodiodes share a single floating diffusion region 12, a single source follower transistor 18, and a single hole collection well 11. The four photodiodes also share a single row selection transistor 24, a single first reset transistor 20, and a single second reset transistor. In other words, the pixel 1 includes a plurality of sub-pixels, each of which includes a photodiode, a well contact, and a transfer gate. Compared to the case of a pixel in which each of the four photodiodes includes a floating diffusion region, a source follower transistor, such a pixel can reduce the elements to be formed. Therefore, the image sensor can be miniaturized, and the hole collection well 11 can be enlarged (thereby increasing the full well capacity of the holes).

[0131] Fig. 8A A circuit diagram of a pixel 1 provided in yet another embodiment is shown. Figure 8B Shows Fig. 8A A plan view of a pixel 1 is shown in FIG. Fig. 8A and Figure 8B The pixels shown in have a Fig. 7A and Figure 7B The pixel configuration shown in FIG. 1 is similar to that shown in FIG. 1 , but each subpixel includes multiple photodiodes and multiple transfer gates, with Fig. 7A and Figure 7B The pixel 1 shown in FIG. 1 is different. The pixel 1 has sub-pixels, each of which includes two sets of photodiodes, well contacts, and transfer gates. In the pixel 1 having this configuration, each sub-pixel includes a lens. In other words, Fig. 8A and Figure 8B Two adjacent photodiodes 8-11, 8-12 in the image can share a single lens. Since the electromagnetic waves hit the photodiodes 8-11, 8-12 in different directions, the distance to the imaging object can be obtained based on the phase difference. Fig. 8A and Figure 8BThe pixel 1 shown in FIG. 1 can realize a phase difference auto focus (PDAF) function.

[0132] 9A to 9E A method for manufacturing a pixel 1 provided in an embodiment of the present application is shown.

[0133] exist Fig. 9A In the present invention, a substrate 2 is provided. The substrate 2 may be a bulk substrate. Alternatively, an SOI substrate including the substrate 2, a buried oxide film layer 6 and a semiconductor layer 4 may be provided. The substrate 2 may be a p-type doped silicon substrate. An example of an SOI substrate is described herein.

[0134] exist Fig. 9B In the embodiment, the photodiode 8 is formed in the substrate 2, and a hole collecting well 11 is formed in a region 50 surrounding the photodiode 8 and in a side of the substrate 2 facing the buried oxide film layer 6 by doping.

[0135] exist Fig. 9C In the case where an SOI substrate is used as the substrate 2, predetermined regions of the buried oxide film layer 6 and the semiconductor layer 4 are removed.

[0136] exist Fig.9D In the process, a transfer gate 14, a well contact 10 and a floating diffusion region 12 are formed. The transfer gate 14 includes: a channel region having a source terminal coupled to the photodiode 8 and a drain terminal coupled to the floating diffusion region 12; an insulating film formed on the surface of the channel region; and an electrode including a conductive material disposed on the insulating film. The well contact 10 and the floating diffusion region 12 are formed on the surface of the exposed substrate 2 by doping. In addition, an intra-pixel transistor readout portion including a source follower transistor 18, a first reset transistor 20, a second reset transistor 21 and a row selection transistor 24 is formed on the semiconductor layer 4. The well contact 10, the floating diffusion region 12, the source follower transistor 18, the first reset transistor 20, the second reset transistor 21 and the row selection transistor 24 can be formed simultaneously in one process. If an SOI substrate is used, the SOI layer 4 and the buried oxide film layer 6 are removed before forming the well contact 10, the floating diffusion region 12, the source follower transistor 18, the first reset transistor 20, the second reset transistor 21 and the row selection transistor 24.

[0137] Finally, in Fig.9EIn the process, the substrate 2 is thinned to a predetermined thickness, for example, 2 μm-10 μm, by a thinning technique such as polishing. Then, a DTI structure is formed in the substrate 2. Specifically, a groove 16 filled with an insulating material is formed, or a groove 16 whose sidewall is covered with a DTI insulating layer and filled with a conductive material insulated from the substrate by the DTI insulating layer is formed, so that the groove 16 surrounds the photodiode 8, and finally the pixel 1 is obtained. The groove 16 can be formed by a known method, such as reactive ion etching (RIE) or deep reactive ion etching (Deep-RIE).

[0138] Or, in Fig.9E Before forming the well contact 10 and the floating diffusion region 12, an epitaxial semiconductor layer 44 can be formed on the exposed surface of the substrate 2 by removing the semiconductor layer 4 and the buried oxide film layer 6, and then the semiconductor layer 4 and the semiconductor layer 44 can be flattened by polishing. The pixel 1 manufactured in this way is as shown in FIG. Fig.10 As shown, the well contact 10, the floating diffusion region 12 and the transfer gate 14 are formed on the semiconductor layer 44. Since the semiconductor layer 4 and the semiconductor layer 44 are planarized, the subsequent process steps can be easily performed.

[0139] Alternatively, if the pixel 1 is manufactured on the substrate 2 as a bulk substrate, it can be understood that the source follower transistor 18, the first reset transistor 20, the second reset transistor 21 and the row selection transistor 24 can be formed on the surface of the substrate 2 instead of the semiconductor layer 4. In addition, it can be understood that some steps can be omitted, such as removing the semiconductor layer 4 and the buried oxide film layer 6.

[0140] Fig.11 FIG. 2 shows a partial cross-sectional view of an image sensor 201 combined with a pixel 1 provided in some embodiments of the present application. The image sensor 201 may have a logic circuit substrate 212, and the logic circuit substrate 212 includes Figure 1 The control circuit 205, readout circuit 210, signal processing circuit 206, etc. shown are provided, for example, by copper-copper bonding or any other substrate bonding technology. The logic circuit substrate 212 can be provided on one side of the in-pixel transistor readout portion of the pixel 1 through the interlayer insulating film 214, and can be connected to the in-pixel transistor readout portion through the metal interconnect wiring 216. The color filter 203 and the microlens 202 can be provided on one side of the photodiode 8.

[0141] Fig.12A block diagram of such an image sensor 201 is shown. Electromagnetic waves 220 strike pixels 1 of an image sensor array 209 through microlenses 202 and color filters 203. Control circuitry 205 may control the image sensor array 209. Signals from the image sensor array 209 may be processed by signal processing circuitry 206, and, for example, image data mapping the intensity of the electromagnetic waves at each pixel position may be generated. The image data may be displayed on a monitor 207 and / or stored in a memory 208.

[0142] Fig.13 An example of the technology of applying the image sensor 201 of the present application is shown. For example, the image sensor 201 can be applied to a wide variety of fields, including sports equipment such as wearable cameras, medical equipment such as endoscopes, cosmetic equipment, vehicles or transportation equipment such as trucks, mobile phones, game consoles, entertainment equipment such as digital cameras and video cameras, agricultural fields such as farmland monitoring cameras, home appliances such as televisions and refrigerators, and security fields such as surveillance cameras, network cameras, and machine vision cameras.

[0143] Although the embodiments of the present application are described illustratively, it will be easily understood by those skilled in the art that various modifications and changes may be adopted without departing from the spirit and scope of the present application.

[0144] Reference numerals

[0145] 1, 101: pixels;

[0146] 2. 102: substrate;

[0147] 4, 104: semiconductor layer;

[0148] 6. 106: insulation layer;

[0149] 8, 108: Photodiode;

[0150] 10, 110: well contacts;

[0151] 11, 111: hole collection well;

[0152] 12, 112: floating diffusion area;

[0153] 14, 114: transfer gate;

[0154] 16, 116: deep trench isolation (DTI) structure; 18, 118: source follower transistor;

[0155] 20, 120: first reset transistor;

[0156] 22, 122: second reset transistor;

[0157] 24, 124: row selection transistor;

[0158] 26, 126: drain;

[0159] 28, 128: source;

[0160] 30, 130: gate;

[0161] 36, 140: DTI insulation layer;

[0162] 38, 142: conductive materials;

[0163] 40: region adjacent to the DTI structure;

[0164] 44: semiconductor layer;

[0165] 52: Insulation material;

[0166] 136: coupling capacitor;

[0167] 138: Decoupling transistor;

[0168] 201: Image sensor;

[0169] 202: microlens;

[0170] 203: Color filter;

[0171] 205: control circuit;

[0172] 206: signal processing circuit;

[0173] 207: monitor;

[0174] 208: Memory

[0175] 209: image sensor array;

[0176] 210: Readout circuit.

Claims

1. An image sensor, characterized in that: comprising a plurality of pixels arranged in an array on a substrate, Wherein, the pixels include: at least one photodiode disposed in the substrate and generating electrons and holes in response to an incident electromagnetic wave; at least one well contact, coupled to the photodiode, disposed on the first surface side of the substrate, providing electrical separation of the photodiode from adjacent photodiodes and providing potential fixation of the photodiode; at least one floating diffusion region disposed on the first surface side of the substrate and temporarily storing electrons transferred from the photodiode at the time of readout; at least one transfer gate disposed on the first surface side of the substrate, the transfer gate including a channel region having a source terminal coupled to the photodiode and a drain terminal coupled to the floating diffusion region and controlling transfer of pixel charge from the photodiode to the floating diffusion region in response to an applied voltage; at least one hole collecting well coupled to the photodiode, disposed on the first surface side of the substrate, and collecting holes generated in the photodiode; a deep trench isolation (DTI) structure extending from a second surface side of the substrate opposite to the first surface side to surround the photodiode and provide insulation from adjacent pixels; at least one source follower transistor disposed on the first surface side of the substrate such that a gate of the source follower transistor coupled to the floating diffusion region faces the hole collecting well on the first surface side of the substrate; a first reset transistor disposed on the first surface side of the substrate and providing a reset operation of the floating diffusion region and / or the photodiode; a second reset transistor disposed on the first surface side of the substrate and providing a reset operation of the hole collecting well, wherein the drain of the source follower transistor is coupled to a device voltage, wherein the source of the source follower transistor is coupled to the output line through the row selection transistor, The hole collecting well is used as a back gate of the source follower transistor.

2. The image sensor according to claim 1, characterized in that The pixel comprises a semiconductor on insulator (SOI) structure, wherein the SOI structure comprises a base substrate, an SOI layer, and a buried oxide film layer inserted between the base substrate and the SOI layer. wherein the substrate is the base substrate, The source follower transistor, the first reset transistor and the second reset transistor are arranged on the SOI layer.

3. The image sensor according to claim 1 or 2, characterized in that: The DTI structure extends from the second surface side of the substrate into the substrate.

4. The image sensor according to claim 3, characterized in that: The DTI structure includes a groove extending from the second surface side of the substrate into the substrate, a DTI insulating layer covering a sidewall of the groove, and a conductive material insulated from the substrate by the DTI insulating layer and filling the groove.

5. The image sensor according to claim 3, characterized in that: The DTI structure includes a groove extending from the second surface side of the substrate into the substrate and filled with an insulating material.

6. The image sensor according to any one of claims 1 to 2, 4 to 5, characterized in that: The at least one photodiode, the at least one well contact and the at least one transfer gate are a plurality of photodiodes, a plurality of well contacts and a plurality of transfer gates, respectively, The at least one floating diffusion region, the at least one hole collecting well and the at least one source follower transistor are respectively a single floating diffusion region, a single hole collecting well and a single source follower transistor. wherein electrons generated in each of the plurality of photodiodes are transferred to the single floating diffusion region through each of the plurality of transfer gates, The holes generated in each of the plurality of photodiodes are collected by the single hole collection well.

7. The image sensor according to claim 6, characterized in that: Each of the plurality of well contacts is coupled to at least two photodiodes, respectively.

8. A method for manufacturing an image sensor comprising a plurality of pixels, characterized in that: The following steps are involved: providing a substrate composed of a semiconductor; forming at least one photodiode in the substrate by doping; forming at least one hole collecting well, the at least one hole collecting well being disposed on the first surface side of the substrate, coupled to the photodiode, and collecting holes generated in the photodiode; forming at least one transfer gate disposed on the first surface side of the substrate, the transfer gate including a channel region having a source terminal coupled to the photodiode and a drain terminal coupled to a floating diffusion region and controlling transfer of pixel charge from the photodiode to the floating diffusion region in response to an applied voltage; forming on the first surface side of the substrate: at least one well contact coupled to the photodiode, providing electrical separation of the photodiode from adjacent photodiodes and providing potential fixation of the photodiode; at least one floating diffusion region temporarily storing electrons transferred from the photodiode during readout; at least one source follower transistor having a gate facing the hole collecting well; a first reset transistor, providing a reset operation of the floating diffusion area and / or the photodiode; a second reset transistor, providing a reset operation of the hole collection well; forming a deep trench isolation (DTI) structure disposed on a second surface side of the substrate opposite to the first surface side, the DTI structure extending from the second surface side into the substrate to surround the photodiode and provide insulation from adjacent pixels, wherein the drain of the source follower transistor is coupled to a device voltage, wherein the source of the source follower transistor is coupled to the output line through the row selection transistor, The hole collecting well is used as a back gate of the source follower transistor.

9. The method of manufacturing an image sensor comprising a plurality of pixels according to claim 8, characterized in that: The pixel comprises a semiconductor on insulator (SOI) structure, wherein the SOI structure comprises a base substrate, an SOI layer, and a buried oxide film layer inserted between the base substrate and the SOI layer. wherein the substrate is the base substrate, The method for manufacturing the image sensor further comprises, before the step of forming the at least one transfer gate, a step of removing a region of the SOI layer where the transfer gate is to be formed. The source follower transistor, the first reset transistor and the second reset transistor are formed on the SOI layer.

10. The method of manufacturing an image sensor comprising a plurality of pixels according to claim 8, characterized in that: Forming the DTI structure includes forming a DTI insulating layer covering sidewalls of a recess extending into the substrate, and filling the recess with a conductive material.

11. The method of manufacturing an image sensor comprising a plurality of pixels according to claim 8, characterized in that: Forming the DTI structure includes filling a recess extending into the substrate with an insulating material.

12. The method of manufacturing an image sensor comprising a plurality of pixels according to claim 9, characterized in that: The method for manufacturing the image sensor further comprises the following steps: Before forming the at least one well contact, forming the at least one transfer gate and forming the at least one floating diffusion region, removing the SOI layer and the buried oxide film layer by epitaxial growth to form an epitaxial semiconductor layer in the exposed region of the base substrate; polishing the epitaxial semiconductor layer to planarize the SOI layer and the epitaxial semiconductor layer, Wherein, the at least one well contact, the at least one transfer gate and the at least one floating diffusion region are formed on the epitaxial semiconductor layer.

13. A method for operating an image sensor according to any one of claims 1 to 7, characterized in that: The image sensor includes a plurality of pixels arranged in an array on a substrate, and the method includes: a shutter step, including turning on the first reset transistor and the second reset transistor to reset the floating diffusion region and the photodiode and the hole collection well, and turning on the transfer gate during the reset operation; a charge storing step, comprising maintaining the on state of the first reset transistor, and turning off the second reset transistor and the transfer gate to store electrons and holes generated by electromagnetic waves incident on the photodiode and the photodiode in the hole collecting well, respectively; Electronic readout steps, including: When the first reset transistor is turned off and the row selection transistor is turned on, reading out the output voltage output to the output line as a first reference voltage; turning on the transfer gate to transfer the electrons stored in the photodiode to the floating diffusion region; disconnecting the transfer gate and reading out the output voltage output to the output line as a first output voltage; determining the amount of the incident electromagnetic wave based on the electrons by performing correlated double sampling using the first reference voltage and the first output voltage; The hole readout step comprises: while turning on the first reset transistor and maintaining the on state of the row selection transistor, reading out the output voltage output to the output line as a second output voltage; After turning on the second reset transistor and then turning off the second reset transistor, reading out the output voltage output to the output line as a second reference voltage; By using the second reference voltage and the second output voltage, the amount of the incident electromagnetic wave is determined based on the holes.

14. The method for operating the image sensor according to claim 13, characterized in that: if the amount of the electromagnetic wave determined in the electronic readout step is less than a predetermined threshold value, the amount of the electromagnetic wave determined in the electronic readout step is determined as the amount of the electromagnetic wave incident on the photodiode, Wherein, if the amount of the electromagnetic wave determined in the electron readout step is greater than or equal to the predetermined threshold, the amount of the electromagnetic wave determined in the hole readout step is determined as the amount of the electromagnetic wave incident on the photodiode.

15. The method for operating the image sensor according to claim 13 or 14, characterized in that: The pixel includes a deep trench isolation (DTI) structure surrounding the photodiode, the DTI structure consisting of a groove filled with an insulating material or a DTI insulating layer covering a sidewall of the groove and a conductive material insulated from the substrate by the DTI insulating layer, The sidewall of the groove is used as a part of the hole collecting well.

16. The method for operating the image sensor according to claim 15, characterized in that: The sidewall of the groove is covered with the DTI insulating layer, wherein the groove is filled with the conductive material insulated from the substrate by the DTI insulating layer, Wherein, by applying a negative voltage to the conductive material, holes generated in the photodiode are collected on the sidewalls of the groove.

Images