Method for modifying slave unit address, chip and electronic device

Abstract

The present application relates to the field of communication technologies, and discloses a method for modifying the address of a slave unit, a chip, and an electronic device. The modification method includes: the host unit sending a first modification enable signal to the processing modules of each slave unit; the Hall detection modules of each slave unit respectively sending a first voltage signal to the ADC module of each slave unit, the first voltage signal being obtained based on the magnetic field induction signal detected by the Hall detection module; the ADC modules of each slave unit respectively performing digital conversion processing on the first voltage signal to obtain second signal data; and each slave unit obtaining the modification address corresponding to each slave unit based on the second signal data in each slave unit. Based on the above solution, it is possible to modify the address of the slave unit without increasing the system resources at the main control platform end, thereby realizing independent control of each slave unit by the host unit and effectively reducing the system cost.

Description

Technical Field

[0001] This application relates to the field of communication technologies, and in particular, to a method for modifying the address of a slave unit, a chip, and an electronic device. Background Art

[0002] Currently, in a master control platform, it is generally necessary to implement communication between a host unit and multiple slave units. Multiple slave devices are connected to the same Inter-Integrated Circuit (IIC) bus. To facilitate access by the host device, each slave needs to have a unique address. Currently, the way to distinguish the addresses of each slave device is generally to connect the address pins on each slave device to different ports for combination to implement the setting of different slave device addresses. In this way, when there are more slave devices, the more address pins required to be designed on each slave device, resulting in a relatively high system cost. Summary of the Invention

[0003] To solve the above problems, this application provides a method for modifying the address of a slave unit, a chip, and an electronic device.

[0004] In a first aspect, this application provides a method for modifying the address of a slave unit, which is applied to an electronic device. The electronic device includes a host unit and multiple slave units. Each slave unit among the multiple slave units includes a Hall detection module, an analog-to-digital converter module, and a processing module. The method includes: the host unit sending a first modification enable signal to the processing module of each slave unit; the Hall detection module of each slave unit respectively sending a first voltage signal to the analog-to-digital converter module of each slave unit, where the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module; the analog-to-digital converter module of each slave unit respectively performing digital conversion processing on the first voltage signal to obtain second signal data; and the processing module of each slave unit obtaining the modification address corresponding to each slave unit based on the second signal data in each slave unit.

[0005] It can be understood that the Hall detection module of each slave unit detects the magnetic field induction signal in the circuit of each slave unit. Since the circuit environments in each slave unit are different, the magnetic field induction signals of each slave unit are different, so that the first voltage signals converted by each slave unit are different. Therefore, the second signal data obtained by digital conversion based on the first voltage signal is different. In this way, it is possible to obtain the modification address corresponding to each slave unit based on the second signal data in the slave unit. That is, the solution provided in this application can modify the address of the slave unit without increasing the system resources at the master control platform end, thereby realizing independent control of each slave unit by the host unit and effectively reducing the system cost.

[0006] In an implementable manner, the Hall detection modules of each slave unit respectively send a first voltage signal to the analog-to-digital converter module of each slave unit, including: the Hall detection module in each slave unit detects a magnetic field induction signal; the Hall detection module in each slave unit converts the magnetic field induction signal into voltage signal data; the Hall detection module in each slave unit sends the voltage signal data to the amplifier module in each slave unit; the amplifier module of each slave unit processes the voltage signal data to obtain a first voltage signal; the amplifier module of each slave unit respectively sends the first voltage signal to the analog-to-digital converter module of each slave unit.

[0007] In an implementable manner, the electronic device further includes each magnetic element, and the relative position between the position of each magnetic element and the corresponding slave unit is different; the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module, including: the first voltage signal is obtained based on the magnetic field induction signal generated between the position of each magnetic element detected by the Hall detection module and the corresponding slave unit.

[0008] In an implementable manner, the multiple slave units include a first slave unit, a second slave unit, a first magnetic element, and a second magnetic element. The relative position between the first magnetic element and the first slave unit is the same, and the relative position between the second magnetic element and the second slave unit is the same; the connection direction between the first slave unit and the digital-to-analog converter module of the electronic device is opposite to the connection direction between the second slave unit and the digital-to-analog converter; the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module, including: the first voltage signal in the first slave unit is obtained based on the magnetic field induction signal generated between the first magnetic element and the slave unit detected by the Hall detection module, and the second voltage signal in the second slave unit is obtained based on the magnetic field induction signal generated between the second magnetic element and the second slave unit detected by the Hall detection module.

[0009] In an implementable manner, the processing module of each slave unit obtains the modification address corresponding to each slave unit based on the second signal data in each slave unit, including: the processing module in each slave unit selects a number with a first preset number of bits from the maximum fidelity output interval in the second signal data as the modification address corresponding to each slave unit.

[0010] In an implementable manner, the processing module in each slave unit selects a number with a second preset number of bits from the first noise signal corresponding to each slave unit as the address of each slave unit, including: when the number of bits of the first noise signal is less than the second preset number of bits, the processing module of each slave unit replicates and splices at least part of the signal data in the first noise signal corresponding to each slave unit according to a preset arrangement method, and uses the data after replication and splicing as the modified address corresponding to each slave unit.

[0011] In an implementable manner, each slave unit obtains the modified address corresponding to each slave unit based on the second signal in each slave unit, including: when the processing module in each slave unit determines that the value of the second signal data is greater than the first threshold, it uses the magnetic field signal induction signal value corresponding to the second signal data as the modified address corresponding to each slave unit.

[0012] In a second aspect, the present application provides an electronic device, including a host unit, a plurality of slave units, and a first magnetic field; each slave unit among the plurality of slave units includes a Hall detection module and an analog-to-digital converter module; the host unit is configured to send a first modification enable signal to each slave unit; the Hall detection module of each slave unit is respectively configured to send a first voltage signal to the analog-to-digital converter module of each slave unit, and the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module; the analog-to-digital converter module of each slave unit is respectively configured to perform digital conversion processing on the first voltage signal to obtain second signal data, each slave unit includes a first conversion signal corresponding to the voltage signal and a first noise signal during the conversion process, and the first noise signals in each slave unit are different; each slave unit is configured to obtain the modified address corresponding to each slave unit based on the second signal data in each slave unit.

[0013] In an implementable manner, the processing module is configured to select a number with a first preset number of bits from the maximum fidelity output interval in the second signal data as the modified address corresponding to each slave unit.

[0014] In a third aspect, the present application provides a chip, and the chip is used to execute the method for modifying the address of the slave unit mentioned in the present application. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] Figure 1 According to some embodiments of the present application, a schematic diagram of an application scenario of an embodiment of the present application is shown;

[0016] Figure 2 According to some embodiments of the present application, a flowchart of a method for modifying the address of a slave unit is shown;

[0017] Figure 3According to some embodiments of the present application, a schematic diagram showing the process of an ADC module converting a first voltage signal into second signal data affected by noise is presented;

[0018] Figure 4 According to some embodiments of the present application, a schematic diagram showing the process of an ADC module converting second signal data into a slave unit address is presented;

[0019] Figure 5 According to some embodiments of the present application, a schematic diagram showing the relationship between the second signal data of an ADC module and the first voltage signal of a first circuit is presented;

[0020] Figure 6 According to some embodiments of the present application, a schematic diagram showing the relationship between the second signal data of an ADC module and the first voltage signal of a first circuit is presented;

[0021] Figure 7 According to some embodiments of the present application, a schematic diagram of the chip structure of a slave unit provided by an embodiment of the present application is presented. Detailed implementation manners

[0022] Embodiments of the present application include but are not limited to a method, a chip, and an electronic device for modifying a slave unit address.

[0023] The following combines Figure 1 to introduce the application scenarios of the embodiments of the present application. As Figure 1 shown, the method for modifying the slave unit address mentioned in the embodiments of the present application can be used in a scenario where a master unit communicates with multiple slave units, such as slave unit 1, slave unit 2, and slave unit 3. In the present application, the master unit 1 can be a controller, and the slave units 1, 2, and 3 can be corresponding response devices such as a memory, a display, and a sensor. Among them, the number and types of the above-mentioned slave units can be set as needed, and the present application does not make any limitations. As mentioned above, in an IIC or improved inter integrated circuit (I3C) bus system architecture of a master unit and multiple slave units, it is necessary for the same master unit to control multiple slave units with the same device address. Due to the limitations of the IIC / I3C protocol, the IIC / I3C master unit will communicate with all slave units with the same device address simultaneously, that is, send the same instruction to all slave units. If all IIC / I3C slave units with the same device address return data to the master unit, the IIC / I3C master unit cannot distinguish which slave unit the received data comes from, that is, the master unit cannot communicate with each slave unit separately.

[0024] As described above, in the existing solutions, additional system resources are generally required to implement communication between a host unit and slave units with the same device address.

[0025] To solve the above problems, an embodiment of the present application provides a method for modifying the address of a slave unit. This method is used for an electronic device, which includes a host unit and multiple slave units; each slave unit among the multiple slave units includes a Hall detection module, an Analog to Digital Converter (ADC) module, and a processing module; the host unit sends a first modification enable signal to each slave unit; the Hall detection module of each slave unit respectively sends a first voltage signal to the ADC module of each slave unit, and the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module; the ADC module of each slave unit respectively performs digital conversion processing on the first voltage signal to obtain second signal data; each slave unit obtains a corresponding modification address for each slave unit based on the second signal data in each slave unit.

[0026] It can be understood that the Hall detection module of each slave unit detects the magnetic field induction signal in the circuit of each slave unit. Since the circuit environments in each slave unit are different, the magnetic field induction signals of each slave unit are different, so that the first voltage signals converted by each slave unit are different. Therefore, the second signal data obtained by digital conversion based on the first voltage signal is different. In this way, it is possible to obtain the corresponding modification address for each slave unit based on the second signal data in the slave unit. That is, the solution provided by the present application can, in an IIC / I3C architecture with one master and multiple slaves, without increasing the system resources at the master control platform end, achieve the modification of the IIC / I3C slave unit address, thereby realizing the independent control of each slave unit by the host unit and effectively reducing the system cost.

[0027] The following will be combined with Figure 2 to introduce in detail the method for modifying the address of the slave unit. Figure 2 The flowchart of a method for modifying the address of a slave unit is shown. This method includes:

[0028] S201: The host unit sends a first modification enable signal to the processing module of each slave unit.

[0029] In some embodiments, the first modification enable signal may be a trigger instruction for each slave unit to modify its own device address. The host unit sends the first modification enable signal to each slave unit to prompt each slave unit to perform the operation of modifying the device address. The host unit can send the first modification enable signal to the input-enabled pins on each slave unit.

[0030] S202: The Hall detection modules of the slave units respectively send a first voltage signal to the ADC modules of the slave units, and the first voltage signal is obtained based on the magnetic induction signal detected by the Hall detection module.

[0031] In some embodiments, the Hall detection module in each slave unit detects a magnetic induction signal; the Hall detection module in each slave unit converts the magnetic induction signal into voltage signal data; the Hall detection module in each slave unit sends the voltage signal data to the Hall detection module amplifier module in each slave unit; the amplifier module of each slave unit processes the voltage signal data to obtain a first voltage signal; the amplifier module of each slave unit respectively sends the first voltage signal to the analog-to-digital converter module of each slave unit.

[0032] In some embodiments, the electronic device further includes magnetic elements, and the relative positions between the positions of the magnetic elements and the corresponding slave units are different; the first voltage signal is obtained based on the magnetic induction signal detected by the Hall detection module, including: the first voltage signal is obtained based on the magnetic induction signal generated between the positions of the magnetic elements detected by the Hall detection module and the corresponding slave units.

[0033] It can be understood that the electronic device may include multiple magnetic elements, and the number of magnetic elements is the same as the number of slave units. By making the relative positions between the positions of the magnetic elements and the corresponding slave units different, the magnetic induction signals of the slave units detected by the Hall detection module can be made different.

[0034] In some embodiments, the multiple slave units include a first slave unit, a second slave unit, a first magnetic element, and a second magnetic element. The relative positions between the first magnetic element and the first slave unit are the same, and the relative positions between the second magnetic element and the second slave unit are the same; the connection direction between the first slave unit and the digital-to-analog converter module of the electronic device is opposite to the connection direction between the second slave unit and the digital-to-analog converter.

[0035] In some embodiments, both the first magnetic element and the second magnetic element mentioned in this application can be magnets or any other implementable magnetic elements. In some embodiments, if there are two slave units, such as the first slave unit and the second slave unit mentioned above, and the magnetic field change ranges corresponding to the two slave units are the same, for example, the relative positions between the first magnetic element and the first slave unit are the same, and the relative positions between the second magnetic element and the second slave unit are the same, resulting in the same magnetic field change ranges corresponding to the two slave units. At this time, the polarity direction of the magnetic field can be changed. For example, in the case where there is a Digital to analog converter (DAC) module, one of the slave units can be reversely connected to the two output ports (out1, out2) of the DAC driver to achieve different connection methods between the two slave units and the DAC, thereby achieving a change in the polarity direction of the magnetic field, that is, indirectly changing the movement direction of the magnet, so that the magnetic field directions sensed by the two slave units are different, and the corresponding ADC output voltages are different, thereby obtaining different slave unit addresses.

[0036] In some embodiments, the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module, including: the first voltage signal in the first slave unit is obtained based on the magnetic field induction signal generated between the first magnetic element and the slave unit detected by the Hall detection module, and the second voltage signal in the second slave unit is obtained based on the magnetic field induction signal generated between the second magnetic element and the second slave unit detected by the Hall detection module.

[0037] S203: Each slave unit respectively performs digital conversion processing on the first voltage signal to obtain second signal data.

[0038] In some embodiments, the ADC module in each slave unit can perform digital conversion processing on the first voltage signal to obtain second signal data. Figure 3 The figure shows a schematic diagram of the influence of noise during the process of the ADC module converting the first voltage signal into second signal data. As Figure 3 shown, there are noises of different magnitudes and different data at the power supply terminal AVDD, the clock signal terminal CLK, and the ground terminal of the ADC module. At the same time, there is noise in the first voltage signal at the input end, and there will also be noise in the second signal data output after conversion by the ADC module. Since the second signal data of each slave unit includes a first noise signal, the first noise signals generated by each slave unit are random, and the second signal data obtained by each slave unit is different.

[0039] S204: The processing module of each slave unit obtains the modified address corresponding to each slave unit based on the second signal data in each slave unit.

[0040] In some embodiments, the processing module in each slave unit selects, from the maximum fidelity output range of the second signal data, a number of digits of a first preset number of bits (or referred to as a preset number of bits) as the modified address corresponding to each slave unit. The following takes the first preset number of bits being M bits and one slave unit as an example to illustrate the method for modifying the address of the slave unit: For example, as Figure 4 shown, the ADC module of the slave unit receives the first voltage signal, and the number of bits of the second signal data output through conversion is N bits (i.e., from the 0th bit to the (N - 1)th bit). M bits (i.e., from the 0th bit to the (M - 1)th bit) of the signal are selected from the maximum fidelity range (i.e., the valid second signal data) of the second signal data output from the ADC module as the device address of the slave unit and output to the IIC module. For example, when the first voltage signal input to the ADC module occupies the full swing of the resolution of the ADC module (i.e., all the first voltage signals input to the ADC module are valid signals), M bits of data can be selected from the second signal data output by the ADC module from the (N - 1)th bit to the 0th bit (i.e., from the high bit of the number of bits to the low bit of the number of bits) as the device address of the slave unit. Among them, N and M are two unrelated values, that is, the present application does not limit the size relationship between M and N, that is, in the cases of N > M, N < M, or N = M, they are all within the scope mentioned in the embodiments of the present application.

[0041] In some embodiments, when the number of bits of the first noise signal is less than the second preset number of bits, each slave unit replicates and splices some signal data in the first noise signal corresponding to each slave unit according to a preset arrangement method, and uses the replicated and spliced data as the address of each slave unit.

[0042] For example, the number of bits of the first noise signal is N bits, P bits (P < N) of data are selected from the N bits, and are spliced according to different array methods to obtain the device address of the slave unit with M bits, or the position order of the second signal data in the N bits is scrambled and then used as the device address of the slave unit. For example, for example, the number of bits of the first noise signal is 4 bits, and the number of bits of the device address of the slave unit is 2 bits. 1 bit is selected from the number of bits of the first noise signal, and the selected value is replicated and then spliced to obtain the device address of the slave unit with 2 bits. Among them, N and M are two unrelated values, that is, the present application does not limit the size relationship between M and N, that is, in the cases of N > M, N < M, or N = M, they are all within the scope mentioned in the embodiments of the present application.

[0043] In some embodiments, when the processing module in each slave unit determines that the second signal data is greater than the first threshold, the magnitude of the magnetic field corresponding to the first threshold is used as the address corresponding to each slave unit.

[0044] For example, the second signal data output by the ADC module can be used as an indirect criterion for modifying the slave unit address. That is, a certain output second signal data of the ADC module is selected as the first threshold. When the second signal data meets the first threshold, the device address of each slave unit can be modified to the magnetic field magnitude. Figure 5 The schematic diagram showing the relationship between the second signal data of the ADC module and the magnetic field magnitude is shown. As Figure 5 shown, the ordinate represents the second signal data of the ADC module (for example, Th1, Th2, Th-m, etc. can represent different signal thresholds), and the abscissa represents the magnetic field magnitude (for example, M0, M1, M-n can represent different magnetic field intensities). In an ideal state, the second signal data of the ADC module has a linear relationship with the magnetic field magnitude. For example, when the first threshold of the second signal data of the ADC module is set to Th0, when the second signal data meets the first threshold, the device address of the slave unit can be modified to the data of the magnetic field magnitude M0 corresponding to the first threshold; when the first threshold of the second signal data of the ADC module is set to Th1, when the second signal data meets the first threshold, the device address of the slave unit can be modified to the data of the magnetic field magnitude M1 corresponding to the first threshold.

[0045] For another example, Figure 6 The schematic diagram showing the relationship between the second signal data of the ADC module and the magnetic field magnitude is shown. As Figure 6 shown, the ordinate represents the second signal data of the ADC module, and the abscissa represents the magnetic field magnitude. In an ideal state, the second signal data of the ADC module has a linear relationship with the magnetic field magnitude. For example, when the first threshold of the second signal data of the ADC module is set to Th0, when the second signal data meets the first threshold, the device address of the slave unit can be modified to the data of the magnetic field magnitude A corresponding to the first threshold; when the first threshold of the second signal data of the ADC module is set to Th1, when the second signal data meets the first threshold, the device address of the slave unit can be modified to the data of the magnetic field magnitude B corresponding to the first threshold.

[0046] In some embodiments, the ADC module in each slave unit can also send the second signal data to the DSP (Digital Signal Process) module. The DSP module processes the second signal data to obtain the third signal data. Each slave unit obtains the corresponding modification address based on the third signal data in each slave unit. Among them, the method of obtaining the corresponding modification address of each slave unit based on the third signal data in each slave unit is similar to the method of obtaining the corresponding modification address of each slave unit based on the second signal data in each slave unit described above, and will not be elaborated here.

[0047] Through the above method, under the IIC / I3C architecture of one master and multiple slaves, without increasing the system resources of the master control platform, the slave unit address of IIC / I3C can be modified, and based on the slave units with different device addresses, the master unit can independently control the slave units. The solution is simple and easy to implement, and the system cost is relatively low.

[0048] It can be understood that in some embodiments, the operation of modifying the slave unit address can be performed by reversely connecting one slave unit to the serial data line (SDA) and the serial clock line (SCL), and connecting another slave unit to SCL and SDA normally, so as to realize the independent control of the two slave units by the master unit. Although the above solution does not require additional system resources, it can only handle the situation where there are exactly two slave units in the system architecture, and the applicable scenarios are limited. The method provided in this application can realize independent communication between the master unit and more than two slave units without increasing system resources.

[0049] The following combines Figure 7 to introduce the slave unit chip provided in the embodiments of this application. As Figure 7 shown, the slave unit chip provided in the embodiments of this application has an analog area and a digital area, and the analog area is connected to the digital area. The analog area may include an ADC module, an amplifier module, a Hall detection module, and a DAC module. Among them, the output end of the Hall detection module is connected to the input end of the amplifier module, and is used to send voltage signal data to the amplifier module; the output end of the amplifier module is connected to the input end of the ADC module, and is used to provide a first voltage signal to the ADC module; the output end of the ADC module is connected to the input end of the DSP module, and is used to perform digital conversion processing on the first voltage signal and send second signal data to the DSP module; the DAC module is used to provide drive current for each slave unit.

[0050] The digital area may include a DSP module and an IIC / I3C module (or called a processing module). Among them, the input end of the DSP module is connected to the ADC module, and the output end is connected to the IIC / I3C module. The DSP module is used to receive and process the second signal data input by the ADC module, and input the third signal data into the IIC / I3C module. The IIC / I3C module is used to receive the third signal data processed by the DSP module and realize data transmission between the master unit and each slave unit.

[0051] In some embodiments, the processing module may be configured to select, as the modification address corresponding to each slave unit, a number of the first preset number of bits from the maximum fidelity output interval of the second signal data. In some embodiments, the processing module may be configured to select, as the modification address corresponding to each slave unit, a number of the second preset number of bits from the first noise signal corresponding to each slave unit. In some embodiments, the processing module may be configured to perform a replication and splicing process on partial signal data in the first noise signal corresponding to each slave unit according to a preset arrangement manner, and use the replicated and spliced data as the modification address corresponding to each slave unit. In some embodiments, the processing module may be configured to use the second signal data as the modification address corresponding to each slave unit when determining that the value of the second signal data is greater than the first threshold.

[0052] This application also provides an electronic device, including a host unit, a plurality of slave units, and a first magnetic field; each slave unit among the plurality of slave units includes a Hall detection module, an analog-to-digital converter module, and a processing module; the host unit is configured to send a first modification enable signal to the processing module of each slave unit; the Hall detection module of each slave unit is respectively configured to send a first voltage signal to the analog-to-digital converter module of each slave unit, and the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module; the analog-to-digital converter module of each slave unit is respectively configured to perform digital conversion processing on the first voltage signal to obtain second signal data; the processing module of each slave unit is configured to obtain the modification address corresponding to each slave unit based on the second signal data in each slave unit.

[0053] In some embodiments, the processing module of each slave unit is configured to select, as the address of each slave unit, a number of the first preset number of bits from the maximum fidelity output interval of the second signal data.

[0054] In some embodiments, the electronic device provided in the embodiments of this application may be used to execute the method for modifying the address of the slave unit mentioned in the embodiments of this application.

[0055] The embodiments of this application also provide a chip, and the chip is used to execute the method for modifying the address of the slave unit mentioned in the embodiments of this application.

[0056] The embodiments disclosed in this application may be implemented in hardware, software, firmware, or a combination of these implementation methods. The embodiments of this application may be implemented as a computer program or program code executed on a programmable system, and the programmable system includes at least one processor, a storage system (including volatile and non-volatile memories and / or storage elements), at least one input device, and at least one output device.

[0057] Program code can be applied to the input instructions to perform the various functions described in this application and generate output information. The output information can be applied to one or more output devices in a known manner. For the purposes of this application, a processing system includes any system having a processor such as, for example, a digital signal processor (DSP), a microcontroller, an application specific integrated circuit (ASIC), or a microprocessor.

[0058] The program code can be implemented in a high-level procedural language or an object-oriented programming language in order to communicate with the processing system. When needed, the program code can also be implemented in assembly language or machine language. In fact, the mechanisms described in this application are not limited to the scope of any particular programming language. In any case, the language can be a compiled language or an interpreted language.

[0059] In some cases, the disclosed embodiments can be implemented in hardware, firmware, software, or any combination thereof. The disclosed embodiments can also be implemented as instructions carried or stored on one or more transient or non-transitory machine-readable (e.g., computer-readable) storage media, which can be read and executed by one or more processors. For example, the instructions can be distributed via a network or via other computer-readable media. Thus, machine-readable media can include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computer), including but not limited to, floppy disks, optical disks, optical discs, compact discs read-only memory (CD-ROMs), magneto-optical discs, read-only memory (ROM), random access memory (RAM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), magnetic or optical cards, flash memory, or tangible machine-readable memories for transmitting information (e.g., carrier waves, infrared signals, digital signals, etc.) in electrical, optical, acoustic, or other forms via the Internet. Thus, machine-readable media include any type of machine-readable media suitable for storing or transmitting electronic instructions or information in a form readable by a machine (e.g., a computer).

[0060] In the drawings, some structural or method features may be shown in a particular arrangement and / or order. However, it should be understood that such a particular arrangement and / or ordering may not be required. Rather, in some embodiments, these features may be arranged in a different manner and / or order than shown in the illustrative drawings. Additionally, the inclusion of a structural or method feature in a particular figure does not imply that such a feature is required in all embodiments, and in some embodiments, these features may not be included or may be combined with other features.

[0061] It should be noted that each unit / module mentioned in the device embodiments of the present application is a logical unit / module. Physically, a logical unit / module can be a physical unit / module, a part of a physical unit / module, or can be implemented as a combination of multiple physical units / module. The physical implementation manner of these logical units / modules themselves is not the most important. The combination of the functions implemented by these logical units / modules is the key to solving the technical problems proposed by the present application. In addition, in order to highlight the innovative part of the present application, the above device embodiments of the present application do not introduce units / modules that are not closely related to solving the technical problems proposed by the present application, which does not mean that there are no other units / modules in the above device embodiments.

[0062] It should be noted that in the examples and the description of this patent, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variation thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising an" does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0063] Although the present application has been illustrated and described by referring to some preferred embodiments of the present application, those of ordinary skill in the art should understand that various changes can be made in form and detail without departing from the scope of the present application.

Claims

1. A method for modifying the address of a slave unit, characterized in that, for an electronic device, the electronic device includes a host unit and a plurality of slave units, and each slave unit among the plurality of slave units includes a Hall detection module, an analog-to-digital converter module, and a processing module; the method includes: the host unit sends a first modification enable signal to the processing module of each slave unit; the Hall detection modules of each slave unit respectively send a first voltage signal to the analog-to-digital converter module of each slave unit, and the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module; the analog-to-digital converter modules of each slave unit respectively perform digital conversion processing on the first voltage signal to obtain second signal data; the processing module of each slave unit obtains the modification address corresponding to each slave unit based on the second signal data in each slave unit.

2. The method for modifying the address of a slave unit according to claim 1, characterized in that, the Hall detection modules of each slave unit respectively send a first voltage signal to the analog-to-digital converter module of each slave unit, including: the Hall detection module in each slave unit detects a magnetic field induction signal; the Hall detection module in each slave unit converts the magnetic field induction signal into voltage signal data; the Hall detection module in each slave unit sends the voltage signal data to the amplifier module in each slave unit; the amplifier module of each slave unit processes the voltage signal data to obtain a first voltage signal; the amplifier modules of each slave unit respectively send the first voltage signal to the analog-to-digital converter module of each slave unit.

3. The method for modifying the address of a slave unit according to claim 1 or 2, characterized in that, the electronic device further includes each magnetic element, and the relative position between the position of each magnetic element and the corresponding slave unit is different; the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module, including: the first voltage signal is obtained based on the magnetic field induction signal generated between the position of each magnetic element detected by the Hall detection module and the corresponding slave unit.

4. The method for modifying the address of a slave unit according to claim 1 or 2, characterized in that, the plurality of slave units include a first slave unit, a second slave unit, a first magnetic element, and a second magnetic element, the relative position between the first magnetic element and the first slave unit is the same, and the relative position between the second magnetic element and the second slave unit is the same; the connection direction between the first slave unit and the digital-to-analog converter module of the electronic device is opposite to the connection direction between the second slave unit and the digital-to-analog converter; the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module, including: The first voltage signal in the first slave unit is obtained based on the magnetic field induction signal generated between the first magnetic element detected by the Hall detection module and the slave unit, and the second voltage signal in the second slave unit is obtained based on the magnetic field induction signal generated between the second magnetic element detected by the Hall detection module and the second slave unit.

5. The method for modifying the address of the slave unit according to claim 1 or 2, wherein, the processing module of each slave unit obtains the modification address corresponding to each slave unit based on the second signal data in each slave unit, including: the processing module in each slave unit selects a number of the first preset number of bits from the maximum fidelity output interval in the second signal data as the modification address corresponding to each slave unit.

6. The method for modifying the address of the slave unit according to claim 1 or 2, wherein, the processing module in each slave unit selects a number of the second preset number of bits from the first noise signal corresponding to each slave unit as the address of each slave unit, including: when the number of bits of the first noise signal is less than the second preset number of bits, the processing module of each slave unit replicates and splices at least part of the signal data in the first noise signal corresponding to each slave unit in a preset arrangement manner, and uses the replicated and spliced data as the modification address corresponding to each slave unit.

7. The method for modifying the address of the slave unit according to claim 1 or 2, wherein, each slave unit obtains the modification address corresponding to each slave unit based on the second signal in each slave unit, including: when the processing module in each slave unit determines that the value of the second signal data is greater than the first threshold, the magnetic field signal induction signal value corresponding to the second signal data is used as the modification address corresponding to each slave unit.

8. An electronic device, wherein, comprising a host unit, a plurality of slave units and a first magnetic field; each slave unit in the plurality of slave units includes a Hall detection module, an analog-to-digital converter module and a processing module; the host unit is configured to send a first modification enable signal to the processing module of each slave unit; the Hall detection module of each slave unit is respectively configured to send a first voltage signal to the analog-to-digital converter module of each slave unit, and the first voltage signal is obtained based on the magnetic field induction signal detected by the Hall detection module; the analog-to-digital converter module of each slave unit is respectively configured to perform digital conversion processing on the first voltage signal to obtain second signal data; the processing module of each slave unit is configured to obtain the modification address corresponding to each slave unit based on the second signal data in each slave unit.

9. The electronic device according to claim 8, wherein, the processing module is configured to select a number of the first preset number of bits from the maximum fidelity output interval in the second signal data as the address of each slave unit.

10. A chip, wherein, including a circuit configured to perform the method for modifying the slave unit address according to any one of claims 1-7.

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