Frequency offset compensation method, device, equipment and storage medium

Abstract

An embodiment of the present invention provides a frequency offset compensation method, apparatus, device, and storage medium. The method includes: obtaining a sequence scaling factor N based on a signal symbol rate fs, a maximum frequency offset CFO, and a digital modulation order; performing 1 / N sampling on a frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence, wherein the frequency offset compensation sequence is a sequence for performing frequency offset compensation on a signal sequence, and the signal sequence is a sequence composed of sampling values ​​of each bit in a symbol corresponding to each point in a digital modulation constellation diagram of a received symbol signal; using each value of the frequency offset compensation scaling sequence to perform frequency offset compensation on N corresponding consecutive values ​​in the signal sequence to obtain a frequency offset compensation signal sequence. The technical solution of the embodiment of the present invention utilizes the frequency offset compensation scaling sequence obtained by sampling to perform frequency offset compensation calculation, thereby realizing parallel calculation of frequency offset compensation, reducing the amount of computation, and improving the efficiency of frequency offset compensation.

Description

Technical Field

[0001] The present invention relates to the field of wireless communications, and in particular to a frequency offset compensation method, device, equipment and storage medium. Background Art

[0002] In mobile communication systems, due to factors such as the frequency difference between the local oscillator (LO) of the receiver and transmitter and Doppler shift, the received signal has a frequency deviation (hereafter referred to as frequency offset) compared to the ideal signal. Frequency offset compensation is required during signal demodulation, otherwise demodulation performance will deteriorate.

[0003] The basic principle of frequency offset compensation is to estimate the frequency offset (CFO) and then generate a frequency offset compensation sequence Seq based on the CFO. This sequence is then multiplied by the received signal sequence SIG. Both the frequency offset compensation sequence Seq and the received signal sequence SIG have a certain length. In engineering, CODIC algorithms or table lookup methods are commonly used for calculation. These methods require a large number of calculations, and the sequence generation cannot be parallelized; it must be executed sequentially, resulting in a long computation time. Summary of the Invention

[0004] In view of this, the present invention provides a frequency offset compensation method, apparatus, device, and storage medium, the method comprising: obtaining a sequence scaling factor N based on a signal symbol rate fs, a maximum frequency offset CFO, and a digital modulation order M; performing 1 / N sampling on a frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence, the frequency offset compensation sequence being a sequence for frequency offset compensation of a signal sequence, the signal sequence being a sequence composed of sampling values ​​of each bit in a symbol corresponding to each point in a digital modulation constellation diagram of a received symbol signal; and using each value of the frequency offset compensation scaling sequence to perform frequency offset compensation on corresponding N consecutive values ​​in the signal sequence to obtain a frequency offset compensation signal sequence. The technical solution of an embodiment of the present invention utilizes the frequency offset compensation scaling sequence obtained by sampling to perform frequency offset compensation calculation, thereby realizing parallel calculation of frequency offset compensation, reducing the amount of computation, and improving the efficiency of frequency offset compensation.

[0005] In a first aspect, an embodiment of the present invention provides a frequency offset compensation method, including: obtaining a sequence scaling factor N based on a signal symbol rate fs, a maximum frequency offset CFO, and a digital modulation order M; performing 1 / N sampling on a frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence, where the frequency offset compensation sequence is a sequence for performing frequency offset compensation on a signal sequence, and the signal sequence is a sequence composed of sampling values ​​of each bit in a symbol corresponding to each point in a digital modulation constellation diagram of a received symbol signal; using each value of the frequency offset compensation scaling sequence to perform frequency offset compensation on corresponding N consecutive values ​​in the signal sequence to obtain a frequency offset compensated signal sequence.

[0006] From the above, the frequency offset compensation scaling sequence obtained by sampling the obtained sequence scaling factor N is used to perform frequency offset compensation operation on the signal sequence, thereby realizing parallel calculation of frequency offset compensation of N values ​​corresponding to one value in the frequency offset compensation scaling sequence in the signal sequence, thereby reducing the amount of calculation and improving the efficiency of frequency offset compensation.

[0007] In a possible implementation of the first aspect, the sequence scaling factor N varies in a positive direction with the signal symbol rate, varies in a negative direction with the maximum frequency deviation, and varies in a negative direction with the digital modulation order.

[0008] As described above, the sequence scaling factor obtained by the above method can not only be used to reduce the frequency offset, but also make the maximum phase error caused by the calculation smaller than the maximum phase error allowed by digital modulation.

[0009] In a possible implementation of the first aspect, the sequence scaling factor N is less than in, is the maximum allowable phase error corresponding to M-order digital modulation.

[0010] As described above, the accurate sequence scaling factor obtained by the above method can not only be used to reduce the frequency offset, but also make the maximum phase error caused by the calculation smaller than the maximum phase error allowed by digital modulation.

[0011] In a possible implementation of the first aspect, the signal sequence is Sig(i), i=0, 1, ..., n-1, wherein, The frequency offset compensation sequence is

[0012] In a possible implementation of the first aspect, the frequency offset compensation scaling sequence is: The frequency offset compensation signal sequence is

[0013] As described above, by sampling the frequency offset compensation sequence using the above method, the obtained frequency offset compensation scaling sequence further reduces the maximum phase error caused by the calculation.

[0014] In a possible implementation of the first aspect, the method further includes: obtaining a received signal according to a frequency offset compensation signal sequence.

[0015] In a second aspect, an embodiment of the present invention provides a frequency offset compensation device, including: a factor acquisition module, used to obtain a sequence scaling factor N based on a signal symbol rate fs, a maximum frequency offset CFO, and a digital modulation order M; a sequence sampling module, used to perform 1 / N sampling on a frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence, where the frequency offset compensation sequence is a sequence for performing frequency offset compensation on a signal sequence, where the signal sequence is a sequence composed of sampling values ​​of each bit in a symbol corresponding to each point in a digital modulation constellation diagram of a received symbol signal; a frequency offset compensation module, used to perform frequency offset compensation on corresponding N consecutive values ​​in the signal sequence using each value of the frequency offset compensation scaling sequence to obtain a frequency offset compensated signal sequence.

[0016] From the above, the frequency offset compensation scaling sequence obtained by sampling the obtained sequence scaling factor N is used to perform frequency offset compensation operation on the signal sequence, thereby realizing parallel calculation of frequency offset compensation of N values ​​corresponding to one value in the frequency offset compensation scaling sequence in the signal sequence, thereby reducing the amount of calculation and improving the efficiency of frequency offset compensation.

[0017] In a possible implementation of the second aspect, the sequence scaling factor N varies in a positive direction with the signal symbol rate, varies in a negative direction with the maximum frequency deviation, and varies in a negative direction with the digital modulation order.

[0018] As described above, the sequence scaling factor obtained by the above device can not only be used to reduce the frequency offset, but also make the maximum phase error caused by the calculation smaller than the maximum phase error allowed by digital modulation.

[0019] In a possible implementation of the second aspect, the sequence scaling factor N is less than in, is the maximum allowable phase error corresponding to M-order digital modulation.

[0020] As described above, the accurate sequence scaling factor obtained by the above device can not only be used to reduce the frequency offset, but also make the maximum phase error caused by the calculation smaller than the maximum phase error allowed by digital modulation.

[0021] In a possible implementation of the second aspect, the signal sequence is Sig(i), i=0, 1, ..., n-1, wherein, The frequency offset compensation sequence is

[0022] In a possible implementation of the second aspect, the frequency offset compensation scaling sequence is: The frequency offset compensation signal sequence is

[0023] As described above, by sampling the frequency offset compensation sequence through the above device, the obtained frequency offset compensation scaling sequence further reduces the maximum phase error caused by calculation.

[0024] In a possible implementation of the second aspect, the method further includes: a signal acquisition module, configured to obtain a received signal according to a frequency offset compensation signal sequence.

[0025] In a third aspect, an embodiment of the present invention provides a computing device, including:

[0026] bus;

[0027] a communication interface connected to the bus;

[0028] at least one processor connected to the bus; and

[0029] At least one memory is connected to the bus and stores program instructions, and when the program instructions are executed by the at least one processor, the at least one processor executes any one of the embodiments of the first aspect of the present invention.

[0030] In a fourth aspect, an embodiment of the present invention provides a computer-readable storage medium having program instructions stored thereon, wherein the program instructions, when executed by a computer, cause the computer to execute any of the implementations described in the first aspect. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] Figure 1 1 is a flow chart of a frequency offset compensation method according to a first embodiment of the present invention;

[0032] Figure 2 1 is a flow chart of a second embodiment of a frequency offset compensation method according to the present invention;

[0033] Figure 3 This is a structural diagram of a frequency offset compensation device according to a first embodiment of the present invention;

[0034] Figure 4 This is a structural diagram of a second embodiment of a frequency offset compensation device according to the present invention;

[0035] Figure 5 A schematic diagram of the structure of a computing device according to various embodiments of the present invention. DETAILED DESCRIPTION

[0036] In the following description, reference is made to “some embodiments”, which describes a subset of all possible embodiments, but it will be understood that “some embodiments” may be the same subset or different subsets of all possible embodiments and may be combined with each other without conflict.

[0037] In the following description, the terms "first\second\third, etc." or module A, module B, module C, etc. are only used to distinguish similar objects, or to distinguish different embodiments, and do not represent a specific ordering of the objects. It can be understood that the specific order or sequence can be interchanged where permitted, so that the embodiments of the present invention described herein can be implemented in an order other than that illustrated or described herein.

[0038] In the following description, the numbers representing the steps, such as S110, S120, etc., do not necessarily mean that the steps must be executed in this manner. If permitted, the order of the steps can be interchanged or they can be executed simultaneously.

[0039] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by those skilled in the art to which the present invention pertains. The terms used herein are for the purpose of describing embodiments of the present invention only and are not intended to limit the present invention.

[0040] Embodiments of the present invention provide a frequency offset compensation method, apparatus, device, and storage medium for frequency offset compensation in wireless communications. The method comprises: obtaining a sequence scaling factor N based on a signal symbol rate fs, a maximum frequency offset CFO, and a digital modulation order M; performing 1 / N sampling on a frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence, wherein the frequency offset compensation sequence is a sequence for frequency offset compensation of a signal sequence, wherein the signal sequence is a sequence composed of sampling values ​​of each bit in a symbol corresponding to each point in a digital modulation constellation diagram of a received symbol signal; and performing frequency offset compensation on N corresponding consecutive values ​​in the signal sequence using each value of the frequency offset compensation scaling sequence to obtain a frequency offset compensation signal sequence. The technical solution of the embodiment of the present invention utilizes the frequency offset compensation scaling sequence obtained by sampling to perform frequency offset compensation calculation, thereby realizing parallel calculation of frequency offset compensation, reducing the amount of computation, and improving the efficiency of frequency offset compensation.

[0041] The following first introduces various embodiments of a frequency offset compensation method of the present invention.

[0042] A frequency offset compensation method embodiment 1 is used for frequency offset compensation in wireless communications, obtaining a sequence scaling factor N based on a signal symbol rate fs, a maximum frequency offset CFO, and a digital modulation order M; performing 1 / N sampling on a frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence; and using each value of the frequency offset compensation scaling sequence to perform frequency offset compensation on corresponding N consecutive values ​​in a signal sequence to obtain a frequency offset compensation signal sequence, thereby obtaining a received signal after frequency offset compensation.

[0043] Figure 1 The flowchart of a first embodiment of a frequency offset compensation method is shown, including steps S110 to S130.

[0044] S110: Obtain a sequence scaling factor N according to the signal symbol rate fs, the maximum frequency offset CFO, and the digital modulation order M.

[0045] In some embodiments, the sequence scaling factor N varies in a positive direction with the signal symbol rate, varies in a negative direction with the maximum frequency deviation, and varies in a negative direction with the digital modulation order.

[0046] In some other embodiments, the sequence scaling factor N obtained by using formula (1) is less than in, is the maximum allowable phase error corresponding to M-order digital modulation. The larger M is, In some embodiments, It is also related to the radio frequency modulation method of the wireless communication system.

[0047]

[0048] In some embodiments, the maximum frequency offset CFO is obtained through a pilot signal, and the method for obtaining the maximum frequency offset CFO through the pilot signal is not limited.

[0049] S120: Perform 1 / N sampling on the frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence.

[0050] The frequency offset compensation sequence is a sequence for performing frequency offset compensation on a signal sequence, and the signal sequence is a sequence composed of sampling values ​​of each bit in a symbol corresponding to each point in a digital modulation constellation diagram of a received symbol signal.

[0051] In some embodiments, the signal sequence is Sig(i), i=0, 1, ..., n-1, where Each value corresponds to the sampling value of each bit in the symbol corresponding to each point in the digital modulation constellation diagram of the received symbol signal. The frequency offset compensation sequence Seq(i) is constructed using formula (2), where i=0, 1, ..., n-1.

[0052]

[0053] In the prior art, the frequency offset compensation sequence Sigr1(i) of the prior art is obtained by formula (3), where i=0, 1, ..., n-1.

[0054] Sigr1(i)=Sig(i)*Seq(i), i=0, 1,..., n-1 (3)

[0055] In the prior art, the value of each frequency offset compensation sequence, Seq(i), is a value in a complex space modulo 1. In engineering, Equation (3) is commonly calculated using a CODIC algorithm or table lookup. Each Seq(i) requires a CODIC operation or table lookup, which cannot be parallelized and must be performed sequentially, resulting in a large computational load. For example, when the digital modulation is 256QAM, the length of the frequency offset compensation sequence and the received signal sequence is 2048, requiring 2048 CODIC operations or table lookups.

[0056] In some embodiments, each value in the frequency offset compensation scaling sequence is sampled from the corresponding N consecutive values ​​in the frequency offset compensation sequence, and can be any value from the consecutive N values; when the sampled value from the consecutive N values ​​is the value at the middle position of the consecutive N values, the frequency offset compensation scaling sequence is obtained using formula (4):

[0057]

[0058] S130: Perform frequency offset compensation on corresponding N values ​​in the signal sequence by scaling each value of the frequency offset compensation sequence to obtain a frequency offset compensated signal sequence.

[0059] In some embodiments, the frequency offset compensation signal sequence Sigr2(i) of the present invention is obtained using equation (5), where i=0, 1, ..., n-1.

[0060]

[0061] Among them, the original signal sequence has a frequency offset, and the corresponding received signal symbol in the digital modulation constellation diagram is inaccurate. After the frequency offset compensation, the frequency offset compensation signal sequence is closer to or directly corresponds to the ideal received signal symbol in the digital modulation constellation diagram, and the ideal received signal is obtained based on the frequency offset compensation signal sequence.

[0062] Among them, the maximum phase error of the frequency offset compensation signal sequence obtained according to formula (5) is obtained by formula (6), and the maximum phase error is less than

[0063]

[0064] As shown above, the value of each frequency offset compensation scaling sequence Seq2(k) is also a complex number with modulus 1. Equation (5) is calculated using the CODIC algorithm or table lookup method. CODIC operations or table lookups can be performed on N values ​​of the signal sequence in parallel. The number of CODIC operations or table lookups is reduced to 1 / N, and the calculation speed is increased by N times.

[0065] In some embodiments, the frequency offset compensation signal sequence obtained according to equation (5) is used to obtain the symbol of the received signal, and the frequency offset compensated received signal is obtained according to the symbol.

[0066] In summary, in a first embodiment of a frequency offset compensation method, a frequency offset compensation scaling sequence is obtained by sampling the obtained sequence scaling factor N, and a frequency offset compensation operation is performed on the signal sequence, thereby realizing parallel calculation of the frequency offset compensation of N values ​​corresponding to a value in the frequency offset compensation scaling sequence in the signal sequence, thereby reducing the amount of calculation and improving the efficiency of frequency offset compensation.

[0067] A second frequency offset compensation method utilizes the method of the first frequency offset compensation method to perform frequency offset compensation on signal symbols obtained from a wirelessly received OFDM signal, thereby obtaining an ideal received signal. This method inherits the method of the first frequency offset compensation method and has all its advantages.

[0068] In this example, the digital modulation order M is 256, the symbol rate fs is 30.72 MHz, and the maximum frequency offset CFO is 5.12 kHz. In the prior art, the length of the signal sequence and the frequency offset compensation sequence is generally 2048.

[0069] Figure 2 The flowchart of a second embodiment of a frequency offset compensation method is shown, including steps S210 to S250.

[0070] S210: Obtain a maximum frequency offset CFO and a received signal symbol signal using the received OFDM signal.

[0071] The maximum frequency offset CFO is obtained by using the pilot signal or reference signal of the received OFDM signal. For example, CFO=5.12 KHz.

[0072] The received signal symbols are obtained by using the data signal of the received OFDM signal, and the method of obtaining is not limited.

[0073] S220: Obtain a sequence scaling factor N according to the signal symbol rate fs, the maximum frequency offset CFO, and the digital modulation order M.

[0074] The sequence scaling factor N is obtained by using the formula (1) in the first embodiment of a frequency offset compensation method.

[0075] For example, the digital modulation order M is 256, and the corresponding maximum allowable phase error is for Right now The symbol rate fs is 30.72 MHz, the maximum frequency offset CFO is 5.12 kHz, and N obtained by formula (1) is less than 100. A certain margin is reserved in engineering, and N is set to 32 or 16. Take N as 32 as an example.

[0076] S230: Perform 1 / N sampling on the frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence.

[0077] Wherein, the frequency offset compensation scaling sequence Seq2(k) is obtained by using the formula (4) in the first embodiment of the frequency offset compensation method, where k=0, 1, ..., 63. The length of the frequency offset compensation scaling sequence Seq2(k) is 64.

[0078] S240: Perform frequency offset compensation on the corresponding N signals in the signal sequence by using each value of the frequency offset compensation scaling sequence to obtain a frequency offset compensated signal sequence.

[0079] The frequency offset compensation signal sequence Sigr2(i) is obtained by using formula (5) in the first embodiment of a frequency offset compensation method, where i=0, 1, ..., 2047.

[0080] As shown above, the value of each frequency offset compensation scaling sequence Seq2(k) is also a complex number with modulus 1. Using the CODIC algorithm or table lookup method to calculate Equation (5), 32 consecutive values ​​of the signal sequence can be simultaneously calculated using CODIC or table lookup. The number of CODIC calculations or table lookups is 64, which is reduced to 1 / 32 of the 2048 times in the prior art, and the calculation speed is increased by 32 times.

[0081] S250: Obtain a received signal according to the frequency offset compensation signal sequence.

[0082] The frequency offset compensation signal sequence is the sampling value of each bit in the symbol corresponding to each point in the digital modulation constellation diagram of the received symbol signal after frequency compensation. The symbol of the received signal is obtained according to the frequency offset compensation signal sequence, and the ideal received signal is obtained according to the symbol.

[0083] In this process, baseband processing is also performed, and serial-to-parallel conversion is also performed in the OFDM system. These implementations are not limited in the embodiments of the present invention.

[0084] The following is based on Figure 3 and Figure 4 Various embodiments of a frequency offset compensation device of the present invention are introduced.

[0085] A frequency offset compensation device according to embodiment 1 runs the method described in embodiment 1 of a frequency offset compensation method, which has all the advantages of embodiment 1 of a frequency offset compensation method.

[0086] Figure 3 The structure of a frequency offset compensation device according to a first embodiment is shown, including: a factor acquisition module 310 , a sequence sampling module 320 and a frequency offset compensation module 330 .

[0087] The factor acquisition module 310 is used to obtain the sequence scaling factor N according to the signal symbol rate fs, the maximum frequency offset CFO and the digital modulation order M. For its working principle and advantages, please refer to step S110 of the first embodiment of a frequency offset compensation method.

[0088] The sequence sampling module 320 is used to perform 1 / N sampling on the frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence. For its working principle and advantages, please refer to step S120 of the first embodiment of a frequency offset compensation method.

[0089] The frequency offset compensation module 330 is used to perform frequency offset compensation on the corresponding N values ​​in the signal sequence using each value of the frequency offset compensation scaling sequence to obtain a frequency offset compensated signal sequence. For its working principle and advantages, please refer to step S130 of the first embodiment of a frequency offset compensation method.

[0090] A frequency offset compensation device according to embodiment 2 runs the method described in embodiment 2 of a frequency offset compensation method, and has all the advantages of embodiment 2 of a frequency offset compensation method.

[0091] Figure 4 The structure of a second embodiment of a frequency offset compensation device is shown, including: a signal processing module 410 , a factor acquisition module 420 , a sequence sampling module 430 , a frequency offset compensation module 440 and a signal acquisition module 450 .

[0092] The signal processing module 410 is used to obtain the maximum frequency offset CFO and the received signal symbol using the received OFDM signal. For its working principle and advantages, please refer to step S210 of the second embodiment of a frequency offset compensation method.

[0093] The factor acquisition module 420 is used to obtain the sequence scaling factor N according to the signal symbol rate fs, the maximum frequency offset CFO and the digital modulation order M. For its working principle and advantages, please refer to step S220 of the second embodiment of a frequency offset compensation method.

[0094] The sequence sampling module 430 is used to perform 1 / N sampling on the frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence. For its working principle and advantages, please refer to step S230 of the second embodiment of a frequency offset compensation method.

[0095] The frequency offset compensation module 440 is used to perform frequency offset compensation on the corresponding N signals in the signal sequence using each value of the frequency offset compensation scaling sequence to obtain a frequency offset compensated signal sequence. For its working principle and advantages, please refer to step S240 of the second embodiment of a frequency offset compensation method.

[0096] The signal acquisition module 450 is used to obtain a received signal according to the frequency offset compensation signal sequence. For its working principle and advantages, please refer to step S250 of the second embodiment of a frequency offset compensation method.

[0097] The embodiment of the present invention also provides a computing device, Figure 5 Detailed introduction.

[0098] The computing device 500 includes a processor 510 , a memory 520 , a communication interface 530 , and a bus 540 .

[0099] It should be understood that the communication interface 530 in the computing device 500 shown in this figure can be used to communicate with other devices.

[0100] The processor 510 may be connected to a memory 520. The memory 520 may be used to store the program code and data. Therefore, the memory 520 may be a storage unit within the processor 510, an external storage unit independent of the processor 510, or a component including both a storage unit within the processor 510 and an external storage unit independent of the processor 510.

[0101] Optionally, computing device 500 may further include a bus 540. Memory 520 and communication interface 530 may be connected to processor 510 via bus 540. Bus 540 may be a Peripheral Component Interconnect (PCI) bus or an Extended Industry Standard Architecture (EISA) bus. Bus 540 may be classified as an address bus, a data bus, a control bus, etc. For ease of illustration, the figure shows only one line, but this does not imply that there is only one bus or only one type of bus.

[0102] It should be understood that in the embodiment of the present invention, the processor 510 may be a central processing unit (CPU). The processor may also be other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), field programmable gate arrays (FPGA) or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor. Alternatively, the processor 510 may be one or more integrated circuits for executing relevant programs to implement the technical solutions provided in the embodiment of the present invention.

[0103] The memory 520 may include a read-only memory and a random access memory, and provides instructions and data to the processor 510. A portion of the processor 510 may also include a non-volatile random access memory. For example, the processor 510 may also store information about the device type.

[0104] When the computing device 500 is running, the processor 510 executes the computer-executable instructions in the memory 520 to perform the operating steps of each method embodiment.

[0105] It should be understood that the computing device 500 according to an embodiment of the present invention can correspond to the corresponding subjects in the methods according to various embodiments of the present invention, and the above-mentioned and other operations and / or functions of each module in the computing device 500 are respectively for implementing the corresponding processes of each method of this embodiment. For the sake of brevity, they will not be repeated here.

[0106] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professionals and technicians can use different methods to implement the described functions for each specific application, but such implementation should not be considered beyond the scope of the present invention.

[0107] Those skilled in the art will clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0108] In the several embodiments provided by the present invention, it should be understood that the disclosed systems, devices and methods can be implemented in other ways. For example, the device embodiments described above are merely illustrative. For example, the division of the units is merely a logical function division. In actual implementation, there may be other division methods, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0109] The units described as separate components may or may not be physically separate, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed across multiple network units. Some or all of these units may be selected to achieve the purpose of this embodiment according to actual needs.

[0110] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0111] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium and includes several instructions for enabling a computer device (which can be a personal computer, a server, or a network device, etc.) to execute all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0112] An embodiment of the present invention further provides a computer-readable storage medium having a computer program stored thereon, which is used to execute the operating steps of each method embodiment when the program is executed by a processor.

[0113] The computer storage medium of the embodiment of the present invention can adopt any combination of one or more computer-readable media. The computer-readable medium can be a computer-readable signal medium or a computer-readable storage medium. The computer-readable storage medium can be, for example, but not limited to, an electrical, magnetic, optical, electromagnetic, infrared, or semiconductor system, device or component, or any combination of the above. More specific examples (non-exhaustive list) of computer-readable storage media include, an electrical connection with one or more wires, a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), an optical fiber, a portable compact disk read-only memory (CD-ROM), an optical storage device, a magnetic storage device, or any suitable combination of the above. In this document, a computer-readable storage medium can be any tangible medium containing or storing a program, which can be used by an instruction execution system, device or device or used in combination with it.

[0114] A computer-readable signal medium may include a data signal propagated in baseband or as part of a carrier wave, which carries computer-readable program code. Such propagated data signals may take various forms, including but not limited to electromagnetic signals, optical signals, or any suitable combination thereof. A computer-readable signal medium may also be any computer-readable medium other than a computer-readable storage medium that can transmit, propagate, or transport a program for use by or in conjunction with an instruction execution system, apparatus, or device.

[0115] Program code embodied on a computer readable medium may be transmitted using any appropriate medium, including but not limited to wireless, wireline, optical fiber cable, RF, etc., or any suitable combination of the foregoing.

[0116] Computer program code for performing the operations of the present invention may be written in one or more programming languages, or a combination thereof, including object-oriented programming languages ​​such as Java, Smalltalk, C++, and conventional procedural programming languages ​​such as "C" or similar programming languages. The program code may be executed entirely on the user's computer, partially on the user's computer, as a stand-alone software package, partially on the user's computer and partially on a remote computer, or entirely on a remote computer or server. In cases involving a remote computer, the remote computer may be connected to the user's computer through any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., through the Internet using an Internet service provider).

[0117] Note that the above are only preferred embodiments of the present invention and the technical principles employed. Those skilled in the art will appreciate that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments, and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in detail through the above embodiments, the present invention is not limited to the above embodiments and may include many other equivalent embodiments without departing from the scope of protection of the present invention.

Claims

1. A frequency offset compensation method, characterized in that: include: Obtain a sequence scaling factor N according to the signal symbol rate fs, the maximum frequency offset CFO, and the digital modulation order M; Performing 1 / N sampling on the frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence, where the frequency offset compensation sequence is a sequence for performing frequency offset compensation on the signal sequence, and the signal sequence is a sequence consisting of sampled values ​​of each bit in the symbol corresponding to each point in the digital modulation constellation diagram of the received symbol signal; Each value of the frequency offset compensation scaling sequence is used to perform frequency offset compensation on corresponding N consecutive values ​​in the signal sequence to obtain a frequency offset compensated signal sequence.

2. The method according to claim 1, characterized in that The sequence scaling factor N varies in a positive direction with the signal symbol rate, in a negative direction with the maximum frequency deviation, and in a negative direction with the digital modulation order.

3. The method according to claim 1, characterized in that The sequence scaling factor N is less than in, is the maximum allowable phase error corresponding to M-order digital modulation.

4. The method according to claim 1, characterized in that The signal sequence is Sig(i), i=0, 1..., n-1, where The frequency offset compensation sequence is 5. The method according to claim 4, characterized in that: The frequency offset compensation scaling sequence is: The frequency offset compensation signal sequence is Sig(k*N+i)*Seq2(k), 6. The method according to claim 1, characterized in that Also includes: A received signal is obtained according to the frequency offset compensation signal sequence.

7. A frequency offset compensation device, characterized in that: include: A factor acquisition module is used to obtain a sequence scaling factor N according to a signal symbol rate fs, a maximum frequency offset CFO and a digital modulation order M; A sequence sampling module is used to perform 1 / N sampling on the frequency offset compensation sequence to obtain a frequency offset compensation scaling sequence. The frequency offset compensation sequence is a sequence for performing frequency offset compensation on the signal sequence. The signal sequence is a sequence composed of sampling values ​​of each bit in the symbol corresponding to each point in the digital modulation constellation diagram of the received symbol signal; The frequency offset compensation module is used to use each value of the frequency offset compensation scaling sequence to perform frequency offset compensation on corresponding N consecutive values ​​in the signal sequence to obtain a frequency offset compensated signal sequence.

8. The device according to claim 7, characterized in that The sequence scaling factor N varies in a positive direction with the signal symbol rate, in a negative direction with the maximum frequency deviation, and in a negative direction with the digital modulation order.

9. A computing device, characterized in that include, bus; a communication interface connected to the bus; at least one processor connected to the bus; as well as At least one memory is connected to the bus and stores program instructions, and when the program instructions are executed by the at least one processor, the at least one processor executes the method according to any one of claims 1 to 6.

10. A computer-readable storage medium, characterized in that Program instructions are stored thereon, and when the program instructions are executed by a computer, the computer is caused to execute the method according to any one of claims 1 to 6.

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