Package structure and method of manufacturing the same

Abstract

The application relates to the field of semiconductors, and provides a packaging structure and a manufacturing method thereof. The method comprises the following steps: providing a photonic integrated structure, wherein the photonic integrated structure comprises a first opening and conductive material arranged in the first opening; providing a first substrate, wherein the first substrate comprises a second opening and conductive material arranged in the second opening; and bonding the photonic integrated structure and the first substrate, so that the first opening is aligned with the second opening, and the conductive material in the first opening is electrically connected with the conductive material in the corresponding second opening. The application also provides a photonic integrated circuit chip.

Description

Technical Field

[0001] This invention relates to the field of semiconductors, and more specifically, to a packaging structure and its manufacturing method. Background Technology

[0002] When packaging photonic integrated circuits, it is sometimes desirable to form conductive structures that penetrate the material layer and the substrate in the photonic integrated circuit due to the need for electrical connection.

[0003] There are still some challenges in forming vias on the growth substrate of photonic integrated circuits. For example, the process itself may not be mature, or it may affect the devices in the photonic circuit due to process reasons. Summary of the Invention

[0004] This invention provides a packaging structure and its manufacturing method, as well as a photonic integrated circuit chip.

[0005] In an exemplary embodiment, a method for manufacturing a packaging structure is provided, comprising: providing a photonic integrated structure, the photonic integrated structure including: a first opening and a conductive material disposed in the first opening; providing a first substrate, the first substrate including: a second opening and a conductive material disposed in the second opening; bonding the photonic integrated structure to the first substrate such that the first opening and the second opening are aligned, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

[0006] For example, the photonic integrated structure includes a first dielectric layer, and the first opening penetrates the first dielectric layer.

[0007] For example, the second opening penetrates the first substrate.

[0008] For example, the first substrate has a first side and a second side opposite to the first side; the manufacturing method further includes: thinning from the second side of the first substrate such that the second opening penetrates the first substrate.

[0009] For example, providing the photonic integrated structure includes: forming the photonic integrated structure based on an SOI substrate, wherein the SOI substrate includes a back substrate, an insulating layer, and a top silicon layer, and the first dielectric layer is derived from the insulating layer in the SOI substrate; removing the back substrate; and forming the first opening in the first dielectric layer.

[0010] For example, the first opening is formed in the first dielectric layer after the back substrate is removed.

[0011] For example, the first opening is formed in the first dielectric layer before the back substrate is removed.

[0012] For example, the photonic integrated structure has a first side and a second side opposite to the first side, the first dielectric layer is located on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first substrate.

[0013] For example, the method includes forming a fifth dielectric layer on a first side of the first substrate; forming a third opening through the fifth dielectric layer and aligning the third opening with a second opening; and, when bonding the photonic integrated structure to the first substrate, such that the fifth dielectric layer is located between the photonic integrated structure and the first substrate, and such that the conductive material in the third opening is electrically connected to the conductive material in the second opening.

[0014] For example, it also includes forming a redistribution layer (RDL) on the side of the first substrate opposite to the photonic integrated structure.

[0015] For example, after the photonic integrated structure is bonded to the first substrate, a redistribution layer is formed on a second side of the first substrate.

[0016] For example, the first dielectric layer has a first side and a second side opposite to the first side, the photonic integrated structure includes a photonic device disposed on the first side of the first dielectric layer, and the second side of the first dielectric layer is bonded to the first substrate.

[0017] For example, the photonic device includes at least one of waveguide, grating coupler, optical modulator, directional coupler, multimode interferometer, photodetector, and optical beam splitter.

[0018] For example, a second dielectric layer is formed on a first side of the first dielectric layer, the second dielectric layer covers the photonic device, and the first opening penetrates the second dielectric layer.

[0019] For example, the photonic integrated structure is bonded to the first substrate via an oxide-oxide bonding method.

[0020] For example, a plurality of the first openings are aligned with a second opening.

[0021] An exemplary embodiment of the present invention provides a packaging structure, including: a photonic integrated structure, the photonic integrated structure including: a first opening and a conductive material disposed in the first opening; the packaging structure further includes a first substrate, the first substrate including: a second opening and a conductive material disposed in the second opening; the first opening and the second opening are aligned, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

[0022] For example, the photonic integrated structure includes a first dielectric layer, and the first opening penetrates the first dielectric layer.

[0023] For example, the photonic integrated structure has a first side and a second side opposite to the first side, the first dielectric layer is located on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first substrate.

[0024] For example, the second opening penetrates the first substrate.

[0025] For example, the first dielectric layer is derived from an insulating layer in an SOI substrate, and the back substrate in the SOI substrate is removed.

[0026] For example, the packaging structure includes a fifth dielectric layer located between the photonic integrated structure and the first substrate; the fifth dielectric layer includes a third opening and a conductive material disposed in the third opening, the third opening penetrating the fifth dielectric layer, and the third opening being aligned with the second opening, such that the conductive material in the third opening is electrically connected to the conductive material in the second opening.

[0027] For example, the first dielectric layer has a first side and a second side opposite to the first side, the photonic integrated structure includes a photonic device located on the first side of the first dielectric layer, and the second side of the first dielectric layer is bonded to the first substrate.

[0028] For example, the photonic device includes at least one of waveguide, grating coupler, optical modulator, directional coupler, multimode interferometer, photodetector, and optical beam splitter.

[0029] For example, a second dielectric layer is formed on a first side of the first dielectric layer, the second dielectric layer covers the photonic device, and the first opening penetrates the second dielectric layer.

[0030] For example, the photonic integrated structure is bonded to the first substrate via an oxide-oxide bonding method.

[0031] For example, a plurality of the first openings are aligned with a second opening.

[0032] For example, the encapsulation structure has a first surface and a second surface opposite to the first surface, the encapsulation structure includes a conductive path that extends between the first surface and the second surface of the encapsulation structure; wherein, the first opening provided with conductive material is a first conductive opening, the second opening provided with conductive material is a second conductive opening, and the conductive path passes through the first conductive opening and the second conductive opening sequentially in the direction extending from the first surface to the second surface.

[0033] In an exemplary embodiment, a photonic integrated circuit chip is provided, comprising: a photonic integrated structure, the photonic integrated structure including: a first opening and a conductive material disposed in the first opening; the chip further comprising a first substrate, the first substrate including: a second opening and a conductive material disposed in the second opening; the first opening and the second opening are aligned, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

[0034] For example, the photonic integrated structure includes a first dielectric layer, and the first opening extends in the first dielectric layer, wherein the first opening penetrates the first dielectric layer.

[0035] For example, the photonic integrated structure has a first side and a second side opposite to the first side, the first dielectric layer is located on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first substrate.

[0036] For example, the second opening penetrates the first substrate.

[0037] For example, the first dielectric layer is derived from an insulating layer in an SOI substrate, and the back substrate in the SOI substrate is removed.

[0038] For example, the photonic integrated circuit chip includes a fifth dielectric layer located between the photonic integrated structure and the first substrate; the fifth dielectric layer includes a third opening and a conductive material disposed in the third opening, the third opening penetrating the fifth dielectric layer, and the third opening being aligned with a second opening, such that the conductive material in the third opening is electrically connected to the conductive material in the second opening.

[0039] For example, the first dielectric layer has a first side and a second side opposite to the first side, the photonic integrated structure includes a photonic device located on the first side of the first dielectric layer, and the second side of the first dielectric layer is bonded to the first substrate.

[0040] For example, the photonic device includes at least one of waveguide, grating coupler, optical modulator, directional coupler, multimode interferometer, photodetector, and optical beam splitter.

[0041] For example, a second dielectric layer is formed on a first side of the first dielectric layer, the second dielectric layer covers the photonic device, and the first opening penetrates the second dielectric layer.

[0042] For example, the photonic integrated structure is bonded to the first substrate via an oxide-oxide bonding method.

[0043] For example, a plurality of the first openings are aligned with a second opening.

[0044] For example, the photonic integrated circuit chip has a first surface and a second surface opposite to the first surface. The photonic integrated circuit chip includes a conductive path that extends between the first surface and the second surface of the photonic integrated circuit chip. The first opening, which is provided with a conductive material, is a first conductive opening, and the second opening, which is provided with a conductive material, is a second conductive opening. The conductive path passes through the first conductive opening and the second conductive opening in sequence in the direction extending from the first surface to the second surface.

[0045] Some advantages of this invention are as follows: In various embodiments of this invention, the photonic integrated structure and the first substrate can be manufactured or prepared separately without affecting each other, which can shorten the entire production cycle. Appropriate processes can be selected for each during manufacturing. Furthermore, forming openings in the first substrate does not affect the photonic integrated circuit structure. Additionally, the openings in the first dielectric layer of the photonic integrated circuit and the openings in the first substrate can be manufactured using different processes and can have different sizes. In some steps, the existing dielectric layer (e.g., the first dielectric layer) in the photonic integrated structure is bonded, eliminating the need for additional bonding structures on the photonic integrated structure and reducing process steps. Furthermore, the conductive openings through the substrate in the bonded photonic integrated circuit enable packaging for a wider range of scenarios.

[0046] Various aspects, features, advantages, etc., of the embodiments of the present invention will be specifically described below in conjunction with the accompanying drawings. These aspects, features, advantages, etc., will become clearer from the following detailed description in conjunction with the accompanying drawings. Attached Figure Description

[0047] Figures 1A-5B A schematic diagram of an intermediate step or related structure of an exemplary packaging structure manufacturing method is shown;

[0048] Figure 6 A schematic diagram of an exemplary packaging structure is shown;

[0049] Figures 7A-7C A schematic diagram of an intermediate step or related structure of an exemplary packaging structure manufacturing method is shown;

[0050] Figure 8 A schematic diagram of an exemplary photonic integrated circuit chip is shown. Detailed Implementation

[0051] When packaging photonic integrated circuits, it is sometimes desirable to form conductive structures that penetrate the material layer and the substrate in the photonic integrated circuit due to the need for electrical connection.

[0052] There are still some challenges in forming vias on the growth substrate of photonic integrated circuits. For example, the process itself may not be mature, or it may affect the devices in the photonic circuit due to process reasons.

[0053] To facilitate understanding of the various aspects, features, and advantages of the technical solution of this invention, the invention will be described in detail below with reference to the accompanying drawings. It should be understood that the various embodiments described below are for illustrative purposes only and are not intended to limit the scope of protection of this invention.

[0054] The terminology used herein is for the purpose of describing particular embodiments only and is not intended to limit this disclosure. As used herein, the singular forms “a,” “an,” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprising” and / or “including” as used in this specification designate the presence of the stated features, integrals, steps, operations, elements, and / or components, but do not preclude the presence or addition of one or more other features, integrals, steps, operations, elements, components, and / or groups thereof. As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items, and the phrase “at least one of A and B” means only A, only B, or both A and B. In this document, “substrate” may refer to an uncut substrate, such as an uncut wafer, or may represent a diced substrate. In this document, “chip” may include a bare die.

[0055] Example 1: This example provides a method for manufacturing a packaging structure, and the packaging structure itself. The method includes providing a photonic integrated structure, the photonic integrated structure including: a first opening and a conductive material disposed in the first opening; providing a first substrate, the first substrate including: a second opening and a conductive material disposed in the second opening; bonding the photonic integrated structure to the first substrate such that the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

[0056] For example, the manufacturing method of this package structure adopts conventional semiconductor processes, and therefore it is also a manufacturing method of semiconductor structure, thereby manufacturing a semiconductor structure. Figures 1A to 1C The steps for forming the provided photonic integrated structure are illustrated, i.e., the steps for preparing the photonic integrated structure, wherein the photonic integrated structure includes: a first opening, and a conductive material disposed in the first opening. In an exemplary embodiment, the photonic integrated structure includes a first dielectric layer, and the first opening extends in the first dielectric layer.

[0057] like Figure 1A As shown, specifically, photonic integrated structures can be fabricated based on semiconductor layers on insulators, such as silicon-on-insulator (SOI) and silicon germanium-on-insulator (S-SiGeOI). Alternatively, other substrates can be provided for fabricating photonic integrated structures. Substrate materials can be silicon, germanium, silicon carbide, gallium arsenide, gallium phosphide, and can be compound semiconductors, alloy semiconductors, or combinations of the above materials. The substrate can be a wafer, such as an SOI wafer. Taking a silicon-on-insulator (SOI) substrate as an example, it includes providing an SOI substrate, which comprises a back substrate, an insulating layer, and a top silicon layer. Exemplarily, the insulating layer is a buried oxide layer. The insulating layer serves as the first dielectric layer. Figure 1A A back substrate 101, a first dielectric layer 102, and a top silicon layer 103 are shown. The back substrate may be a wafer, such as a silicon wafer. The first dielectric layer has a first side and a second side opposite to the first side, wherein the top silicon layer 103 is located on the first side of the first dielectric layer 102, and the back substrate 101 is located on the second side of the first dielectric layer.

[0058] like Figure 1BAs shown, the step of forming a photonic integrated structure may include forming a photonic device layer 104 based on the SOI substrate. The photonic device layer 104 includes various types of photonic devices, such as waveguides, grating couplers, optical modulators, directional couplers, multi-mode inferometers (MMIs), photodetectors, and optical beam splitters. The photonic devices can be formed through steps such as photolithography, etching, and patterning based on the top silicon layer, as well as deposition and doping steps. During the formation of the photonic devices, different types of semiconductor materials and metallic materials may be deposited.

[0059] For example, the photonic device is located above the first dielectric layer (first side), wherein there may be one or more photonic devices of various types.

[0060] like Figure 1C As shown, after forming the photonic devices, a second dielectric layer 105 is formed, which covers one or more photonic devices. Conductive connection structures (not shown) may be provided in the second dielectric layer 105 to electrically connect to the one or more photonic devices. Optionally, the dielectric layer 105 may include multiple sublayers.

[0061] Electrical connection structures and other material layers can be further formed as needed. For example... Figure 1D As shown, a first conductive layer M1, such as a first metal layer, can be formed on the second dielectric layer.

[0062] like Figure 2 A third dielectric layer 106 and a fourth dielectric layer 107 are formed on the second dielectric layer 105. The third and fourth dielectric layers can be stacked alternately, and the thickness and material of each layer can be inconsistent. The materials of the third and fourth dielectric layers can be, for example, silicon oxide or silicon nitride. Conductive connection structures are formed in the photonic integrated structure, wherein the electrical connection structures include conductive layers (M1, M2, M3, M4) and conductive vias (V12, V23, V34). The conductive vias can be used to connect the conductive layers, and the number of conductive layers and conductive vias can be set as needed. The conductive layers are surrounded by the third and / or fourth dielectric layers. The number of conductive connection structures can be set as needed. Some conductive connection structures can be used to electrically connect with photonic devices, and some can be used to electrically connect with the second conductive opening in the first substrate. Pads 108 and UBM109 can also be formed according to the electrical connection requirements.

[0063] like Figure 3A This includes forming an opening 110 above the grating coupler 1041, wherein the opening may contain air or other materials with a suitable refractive index and dielectric constant, thereby forming a light-guiding opening.

[0064] like Figure 3BThe photonic integrated structure has a first side and a second side opposite to the first side. Figure 3B The diagram illustrates thinning the second side of the photonic integrated structure by removing the back substrate in the SOI substrate, thereby exposing the first dielectric layer 102 on the second side of the photonic integrated structure. Optionally, a portion of the insulating layer in the SOI substrate may also be thinned. Therefore, the first dielectric layer 102 originates from the insulating layer in the SOI substrate. This can be achieved by directly using the insulating layer in the SOI substrate as the first dielectric layer 102, or by performing processes such as thinning on the insulating layer in the SOI substrate to obtain the first dielectric layer 102.

[0065] like Figure 3C A first opening 111 is formed, extending within the first dielectric layer 102. The figure shows two first openings 111 corresponding to one M1. Exemplarily, when the first opening 111 is formed in the first dielectric layer, it also includes the case where the first opening 111 extends in other material layers. For example, when forming the first opening 111, the first opening 111 may extend in the first dielectric layer 102 and also in the second dielectric layer 105. The first opening includes a first portion in the first dielectric layer and a second portion in the second dielectric layer. Figure 3C In the example, etching can begin from the second side of the photonic integrated structure to form the first opening 111.

[0066] like Figure 3D Conductive material is formed in the first opening to form a first conductive opening 112, which is electrically connected to the conductive layer M1. The first opening can penetrate the first dielectric layer, and the corresponding first conductive opening penetrates the first dielectric layer, forming a first conductive via. The first opening penetrates the first dielectric layer and the second dielectric layer. The first conductive opening 112 is electrically connected to the conductive layer M1 and penetrates the first dielectric layer 102 and the second dielectric layer 105. For example, the process of forming the first conductive opening 112 may include a damascus process.

[0067] Alternatively, one or more functional structures 113 may be formed on the second side of the first dielectric layer 102. Optionally, a redistribution layer (not shown) may also be formed on the second side of the first dielectric layer 102, and the first conductive opening (of conductive material) is electrically connected to the redistribution layer.

[0068] Figures 4A-4B A first substrate 201 is shown, in which a second opening is formed. (See figure) Figure 4A Provide a raw substrate as the first substrate 201, such as a silicon substrate, but not limited thereto. Figure 4B In the process, a second opening 202 is formed in the original substrate by etching, and then a conductive material 204a (such as...) is formed. Figure 4CThis forms the second conductive opening 204. Optionally, before setting the conductive material 204a, an isolation layer 204b may be formed first. The second conductive opening 204 may include the isolation layer 204b in the second opening and the conductive material 204a, wherein the isolation layer may include an insulating material. In this process, conventional through-silicon via (TSV) manufacturing processes can be used.

[0069] For example, a first substrate has a first side and a second side, and a second opening is formed from the first side. A conductive material is then disposed in the second opening to form a conductive material layer, thereby forming a conductive opening. For example, the step of forming an insulating material on the sidewalls and bottom of the second opening may be included to form an insulating layer. In some embodiments, the insulating layer may cover not only the sidewalls and bottom but also the first side of the first substrate. In some embodiments, copper metallization and copper electroplating techniques are used to fill the second opening, thereby forming a conductive opening.

[0070] Optionally, before placing the conductive material 204b in the second opening, a step of forming a barrier layer may be included. The barrier layer can be used to prevent diffusion of metal from the conductive material layer to the substrate, and can also be used as an adhesive layer between the conductive material and the dielectric. Exemplary barrier layers may be, for example, TaN, Ta, Ti, TiN, but are not limited thereto.

[0071] The conductive material layer in the second opening can be made of copper or a copper-based alloy. Exemplary conductive materials may also include tungsten, aluminum, or other materials with good conductivity. After the conductive material layer is formed, excess conductive material and barrier layers covering the surface of the first substrate can be removed by processes such as grinding or etching. In some embodiments, the insulating layer covering the substrate surface can also be partially or completely removed by grinding or etching.

[0072] Optionally, the first substrate may also be a transparent substrate, such as a glass substrate, a quartz substrate, or other common substrate materials in the art.

[0073] exist Figure 4C A second conductive opening 204 is shown formed in a first substrate 201, and the second conductive opening 204 is formed on a first side of the substrate 201. After the second conductive opening 204 is formed, as... Figure 4DAs shown, optionally, a dielectric layer (fifth dielectric layer 205) may be further formed to cover the surface of the first substrate and the second conductive opening. A third opening is formed in the fifth dielectric layer, and a conductive material is disposed in the third opening to form a third conductive opening 206. The third conductive opening 206 can penetrate the fifth dielectric layer 205, thereby constituting a third conductive via. The third conductive opening is electrically connected to the second conductive opening. The third conductive opening can be a plug, such as a copper plug, or it can include other metal materials or conductive materials. The third opening and the second opening can have different opening area sizes on the aligned sides. For example, one or more third openings can be aligned with the same second opening; for example, the figure shows two third openings aligned with a second opening. Unless otherwise specified, the "alignment" between openings in this document includes the following situations (taking the alignment of a third opening and a second opening as an example): the alignment of the third opening and the second opening does not require strict alignment of their centers; in some cases, the opening areas of the third opening on the aligned side and the opening areas of the second opening on the aligned side may only partially overlap, as long as the normal conductive connection function is achieved. For example, the formation process of the third conductive opening may include a damascus process.

[0074] Figure 5A The diagram illustrates bonding a photonic integrated structure to a first substrate. The photonic integrated structure has a first side and a second side opposite to the first side. A first dielectric layer is exposed on the second side of the photonic integrated structure, and the second side of the first dielectric layer is bonded towards the first substrate. For example, during bonding, the second side of the first dielectric layer faces the first side of the first substrate, aligning the first aperture 112 of the photonic integrated structure with the second aperture 204 of the first substrate 201. This allows the conductive materials in the first aperture 112 and the second aperture 204 to achieve electrical connection; that is, the first conductive aperture and the corresponding second conductive aperture are aligned and electrically connected. The first and second apertures may have different aperture area sizes on the aligned side, and the alignment of the first and second apertures does not need to be strictly centered. In some cases, the aperture areas of the first aperture and the second aperture on the aligned side may only partially overlap, as long as normal conductive connection is achieved. For example, one or more second apertures may be aligned with the same first aperture. Figure 5AThe diagram shows two first openings aligned with the same second opening, and consequently, two corresponding first conductive openings 112 aligned with the same second conductive opening 204. In some embodiments, the photonic integrated structure may have multiple first openings, and each second opening may be aligned with one or a group of first openings, wherein a group of first openings includes multiple first openings. The photonic integrated structure eliminates the back substrate, thus avoiding the formation of vias in the back substrate, reducing the potential adverse effects of process conditions on the photonic integrated structure when forming vias on the back substrate.

[0075] In some implementations, external light can be input from the first side of the photonic integrated structure.

[0076] For example, the first opening and the second opening can have different aperture sizes; for instance, the first opening can have a smaller aperture than the second opening. In some embodiments, the aperture of the second opening is 2 to 10 times the aperture of the first opening. The number of second openings corresponding to one first opening can be adjusted according to the size of the opening to obtain suitable electrical connection performance.

[0077] exist Figure 5A In this structure, a fifth dielectric layer 205 is also present between the first substrate and the photonic integrated structure. During bonding, the third conductive aperture 206 is electrically connected to the corresponding first conductive aperture 112. Multiple third apertures are aligned with multiple corresponding first apertures, that is, the third conductive aperture 206 is aligned with the corresponding first conductive aperture 112. For example, the original oxide / insulating layer (buried oxide layer) of the SOI substrate in the photonic integrated structure can be used as a bonding layer.

[0078] The bonding between the photonic integrated structure and the first substrate can be an oxide-oxide bonding, such as silicon oxide (SiOx)-silicon oxide (SiOx) bonding. For example, the first dielectric layer is made of silicon oxide (SiOx) material, and the fifth dielectric layer is also made of silicon oxide (SiOx) material. Here, SiOx represents the material system and does not imply that the first and fifth dielectric layers have the same oxygen content.

[0079] During bonding, the dielectric layer (e.g., the first dielectric layer) in the photonic integrated structure is used for bonding, eliminating the need for additional bonding structures on the photonic integrated structure and reducing the process flow.

[0080] Figure 5B A schematic diagram of the thinning of the second side of the first substrate 201 and subsequent processes is shown. Figure 5B In the middle, it is possible Figure 5AThe first substrate 201 is thinned on its second side to form a corresponding through-bustrate via, so that the second via penetrates the first substrate. Correspondingly, a second conductive via 204 penetrates the first substrate 201, forming a second conductive through-hole. Optionally, a dielectric layer 207 (e.g., [insert dielectric layer here]) is formed on the second side of the first substrate. Figure 5B The thinning process can include, for example, grinding, chemical mechanical polishing, etching, etc.

[0081] like Figure 6 A schematic diagram of one encapsulation structure after further forming other connection structures is shown. Figure 5B Subsequently, a redistribution layer (RDL) 208 and a UBM 209 are formed on the second side of the first substrate, with the UBM 209 electrically connected to the redistribution layer 208. Conductive connectors 210 connected to the UBM can be formed as needed for electrical connection. The conductive connectors can be controlled collapse chip connection (C4) bumps, ball grid array (BGA) connectors, solder balls, metal pillars, microbumps, etc. The conductive connectors can include conductive materials such as solder, copper, aluminum, gold, nickel, silver, palladium, tin, or combinations thereof. In some embodiments, the conductive connectors can be formed by first forming a solder layer using common methods such as evaporation, electroplating, or printing. In some embodiments, the conductive connectors are metal pillars, such as copper pillars, formed by sputtering, electroplating, electroless plating, CVD, etc.

[0082] The photonic integrated structure and the first substrate can be manufactured separately, so that forming openings in the first substrate does not affect the photonic integrated structure. In addition, the openings in the first dielectric layer of the photonic integrated structure and the openings in the first substrate can be manufactured using different processes and can also have different sizes. For example, the conductive openings in the photonic integrated structure that are electrically connected to the first substrate can have a smaller aperture than the through holes in the first substrate, which makes them easier to implement in terms of manufacturing process.

[0083] The manufactured packaging structure has a first surface ( Figure 6 The package includes an upper surface of the encapsulation structure and a second surface opposite to the first surface. The encapsulation structure includes a conductive path extending between the first and second surfaces of the encapsulation structure, the conductive path passing sequentially through a first conductive opening and a second conductive opening. For example, it passes sequentially through a first conductive opening, a third conductive opening, and a second conductive opening.

[0084] In some embodiments, the manufacturing order of some materials or layers can be adjusted as needed. For example, pad 108 and UBM 109 can be formed after the photonic integrated structure is bonded to the first substrate. Optionally, a second opening penetrating the first substrate can be formed in the first substrate before the photonic integrated structure is bonded to the first substrate. Optionally, an RDL structure can be formed on the second side of the first substrate before the photonic integrated structure is bonded to the first substrate. Optionally, a redistribution layer can also be formed on the second side of the first dielectric layer of the photonic integrated structure before the photonic integrated structure is bonded to the first conductive opening (conductive material) of the photonic integrated structure through the redistribution layer, and the first conductive opening (conductive material) of the photonic integrated structure is electrically connected to the corresponding second conductive opening (conductive material) in the first substrate, without the need to align the first conductive opening and the second conductive opening during electrical connection.

[0085] This invention provides a packaging structure that can be manufactured using the packaging method of this invention. An exemplary packaging structure is shown below. Figure 6 As shown, it includes: a photonic integrated structure, the photonic integrated structure including: a first opening and a conductive material disposed in the first opening; a first substrate, the first substrate including: a second opening and a conductive material disposed in the second opening; the first opening and the second opening are aligned, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

[0086] In Example 2, the first opening is formed in the first dielectric layer before removing the back substrate from the SOI substrate. Figure 1C Following the steps, the process may include forming a first opening in the first dielectric layer 102, and depositing a conductive material to form a first conductive opening 112 (e.g., Figure 7A In subsequent steps, the back substrate 101 in the SOI substrate is removed. For example, after forming the second dielectric layer 105, as... Figure 7A As shown, etching can be performed from the second dielectric layer 105 to the first dielectric layer 102 to form a first opening that passes through the second dielectric layer and the first dielectric layer. The opening includes a first part in the first dielectric layer and a second part in the second dielectric layer. A conductive material is disposed in the first opening to form a first conductive opening 112. The first conductive opening 112 penetrates the first dielectric layer to form a first conductive via.

[0087] Then, as Figure 7B As shown, a first conductive layer M1 can be formed on the second dielectric layer 105. Electrical connection structures and other material layers can be further formed as needed. See reference... Figure 2A third and fourth dielectric layer are formed on the second dielectric layer. The third and fourth dielectric layers can be stacked alternately, and the thickness and material of each layer can be inconsistent. A conductive interconnect structure is formed in the photonic integrated structure, wherein the electrical interconnect structure includes conductive layers (M1, M2, M3, M4) and conductive vias (V12, V23, V34), which can be used to connect the conductive layers. The conductive layers are surrounded by a third dielectric layer and / or a fourth dielectric layer.

[0088] like Figure 7C Then, the substrate 101 is removed, exposing the first conductive opening 112. In subsequent steps, refer to... Figures 4A-6 In the corresponding steps, the photonic integrated structure is bonded to the first substrate.

[0089] This invention also provides a photonic integrated circuit chip, which can be manufactured by the packaging methods of various embodiments of this invention. The photonic integrated circuit chip includes: a photonic integrated structure, the photonic integrated structure including: a first opening and a conductive material disposed in the first opening; a first substrate, the first substrate including: a second opening and a conductive material disposed in the second opening; the first opening and the second opening are aligned, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

[0090] Exemplary photonic integrated circuit chips such as Figure 8 As shown, the photonic integrated circuit chip 800 includes a photonic integrated structure 100, which is disposed above the first substrate 201.

[0091] The photonic integrated structure 100 includes a first dielectric layer 102, the first opening extends in the first dielectric layer, and a conductive material is disposed in the first opening to form a first conductive opening 112; the first opening penetrates the first dielectric layer 102.

[0092] The second opening is provided with conductive material, thereby forming a second conductive opening 204; the second opening penetrates the first substrate 201.

[0093] The photonic integrated structure 100 is formed based on an SOI substrate, wherein the SOI substrate includes a back substrate, an insulating layer and a top silicon layer, and the first dielectric layer 102 may be derived from the insulating layer in the SOI substrate.

[0094] The back substrate is removed so that the first dielectric layer 102 is bonded to the first substrate 201.

[0095] The photonic integrated structure 100 has a first side and a second side opposite to the first side, the first dielectric layer 102 is exposed on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first side of the first substrate 201.

[0096] The first dielectric layer 102 has a first side and a second side opposite to the first side. The photonic integrated structure includes a photonic device layer 104, which includes various types of photonic devices, such as waveguides, grating couplers, optical modulators, directional couplers, multi-mode inferometers (MMIs), photodetectors, and optical beam splitters. The photonic devices are disposed above the first dielectric layer 102, that is, the photonic devices are located on the first side of the first dielectric layer 102. The second side of the first dielectric layer 102 is bonded to the first substrate 201.

[0097] The photonic integrated structure also includes a second dielectric layer 105, and the first opening penetrates the first dielectric layer and the second dielectric layer.

[0098] The photonic integrated circuit chip 800 has a first surface ( Figure 8 The photonic integrated circuit chip includes an upper surface and a second surface opposite to the first surface. The photonic integrated circuit includes a conductive path that passes through the chip and extends between the first and second surfaces. In the direction from the first surface to the second surface, the conductive path sequentially passes through a first conductive aperture 112 and a second conductive aperture 204. In some embodiments, in the direction from the first surface to the second surface, the conductive path sequentially passes through a first conductive aperture 112, a third conductive aperture 206, and a second conductive aperture 204.

[0099] The photonic integrated circuit chip 800 includes a fifth dielectric layer 205 located between the first dielectric layer and the third dielectric layer; the fifth dielectric layer 205 has a third opening penetrating the fifth dielectric layer and aligned with a second opening; and a conductive material is formed in the third opening such that the conductive material in the third opening is connected to the conductive material in the second opening, thereby the fifth dielectric layer 205 has a third conductive opening 206.

[0100] In some implementations, the photonic integrated circuit chip may have multiple second openings, each of which corresponds to multiple first openings.

[0101] Those skilled in the art should understand that the above-disclosed embodiments are merely implementations of the present invention and should not be construed as limiting the scope of the patent protection claimed in this invention. Equivalent variations made according to the embodiments of the present invention are still within the scope of the claims of the present invention.

Claims

1. A method for manufacturing a packaging structure, comprising: A photonic integrated structure is provided, the photonic integrated structure comprising: First opening, and Conductive material disposed in the first opening; A first substrate is provided, the first substrate comprising: The second opening, and Conductive material disposed in the second opening; The photonic integrated structure is bonded to the first substrate such that the first opening and the second opening are aligned, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening.

2. The method for manufacturing the packaging structure as described in claim 1, wherein the photonic integrated structure includes a first dielectric layer, and the first opening penetrates the first dielectric layer.

3. The method for manufacturing the packaging structure as described in claim 2, wherein the second opening penetrates the first substrate.

4. The method for manufacturing the packaging structure as described in claim 2, wherein, The first substrate has a first side and a second side opposite to the first side; The manufacturing method further includes: thinning from a second side of the first substrate such that the second opening penetrates the first substrate.

5. The method for manufacturing the packaging structure as described in claim 3, wherein providing the photonic integrated structure comprises: The photonic integrated structure is formed based on an SOI substrate, wherein the SOI substrate includes a back substrate, an insulating layer and a top silicon layer, and the first dielectric layer is derived from the insulating layer in the SOI substrate. Remove the back substrate; and The first opening is formed in the first dielectric layer.

6. The method for manufacturing the packaging structure as described in claim 5, wherein, After the back substrate is removed, the first opening is formed in the first dielectric layer.

7. The method for manufacturing the packaging structure as described in claim 5, wherein, The first opening is formed in the first dielectric layer before the back substrate is removed.

8. The method of manufacturing a packaging structure according to any one of claims 3-7, wherein the photonic integrated structure has a first side and a second side opposite to the first side, the first dielectric layer is located on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first substrate.

9. The method of manufacturing the packaging structure of claim 8, comprising forming a fifth dielectric layer on a first side of the first substrate; forming a third opening through the fifth dielectric layer and aligning the third opening with a second opening; and A conductive material is formed in the third opening, and when the photonic integrated structure is bonded to the first substrate, the fifth dielectric layer is located between the photonic integrated structure and the first substrate, and the conductive material in the third opening is electrically connected to the conductive material in the second opening.

10. The method of manufacturing the packaging structure as claimed in claim 8, further comprising forming a redistribution layer (RDL) on the side of the first substrate opposite to the photonic integrated structure.

11. The method of manufacturing the packaging structure as claimed in claim 8, wherein after the photonic integrated structure is bonded to the first substrate, a redistribution layer is formed on a second side of the first substrate.

12. The method of manufacturing the packaging structure as claimed in claim 8, wherein the first dielectric layer has a first side and a second side opposite to the first side, the photonic integrated structure includes a photonic device, the photonic device is disposed on the first side of the first dielectric layer, and the second side of the first dielectric layer is bonded to the first substrate.

13. The method for manufacturing the packaging structure as described in claim 12, wherein, The photonic device includes at least one of waveguide, grating coupler, optical modulator, directional coupler, multimode interferometer, photodetector, and optical beam splitter.

14. The method of manufacturing the packaging structure as claimed in claim 13, wherein a second dielectric layer is formed on a first side of the first dielectric layer, the second dielectric layer covers the photonic device, and the first opening penetrates the second dielectric layer.

15. The method for manufacturing the packaging structure as described in claim 8, wherein the photonic integrated structure is bonded to the first substrate via an oxide-oxide bonding method.

16. The method for manufacturing the packaging structure as described in claim 8, wherein, Multiple first openings are aligned with a second opening.

17. A packaging structure, comprising: Photonic integrated structure, the photonic integrated structure comprising: First opening, and Conductive material disposed in the first opening; A first substrate, the first substrate comprising: The second opening, and Conductive material disposed in the second opening; The first opening is aligned with the second opening, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening; The photonic integrated structure includes a first dielectric layer, and the first opening penetrates the first dielectric layer. The photonic integrated structure has a first side and a second side opposite to the first side, the first dielectric layer is located on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first substrate.

18. The packaging structure as described in claim 17, wherein, The second opening penetrates through the first substrate.

19. The packaging structure as described in claim 18, wherein, The first dielectric layer is derived from the insulating layer in the SOI substrate, and the back substrate in the SOI substrate is removed.

20. The packaging structure of claim 18, wherein the packaging structure includes a fifth dielectric layer located between the photonic integrated structure and the first substrate; the fifth dielectric layer includes a third opening and a conductive material disposed in the third opening, the third opening penetrating the fifth dielectric layer, and the third opening being aligned with a second opening such that the conductive material in the third opening is electrically connected to the conductive material in the second opening.

21. The packaging structure according to any one of claims 18-20, wherein the first dielectric layer has a first side and a second side opposite to the first side, the photonic integrated structure includes a photonic device located on the first side of the first dielectric layer, and the second side of the first dielectric layer is bonded to the first substrate.

22. The packaging structure as described in claim 21, wherein, The photonic device includes at least one of waveguide, grating coupler, optical modulator, directional coupler, multimode interferometer, photodetector, and optical beam splitter.

23. The packaging structure of claim 22, wherein a second dielectric layer is formed on a first side of the first dielectric layer, the second dielectric layer covers the photonic device, and the first opening penetrates the second dielectric layer.

24. The packaging structure according to any one of claims 17-20, wherein the photonic integrated structure is bonded to the first substrate via an oxide-oxide bonding method.

25. The packaging structure according to any one of claims 17-20, wherein, Multiple first openings are aligned with a second opening.

26. The encapsulation structure according to any one of claims 17-20, the encapsulation structure having a first surface and a second surface opposite to the first surface, the encapsulation structure including a conductive path extending between the first surface and the second surface of the encapsulation structure; wherein, The first opening, which is provided with conductive material, is the first conductive opening, and the second opening, which is provided with conductive material, is the second conductive opening. The conductive path passes through the first conductive opening and the second conductive opening in sequence in the direction extending from the first surface to the second surface.

27. A photonic integrated circuit chip, comprising: Photonic integrated structure, the photonic integrated structure comprising: First opening, and Conductive material disposed in the first opening; A first substrate, the first substrate comprising: The second opening, and Conductive material disposed in the second opening; The first opening is aligned with the second opening, and the conductive material in the first opening is electrically connected to the conductive material in the corresponding second opening; The photonic integrated structure includes a first dielectric layer, and the first opening extends in the first dielectric layer, wherein the first opening penetrates the first dielectric layer. The first dielectric layer has a first side and a second side opposite to the first side. The photonic integrated structure includes a photonic device located on the first side of the first dielectric layer, and the second side of the first dielectric layer is bonded to the first substrate.

28. The photonic integrated circuit chip of claim 27, wherein the photonic integrated structure has a first side and a second side opposite to the first side, the first dielectric layer is located on the second side of the photonic integrated structure, and the second side of the photonic integrated structure is bonded toward the first substrate.

29. The photonic integrated circuit chip as described in claim 28, wherein, The second opening penetrates through the first substrate.

30. The photonic integrated circuit chip as described in claim 29, wherein, The first dielectric layer is derived from the insulating layer in the SOI substrate, and the back substrate in the SOI substrate is removed.

31. The photonic integrated circuit chip of claim 30, wherein the photonic integrated circuit chip includes a fifth dielectric layer located between the photonic integrated structure and the first substrate; the fifth dielectric layer includes a third opening and a conductive material disposed in the third opening, the third opening penetrating the fifth dielectric layer, and the third opening being aligned with a second opening such that the conductive material in the third opening is electrically connected to the conductive material in the second opening.

32. The photonic integrated circuit chip according to any one of claims 29-31, wherein, The photonic device includes at least one of waveguide, grating coupler, optical modulator, directional coupler, multimode interferometer, photodetector, and optical beam splitter.

33. The photonic integrated circuit chip of claim 32, wherein a second dielectric layer is formed on a first side of the first dielectric layer, the second dielectric layer covers the photonic device, and the first opening penetrates the second dielectric layer.

34. The photonic integrated circuit chip as described in claim 32, wherein the photonic integrated structure is bonded to the first substrate via an oxide-oxide bonding method.

35. The photonic integrated circuit chip as described in claim 32, wherein, Multiple first openings are aligned with a second opening.

36. The photonic integrated circuit chip according to any one of claims 29-31, wherein the photonic integrated circuit chip has a first surface and a second surface opposite to the first surface, the photonic integrated circuit chip includes a conductive path extending between the first surface and the second surface of the photonic integrated circuit chip; wherein, The first opening, which is provided with conductive material, is the first conductive opening, and the second opening, which is provided with conductive material, is the second conductive opening. The conductive path passes through the first conductive opening and the second conductive opening in sequence in the direction extending from the first surface to the second surface.

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