Packaging structure and manufacturing method thereof

Abstract

An embodiment of the present disclosure provides a packaging structure and a manufacturing method thereof. The packaging structure includes a circuit substrate and a semiconductor structure disposed on the circuit substrate, wherein the circuit substrate includes: an insulating structure, a conductive circuit, a first conductive pad, and a first dummy pad structure. The conductive circuit is embedded in the insulating structure; the first conductive pad is disposed on one side of the insulating structure and electrically connected to the conductive circuit; the first dummy pad structure is disposed on the one side of the insulating structure and extends into the insulating structure; and the semiconductor structure is bonded to the first conductive pad and the first dummy pad structure of the circuit substrate via a conductive connector and a dummy connector.

Description

Technical Field

[0001] Embodiments of the present disclosure relate to a packaging structure and a method for manufacturing the same. Background Art

[0002] In semiconductor packaging technology, various semiconductor components can be connected to a circuit substrate via connectors such as solder balls. These connectors are positioned between the semiconductor components and the circuit substrate and can be bonded to pads on the circuit substrate. These connectors and the pads they connect to (for example, during heat sink installation, reliability testing, etc.) may be subject to stress from the semiconductor components and / or the circuit substrate. If the bonding strength between the pads and adjacent material layers in the circuit substrate is low, this stress can cause cracks to form at the interface between the pads and the material layers, thereby affecting device reliability. Summary of the Invention

[0003] According to at least one embodiment of the present disclosure, a packaging structure is provided, comprising a circuit substrate and a semiconductor structure arranged on the circuit substrate, wherein the circuit substrate comprises: an insulating structure; a conductive circuit embedded in the insulating structure; a first conductive pad arranged on one side of the insulating structure and electrically connected to the conductive circuit; and a first dummy pad structure arranged on the one side of the insulating structure and extending into the insulating structure, the semiconductor structure being joined to the first conductive pad and the first dummy pad structure of the circuit substrate through a conductive connector and a dummy connector.

[0004] In the packaging structure provided according to at least one embodiment of the present disclosure, the first dummy pad structure and the dummy connector are electrically floating and electrically isolated from the conductive line.

[0005] In the packaging structure provided according to at least one embodiment of the present disclosure, the conductive connector and the dummy connector are arranged side by side in a horizontal direction parallel to the main surface of the circuit substrate, and the dummy connector is closer to the corner of the semiconductor structure than the conductive connector.

[0006] In the packaging structure provided according to at least one embodiment of the present disclosure, the first dummy pad structure includes: a first dummy pad, arranged on the surface of the insulating structure on a side close to the semiconductor structure; and a first dummy reinforcement member, embedded in the insulating structure, surrounded by the insulating structure, and connected to the first dummy pad.

[0007] In the packaging structure provided according to at least one embodiment of the present disclosure, at least a portion of the first dummy pad and at least a portion of the first dummy reinforcement member are integrally formed.

[0008] In the packaging structure provided according to at least one embodiment of the present disclosure, the first dummy reinforcement member includes a dummy through-hole, which is connected to the first dummy pad and extends from the first dummy pad to the insulating structure in a direction perpendicular to the main surface of the circuit substrate and away from the conductive connector.

[0009] In the packaging structure provided according to at least one embodiment of the present disclosure, the first dummy reinforcement member further includes: a dummy line embedded in the insulating structure, and the dummy through hole is located between the first dummy pad and the dummy line in a first direction perpendicular to the main surface of the circuit substrate.

[0010] In the packaging structure provided according to at least one embodiment of the present disclosure, the width of the dummy line is greater than the width of the dummy through-hole, and the width of the dummy line and the width of the dummy through-hole are widths in a second direction parallel to the main surface of the circuit substrate.

[0011] In the packaging structure provided according to at least one embodiment of the present disclosure, the conductive circuit includes a first conductive wire and a second conductive wire embedded in different insulating layers of the insulating structure, and the first conductive wire and the second conductive wire are electrically connected to each other through a conductive through-hole; the dummy wire is arranged in the same layer as the first conductive wire, and the overlapping area between the dummy wire and the second conductive wire in the first direction is smaller than the overlapping area between the first conductive wire and the second conductive wire in the first direction.

[0012] In the packaging structure provided according to at least one embodiment of the present disclosure, the circuit substrate further includes: a first protective layer, located on a side of the insulating structure close to the semiconductor structure, and located on the side of the conductive pad and the first dummy pad structure in a direction parallel to the main surface of the circuit substrate, spaced apart from the conductive pad, and spaced apart from at least a portion of the side wall of the first dummy pad structure.

[0013] In the packaging structure provided according to at least one embodiment of the present disclosure, the first protective layer has an opening, at least a portion of the first dummy pad structure is located in the opening, the dummy connector covers the surface of the first dummy pad structure away from the insulating structure, and extends into the opening to cover at least a portion of the side wall of the first dummy pad structure.

[0014] In the packaging structure provided according to at least one embodiment of the present disclosure, the first protective layer has an opening, at least a portion of the first dummy pad structure is located in the opening, the first dummy pad structure has a first side wall and a second side wall, the first protective layer covers a first portion of the surface of the first dummy pad structure away from the insulating structure and the first side wall, and the dummy connector covers a second portion of the surface of the first dummy pad structure and the second side wall.

[0015] In the packaging structure provided according to at least one embodiment of the present disclosure, the semiconductor structure further includes: a second conductive pad and a second dummy pad structure, the second dummy pad structure includes at least a second dummy pad, the second conductive pad and the second dummy pad are located on a side of the semiconductor structure close to the circuit substrate, the second conductive pad is electrically connected to the conductive connector, and the second dummy pad structure is connected to the dummy connector and is electrically floating.

[0016] In the packaging structure provided according to at least one embodiment of the present disclosure, the semiconductor structure further includes: a second protective layer, located on a side of the semiconductor structure close to the circuit substrate, and covering the side walls of the second conductive pad and the second dummy pad and a portion of their surface close to the circuit substrate.

[0017] In the packaging structure provided according to at least one embodiment of the present disclosure, the semiconductor structure further includes a dielectric structure, and the second dummy pad structure further includes a second dummy reinforcement member. The second dummy pad is located on a surface of the dielectric structure on a side close to the circuit substrate, and the second dummy reinforcement member is embedded in the dielectric structure and connected to the second dummy pad.

[0018] The packaging structure provided according to at least one embodiment of the present disclosure further includes: a heat dissipation component, which is arranged on a side of the semiconductor structure away from the circuit substrate and attached to the semiconductor structure.

[0019] In the packaging structure provided according to at least one embodiment of the present disclosure, the semiconductor structure includes: a chip; and a packaging substrate electrically connected to the chip and located between the chip and the circuit substrate, and the conductive connector and the dummy connector are arranged on a side of the packaging substrate away from the chip.

[0020] At least one embodiment of the present disclosure provides a method for manufacturing a packaging structure, comprising: forming a circuit substrate, comprising: forming an insulating structure and a conductive circuit, wherein the conductive circuit is embedded in the insulating structure; forming a first conductive pad on one side of the insulating structure, wherein the first conductive pad is electrically connected to the conductive circuit through a conductive through-hole; and forming a first dummy pad structure, wherein the first dummy pad structure is arranged on the one side of the insulating structure and extends into the insulating structure; and providing a semiconductor structure, and joining the semiconductor structure to the circuit substrate, wherein the semiconductor structure has a conductive connector and a dummy connector, and joining the semiconductor structure to the circuit substrate comprises joining the conductive connector and the dummy connector to the first conductive pad and the first dummy pad structure of the circuit substrate, respectively.

[0021] In the manufacturing method of the packaging structure provided according to at least one embodiment of the present disclosure, forming the first dummy pad structure includes: forming a first dummy reinforcement member in the insulating structure; and forming a first dummy pad on a side of the first dummy reinforcement member and the insulating structure close to the semiconductor structure, and the first dummy pad and the first dummy reinforcement member are connected to each other.

[0022] In the packaging structure provided according to at least one embodiment of the present disclosure, the first dummy reinforcement member includes a dummy through-hole, and forming the first dummy pad structure includes: forming an opening in the insulating structure; and forming a metal material in the opening of the insulating structure and on the surface of a side close to the semiconductor structure, wherein a portion of the metal material located in the opening forms the dummy through-hole, and a portion of the metal material located on the surface of the insulating structure forms the first dummy pad.

[0023] In the packaging structure provided according to at least one embodiment of the present disclosure, forming the first dummy pad structure also includes: before forming the opening, forming a dummy line embedded in the insulating structure, and the opening is formed to expose the dummy line, so that the dummy through hole subsequently formed in the opening is connected to the dummy line, wherein the dummy line and the dummy through hole together constitute the first dummy reinforcement member.

[0024] In the package structure provided according to at least one embodiment of the present disclosure, at least a portion of the first dummy reinforcement member and the conductive via include the same material and are formed by the same patterning process. BRIEF DESCRIPTION OF THE DRAWINGS

[0025] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings of the embodiments will be briefly introduced below. Obviously, the drawings in the following description only relate to some embodiments of the present disclosure, rather than limiting the present disclosure.

[0026] Figure 1A A schematic cross-sectional view showing a package structure according to some embodiments of the present disclosure; Figure 1B A schematic top view showing a partial area where dummy pads are located in a circuit substrate of a package structure according to some embodiments of the present disclosure; Figure 1C A schematic top view of a portion of a circuit substrate where conductive pads are located is shown in a packaging structure according to some embodiments of the present disclosure.

[0027] Figure 2A A schematic cross-sectional view showing a package structure according to some embodiments of the present disclosure; Figure 2B A schematic top view of a package structure according to some embodiments of the present disclosure is shown.

[0028] Figure 3 Schematic cross-sectional views showing package structures according to other embodiments of the present disclosure.

[0029] Figures 4A to 4P Schematic cross-sectional views showing structures in various steps of a method for manufacturing a package structure according to some embodiments of the present disclosure.

[0030] Figure 5 Schematic cross-sectional views of package structures according to further embodiments of the present disclosure are shown.

[0031] Figure 6 Schematic cross-sectional views of package structures according to further embodiments of the present disclosure are shown. DETAILED DESCRIPTION

[0032] To make the purpose, technical solutions, and advantages of the embodiments of the present disclosure more clear, the technical solutions of the embodiments of the present disclosure will be clearly and completely described below in conjunction with the accompanying drawings of the embodiments of the present disclosure. Obviously, the described embodiments are part of the embodiments of the present disclosure, not all of the embodiments. Based on the described embodiments of the present disclosure, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present disclosure.

[0033] Unless otherwise defined, the technical or scientific terms used in this disclosure should have the usual meanings understood by persons of ordinary skill in the field to which this disclosure belongs. The words "first", "second" and similar terms used in this disclosure do not indicate any order, quantity or importance, but are only used to distinguish different components. Words such as "include" or "comprise" mean that the elements or objects preceding the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0034] Figure 1A A schematic cross-sectional view showing a package structure according to some embodiments of the present disclosure; Figure 1B A schematic top view showing a partial area where dummy pads are located in a circuit substrate of a package structure according to some embodiments of the present disclosure; Figure 1C A schematic top view of a portion of a circuit substrate where conductive pads are located is shown in a packaging structure according to some embodiments of the present disclosure.

[0035] refer to Figure 1A In some embodiments, the package structure 50 includes a circuit substrate 10 and a semiconductor structure S1. The semiconductor structure S1 has a conductive connector 12 and a dummy connector 13, and can be bonded to the circuit substrate 10 via the conductive connector 12 and the dummy connector 13. For example, the circuit substrate 10 can be a printed circuit board (PCB), and the semiconductor structure S1 can include a substrate 20 and a chip 30; the chip 30 is flip-chip mounted on the substrate 20 and electrically connected to the substrate 20; in some embodiments, a heat sink 40 can be further disposed on the chip 30 to facilitate heat dissipation of the chip 30. However, the present disclosure is not limited to this.

[0036] Conductive connectors 12 and dummy connectors 13 may be disposed between circuit substrate 10 and semiconductor structure S1 in a direction perpendicular to the main surface of circuit substrate 10. For example, semiconductor structure S1 may be electrically connected to circuit substrate 10 via multiple conductive connectors 12. Dummy connectors 13 may be located outside conductive connectors 12 and near an edge (e.g., a corner) of semiconductor structure S1 and may be electrically floating. Conductive connectors 12 and dummy connectors 13 may comprise the same or different materials, for example, both may be solder balls. For example, conductive connectors 12 and dummy connectors 13 may be BGA connectors.

[0037] refer to Figures 1A to 1C For example, the circuit substrate 10 includes an insulating structure 6 and a conductive circuit embedded in the insulating structure, such as a conductive line and / or a conductive through hole. The insulating structure may include a plurality of insulating layers stacked together. The circuit substrate 10 also includes a conductive pad 9a and a dummy pad 9b disposed on the insulating structure 6. The conductive pad 9a may be electrically connected to the conductive circuit embedded in the insulating structure. For example, Figure 1A and Figure 1C As shown, the conductive pad 9a can be connected to the conductive line 7 through the conductive through-hole 8; alternatively, the conductive pad 9a can be directly extended into the opening of the insulating structure to be electrically connected to the conductive line 7. The dummy pad 9b and the conductive pad 9a can be arranged side by side and spaced apart from each other, and the dummy pad 9b is electrically isolated from the conductive pad 9a and other conductive lines; for example, Figure 1A and Figure 1B As shown, no conductive member may be provided under the dummy pad 9b.

[0038] Conductive connector 12 is bonded to conductive pad 9a to provide electrical connection between semiconductor structure S1 and circuit substrate 10; dummy connector 13 is bonded to dummy pad 9b to connect and secure dummy connector 13 to circuit substrate 10. Solder resist layer 11 may be disposed on insulating structure 6 and located to the sides of conductive pad 9a and dummy pad 9b in a direction parallel to the main surface of circuit substrate 10, and may be spaced apart from conductive pad 9a and dummy pad 9b.

[0039] In the package structure 50, the dummy connector 13 serves as a support structure to provide support for the semiconductor structure S1 and protect the conductive connector 12 located therein. The provision of the dummy connector 13 improves the support performance for the semiconductor structure S1 and the structural strength of the package structure. Generally speaking, because the dummy connector 13 and the dummy pad 9b are electrically floating and not electrically connected to the conductive traces in the circuit substrate 10, the dummy pad 9b is typically only provided on the surface of the insulating structure 6 on the side closest to the semiconductor structure S1.

[0040] However, in some embodiments, the dummy connector 13 and the dummy pad 9b may be subjected to greater stress. For example, in a large-scale package structure, the dummy connector 13 near the corner of the semiconductor structure S1 may be subjected to greater stress from the semiconductor structure S1 and / or the circuit substrate 10. For example, the stress may include tensile stress, shear force, etc., and may be generated during the installation of the heat sink 40, the temperature cycle and other reliability tests, but the present disclosure is not limited to this. In the case where the dummy connector 13 is subjected to stress, the stress will also be transmitted to the dummy pad 9b connected to the dummy connector 13. In the circuit substrate 10 of this embodiment, since the dummy pad 9b is only provided on the surface of the insulating structure 6, the bonding strength between the dummy pad 9b and the structure below it (for example, the insulating structure) is relatively low. Therefore, when the dummy connector 13 and the dummy pad 9b are subjected to greater stress, cracks may be generated between the dummy pad 9b and the structure below it (for example, at the contact interface between the dummy pad 9b and the insulating structure 6), affecting the structural stability of the package structure and the reliability of the device.

[0041] To address the above technical issues, embodiments of the present disclosure provide a packaging structure and a manufacturing method thereof, the packaging structure comprising a circuit substrate and a semiconductor structure. The circuit substrate comprises an insulating structure, a conductive circuit, a first conductive pad, and a first dummy pad structure; the conductive circuit is embedded in the insulating structure, the first conductive pad is disposed on one side of the insulating structure and electrically connected to the conductive circuit; the first dummy pad structure is disposed on the one side of the insulating structure and extends into the insulating structure. The semiconductor structure is disposed on the circuit substrate and can be bonded to the conductive pad and the first dummy pad structure of the circuit substrate via conductive connectors and dummy connectors.

[0042] In the embodiments of the present disclosure, by providing a first dummy pad structure and a dummy connector, the support strength for the semiconductor structure can be increased, and the conductive connector can be protected, thereby improving the overall structural strength and device reliability of the package structure. Furthermore, the first dummy pad structure is formed to extend into the insulating structure of the circuit substrate, which can improve the bonding strength between the first dummy pad structure and the circuit substrate. This can prevent cracks from forming between the first dummy pad structure and an adjacent layer (e.g., the insulating structure) when the dummy connector and the first dummy pad structure are subjected to significant stress, thereby further improving the structural strength and device reliability of the package structure.

[0043] Figure 2A shows a schematic cross-sectional view of a package structure according to some embodiments of the present disclosure, Figure 2B A schematic top view of a package structure according to some embodiments of the present disclosure is shown.

[0044] refer to Figure 2AIn some embodiments, the packaging structure 500a includes a circuit substrate 150 and a semiconductor structure S1. The semiconductor structure S1 is disposed on the circuit substrate 150 and bonded to the circuit substrate 150. For example, the circuit substrate 150 may be a printed circuit board, such as a high-density interconnector (HDI) board. For example, the circuit substrate 150 may include an insulating structure 120, a conductive circuit embedded in the insulating structure 120, and a conductive pad P1 and a dummy pad structure 124 disposed on a side of the insulating structure 120 close to the semiconductor structure S1; the conductive pad P1 is electrically connected to the conductive circuit; the dummy pad structure 124 is disposed on a side of the insulating structure 120 close to the semiconductor structure S1 and extends into the insulating structure 120 and is electrically isolated from the conductive circuit. The semiconductor structure S1 may be bonded to the conductive pad 212 and the dummy pad structure 124 of the circuit substrate 150 through the conductive connector 212 and the dummy connector 213. In some embodiments, the conductive pad 212 and the dummy pad structure 124 may be referred to as a first conductive pad and a first dummy pad structure, respectively. In this document, a "dummy" component means that the component is electrically floating, that is, electrically isolated from other conductive circuits / electronic devices.

[0045] For example, the conductive connector 212 and the dummy connector 213 may be located between the circuit substrate 150 and the semiconductor structure S1 in a direction perpendicular to the main surface of the circuit substrate 150 (e.g., direction D1); the conductive connector 212 may provide an electrical connection between the semiconductor structure S1 and the circuit substrate 150; the dummy connector 213 and the dummy pad structure 124 are electrically floating, that is, electrically isolated from the circuit substrate 150 and the conductive circuits and / or devices in the semiconductor structure S1. The dummy connector 213 may serve as a supporting structure to provide support for the semiconductor structure S1. In addition, the dummy connector 213 may be arranged on the outside of the conductive connector 212, that is, on the side of the conductive connector 212 close to the edge (e.g., corner) of the semiconductor structure S1, thereby also providing protection for the conductive connector 212.

[0046] For example, if Figure 2BAs shown, from a top view, the semiconductor structure S1 may have a square planar shape, which may be a square or a rectangle. For example, the semiconductor structure S1 has sides a1, a2, b1, and b2; sides a1 and a2 extend parallel to each other along direction D2 and are opposite to each other in direction D3; sides b1 and b2 extend parallel to each other along direction D3 and are opposite to each other in direction D2; directions D2 and D3 are both parallel to the main surface of the circuit substrate 150 and may intersect with each other, for example, be substantially perpendicular to each other. Directions D2 and D3 may be referred to as horizontal directions; for example, direction D2 may be referred to as a first horizontal direction, and direction D3 may be referred to as a second horizontal direction. The semiconductor structure S1 has a plurality of corners C, each corner C being an internal angle formed by the intersection of adjacent sides among the plurality of sides a1, a2, b1, and b2 of the semiconductor structure S1.

[0047] In some embodiments, a plurality of conductive connectors 212 and dummy connectors 213 are arranged side by side in a horizontal direction parallel to the circuit substrate 150, for example, they may be arranged in an array including multiple rows and columns along directions D1 and D2. Figure 2B The plurality of small square regions in the figure each represent the region where the plurality of conductive connectors 212 and the plurality of dummy connectors 213 are located. For the sake of simplicity of the diagram, the plurality of small square regions are shown as being adjacent to and in contact with each other, but this does not mean that the plurality of conductive connectors and the dummy connectors are in contact with each other. In fact, the plurality of conductive connectors and the dummy connectors may be located in the corresponding square regions but spaced apart from each other in the horizontal direction (e.g., Figure 2A The conductive connector and the dummy connector may have a planar shape in a top view that is circular, elliptical, or similar, and the present disclosure is not limited thereto.

[0048] In some embodiments, the dummy connectors 213 are closer to the corners of the semiconductor structure S1 than the conductive connectors 212. For example, the dummy connectors 213 are disposed in regions near multiple corners C of the semiconductor structure S1, that is, each of the multiple dummy connectors 213 is located on a side of the multiple conductive connectors 212 near the multiple corners C. For example, one or more dummy connectors 213 are disposed in a region near each corner C, and for each corner C, in the same horizontal direction parallel to the main surface of the circuit substrate 150, the distance between the corner C and any conductive connector 212 is smaller than the distance between the corner C and the corresponding dummy connector 213.

[0049] For example, the plurality of conductive connectors 212 and dummy connectors 213 may be arranged into a plurality of connector rows and a plurality of connector columns, each connector row including a plurality of conductive connectors 212 and / or dummy connectors 213 arranged along a direction D2; and each connector column including a plurality of conductive connectors 212 and / or dummy connectors 213 arranged along a direction D3. Directions D2 and D3 may be referred to as the row direction and column direction of the connectors, respectively. The plurality of connector rows may include one or more end connector rows near a side or edge of the semiconductor structure S1, and the plurality of connector columns may include one or more end connector columns near a side or edge of the semiconductor structure S1. Dummy connectors may be provided in the end connector rows and end connector columns at locations near corners of the semiconductor structure; for example, the connectors at opposite ends of each end connector row in direction D2 may be dummy connectors, and the connectors at opposite ends of each end connector column in direction D3 may be dummy connectors. The connector rows and connector columns in the plurality of connector rows and connector columns that are away from corresponding sides or edges of the semiconductor structure (ie, away from corners of the semiconductor structure) may include only conductive connectors without dummy connectors.

[0050] For example, the plurality of connector rows include one or more connector rows r1 near side a1 extending in the row direction (e.g., direction D2) of the semiconductor structure S1, one or more connector rows r1 near side a2 extending in the row direction, and one or more connector rows r2 away from sides a1 and a2 (i.e., located in the central region of the semiconductor structure). The plurality of connector columns include one or more connector columns c1 near side b1 extending in the column direction (e.g., direction D3) of the semiconductor structure S2, one or more connector columns c1 near side b2 extending in the column direction, and one or more connector columns c2 away from sides b1 and b2. Connector rows r1 and connector columns c1 are end connector rows and end connector columns. Each end connector row r1 includes (e.g., two) dummy connectors 213 disposed at opposite ends of the row in direction D2 and a conductive connector 212 disposed between the dummy connectors 213 in direction D2. Each end connector column c1 includes (for example, two) dummy connectors 213 disposed at opposite ends of the column in the direction D3 and a conductive connector 212 disposed between the dummy connectors 213 in the direction D3 .

[0051] During the formation, operation and testing of the packaging structure (for example, during the installation of a heat sink or during reliability testing such as temperature cycling), among the connectors between the semiconductor structure S1 and the circuit substrate 150, the stress (for example, from the semiconductor structure S1 and / or the circuit substrate 150) to which the connectors in the area near the corner C of the semiconductor structure S1 are subjected is generally greater. The stress may include tensile stress, shear force, etc. For example, the stress at the position of the dummy connector 213 near the corner C of the semiconductor structure S1 may be greater than the stress at the position of the conductive connector 212 away from the corner of the semiconductor structure S1. In an embodiment of the present disclosure, the dummy connector 213 is disposed at a position close to the corner of the semiconductor structure, so that the conductive connectors 212 can all be disposed at positions away from the corners, thereby ensuring the support strength of the semiconductor structure S1 while protecting the conductive connectors 212 from being affected by the greater stress due to being disposed at the corners and affecting their electrical characteristics and other performance. That is to say, setting up dummy connectors 213 in those areas close to the corners C, and setting up the conductive connectors 212 in areas away from the corners can help improve the support strength of the semiconductor structure S1 and improve the overall structural strength and stability of the packaging structure. At the same time, it can avoid the conductive connectors from being subjected to greater stress and having adverse effects on their electrical properties and other performance, thereby improving the electrical device reliability of the packaging structure.

[0052] In some embodiments, one or more dummy connectors 213 may be provided at at least one corner (e.g., each corner) near a plurality of corners C, for example, two dummy connectors 213 may be provided corresponding to one corner C. For example, the center of each of the two dummy connectors 213 may be offset from the diagonal line connecting the corner C to which it is close and the other corner C, and at least a portion of each of the two dummy connectors 213 may be provided on opposite sides of the diagonal line. In some embodiments, providing a plurality of (e.g., two) dummy connectors 213 in an area near a corner C, and / or offsetting the plurality of dummy connectors 213 from the diagonal line connecting the corner C, may be beneficial for dispersing the stress near the corner area, so that the stress borne by a single dummy connector 213 is relatively small, thereby further improving the supporting performance of the dummy connector as a whole and improving the device reliability of the packaging structure. However, the present disclosure is not limited thereto. The position, quantity, etc. of the dummy connectors 213 provided near each corner may be provided and adjusted accordingly according to actual product needs.

[0053] refer to Figure 2AIn some embodiments, conductive pad P1 of circuit substrate 150 may be electrically connected to conductive via V1 or V2, and further electrically connected to the conductive circuit in circuit substrate 150 through the conductive via. Herein, a conductive via may be or include a blind via located on the surface of the circuit substrate but not penetrating the entire circuit substrate, a through via that penetrates the entire circuit substrate, or a buried via located on an inner layer of the circuit substrate but not penetrating the entire circuit substrate. For example, conductive via V1 may be a blind via, while conductive via V2 may be a through via.

[0054] In some embodiments, the dummy pad structure 124 includes a dummy pad DP and a dummy reinforcement member RC connected to each other. The dummy pad DP is disposed on the surface of the insulating structure 120 on a side adjacent to the semiconductor structure S1; the dummy reinforcement member RC is embedded in and surrounded by the insulating structure 120. The dummy pad DP and the dummy reinforcement member RC may also be referred to as a first dummy pad and a first dummy reinforcement member. The dummy pad DP is bonded to and in direct contact with the dummy connector 213. The dummy reinforcement member RC is connected to the dummy pad DP and is configured to enhance the structural strength of the dummy pad structure 124 and its bonding strength with adjacent material layers. In some embodiments, the dummy pad structure 124 may comprise a metal material and may be the same or different material as the conductive pad P1 and the conductive vias V1 and V2. In some embodiments, at least a portion of the dummy pad DP and at least a portion of the dummy reinforcement member RC are integrally formed, and there may be no visible interface between the two, but the present disclosure is not limited thereto. The contact area between the dummy pad structure and the insulating structure can be increased by providing the dummy reinforcement component, and the dummy reinforcement component is embedded in the insulating structure and surrounded by the insulating structure, which can improve the overall bonding strength between the dummy pad structure and the insulating structure.

[0055] For example, the dummy reinforcement member RC may include a dummy through-hole DV, which is connected to the dummy pad DP and may be located on a side of the dummy pad DP away from the dummy connector 213, extending from the surface of the dummy pad DP on the side away from the dummy connector 213 to the insulating structure 120 within the circuit substrate 150. For example, the dummy through-hole DV may be a blind hole, but the present disclosure is not limited to this. In some embodiments, the dummy pad DP and the dummy through-hole DV may include similar, but identical or different, materials, such as the same or different metal materials. For example, at least a portion of the dummy pad DP may be integrally formed with the dummy through-hole DV, or the dummy pad DP and the dummy through-hole DV may be separately formed and connected to and in direct contact with each other. The dummy through-hole DV may include the same material as one or more of the conductive vias V1 and V2, and may be formed, for example, by the same patterning process. The width of the dummy through hole RC in a direction parallel to the main surface of the circuit substrate 150 (eg, direction D2 ) is smaller than the width of the dummy pad DP in the direction.

[0056] In some embodiments, circuit substrate 150 further includes protective layers 125 and 127, disposed on opposite sides of insulation structure 120 in direction D1. For example, protective layer 125 is disposed on the side of insulation structure 120 closer to semiconductor structure S1, while protective layer 127 is disposed on the side of insulation structure 120 farther from semiconductor structure S1. Insulation structure 120 may be a single-layer or multi-layer structure. For example, insulation structure 120 may be a multi-layer structure and may include insulation layers 100, 105, 107, 115, and 117. Insulation layer 100 may be located at or near the center of circuit substrate 150 in direction D1 perpendicular to the main surface of circuit substrate 150. Insulation layers 105 and 107 are located on opposite sides of insulation layer 100 in direction D1. Insulation layers 115 and 117 are located on the sides of insulation layers 105 and 107, respectively, farther from insulation layer 100 in direction D1. It should be understood that the number of insulating layers included in the insulating structure 120 shown in the figure is for illustration only and is not intended to limit the present disclosure. In some embodiments, insulating layers 115 and 117 are the outermost insulating layers of the insulating structure 120 located on the circuit substrate 150, i.e., the insulating layers closest to or in direct contact with the protective layer 125.

[0057] In some embodiments, the conductive circuitry of circuit substrate 150 may include interconnected conductive wires and conductive vias. For example, the conductive circuitry may include multiple layers of conductive wires M1a, M1b, M2a, and M2b, as well as one or more conductive vias V0. Conductive wires M1a and M1b may be located on opposite surfaces of insulation layer 100 in direction D1 and covered by insulation layers 105 and 107, respectively. Conductive wires M2a and M2b may be located on surfaces of insulation layers 105 and 107, respectively, away from insulation layer 100, in direction D1, and covered by insulation layers 115 and 117, respectively. In some embodiments, insulation layer 100 and the conductive wires on both sides thereof may be referred to as the core layer of circuit substrate 150.

[0058] The conductive via V0 may be a buried via embedded in the insulating structure 120, for example, extending through the insulating layers 105, 100 and 107, and may be electrically connected to the multi-layer conductive wires M1a, M1b, M2a, and M2b, so that the multi-layer conductive wires M1a, M1b, M2a, and M2b can be electrically connected to each other through one or more conductive vias V0. In some embodiments, the conductive via V0 may include a via body 110 and a conductive liner 111 surrounding the via body 110; the via body 110 may include a non-conductive material (e.g., an insulating material), for example, the via body 110 may include a resin material, but the present disclosure is not limited thereto. In other embodiments, the via body 110 may also include a conductive material. The conductive liner 111 surrounds and covers the sidewalls of the via body 110 and is connected to the conductive wires M1a, M1b, M2a, and M2b.

[0059] In some embodiments, conductive vias V1 and V2 each connect conductive pad P1 to a corresponding conductive line and / or conductive via V0. For example, conductive via V1 is embedded in insulating layer 115 and extends through insulating layer 115 to connect conductive pad P1 to conductive line M2a. Conductive via V2 may extend through the entire circuit substrate 150, for example, through all insulating layers 100, 105, 107, 115, and 117 of insulating structure 120, and may extend through one or more of the multiple layers of conductive lines M1a, M1b, M2a, and M2b to electrically connect to these conductive lines. That is, conductive pad P1 may be electrically connected to one or more of the conductive lines M1a, M1b, M2a, and M2b via conductive via V2. In some embodiments, dummy via DV is located to the sides of conductive vias V1 and V2 in a direction parallel to the main surface of circuit substrate 150 and is spaced a certain distance away from conductive vias V1 and V2. The dummy via DV is electrically floating, that is, electrically isolated from the conductive circuit in the circuit substrate.

[0060] In some embodiments, protective layers 125 and 127 cover the surface of the insulating structure 120 and / or the conductive traces; for example, protective layers 125 and 127 may include solder masks. Protective layer 125 is located on a side of the outermost insulating layer (e.g., insulating layer 115) in the insulating structure 120 that is closer to the semiconductor structure S1, while protective layer 127 is located on a side of the outermost insulating layer (e.g., insulating layer 117) on the other side of the insulating structure 120 that is farther from the semiconductor structure S1.

[0061] For example, on a side of circuit substrate 150 near semiconductor structure S1, conductive pad P1 and dummy pad DP are located on the surface of insulating layer 115 near semiconductor structure S1 and protrude from the surface of insulating layer 115 toward semiconductor structure S1 in direction D1. Protective layer 125 may be located on the sides of conductive pad P1 and dummy pad structure 124 (e.g., dummy pad DP thereof) in a direction parallel to the main surface of circuit substrate 150 (e.g., a horizontal direction including D2), and may be spaced apart from conductive pad P1 and at least partially from the sidewalls of dummy pad structure 124. For example, protective layer 125 may be completely spaced apart from dummy pad structure 124 and may not contact the sidewalls of dummy pad structure 124 (e.g., the sidewalls of the dummy pad). For example, the protective layer 125 has multiple openings, and the conductive pad P1 and at least part of the dummy pad structure 124 (for example, the dummy pad DP) are each located in the corresponding opening of the protective layer 125, and the respective dimensions of the conductive pad P1 and the dummy pad DP (for example, the width, area, etc. in the horizontal direction) are smaller than the dimensions of the corresponding openings, so that the conductive pad P1 and the dummy pad DP are separated from the protective layer 125.

[0062] In some embodiments, the conductive connector 212 at least covers and contacts the surface of the conductive pad P1 on the side adjacent to the semiconductor structure S1; the dummy connector 213 at least covers and contacts the surface of the dummy pad DP on the side adjacent to the semiconductor structure S1. In this embodiment, since the conductive pad P1 and the dummy pad DP are respectively disposed in the opening of the protective layer 125 and spaced apart from the protective layer 125, the conductive connectors 212 and 213 can be facilitated to join with the corresponding pads. For example, the conductive connector 212 can further extend into the opening of the protective layer 125 to cover and contact the sidewalls of the conductive pad P1; the dummy connector 213 can further extend into the opening of the protective layer 125 to cover and contact the sidewalls of at least a portion of the dummy pad structure 124 (e.g., the dummy pad DP), and can, for example, completely cover the sidewalls of the dummy pad DP. However, the present disclosure is not limited to this.

[0063] In some embodiments, in the dummy pad structure 124, the dummy pad DP is located on the surface of the insulating layer 115 near the semiconductor structure S1 and protrudes from the surface of the insulating layer 115. The dummy reinforcement structure RC (e.g., dummy via RC) may be embedded in one or more insulating layers of the insulating structure 120. The sidewalls and / or the surface of the dummy reinforcement structure RC away from the dummy pad DP may be covered by the insulating structure 120 and directly contact the insulating structure 120. For example, the dummy via RC may be embedded in the outermost insulating layer 115 of the insulating structure 120 near the semiconductor structure S1, but the present disclosure is not limited thereto.

[0064] In some embodiments, for both the dummy via RC and the conductive via V1 embedded in the insulating layer 115, the height h1 of the dummy via RC in a direction D1 perpendicular to the main surface of the circuit substrate 150 may be greater than the height h2 of the conductive via V1 in the direction D1. For example, the dummy via RC may extend in the direction D1 from the surface of the insulating layer 115 near the semiconductor structure S1 to the surface of the insulating layer 105 near the insulating layer 115, and the height h1 of the dummy via RC may be substantially equal to the thickness of the insulating layer 115. The conductive via V1 may extend in the direction D1 from the surface of the insulating layer 115 near the semiconductor structure S1 to the surface of the conductive line M2a away from the insulating layer 105, and the height h2 of the conductive via V1 is less than the thickness of the insulating layer 115.

[0065] It should be understood that the height of the dummy via RC shown in the figures is for illustration only and the present disclosure is not limited thereto. For example, in other embodiments, the height h1 of the dummy via RC may be less than or greater than the thickness of the insulating layer 115. For example, the dummy via RC may further extend into one or more of the other insulating layers 105, 100, 107, and 117 of the insulating structure 120. In some examples, the dummy via RC may extend throughout the entire insulating structure 120, i.e., through all insulating layers, from a first surface of the insulating structure 120 proximate to the semiconductor structure S1 to a second surface of the insulating structure 120 distal from the semiconductor structure S2. The first and second surfaces are opposite to each other in a direction D1 and are, for example, a surface of the insulating layer 115 proximate to the semiconductor structure S2 and a surface of the insulating layer 117 distal from the semiconductor structure S2, respectively. In this example, the surface of the dummy via RC distal from the dummy pad DP may be covered by the protective layer 127, or may be exposed by the protective layer 127.

[0066] Continue to refer Figure 2AIn some embodiments, the circuit substrate 150 may also have one or more conductive pads on the side away from the semiconductor structure S1, and the conductive pads may be electrically connected to the corresponding conductive wires through conductive through-holes such as through-holes and blind holes. The figure schematically shows a conductive pad P3 located on the side of the circuit substrate 150 away from the semiconductor structure S1 and electrically connected to the conductive through-hole V2, but the present disclosure is not limited to this. In some embodiments, the conductive pad (for example, the conductive pad P3) located on the side of the circuit substrate 150 away from the semiconductor structure S1 may be located in the opening of the protective layer 127 and exposed, and may be used, for example, for electrical connection with other electronic components, or may be used as an electrical test point for electrical testing of the circuit substrate and the packaging structure, but the present disclosure is not limited to this. In other examples, the conductive pad P3 may also be completely covered by the protective layer 127 and not exposed.

[0067] In some embodiments, the semiconductor structure S1 may be or include any type of semiconductor device, such as a chip or a semiconductor package structure. For example, the semiconductor structure S1 may be a flip chip ball grid array (FCBGA) package structure and may include a package substrate 200, a chip 300, a conductive connector 212, and a dummy connector 213. The chip 300 may be flip-chip mounted on the package substrate 200 and electrically connected to the package substrate 200. The package substrate 200 may be located between the chip 300 and the circuit substrate 150 in the direction D1; the conductive connector 212 and the dummy connector 213 may be disposed on a side of the package substrate 200 away from the chip 300, wherein the conductive connector 212 may be electrically connected to the chip 300 through the package substrate 200. For example, the conductive connector 212 and the dummy connector 213 may be BGA connectors, but the present disclosure is not limited thereto. In this embodiment, the conductive connector 212 and the dummy connector 213 may be included as a part of the semiconductor structure S1, connected to the circuit substrate 150 as external connection points of the semiconductor structure S1, and arranged between the circuit substrate 150 and the packaging substrate 200 of the semiconductor structure S1, but the present disclosure is not limited to this.

[0068] For example, the chip 300 may be an integrated circuit chip, such as a system on chip (SOC) or any other type of chip. The type of chip 300 may be selected according to actual product requirements, and the present disclosure does not limit it. For example, the chip 300 may include a substrate, a device layer, and a conductive bump 301; the substrate may be or include a semiconductor substrate such as a silicon substrate; the device layer is disposed on one side of the substrate and may include active devices (e.g., transistors), passive devices (e.g., capacitors), or a combination thereof, and an interconnect structure, and the various devices may be connected to each other through the interconnect structure; the conductive bump 301 is located on a side of the device layer away from the substrate and may be electrically connected to various devices on the substrate through the interconnect structure; the conductive bump 301 may serve as an external connection point of the chip 300. For example, the chip 300 is flip-chip disposed on the package substrate 200 so that the side thereof having the conductive bump 301 faces the package substrate 200 and may be electrically connected to the package substrate 200 through the conductive bump 301.

[0069] The package substrate 200 may include conductive circuits (e.g., conductive lines and / or conductive vias) and pads disposed on opposite sides thereof in a direction D1 perpendicular to the main surface of the circuit substrate. For example, the conductive bumps 301 of the chip 300 may engage and electrically connect to conductive pads (not shown) on a side of the package substrate 200 proximal to the chip, and may be electrically connected to the conductive circuits in the package substrate 200 through the conductive pads.

[0070] The packaging substrate 200 may include a plurality of conductive pads 201 and a dummy pad structure 204 on a side away from the chip 300 and close to the circuit substrate 150. The dummy pad structure 204 may include a dummy pad 202. A conductive connector 212 is disposed on the conductive pad 201 and electrically connected to the conductive pad 201, thereby being electrically connected to the conductive circuit in the packaging substrate 200 through the conductive pad 201, and further electrically connected to the chip 300; a dummy connector 213 is disposed on the dummy pad 202, and the dummy pad 202 is electrically floating, that is, electrically isolated from the other conductive pads 201 and conductive circuits in the packaging substrate 200. In other words, the dummy pad 202, the dummy connector 213, and the dummy pad structure 124 are all electrically floating and electrically isolated from the semiconductor structure S1 and the conductive circuits and devices in the circuit substrate 150. In some embodiments, the dummy pad structure 124 of the circuit substrate 150 and the dummy pad structure 204 of the semiconductor structure S1 may be referred to as a first dummy pad structure and a second dummy pad structure, respectively.

[0071] For example, the conductive pad 201 of the semiconductor structure S1 and the conductive pad P1 of the circuit substrate 150 are arranged relative to and corresponding to each other (for example, one-to-one correspondence), and are electrically connected through a conductive connector 212 located therebetween; the dummy pad structure 204 (for example, dummy pad 202) of the semiconductor structure S1 and the dummy pad structure 124 of the circuit substrate 150 are arranged relative to and corresponding to each other (for example, one-to-one correspondence), and are connected to each other through a dummy connector 213 located therebetween.

[0072] In some embodiments, the package substrate 200 further includes a protective layer 205 disposed on the surface of the package substrate 200 on the side adjacent to the circuit substrate 150. The protective layer 205 may cover portions of the surfaces of the conductive pads 201 and the dummy pads 202, for example, the sidewalls of the conductive pads 201 and the dummy pads 202 and portions of their surfaces on the side away from the chip 300 and adjacent to the circuit substrate 150, while exposing another portion of the surfaces of the conductive pads 201 and the dummy pads 202 on the side away from the chip 300. For example, the protective layer 205 may have a plurality of openings, each of which exposes a portion of the surface of one of the plurality of conductive pads 201 and the dummy pads 202 on the side away from the chip 300. The size of each opening (e.g., horizontal width, area, etc.) may be smaller than the size of the corresponding pad. The conductive connectors 212 and the dummy connectors 213 are inserted into the openings to connect to the corresponding pads. For example, the edge portions of the conductive pad 201 and the dummy pad 202 are covered by the protective layer 205, while the center portions are connected to the corresponding connectors. In some embodiments, the protective layer 125 of the circuit substrate 150 and the protective layer 205 of the semiconductor structure S1 can be referred to as the first protective layer and the second protective layer, respectively.

[0073] In this embodiment, the dummy reinforcement member 204 may only include a dummy pad 202, and the corners of the semiconductor structure S1 correspond to the corners of the packaging substrate 200. When there is a large stress at the position close to the corner of the packaging substrate 200, since the edge portion of the dummy pad 202 is covered by the protective layer 205, cracks can also be avoided at the dummy pad 202 (for example, between the dummy pad 202 and the material layer located on the side close to the chip).

[0074] In some embodiments, the semiconductor structure S1 may further include an underfill layer 302 . The underfill layer 302 is disposed between the chip 300 and the package substrate 200 to fill the space therebetween and surround and protect the conductive bumps 301 .

[0075] In some embodiments, the heat dissipation member 400 is disposed on a side of the semiconductor structure S1 away from the circuit substrate 150 and is attached to the semiconductor structure S1. For example, the heat dissipation member 400 may be disposed on the chip 300 to facilitate heat dissipation of the chip 300. For example, the heat dissipation member 400 may be mounted on the package substrate 200 or the circuit substrate 150 and attached to the surface of the chip 300 away from the package substrate 200.

[0076] It should be understood that this embodiment uses the semiconductor structure S1 as an FCBGA package for illustration, but the present disclosure is not limited thereto. In other embodiments, the semiconductor structure S1 may also be other types of packaging structures, such as a chip-on-wafer-on-substrate (CoWoS) package. The conductive connector 212 may also be a type of connector other than a BGA connector, and the present disclosure does not limit the types of the semiconductor structure S1 and its connectors.

[0077] Figure 3 A schematic cross-sectional view of a package structure 500b according to other embodiments of the present disclosure is shown. Package structure 500b is similar to package structure 500a, except that, in package structure 500b, the dummy reinforcement member RC further includes a dummy line DL. The differences between the two will be described in detail below, and other features of package structure 500b that are common to package structure 500a will not be repeated.

[0078] refer to Figure 3 In some embodiments, the dummy pad structure 124 includes a dummy pad DP and a dummy reinforcement member RC. The dummy pad DP is located on the surface of the insulating structure 120 on a side close to the semiconductor structure S1, and the dummy reinforcement member RC may include a dummy via DV and a dummy line DL embedded in the insulating structure 120. For example, the dummy via DV is connected to the dummy line DL and the dummy pad DP, and is located between the dummy pad DP and the dummy line DL in a direction D1 perpendicular to the main surface of the circuit substrate 150. The dummy line DL can be arranged in the same layer as any layer of conductive lines in the conductive circuit of the circuit substrate 150, for example, it can be arranged in the same layer as the conductive line M2a, and is spaced apart from and electrically isolated from the conductive line M2a. In this article, two components "arranged in the same layer" means that the two components are formed from the same conductive material layer through the same patterning process, or the two components are embedded in the same insulating layer, or are located on the same surface of the same insulating layer. The dummy line DL is also electrically floating, that is, it is electrically isolated from other conductive lines in the circuit substrate 150 .

[0079] In some embodiments, the width of the dummy line DL may be greater than the width of the dummy via DV, the width of the dummy pad DP may be greater than the width of the dummy via DV, and the width of the dummy line DL may be greater than, less than, or substantially equal to the width of the dummy pad DP. Here, the widths of the dummy line DL, dummy via DV, and dummy pad DP all refer to their widths in a direction parallel to the main surface of the circuit substrate 150 (e.g., direction D2). In this embodiment, the contact area between the dummy pad structure 124 and the insulating structure 120 can be further increased by making the dummy reinforcement member RC also include a dummy line DL. Moreover, the width of the dummy line DL is set to be greater than the width of the dummy through hole DV, so that part of the surface of the dummy line DL close to the dummy connector 213 can be covered by the insulating structure. Such a setting can further improve the structural strength of the dummy pad structure 124 and the bonding strength between the dummy pad structure 124 and the insulating structure of the circuit substrate, thereby avoiding the occurrence of cracks between the dummy connection member 124 (for example, its dummy pad DP) and other material layers of the circuit substrate (for example, the insulating structure 120) when the dummy connector 213 is subjected to greater stress, thereby further improving the reliability of the device.

[0080] refer to Figure 2A and Figure 3 In some embodiments, the dummy pads DP and / or dummy reinforcement members RC (e.g., dummy vias DV and / or dummy lines DL) of the dummy pad structure 124 may not overlap with other conductive traces in the circuit substrate 150 in a direction D1 perpendicular to the main surface of the circuit substrate 150, or the overlapping area between the dummy reinforcement member 124 and the conductive traces in the adjacent layer may be smaller than the overlapping area between the conductive traces / vias in the same layer as the dummy lines DL and the conductive traces in the adjacent layer. For example, the dummy vias DV and / or dummy lines DL may not overlap with the conductive traces and / or conductive vias in the circuit substrate in direction D1, or the dummy vias DV and / or dummy lines DL may overlap with the conductive traces and / or conductive vias in the circuit substrate in direction D1, but the overlapping area is very small.

[0081] For example, conductive lines M1a and M2a are located in different (e.g., adjacent) insulating layers. When dummy line DL and conductive line M2a are located in the same layer, the overlapping area between dummy line DL and conductive line M1a in direction D1 is smaller than the overlapping area between conductive line M2a and conductive line M1a. For example, the overlapping area between dummy line DL and conductive line M1a can be zero, that is, dummy line DL may not overlap with conductive line M1a. In some embodiments, by setting the overlapping area between dummy pad structure 124 and adjacent conductive lines to be small or zero, the possibility of parasitic capacitance between dummy pad structure 124 and adjacent conductive lines can be avoided or reduced, thereby improving device reliability. It should be noted that in this article, the overlap of two components (e.g., the first component and the second component) in a direction perpendicular to the main surface of the circuit substrate (e.g., direction D1) means that the orthographic projections of the two components on the main surface of the circuit substrate coincide with each other, and the overlapping area of ​​the two components in the said direction refers to the area of ​​the portion where the orthographic projections of the first component and the second component on the main surface of the circuit substrate (e.g., the surface extending in the horizontal direction) coincide with each other; if the two do not overlap, the overlapping area is zero.

[0082] An embodiment of the present disclosure provides a method for manufacturing a packaging structure, comprising forming a circuit substrate through the following processes: forming an insulating structure and a conductive circuit, wherein the conductive circuit is embedded in the insulating structure; forming a first conductive pad on one side of the insulating structure, wherein the first conductive pad is electrically connected to the conductive circuit through a conductive through-hole; and forming a first dummy pad structure, wherein the first dummy pad structure is arranged on the one side of the insulating structure and extends into the insulating structure; the manufacturing method further comprises: providing a semiconductor structure, and joining the semiconductor structure to the circuit substrate, wherein the semiconductor structure has a conductive connector and a dummy connector, and joining the semiconductor structure to the circuit substrate comprises joining the conductive connector and the dummy connector to the first conductive pad and the first dummy pad structure of the circuit substrate, respectively.

[0083] In some embodiments, forming the first dummy pad structure includes: forming a first dummy reinforcement member in the insulating structure; and forming a first dummy pad on a side of the first dummy reinforcement member and the insulating structure that is adjacent to the semiconductor structure, wherein the first dummy pad and the first dummy reinforcement member are connected to each other. In some embodiments, at least a portion of the first dummy reinforcement member may comprise the same material as the conductive via and be formed using the same patterning process.

[0084] For example, Figures 4A to 4P A schematic cross-sectional view showing the structure of each process step in the method for manufacturing the package structure according to some embodiments of the present disclosure, wherein 4A to 4OThe process steps of a method for manufacturing a circuit substrate according to some embodiments of the present disclosure are shown.

[0085] refer to Figure 4A In some embodiments, conductive layers 101 and 102 are formed on opposite sides of insulating layer 100. Insulating layer 100 may include insulating materials such as fiberglass, resin, or FR4. Conductive layers 101 and 102 may include conductive materials, such as metal materials such as copper, such as copper foil. For example, conductive layer 101, insulating layer 100, and conductive layer 102 may be laminated together through a lamination process. For example, insulating layer 100 and conductive layers 101 and 102 may be copper clad laminates (CCLs), which may be used to form the core layer of a circuit substrate.

[0086] refer to Figure 4A and Figure 4B Conductive layers 101 and 102 are patterned to form conductive lines M1a and M1b. The patterning process may include photolithography and etching. For example, a patterned photoresist may be formed on the sides of conductive layers 101 and 102 facing away from insulating layer 100. Then, conductive layers 101 and 102 are etched using the patterned photoresist as an etching mask to remove portions of conductive layers 101 and 102. The remaining portions of conductive layers 101 and 102 form conductive lines M1a and M1b.

[0087] refer to Figure 4B and Figure 4C In some embodiments, insulating layer 105 and conductive layer 106, as well as insulating layer 107 and conductive layer 108, are formed on opposite sides of insulating layer 100, respectively. For example, insulating layer 105 is formed on one side of insulating layer 100 and covers the sidewalls of conductive wire M1a and its surface away from insulating layer 100; conductive layer 106 is formed on the side of insulating layer 105 away from insulating layer 100. Insulating layer 107 is formed on the side of insulating layer 100 opposite to insulating layer 105 and covers the sidewalls of conductive wire M1b and its surface away from insulating layer 100; conductive layer 108 is located on the side of insulating layer 107 away from insulating layer 100. In some embodiments, insulating layers 105 and 107 may include an insulating material such as resin, for example, prepreg; conductive layers 106 and 108 may include a conductive material, for example, a metal material such as copper, for example, copper foil. For example, the insulating layers 105 and 107 and the conductive layers 106 and 108 may be formed using a lamination process or the like.

[0088] refer to Figure 4C and Figure 4D ,right Figure 4CThe structure shown is subjected to a drilling process to form one or more openings 109 in the structure, which may also be referred to as via holes. In some embodiments, the openings 109 extend through the Figure 4C The structure shown in FIG. 1 extends from the surface of conductive layer 106 on the side remote from insulating layer 105, through conductive layer 106, insulating layers 105, 100, 107, and conductive layer 108, and extends to the surface of conductive layer 108 on the side remote from insulating layer 107. In some embodiments, opening 109 further extends through conductive lines M1a and / or M1b, so that sidewalls of conductive lines M1a and / or M1b are exposed in opening 109.

[0089] refer to Figure 4E , a conductive layer 111 is formed on the conductive layers 106 and 108 and in the opening 109. For example, the conductive layer 111 may be formed on a side of the conductive layer 106 away from the insulating layer 105 and a side of the conductive layer 108 away from the insulating layer 107, and line the surface of the opening 109 to cover the insulating layers 105, 100, 107 and the sidewalls of the conductive lines M1a and M1b exposed to the opening 109, and may be electrically connected to the conductive lines M1a and M1b. In some embodiments, the conductive layer 111 may include a conductive material, for example, a metal material such as copper, and may be formed by a plating process such as electroplating. For example, in the electroplating (e.g., copper plating) process for forming the conductive layer 111, the conductive layer 106 may serve as a seed layer. In some embodiments, before forming the conductive layer 111, a seed layer (not shown) may be further formed on the sidewall surface of the opening 109. The seed layer may be formed, for example, by a plating process such as chemical plating.

[0090] For example, before forming the conductive layer 111, the surface of the metal to be plated in the opening 109 and the conductive layer 106 / 108 may be pretreated. The pretreatment may include, for example, deburring, a cleaning process (for example, double water washing), micro-etching chemical roughening, colloidal palladium activation treatment, degumming treatment, copper deposition, acid immersion and drying, etc., wherein the copper deposition can be used to form a seed layer on the side wall surface of the opening 109 for the subsequent electroplating process.

[0091] refer to Figure 4F , insulating material 110' is filled into opening 109, so that insulating material 110' fills the space in opening 109 not filled by conductive layer 111. In some embodiments, insulating material 110' may include a resin material; for example, a resin plugging process may be used to plug opening 109 with resin before lamination; thereafter, the resin material is subjected to a curing process, for example, such a curing process may include converting the resin material from a two-dimensional linear structure to a three-dimensional insoluble and infusible network structure under conditions such as light or heat.

[0092] refer to Figures 4F to 4G , a grinding process is performed to remove excess insulating material (e.g., resin material) 110'. For example, a non-woven cloth grinder or a belt grinder can be used to remove excess resin material on the board surface (e.g., resin material outside the opening), and the portion of the resin material protruding from the conductive layer 111 can be removed. In some embodiments, the surface roughness of the conductive layer 111 is ensured during the grinding process to avoid problems such as scratches and scrapes. In some embodiments, after the grinding process is performed, the relative surfaces of the insulating material 110' in the vertical direction (e.g., the direction perpendicular to the main surface of the insulating layer 100) can be flush in the horizontal direction with the relative surfaces of the conductive layer 111 that are away from the multiple insulating layers in the vertical direction.

[0093] refer to Figure 4G and Figure 4H In some embodiments, the conductive layer 111 may be thinned to adjust its thickness. In examples where the conductive layer 111 comprises copper, the thinning process may be referred to as a copper reduction process. For example, the thinning process may include acid washing, deionized water washing, and alkaline washing of the conductive layer. After the thinning process, the insulating material 110' may protrude vertically from the surface of the conductive layer 111.

[0094] refer to Figures 4H to 4I The portion of insulating material 110' protruding from conductive layer 111 is removed, and the remaining insulating material serves as insulating body 110 for subsequent through-hole formation. For example, insulating material 110' may comprise a resin material, and the portion protruding from conductive layer 111 may be referred to as excess glue. In other words, excess glue is removed in this step. For example, excess glue removal may include micro-etching, water washing, drying, expansion treatment, glue removal, neutralization, and drying, but the present disclosure is not limited thereto.

[0095] refer to Figures 4I to 4J , a patterning process is performed on the conductive layers 111 and 106 to remove portions of the conductive layers 106 and 111 located on the side of the insulating layer 105 away from the insulating layer 100 and portions of the conductive layers 108 and 111 located on the side of the insulating layer 107 away from the insulating layer 100. Figure 4JAs shown, after the patterning process, the conductive layer 106 and the conductive layer 111 remaining on the side of the insulating layer 105 away from the insulating layer 100 constitute the conductive line M2a; the conductive layer 108 and the conductive layer 111 remaining on the side of the insulating layer 107 away from the insulating layer 100 constitute the conductive line M2b; and the insulating body 110 and the portion of the conductive layer 111 surrounding the insulating body 110 constitute the conductive via V0. In some embodiments, the conductive via V0 further includes a seed layer (not shown) located between the conductive layer 111 and the insulating body 110. In this way, the conductive lines M1a, M1b, M2a, and M2b located on different layers can be electrically connected through the conductive via V0.

[0096] refer to Figures 4J to 4K , an insulating layer 115 and a conductive layer 121 are formed on the side of the insulating layer 115 away from the insulating layer 105, and an insulating layer 117 and a conductive layer 122 are formed on the side of the insulating layer 107 away from the insulating layer 100. Insulating layers 115 and 117 may include an insulating material such as resin, for example, including prepreg; conductive layers 121 and 122 may include a conductive material, for example, including a metal material such as copper, such as a copper foil layer. In some embodiments, insulating layers 115, 117 and conductive layers 121, 122 may be formed by a pressing process such as lamination, but the present disclosure is not limited thereto. In some embodiments, insulating layers 100, 105, 107, 115, 117 constitute insulating structure 120.

[0097] refer to Figure 4K and Figure 4L In some embodiments, Figure 4K The structure shown is subjected to an opening process to form a plurality of openings in the structure. The opening process removes one or more of the plurality of conductive layers and one or more of the plurality of insulating layers to form openings in the corresponding layers. For example, the opening process may include forming one or more openings 80a and one or more openings 80b. The opening 80a extends through the conductive layer 121 and the insulating layer 115 to expose a portion of the surface of the conductive wire M2a; the opening 80b extends through at least a portion of the conductive layer 121 and the insulating layer 115, but does not expose the conductive wire M2a or other conductive components. The opening 80b is used to subsequently form a dummy through hole therein, and may also be referred to as a dummy opening 80b. The depth of the opening 80b can be set according to actual product requirements. For example, in this example, the opening 80b extends through the entire insulating layer 115 and exposes the surface of the insulating layer 105. In other embodiments, the opening 80b may extend into the insulating layer 115 but not through the insulating layer 115. Alternatively, the opening 80b may continue to extend through one or more of the other insulating layers in the insulating structure 120, or may extend through the conductive layer 121, the entire insulating structure 120, and the conductive layer 122. The present disclosure does not limit the depth of the opening 80b.

[0098] In some embodiments, the hole forming process further includes forming one or more openings 80c. The openings 80c extend through the conductive layer 121, the insulating structure 120, and the conductive layer 122, and may also extend through one or more of the conductive lines M1a, M1b, M2a, and M2b, such that the sidewalls of the conductive lines are exposed in the openings 80c. In some embodiments, the openings 80a, 80b, and 80c may also be referred to as vias.

[0099] In this embodiment, most of the multiple openings are formed on the side where the conductive layer 121 is located, but the present disclosure is not limited to this. In other embodiments, one or more openings may also be formed from the side where the conductive layer 122 is located. For example, an opening (not shown) may be formed on the side that extends through the conductive layer 122 and the insulating layer 117 and exposes a portion of the surface of the conductive line M2b. It should be understood that the position and number of the openings shown in the figure are only for illustration, and the present disclosure is not limited to this. The position and number of the openings can be set and adjusted accordingly according to actual product requirements. In some embodiments, the above-mentioned hole opening process may include one or more of an etching process, a laser drilling process, and a mechanical drilling process.

[0100] refer to Figure 4M , forming a conductive layer 123, which fills the plurality of openings 80a, 80b, and 80c and is formed on the surface of the conductive layer 121 away from the insulating layer 115 and the surface of the conductive layer 122 away from the insulating layer 117. The conductive layer 123 may include a conductive material, for example, a metal material such as copper, and may be formed by a plating process such as electroplating, wherein the conductive layer 121 may serve as a seed layer in the electroplating process. In some embodiments, before forming the conductive layer 123 by electroplating, a metal seed layer (not shown) may be formed on the sidewall surface of each opening.

[0101] refer to Figure 4M and Figure 4N , a patterning process is performed on the conductive layer 123 and the conductive layer 121 / 122 to remove a portion of the conductive layer 123 located on the side of the insulating layer 115 away from the insulating layer 105 and a portion of the conductive layer 121 located between the portion of the conductive layer 123 and the insulating layer 115, and to remove a portion of the conductive layer 123 located on the side of the insulating layer 117 away from the insulating layer 107 and a portion of the conductive layer 122 located between the portion of the conductive layer 123 and the insulating layer 117.

[0102] refer to Figure 4NAfter the patterning process, the conductive layer located in openings 80a, 80b, and 80c respectively constitutes a conductive via V1, a dummy via DV, and a conductive via V2. That is, conductive via V1, dummy via DV, and conductive via V2 may each include a portion of conductive layer 123 located in the corresponding opening, or may further include a seed layer located between the portion of conductive layer 123 and an adjacent material layer (insulating layer, conductive line, etc.). Portions of conductive layer 123 and conductive layer 121 located on the side of insulating layer 115 away from insulating layer 105 and connected to conductive via V1 or conductive via V2 constitute conductive pad P1. Portions of conductive layer 123 and conductive layer 121 located on the side of insulating layer 115 away from insulating layer 105 and connected to dummy via DV constitute dummy pad DP. Dummy pad DP and dummy via DV together constitute dummy pad structure 124. The portions of conductive layer 123 and conductive layer 122 located on the side of insulating layer 117 away from insulating layer 107 and connected to conductive via V2 constitute conductive pad P3. In this embodiment, dummy pad 123 and dummy via DV of dummy pad structure 124 can be formed simultaneously with conductive pad P1 and conductive vias V1, V2, etc. (i.e., formed in the same patterning process). This eliminates the need for additional process steps to provide dummy reinforcement members (e.g., dummy via DV), thereby simplifying the process and saving costs.

[0103] In each of the conductive pad P1 and the dummy pad DP, a portion of the conductive layer 123 covers the surface of the conductive layer 121 on the side away from the insulating layer 115, and the conductive layer 121 is located between the portion of the conductive layer 123 and the insulating layer 115 in the vertical direction (for example, direction D1) and surrounds the side wall of another portion of the conductive layer 123 in the horizontal direction (for example, direction D2); in the conductive pad P3, a portion of the conductive layer 123 covers the surface of the conductive layer 122 on the side away from the insulating layer 117, and the conductive layer 122 is located between the portion of the conductive layer 123 and the insulating layer 117 in the vertical direction (for example, direction D1) and surrounds the side wall of another portion of the conductive layer 123 in the horizontal direction (for example, direction D2).

[0104] like Figures 4M to 4N As shown, when forming the conductive layer 123, the conductive layer 123 may fill the openings 80a-80c, so that the formed conductive vias V1, V2, and dummy via DV each include an entire metal pillar, but the present disclosure is not limited to this. In other embodiments, the conductive vias V1, V2, and dummy via DV may also be formed using a process similar to that of the conductive via V0, so that each of these vias includes an insulating body and a conductive liner surrounding the insulating body.

[0105] refer to Figure 4OA protective layer 125 is formed on the side of insulating layer 115 away from insulating layer 105, and a protective layer 127 is formed on the side of insulating layer 117 away from insulating layer 107. Protective layers 125 and 127 may be or include solder resist layers. For example, protective layers 125 and 127 may be formed by a printing process such as screen printing. In some embodiments, protective layer 125 has multiple openings to expose conductive pad P1 and dummy pad DP, and protective layer 125 may be spaced apart from conductive pad P1 and dummy pad DP, thereby facilitating the bonding of the conductive pad and dummy pad to connectors of the semiconductor structure in subsequent processes. In some embodiments, protective layer 127 may also have one or more openings to expose conductive pad P3, and conductive pad P3 may be used for further connection to other electronic devices and / or as an electrical test point, but the present disclosure is not limited to this. In other embodiments, protective layer 127 may completely cover conductive pad P3. The opening positions of the protective layers 125 and 127 can be set according to actual product requirements. In some embodiments, at this point, the circuit substrate 150 is formed.

[0106] refer to Figures 4O to 4P , provide a semiconductor structure S1; perform a bonding process to bond the semiconductor structure S1 to the circuit substrate 150. For example, the semiconductor structure S1 may include a packaging substrate 200, a chip 300, a conductive connector 212, and a dummy connector 213. Bonding the semiconductor structure S1 to the circuit substrate 150 may include bonding the conductive connector 212 and the dummy connector 213 of the semiconductor structure S1 to the conductive pad P1 and the dummy pad DP of the circuit substrate 150, respectively. In some embodiments, during the bonding process, since the opening size of the protective layer 125 is larger than the size of the corresponding pad, the bonding window can be enlarged, which is beneficial to the bonding of the connector with the adjacent pad; after the bonding process, the conductive connector 212 and the dummy connection 213 may respectively cover the surface of the corresponding conductive pad P1 and the dummy pad DP on the side close to the semiconductor structure S1, and may also cover the side wall of the corresponding pad, thereby improving the bonding strength between the connector and the corresponding pad. For example, the bonding process may include a welding process. The relevant features of the semiconductor structure S1 can be referred to above regarding Figure 2A and Figure 2B The content described will not be repeated here.

[0107] In some embodiments, after the semiconductor structure S1 is bonded to the circuit substrate 150, a heat sink 400 may be installed on the semiconductor structure S1 to facilitate heat dissipation of the chip 300 and form a package structure 500a. For example, the heat sink 400 may be installed on the package substrate 200 and attached to the surface of the chip 300 away from the package substrate 200. In other embodiments, the heat sink 400 may also be installed on the circuit substrate 200 and attached to the surface of the chip 300. In some embodiments, during the installation of the heat sink 400, the conductive connector 212 and the dummy connector 213 may be subjected to stress from the upper components (e.g., the package substrate 200, the chip 300, the heat sink 400), and the dummy pad structure located near the corner is subjected to relatively greater stress. In the embodiment of the present disclosure, since the dummy pad structure 124 includes a dummy pad and also includes a dummy reinforcement member embedded in the insulating structure, the contact area between the dummy pad structure 124 and the insulating structure can be increased, and the dummy reinforcement member buried in the insulating structure can make the dummy pad structure 124 have a higher structural strength, which can avoid the generation of cracks and other defects between it and other material layers when it is subjected to large stress, thereby improving the overall structural stability of the packaging structure and further improving the reliability of the device.

[0108] In some embodiments, after the packaging structure is formed, the packaging structure can be subjected to reliability testing, such as temperature cycle testing; since the dummy pad structure 124 of the present disclosure has a higher structural strength by providing a dummy reinforcement component, cracks can be avoided between the dummy pad structure and the adjacent insulation structure during the reliability test.

[0109] Figures 4A to 4P The manufacturing method of the package structure of the embodiment of the present disclosure is described by taking the package structure 500a as an example. It should be understood that the forming method of the package structure 500b is similar to that of the package structure 500a, except that Figure 4J In the patterning process for forming the conductive line M2a, a dummy line RC is also formed; that is, the dummy line RC can be formed simultaneously with the conductive line M2a in the same patterning process, and can include portions of the conductive layer 106 and the conductive layer 111; when the opening 80b is subsequently formed, the opening 80b extends through the conductive layer 121 and the insulating layer 115 to expose a portion of the surface of the dummy line RC, thereby allowing the dummy through hole subsequently formed in the opening 80b to be connected to the dummy line RC. However, the present disclosure is not limited to this. In other embodiments, the dummy line in the dummy pad structure can also be formed simultaneously with any one or more of the conductive lines M1a, M1b, and M2b, and the dummy through hole is correspondingly connected to the dummy line.

[0110] Figure 5 and Figure 6A method for manufacturing a package structure according to other embodiments of the present disclosure is shown.

[0111] refer to Figure 5 In some embodiments, in the package structure 500c, the dummy pad structure 204 of the semiconductor structure S1 may include a dummy pad 204 and a dummy reinforcement member (or a second dummy reinforcement member), and the dummy reinforcement member may include at least a dummy through-hole 92, or may also include a dummy line 94. The dummy pad 202 is connected to the dummy reinforcement member to further improve the bonding strength between the dummy pad structure 204 and the adjacent material layer (e.g., the dielectric structure 90) in the package substrate 200, and to prevent the dummy pad 202 from generating cracks between the adjacent material layers when subjected to high stress. In other words, by also providing a dummy reinforcement member including at least a dummy through-hole 92 in the semiconductor structure S1 (e.g., its package substrate 200), the bonding strength between the dummy connector 213 and the dummy pad structure 204 connected thereto and the package substrate 200 of the semiconductor structure S1 can be further enhanced, thereby improving device reliability.

[0112] For example, the package substrate 200 may further include a dielectric structure 90 and a conductive via 91, a dummy via 92, and a conductive line 93 embedded in the dielectric structure 90. The conductive pad 201 may be disposed on the surface of the dielectric structure 90 on the side adjacent to the circuit substrate 150 and electrically connected to the conductive line 93 via the conductive via 91. The dummy pad 202 may be disposed on the surface of the dielectric structure 90 on the side adjacent to the circuit substrate 150. The dummy reinforcement member may be embedded in the dielectric structure 90 and connected to the dummy pad 202. For example, the dummy via 92, as at least a portion of the dummy reinforcement member, is connected to the dummy pad 202. The dummy via 92 and the dummy pad 202 may be integrally formed and may be formed simultaneously with the conductive via 91 and the conductive pad 201, for example, by the same patterning process. In some embodiments, the dummy reinforcement member in semiconductor structure S1 may further include a dummy line 94 embedded in dielectric structure 90. Dummy line 94 may be located on a side of dummy via 92 away from dummy pad 202 and connected to dummy via 92. Both dummy via 92 and dummy line 94 may comprise a metal material such as copper, but the present disclosure is not limited thereto. It should be understood that dummy line 94 may also be omitted, that is, the dummy reinforcement member may include only dummy vias without dummy lines. Dummy line 94 may be provided on the same layer as conductive line 93, but the present disclosure is not limited thereto. Figure 5 The figure shows a plurality of pads on the side of the package structure 200 close to the circuit substrate and through holes and / or lines directly connected to the pads, while the side of the conductive line 93 close to the chip 300 may also include other conductive circuits and conductive pads, which are not specifically shown for the sake of simplicity of the figure.

[0113] In the above embodiment, in the dummy pad structure 124, the dummy reinforcement members are all located on the side of the dummy pad DP away from the semiconductor structure S1 and embedded in the insulation structure 120, but the present disclosure is not limited to this. In other embodiments, the dummy reinforcement member may also include an additional portion located on the side of the insulation structure 120 closer to the semiconductor structure. For example, the additional portion may cover a portion of the surface of the dummy pad DP closer to the semiconductor structure S1 and a portion of its sidewall.

[0114] For example, reference Figure 6 In the packaging structure 500d, the protective layer 125 has an opening, at least a portion of the dummy pad structure 124 is located in the opening, the dummy pad structure 124 has a first side wall and a second side wall (for example, opposite to each other in the direction D2), the protective layer 125 covers a first portion of the surface of the dummy pad structure 124 away from the insulating structure 120 and the first side wall, and the dummy connector 213 covers a second portion of the surface of the dummy pad structure 124 and the second side wall.

[0115] For example, the protective layer 125 may extend to cover a portion of the surface of the dummy pad DP near the semiconductor structure S1 and a portion of its sidewalls. For example, if the dummy pad DP has opposite sidewalls in a horizontal direction, the protective layer 125 may cover one of the opposite sidewalls of the dummy pad DP, while the other sidewall of the dummy pad DP is located in the opening of the protective layer 125 and is laterally spaced apart from the protective layer 125. The dummy connector 213 extends into the opening of the protective layer 125 and may cover the other sidewall of the dummy pad DP. In this example, the portion of protective layer 125 covering dummy pad DP can serve as an additional dummy reinforcement member, further enhancing the structural strength of dummy pad structure 214. This effectively prevents cracks from forming between dummy pad DP and insulation structure 120 when dummy connector 213 and dummy pad structure 124 are subjected to significant stress (e.g., tensile stress or shear stress). This further enhances the bonding strength between dummy connector 213, the dummy pad structure 124 it connects to, and circuit substrate 150, thereby improving device reliability. Furthermore, protective layer 125 only covers a portion of the sidewalls of dummy pad DP, while the other portion of the sidewalls of dummy pad DP is covered by dummy connector 213, thereby ensuring sufficient bonding strength between dummy connector 213 and dummy pad DP.

[0116] In some embodiments, a ball shear test can be used to test the bonding strength between the connector and / or pad in the package structure and the circuit substrate. For example, the bonding strength between the pad connected to the connector and the insulating structure can be tested. Figure 1AThe bonding strength between the dummy connector 13 and the dummy pad 9b and the circuit substrate 10 (eg, the insulating structure 6) in the package structure 50 shown in FIG. Figure 2A The bonding strength between the dummy connector 213 and the dummy pad structure 124 in the package structure 500a and the circuit substrate 150 (e.g., the insulation structure 120) is described. In some examples, the results of the above-mentioned tests on the package structures 50 and 500a show that the shear strength of the dummy connector 213 and the dummy pad structure 124 in the package structure 500a can be increased by 56% compared to the shear strength of the dummy connector 13 and the dummy pad 9b in the package structure 50. That is, if the shear strength of the dummy connector 13 and the dummy pad 9b in the package structure 50 is 100%, the shear strength of the dummy connector 213 and the dummy pad structure 124 in the package structure 500 can reach 156%. In other words, in the embodiments of the present disclosure, by making the dummy pad structure include dummy pads and dummy reinforcement members, the structural strength of the dummy pad structure and the dummy connectors it is bonded to, as well as the bonding strength with the circuit substrate, can be significantly improved, thereby improving device reliability.

[0117] There are a few points to note:

[0118] (1) The drawings of the embodiments of the present disclosure only relate to the structures related to the embodiments of the present disclosure, and other structures may refer to conventional designs.

[0119] (2) Unless there is any conflict, the features of the same embodiment and different embodiments of the present disclosure may be combined with each other.

[0120] The above are only specific embodiments of the present disclosure, but the scope of protection of the present disclosure is not limited thereto. Any changes or substitutions that can be easily conceived by a person skilled in the art within the technical scope disclosed in this disclosure should be included in the scope of protection of the present disclosure. Therefore, the scope of protection of the present disclosure should be based on the scope of protection of the claims.

Claims

1. A packaging structure comprising a circuit substrate and a semiconductor structure disposed on the circuit substrate, wherein The circuit substrate includes: Insulation structure; A conductive circuit is embedded in the insulating structure; a plurality of first conductive pads, disposed on one side of the insulating structure and electrically connected to the conductive circuit; as well as A plurality of first dummy pad structures are disposed on the one side of the insulating structure and extend into the insulating structure, The semiconductor structure is bonded to the plurality of first conductive pads and the plurality of first dummy pad structures of the circuit substrate through a plurality of conductive connectors and a plurality of dummy connectors. wherein one of the plurality of first dummy pad structures includes a first dummy pad and a first dummy reinforcement member connected to each other, the first dummy pad being disposed on a surface of the insulating structure on a side close to the semiconductor structure, the first dummy reinforcement member being embedded in the insulating structure, and the conductive circuit including a conductive through hole and / or a conductive line disposed on the same layer as the first dummy reinforcement member; The height of the first dummy reinforcement member in a first direction perpendicular to the main surface of the circuit substrate is less than the overall height of the conductive circuit in the first direction, and the overlapping area of ​​the first dummy reinforcement member with the conductive circuit of the adjacent layer in the first direction is less than the overlapping area of ​​the conductive through-hole and / or the conductive line arranged in the same layer as the first dummy reinforcement member with the conductive circuit of the adjacent layer in the first direction. 2 . The package structure according to claim 1 , wherein the plurality of first dummy pad structures and the plurality of dummy connectors are electrically floating and electrically isolated from the conductive traces.

3. The package structure according to claim 1 , wherein the semiconductor structure has a plurality of corners, each corner being an inner corner formed by the intersection of adjacent sides among the plurality of sides of the semiconductor structure; The plurality of conductive connectors and the plurality of dummy connectors are arranged in a horizontal direction parallel to the main surface of the circuit substrate into a plurality of connector rows and a plurality of connector columns, the plurality of connector rows including one or more end connector rows adjacent to a side of the semiconductor structure, and the plurality of connector columns including one or more end connector columns adjacent to a side of the semiconductor structure, wherein in each end connector row or each end connector column, two connectors located at opposite ends are two dummy connectors, the two dummy connectors are respectively adjacent to corresponding corners of the plurality of corners of the semiconductor structure, and a connector located between the two dummy connectors is a conductive connector; and The centers of the plurality of dummy connectors are offset from diagonal connection lines of two opposite corners among the plurality of corners. The package structure according to claim 1 , wherein the first dummy reinforcement member is surrounded by the insulation structure. 5 . The package structure according to claim 1 , wherein at least a portion of the first dummy pad and at least a portion of the first dummy reinforcement member are integrally formed.

6. The packaging structure according to claim 1, wherein the first dummy reinforcement member includes a dummy through-hole, which is connected to the first dummy pad and extends from the first dummy pad to the insulating structure in a direction perpendicular to the main surface of the circuit substrate and away from the multiple conductive connectors.

7. The package structure according to claim 6, wherein the first dummy reinforcement member further comprises: A dummy line is embedded in the insulating structure, and the dummy through hole is located between the first dummy pad and the dummy line in a first direction perpendicular to the main surface of the circuit substrate.

8. The packaging structure according to claim 7, wherein the width of the dummy line is greater than the width of the dummy through hole, and the width of the dummy line and the width of the dummy through hole are widths in a second direction parallel to the main surface of the circuit substrate.

9. The package structure according to claim 7, wherein the conductive circuit comprises a first conductive line and a second conductive line embedded in different insulating layers of the insulating structure, the first conductive line and the second conductive line being electrically connected to each other via a conductive via; The dummy line is provided in the same layer as the first conductive line, and an overlapping area between the dummy line and the second conductive line in the first direction is smaller than an overlapping area between the first conductive line and the second conductive line in the first direction.

10. The package structure according to any one of claims 1 to 9, wherein the circuit substrate further comprises: The first protective layer is located on a side of the insulating structure close to the semiconductor structure, and is located on the side of the multiple first conductive pads and the multiple first dummy pad structures in a direction parallel to the main surface of the circuit substrate, is spaced apart from the multiple first conductive pads, and is spaced apart from at least part of the side walls of the multiple first dummy pad structures.

11. The packaging structure according to claim 10, wherein the first protective layer has an opening, at least a portion of a first dummy pad structure among the plurality of first dummy pad structures is located in the opening, and a dummy connector among the plurality of dummy connectors covers a surface of the first dummy pad structure away from the insulating structure and extends into the opening to cover at least a portion of the sidewall of the first dummy pad structure.

12. The packaging structure according to claim 10, wherein the first protective layer has an opening, at least a portion of a first dummy pad structure among the plurality of first dummy pad structures is located in the opening, the first dummy pad structure has a first sidewall and a second sidewall, the first protective layer covers a first portion of a surface of the first dummy pad structure away from the insulating structure and the first sidewall, and a dummy connector among the plurality of dummy connectors covers a second portion of the surface of the first dummy pad structure and the second sidewall.

13. The package structure according to any one of claims 1 to 9, wherein the semiconductor structure further comprises: A plurality of second conductive pads and a plurality of second dummy pad structures, each of the plurality of second dummy pad structures includes at least a second dummy pad, the plurality of second conductive pads and the second dummy pads are located on a side of the semiconductor structure close to the circuit substrate, the plurality of second conductive pads are electrically connected to the plurality of conductive connectors, and the plurality of second dummy pad structures are respectively connected to the plurality of dummy connectors and are electrically floating.

14. The package structure according to claim 13, wherein the semiconductor structure further comprises: The second protection layer is located on a side of the semiconductor structure close to the circuit substrate and covers the sidewalls of the plurality of second conductive pads and the second dummy pads and a portion of their surface close to the circuit substrate.

15. The packaging structure according to claim 13, wherein the semiconductor structure further includes a dielectric structure, and each of the plurality of second dummy pad structures further includes a second dummy reinforcement member, the second dummy pad is located on a surface of the dielectric structure close to the circuit substrate, and the second dummy reinforcement member is embedded in the dielectric structure and connected to the second dummy pad.

16. The package structure according to any one of claims 1 to 9, further comprising: The heat dissipation component is arranged on a side of the semiconductor structure away from the circuit substrate and is attached to the semiconductor structure.

17. The package structure according to any one of claims 1 to 9, wherein the semiconductor structure comprises: Chip: and The packaging substrate is electrically connected to the chip and is located between the chip and the circuit substrate. The plurality of conductive connectors and the plurality of dummy connectors are arranged on a side of the packaging substrate away from the chip.

18. A method for manufacturing a packaging structure, comprising: Forming a circuit substrate, including: forming an insulating structure and a conductive circuit, wherein the conductive circuit is embedded in the insulating structure; forming a plurality of first conductive pads on one side of the insulating structure, wherein the plurality of first conductive pads are electrically connected to the conductive circuit through conductive through-holes; and forming a plurality of first dummy pad structures, wherein the plurality of first dummy pad structures are disposed on the one side of the insulating structure and extend into the insulating structure; and A semiconductor structure is provided, and the semiconductor structure is bonded to the circuit substrate, wherein the semiconductor structure has a plurality of conductive connectors and a plurality of dummy connectors, and bonding the semiconductor structure to the circuit substrate comprises bonding the plurality of conductive connectors and the plurality of dummy connectors to the plurality of first conductive pads and the plurality of first dummy pad structures of the circuit substrate, respectively. wherein one of the plurality of first dummy pad structures includes a first dummy pad and a first dummy reinforcement member connected to each other, the first dummy pad being disposed on a surface of the insulating structure on a side close to the semiconductor structure, the first dummy reinforcement member being embedded in the insulating structure, and the conductive circuit including a conductive through hole and / or a conductive line disposed on the same layer as the first dummy reinforcement member; The height of the first dummy reinforcement member in a first direction perpendicular to the main surface of the circuit substrate is less than the overall height of the conductive circuit in the first direction, and the overlapping area of ​​the first dummy reinforcement member with the conductive circuit of the adjacent layer in the first direction is less than the overlapping area of ​​the conductive through-hole and / or the conductive line arranged in the same layer as the first dummy reinforcement member with the conductive circuit of the adjacent layer in the first direction.

19. The method for manufacturing a package structure according to claim 18, wherein forming the one of the plurality of first dummy pad structures comprises: forming the first dummy reinforcement member in the insulating structure; as well as The first dummy pad is formed on a side of the first dummy reinforcement member and the insulation structure close to the semiconductor structure.

20. The method for manufacturing a package structure according to claim 19, wherein the first dummy reinforcement member comprises a dummy through hole, and forming the one of the plurality of first dummy pad structures comprises: forming an opening in the insulating structure; as well as A metal material is formed in the opening of the insulating structure and on a surface thereof close to the semiconductor structure, wherein a portion of the metal material in the opening forms the dummy through hole, and a portion of the metal material on the surface of the insulating structure forms the first dummy pad.

21. The method for manufacturing a package structure according to claim 20, wherein forming the one of the plurality of first dummy pad structures further comprises: Before forming the opening, a dummy line embedded in the insulating structure is formed, and the opening is formed to expose the dummy line so that the dummy through hole subsequently formed in the opening is connected to the dummy line, wherein the dummy line and the dummy through hole together constitute the first dummy reinforcement member. 22 . The method for manufacturing a package structure according to claim 19 , wherein at least a portion of the first dummy reinforcement member and the conductive via comprise the same material and are formed by the same patterning process.

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