Polishing method and polishing system

By monitoring the changes in the curvature and warp of the semiconductor structure in real time during chemical mechanical polishing, the problem of distinguishing the interface between polycrystalline silicon and silicon wafers was solved, enabling precise removal of the getter layer and improving the flatness of the silicon wafer.

CN120901836APending Publication Date: 2025-11-07ZING SEMICON CORP

Patent Information

Application Number
CN202511054445.2
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Filing Date
2025-07-29
Publication Date
2025-11-07

AI Technical Summary

Technical Problem

When chemically and mechanically polishing polycrystalline silicon, it is difficult to effectively distinguish the interface between polycrystalline silicon and silicon wafer, leading to over-polishing and deterioration of the flatness of the front side of the silicon wafer.

Method used

By monitoring the changes in the curvature and warp of the semiconductor structure in real time after each chemical mechanical polishing process until a preset value is reached, the degree of removal of the getter layer is determined by the identification system, and the polishing process is stopped in a timely manner.

Benefits of technology

This effectively avoids over-polishing, ensures the flatness of the silicon wafer's front side, and improves polishing precision and efficiency.

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Abstract

The invention provides a polishing method. A semiconductor structure comprises a substrate, and gettering layers are formed on the front face and the back face of the substrate at the same time. Obtaining the initial bending degree and the initial warping degree of the semiconductor structure; and executing at least one chemical mechanical polishing process, and after each chemical mechanical polishing process, obtaining the bending degree variation and the warping degree variation of the semiconductor structure in real time until the bending degree variation and the warping degree variation of the semiconductor structure reach the preset bending degree variation and the preset warping degree variation. According to the method, in the multiple chemical mechanical polishing technological processes, the removal degree of the front gettering layer of the substrate is judged by monitoring changes of the bending degree and the warping degree of the semiconductor structure. And when the bending variation and the warping variation of the semiconductor structure reach preset values, the front gettering layer of the substrate is completely removed, and in the step-by-step polishing process, the chemical mechanical polishing process is timely stopped according to real-time monitoring data calculation, so that the front gettering layer of the substrate is effectively removed, and the over-polished substrate is reduced.
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Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of integrated circuits, and in particular to a polishing method and a polishing system. BACKGROUND

[0002] In the development of high-end products, the development of multi-layer structure wafers is imperative. The multi-layer structure wafer is formed by back sealing the wafer with an oxide layer or directly growing poly-silicon in a furnace tube, and then removing the poly-silicon on the front surface by chemical mechanical polishing (CMP). Since the physical properties of the poly-silicon and the wafer are similar, the difference in light reflection and chemical reaction is small, and it is difficult to distinguish the interface between the poly-silicon and the wafer during the process of removing the poly-silicon on the front surface by chemical mechanical polishing. Therefore, it is difficult to effectively and timely stop the chemical mechanical polishing process using an endpoint, which may lead to over-polishing and deterioration of the flatness of the front surface of the wafer. SUMMARY

[0003] The present application aims to provide a polishing method and a polishing system to solve the problem of deterioration of flatness caused by over-polishing when polishing poly-silicon.

[0004] To solve the above technical problems, the present application provides a polishing method, comprising:

[0005] providing a semiconductor structure, wherein the semiconductor structure comprises a substrate, the substrate comprises a front surface and a back surface arranged oppositely, and the front surface and the back surface of the substrate are simultaneously formed with a gettering layer;

[0006] obtaining an initial bending degree and an initial warping degree of the semiconductor structure;

[0007] performing at least one chemical mechanical polishing process, and obtaining a bending degree change and a warping degree change of the semiconductor structure in real time after each chemical mechanical polishing process until the bending degree change and the warping degree change of the semiconductor structure reach a preset bending degree change and a preset warping degree change.

[0008] Optionally, the substrate is a silicon substrate, the material of the gettering layer is poly-silicon, and the difference in reflection spectrum of the silicon substrate and the poly-silicon in the chemical mechanical polishing process is less than the resolution of an identification system.

[0009] Optionally, after each chemical mechanical polishing process, an identification system performs real-time topography identification on the front surface of the substrate, obtains the bending degree and the warping degree of the semiconductor structure in real time, and calculates the bending degree change and the warping degree change of the semiconductor structure.

[0010] Optionally, each time the chemical mechanical polishing process removes the gettering layer on the front side of the substrate or all of the gettering layer, and as the polishing removal amount increases, the curvature and warpage of the semiconductor structure changes, when the curvature and warpage of the semiconductor structure reaches a preset value, the gettering layer on the front side of the substrate has been removed, and the chemical mechanical polishing process is stopped.

[0011] Optionally, the change in polishing removal amount after two adjacent chemical mechanical polishing processes is less than a preset threshold, and the chemical mechanical polishing process is stopped.

[0012] Optionally, the change in warpage of the semiconductor structure after the chemical mechanical polishing process is less than or equal to -18000 nm.

[0013] Optionally, the change in curvature of the semiconductor structure after the chemical mechanical polishing process is greater than or equal to 21000 nm.

[0014] Optionally, the measurement method of the warpage and the curvature is three-point bending measurement.

[0015] Optionally, before forming the gettering layer on the front side and the back side of the substrate, a back sealing layer is formed on the back side of the substrate.

[0016] Based on the same inventive concept, the present application also provides a polishing system for performing any of the above polishing methods, comprising:

[0017] A processing disc for carrying the semiconductor structure;

[0018] An identification unit for identifying the topography of the semiconductor structure in real time, acquiring the curvature and warpage of the semiconductor structure in real time, and calculating the change in curvature and warpage of the semiconductor structure;

[0019] A polishing unit for performing a chemical mechanical polishing process on the front side of the semiconductor structure.

[0020] In a polishing method provided by this invention, a semiconductor structure includes a substrate, which includes a front side and a back side disposed opposite to each other, and getter layers are simultaneously formed on both the front and back sides of the substrate. The method involves acquiring the initial curvature and initial warpage of the semiconductor structure; performing at least one chemical mechanical polishing (CMP) process, and acquiring the changes in curvature and warpage of the semiconductor structure in real time after each CMP process, until the changes in curvature and warpage reach preset curvature and warpage values. This invention increases the number of measurements of the curvature and warpage of the semiconductor structure during the stepwise CMP process. By monitoring the changes in the curvature and warpage of the semiconductor structure, the degree of removal of the getter layer on the front side of the substrate is determined. When the changes in curvature and warpage of the semiconductor structure reach the preset curvature and warpage values, the getter layer on the front side of the substrate is considered completely removed. In the stepwise CMP process, the CMP process can be stopped in a timely manner based on real-time monitoring data, effectively removing the getter layer on the front side of the substrate and reducing over-polishing of the front side of the substrate. Attached Figure Description

[0021] Those skilled in the art will understand that the accompanying drawings are provided to better understand the invention and do not constitute any limitation on the scope of the invention. Wherein:

[0022] Figure 1 This is a flowchart of the polishing method according to an embodiment of the present invention.

[0023] Figures 2 to 5 This is a structural schematic diagram of the corresponding steps of the polishing method in an embodiment of the present invention.

[0024] Figure 6 This is a flowchart of the sub-steps of the chemical mechanical polishing process according to an embodiment of the present invention.

[0025] Figure 7 This is a graph showing the relationship between the amount of material removed and the warpage in the chemical mechanical polishing process of this invention.

[0026] Figure 8 This is a graph showing the relationship between the amount of material removed and the curvature in the chemical mechanical polishing process of this invention.

[0027] In the attached image:

[0028] 10-Substrate; 10a-Front side; 10b-Back side; 11-Back cover layer; 12a-Front side getter layer; 12b-Back side getter layer. Detailed Implementation

[0029] In order to make the objects, advantages and features of the present application more clearly, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. It should be noted that all the drawings are very simplified and not drawn in proportion, and are only used to facilitate and clearly assist the purpose of describing the embodiments of the present application. In addition, the structures shown in the drawings are often part of the actual structures. In particular, different scales are sometimes used to show the different emphasis of each drawing.

[0030] As used in the present application, the singular forms "a", "an" and "the" include plural referents, the term "or" is used in the inclusive sense, i.e., the term "or" is used to mean both "and / or", the term "at least one" is used in the sense of "one or more", the term "at least two" is used in the sense of "two or more", and the terms "first", "second", "third" are used only for the purpose of description and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the technical features indicated. Therefore, the features defined as "first", "second", "third" can explicitly or implicitly include one or at least two features. In addition, as used in the present application, an element disposed in another element generally only indicates a connection, coupling, cooperation or transmission relationship between the two elements, and the connection, coupling, cooperation or transmission between the two elements can be direct or indirect through an intermediate element, and cannot be understood as indicating or implying the spatial positional relationship between the two elements, i.e. one element can be in any orientation inside, outside, above, below or one side of another element, unless the content is otherwise explicitly indicated. For those skilled in the art, the specific meaning of the above terms in the present application can be understood according to the specific circumstances.

[0031] Figure 1 is a flow chart of the polishing method of the embodiments of the present application. As shown in Figure 1 , the present embodiment provides a polishing method, which comprises:

[0032] Step S10, providing a semiconductor structure, the semiconductor structure comprising a substrate, the substrate comprising oppositely arranged front and back surfaces, the front and back surfaces of the substrate simultaneously forming gettering layers;

[0033] Step S20, obtaining the initial bending degree and the initial warping degree of the semiconductor structure;

[0034] Step S30, performing at least one chemical mechanical polishing process, and obtaining the bending degree change and the warping degree change of the semiconductor structure in real time after each chemical mechanical polishing process until the bending degree change and the warping degree change of the semiconductor structure reach the preset bending degree change and the preset warping degree change.

[0035] Figures 2 to 5is a structural schematic diagram of a corresponding step of the polishing method of the embodiment of the present application. Figure 6 is a flow chart of a chemical mechanical polishing process sub-step of the embodiment of the present application. In order to make the above-mentioned objects, features and beneficial effects of the present application more obvious and easy to understand, the following will be described in combination with the accompanying drawings of the specification Figures 2 to 6 The specific embodiments of the present application are described in detail.

[0036] As shown in Figure 2 , a semiconductor structure is provided, which includes a substrate 10. The substrate 10 can be an operating platform for subsequent processes, which can be any substrate used to carry semiconductor integrated circuit components known to those skilled in the art, which can be a die or a wafer processed by an epitaxial growth process. In detail, the substrate is, for example, a bulk silicon substrate, a germanium substrate, a germanium-silicon substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate, or a germanium-on-insulator substrate, etc. In the present embodiment, the substrate 10 is a silicon substrate. The substrate 10 includes a front surface 10a and a back surface 10b arranged oppositely.

[0037] As shown in Figure 3 , a back sealing layer 11 is formed on the back surface 10b of the substrate. The material of the back sealing layer 11 is low temperature oxide (LTO), which is used for protection of the substrate 10. It is formed by PECVD process, and the deposition temperature is, for example, 200-400°C, so as to avoid damage to the substrate 10 caused by high temperature.

[0038] As shown in Figure 4As shown, the gettering layer is formed on the front surface 10a and the back surface 10b of the substrate 10 simultaneously by a furnace tube process, and the material of the gettering layer is, for example, polysilicon. However, only the back surface gettering layer 12b of the substrate 10 is needed to absorb impurities on the back surface of the substrate 10. Therefore, the front surface gettering layer 12a of the substrate 10 needs to be removed, and the front surface gettering layer 12a of the substrate 10 is usually removed by a chemical mechanical polishing process. Since the physical properties of polysilicon and silicon substrate are similar, the difference in light reflection and chemical reaction is small, that is, the difference in the reflection spectrum of the silicon substrate and the polysilicon in the chemical mechanical polishing process is less than the resolution of the identification system, and it is difficult to distinguish the interface between the polysilicon and the silicon substrate during the process of removing the front surface gettering layer 12a of the substrate 10 by the chemical mechanical polishing process, and it is difficult to effectively and timely stop the chemical mechanical polishing process by using the endpoint and other methods, which is easy to cause over-polishing and cause the flatness of the front surface of the substrate to deteriorate. The substrate 10, the front surface and the back surface of the substrate 10 are simultaneously formed with gettering layers, and after the front surface gettering layer 12a of the substrate 10 is removed, the substrate 10 has different warping and bending. After the front surface and the back surface of the substrate 10 are simultaneously formed with gettering layers, the initial bending and warping of the semiconductor structure are obtained before the chemical mechanical polishing process is performed, and the semiconductor structure at this time includes the substrate 10, the front surface gettering layer 12a, the back sealing layer 11 and the back surface gettering layer 12b.

[0039] As shown in Figure 5 and Figure 6 at least one chemical mechanical polishing process is performed, and the change amount of the bending and the change amount of the warping of the semiconductor structure are obtained in real time after each chemical mechanical polishing process until the change amount of the bending of the semiconductor structure reaches a preset change amount of the bending, and the change amount of the warping reaches a preset change amount of the warping.

[0040] Specifically, as shown in Figure 6As shown, step S31, a first chemical mechanical polishing process is performed, step S32, after the first chemical mechanical polishing process, the recognition system performs topography recognition on the front side of the substrate 10, obtains a first bending degree and a first warping degree, and calculates a first bending degree change amount and a first warping degree change amount of the semiconductor structure, the first bending degree change amount being the first bending degree minus the initial bending degree, and the first warping degree change amount being the first warping degree minus the initial warping degree; step S33, a second chemical mechanical polishing process is performed, step S34, after the second chemical mechanical polishing process, the recognition system performs topography recognition on the front side of the substrate 10, obtains a second bending degree and a second warping degree, and calculates a second bending degree change amount and a second warping degree change amount of the semiconductor structure, the second bending degree change amount being the second bending degree minus the initial bending degree, and the second warping degree change amount being the second warping degree minus the initial warping degree; step S35, a third chemical mechanical polishing process is performed, step S36, after the third chemical mechanical polishing process, the recognition system performs topography recognition on the front side of the substrate 10, obtains a third bending degree and a third warping degree, and calculates a third bending degree change amount and a third warping degree change amount of the semiconductor structure, the third bending degree change amount being the third bending degree minus the initial bending degree, and the third warping degree change amount being the third warping degree minus the initial warping degree; step S37, an nth chemical mechanical polishing process is performed, step S38, after the nth chemical mechanical polishing process, the recognition system performs topography recognition on the front side of the substrate 10, obtains an nth bending degree and an nth warping degree, and calculates an nth bending degree change amount and an nth warping degree change amount of the semiconductor structure, the nth bending degree change amount being the nth bending degree minus the initial bending degree, and the nth warping degree change amount being the nth warping degree minus the initial warping degree.

[0041] Figure 7 is a graph of the relationship between the removal amount and the warping degree in the chemical mechanical polishing process of the embodiment of the present application. Figure 8 is a graph of the relationship between the removal amount and the bending degree in the chemical mechanical polishing process of the embodiment of the present application. Figure 7 The abscissa in is the removal amount (Removal) in the chemical mechanical polishing process, that is, the total removal amount in the multiple chemical mechanical polishing processes, in units of nanometers (nm). Figure 7 The ordinate in is the warping degree change amount (Delta Warp) in the chemical mechanical polishing process, that is, the total warping degree change amount in the multiple chemical mechanical polishing processes, in units of nanometers (nm). Figure 8 The abscissa in is the removal amount (Removal) in the chemical mechanical polishing process, that is, the total removal amount in the multiple chemical mechanical polishing processes, in units of nanometers (nm). Figure 8The ordinate in the figure is the bow change (Delta Bow) in the chemical mechanical polishing process, i.e. the total bow change in the multiple chemical mechanical polishing process, in units of nanometers (nm). The measurement method of the bow and the warp is the 3-Point Bending Test (3pt).

[0042] As shown in Figure 7 and Figure 8 , the portion or the entirety of the gettering layer 12a on the front surface 10a of the substrate is removed, and as the polishing removal amount increases, the bow and the warp of the semiconductor structure change, and the bow change and the warp change of the semiconductor structure also change. Specifically, as the polishing removal amount increases, the warp change of the semiconductor structure decreases, and as the polishing removal amount increases, the bow change of the semiconductor structure increases. As the polishing removal amount increases, the bow change after the adjacent two chemical mechanical polishing processes is less than a preset threshold, or when the bow change and the warp change of the semiconductor structure reach preset values, the gettering layer 12a on the front surface of the substrate has been removed, and the chemical mechanical polishing process is stopped. Specifically, the warp change of the semiconductor structure after the chemical mechanical polishing process is less than or equal to -18000 nm. The bow change of the semiconductor structure after the chemical mechanical polishing process is greater than or equal to 21000 nm, and the chemical mechanical polishing process is stopped.

[0043] In this embodiment, if the bow change and the warp change of the semiconductor structure after the first chemical mechanical polishing process reach preset values, the chemical mechanical polishing process is also stopped. That is, the number n of the chemical mechanical polishing processes is greater than or equal to 1. In this embodiment, the number of the chemical mechanical polishing processes is multiple. In the multiple chemical mechanical polishing processes, the number of times of measuring the bow and the warp of the semiconductor structure is increased, and by monitoring the changes of the bow and the warp of the semiconductor structure, the removal degree of the gettering layer on the front surface of the substrate is determined. When the bow change and the warp change of the semiconductor structure reach the preset bow change and the preset warp change, the gettering layer on the front surface of the substrate is completely removed, and in the step-by-step chemical mechanical polishing process, the chemical mechanical polishing process can be stopped in time according to the real-time monitoring data, the gettering layer on the front surface of the substrate is effectively removed, and the over-polishing of the front surface of the substrate is reduced.

[0044] This embodiment also provides a polishing system for performing any of the polishing methods described above, comprising:

[0045] A processing disc for carrying the semiconductor structure;

[0046] An identification unit is configured to identify the profile of the semiconductor structure in real time, acquire the bending degree and the warping degree of the semiconductor structure in real time, and calculate the bending degree variation and the warping degree variation of the semiconductor structure.

[0047] A polishing unit is configured to perform a chemical mechanical polishing process on the front surface of the semiconductor structure.

[0048] As can be seen from the above, in the polishing method provided by the embodiment of the present application, the semiconductor structure includes a substrate, the substrate includes a front surface and a back surface arranged oppositely, and the front surface and the back surface of the substrate are simultaneously formed with gettering layers; the initial bending degree and the initial warping degree of the semiconductor structure are acquired; at least one chemical mechanical polishing process is performed, and the bending degree variation and the warping degree variation of the semiconductor structure are acquired in real time after each chemical mechanical polishing process until the bending degree variation and the warping degree variation of the semiconductor structure reach preset bending degree variation and preset warping degree variation. In the step-by-step chemical mechanical polishing process, the number of times of measuring the bending degree and the warping degree of the semiconductor structure is increased, the removal degree of the gettering layer on the front surface of the substrate is judged by monitoring the changes of the bending degree and the warping degree of the semiconductor structure. When the bending degree variation and the warping degree variation of the semiconductor structure reach the preset bending degree variation and the preset warping degree variation, the gettering layer on the front surface of the substrate is completely removed. In the step-by-step chemical mechanical polishing process, the chemical mechanical polishing process can be stopped in time according to the real-time monitoring data, the gettering layer on the front surface of the substrate is effectively removed, and the over-polishing of the front surface of the substrate is reduced.

[0049] It should be noted that the embodiments in the specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts of each embodiment can be referred to each other. In addition, the different parts of each embodiment can also be used in combination with each other, and the present application is not limited thereto.

[0050] In addition, it should be appreciated that, although the present application has been disclosed as above with reference to the preferred embodiments, the above embodiments are not intended to limit the present application. For any person skilled in the art, many possible changes and modifications, or equivalent embodiments with equivalent changes and modifications, can be made to the technical solutions of the present application by using the disclosed technical contents without departing from the scope of the technical solutions of the present application. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present application, without departing from the content of the technical solutions of the present application, still belongs to the protection scope of the technical solutions of the present application.

Claims

1. A method of polishing, characterized by, The application relates to a polishing method and a polishing device. The application provides a semiconductor structure, which comprises a substrate, wherein the substrate comprises a front surface and a back surface arranged oppositely, and the front surface and the back surface of the substrate are simultaneously formed with gettering layers; An initial bending degree and an initial warping degree of the semiconductor structure are obtained; At least one chemical mechanical polishing process is performed, and the bending degree change and the warping degree change of the semiconductor structure are obtained in real time after each chemical mechanical polishing process until the bending degree change and the warping degree change of the semiconductor structure reach preset bending degree change and preset warping degree change.

2. The polishing method according to claim 1, wherein The substrate is a silicon substrate, the material of the gettering layer is polycrystalline silicon, and the difference between the reflection spectra of the silicon substrate and the polycrystalline silicon in the chemical mechanical polishing process is less than the resolution of an identification system.

3. The polishing method according to claim 1, wherein After each chemical mechanical polishing process, the front surface of the substrate is identified in real time by the identification system, the bending degree and the warping degree of the semiconductor structure are obtained in real time, and the bending degree change and the warping degree change of the semiconductor structure are calculated.

4. The polishing method according to claim 3, wherein Each chemical mechanical polishing process removes the gettering layer on the front surface of the substrate, and the bending degree and the warping degree of the semiconductor structure change with the increase of the polishing removal amount; when the bending degree change and the warping degree change of the semiconductor structure reach preset values, the gettering layer on the front surface of the substrate is removed completely, and the chemical mechanical polishing process is stopped.

5. The polishing method according to claim 4, wherein The polishing removal amount change after two adjacent chemical mechanical polishing processes is less than a preset threshold value, and the chemical mechanical polishing process is stopped.

6. The polishing method according to claim 4, wherein The warping degree change of the semiconductor structure after the chemical mechanical polishing process is less than or equal to -18000 nm.

7. The polishing method according to claim 4, wherein The bending degree change of the semiconductor structure after the chemical mechanical polishing process is greater than or equal to 21000 nm.

8. The polishing method according to claim 6 or 7, characterized by, The measurement method of the warping degree and the bending degree is three-point bending measurement.

9. The polishing method according to claim 1, wherein Before the gettering layers are formed on the front surface and the back surface of the substrate, a back sealing layer is formed on the back surface of the substrate.

10. A polishing system characterized by, The application further provides a polishing device for performing the polishing method. The polishing device comprises a processing disc for carrying the semiconductor structure; an identification unit for identifying the topography of the semiconductor structure in real time, obtaining the bending degree and the warping degree of the semiconductor structure in real time, and calculating the bending degree change and the warping degree change of the semiconductor structure; and a polishing unit for performing the chemical mechanical polishing process on the front surface of the semiconductor structure.

Citation Information

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