Loop stability compensation circuit for an LDO with large output current variation

Abstract

The present application relates to compensation circuit, and disclose a kind of loop stability compensation circuit for the LDO of which output current changes greatly, including LDO voltage regulator, detection resistance RL, current detection circuit, controller and current compensation circuit, the output end of the LDO voltage regulator connects output load output, the input end of current detection circuit is connected at the output end of detection resistance RL, the signal output end of current detection circuit is connected at the input end of controller.The current value transmitted by detection chip U1 is detected by the chip U2 of the present application, and when it is small, the relay KA1 is controlled to be closed, at this time, the current compensation circuit is equivalent to be connected to the power supply of LDO voltage regulator, to increase the current of LDO voltage regulator output end, when the chip U2 detects that the current is too large, then control relay KA1 is disconnected, so that the current of LDO voltage regulator output end is controlled in stable range.

Description

Technical Field

[0001] This invention relates to the field of LDO low-voltage regulator technology, and more specifically to a loop stability compensation circuit for LDOs with large output current variations. Background Technology

[0002] An LDO (Low Dropout) is a linear regulator that uses a transistor or MOSFET operating in its saturation region to subtract excess voltage from the applied input voltage, producing a regulated output voltage. LDO stands for Low Dropout, offering advantages such as low cost, low noise, and low quiescent current. However, its output current varies considerably, necessitating a compensation circuit to maintain a stable output current within a defined range. Therefore, this paper proposes a loop stability compensation circuit for LDOs with large output current variations. Summary of the Invention

[0003] To overcome the aforementioned deficiencies in the prior art, the present invention provides a loop stability compensation circuit for LDOs with large output current variations, which can control the current at the output terminal of the LDO regulator within a stable range, thereby solving the problem of large output current variations in the prior art.

[0004] This invention provides the following technical solution: a loop stability compensation circuit for an LDO with large output current variations, comprising an LDO regulator, a sensing resistor RL, a current sensing circuit, a controller, and a current compensation circuit. The output terminal of the LDO regulator is connected to the output load. The input terminal of the current sensing circuit is connected to the output terminal of the sensing resistor RL. The signal output terminal of the current sensing circuit is connected to the input terminal of the controller. The signal output terminal of the controller is connected to the output terminal of the current compensation circuit. The output terminal of the current compensation circuit is connected to the input terminal of the sensing resistor RL. The power supply terminal of the current compensation circuit is connected to the power input.

[0005] Furthermore, the current detection circuit includes a fuse F1, a detection chip U1, resistors R1 and R2, and a capacitor C1. The input terminal of the fuse F1 is connected to the input terminal of the resistor RL under test. The detection chip U1 is a MAX471. Pins 2 and 3 of the detection chip U1 are connected to the output terminal of the fuse F1. Pins 1 and 4 of the detection chip U1 are connected to ground. Pin 8 of the detection chip U1 is connected to the output terminal of the resistor RL under test. Pin 5 of the detection chip U1 is connected to the input terminal of resistor R2. The output terminal of resistor R2 is grounded and connected to the output terminal of capacitor C1. The input terminal of capacitor C1 is connected to pin 8 of the detection chip U1. Pins 6 and 7 of the detection chip U1 are connected to output a signal.

[0006] Furthermore, the controller uses chip U2, which is an STM32L chip, and pin 15 of chip U2 is connected to pin 6 of the detection chip U1.

[0007] Furthermore, the current compensation circuit includes a power chip U3, a diode D1, a capacitor C2, a capacitor C3, and a capacitor C4. The VIN terminal of the power chip U3 is connected to the output terminal of the diode D1 and to the input terminal of the capacitor C2. The input terminal of the diode D1 is connected to the input power supply. The output terminal of the capacitor C2 is connected to the GND terminal of the power chip U3 and then grounded. The VOUT terminal of the power chip U3 is connected to the input terminal of the capacitor C3, and to the input terminal of the resistor under test RL, as well as to the input terminal of the capacitor C4. The output terminals of the capacitors C3 and C4 are connected and then grounded.

[0008] Furthermore, the output terminal of the chip U3 is also connected to a relay KA1 and a diode D2. The relay KA1 is connected to the VOUT terminal of the chip U3, the control terminal of the relay KA1 is connected to pin 37 of the chip U2, the output terminal of the relay KA1 is connected to the input terminal of the diode D2, and the output terminal of the diode D2 is connected to the input terminal of the resistor RL to be measured.

[0009] The technical effects and advantages of this invention are as follows:

[0010] 1. The current detection circuit of the present invention is connected in parallel across the two ends of the resistor under test RL, and its voltage is equal to that of the resistor under test RL. It is connected to the power input through pins 2 and 3 of the detection chip U1. After processing by the MAX471 chip, the current is transmitted to chip U2. When chip U2 detects that the current value transmitted from the detection chip U1 decreases, it controls the relay KA1 to close. At this time, the current compensation circuit is equivalent to the power supply connected to the LDO regulator, which increases the current at the output terminal of the LDO regulator. When chip U2 detects that the current is too large, it controls the relay KA1 to open, thereby controlling the current at the output terminal of the LDO regulator within a stable range. Attached Figure Description

[0011] Figure 1 This is a schematic diagram of the principle of the present invention;

[0012] Figure 2 This is the circuit schematic diagram of the present invention.

[0013] The attached diagram is labeled as follows: 1. LDO regulator; 2. Sensing resistor RL; 3. Current detection circuit; 4. Controller; 5. Current compensation circuit. Detailed Implementation

[0014] The specific embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0015] Reference Figure 1-2This invention provides a loop stability compensation circuit for LDOs with large output current variations, including an LDO regulator 1, a sensing resistor RL-2, a current sensing circuit 3, a controller 4, and a current compensation circuit 5. The output terminal of the LDO regulator 1 is connected to the output load. The input terminal of the current sensing circuit 3 is connected to the output terminal of the sensing resistor RL-2. The signal output terminal of the current sensing circuit 3 is connected to the input terminal of the controller 4. The signal output terminal of the controller 4 is connected to the output terminal of the current compensation circuit 5. The output terminal of the current compensation circuit 5 is connected to the input terminal of the sensing resistor RL-2. The power supply terminal of the current compensation circuit 5 is connected to the power input.

[0016] like Figure 2 As shown, the current detection circuit 3 includes a fuse F1, a detection chip U1, resistors R1 and R2, and a capacitor C1. The input terminal of the fuse F1 is connected to the input terminal of the resistor RL under test. The detection chip U1 is a MAX471. Pins 2 and 3 of the detection chip U1 are connected to the output terminal of the fuse F1. Pins 1 and 4 of the detection chip U1 are connected to ground. Pin 8 of the detection chip U1 is connected to the output terminal of the resistor RL under test. Pin 5 of the detection chip U1 is connected to the input terminal of resistor R2. The output terminal of resistor R2 is grounded and connected to the output terminal of capacitor C1. The input terminal of capacitor C1 is connected to pin 8 of the detection chip U1. Pins 6 and 7 of the detection chip U1 are connected to output a signal. The controller 4 uses chip U2, model STM32L. Pin 15 of chip U2 is connected to pin 6 of the detection chip U1. The current compensation circuit 5 includes a power supply. The circuit consists of chip U3, diode D1, capacitors C2, C3, and C4. The VIN terminal of power chip U3 is connected to the output of diode D1 and to the input of capacitor C2. The input of diode D1 is connected to the input power supply. The output of capacitor C2 is connected to the GND terminal of power chip U3 and then grounded. The VOUT terminal of power chip U3 is connected to the input of capacitor C3, and to the input of the resistor under test RL, as well as to the input of capacitor C4. The outputs of capacitors C3 and C4 are connected and then grounded. The output of chip U3 is also connected to relay KA1 and diode D2. Relay KA1 is connected to the VOUT terminal of chip U3. The control terminal of relay KA1 is connected to pin 37 of chip U2. The output of relay KA1 is connected to the input of diode D2. The output of diode D2 is connected to the input of the resistor under test RL-2.

[0017] This loop stability compensation circuit for LDOs with large output current variations has a current detection circuit 3 connected in parallel across the resistor under test RL-2, with the voltage across RL-2 equal to that of the resistor under test. The current is connected to the power input via pins 2 and 3 of the detection chip U1. After processing by the MAX471 chip, the current is transmitted to pin 15 of chip U2 via pins 6 and 7 of the detection chip U1. The current value of the detection chip U1 is programmable and set to the stable output current value of the LDO regulator 1. When chip U2 detects a decrease in the current value transmitted from the detection chip U1, it then... Terminal 37 transmits a control signal to relay KA1, controlling relay KA1 to close. At this time, current compensation circuit 5 is turned on. During normal operation, diode D2 is turned on. At this time, current compensation circuit 5 is equivalent to the power supply of LDO regulator 1, increasing the voltage of the resistor under test RL-2, thereby increasing the current of the resistor under test RL-2, which is to say, increasing the current at the output terminal of LDO regulator 1. When chip U2 detects that the current is too large, it controls relay KA1 to open, thereby controlling the current at the output terminal of LDO regulator 1 within a stable range.

[0018] The foregoing has shown and described the basic principles, main features, and advantages of the present invention. The present invention is not limited to the above embodiments; the embodiments and descriptions in the specification are merely illustrative of the principles of the invention. Various changes and modifications can be made to the invention without departing from its spirit and scope, and all such changes and modifications fall within the scope of the claims. The scope of protection of this invention is defined by the appended claims and their equivalents.

Claims

1. A loop stability compensation circuit for an LDO with varying output current, characterized in that: The system includes an LDO regulator (1), a sensing resistor RL (2), a current sensing circuit (3), a controller (4), and a current compensation circuit (5). The output terminal of the LDO regulator (1) is connected to the output load output. The input terminal of the current sensing circuit (3) is connected to the output terminal of the sensing resistor RL (2). The signal output terminal of the current sensing circuit (3) is connected to the input terminal of the controller (4). The signal output terminal of the controller (4) is connected to the output terminal of the current compensation circuit (5). The output terminal of the current compensation circuit (5) is connected to the input terminal of the sensing resistor RL (2). The power supply terminal of the current compensation circuit (5) is connected to the power input. The current detection circuit (3) includes a fuse F1, a detection chip U1, a resistor R1, a resistor R2, and a capacitor C1. The input terminal of the fuse F1 is connected to the input terminal of the detection resistor RL. The detection chip U1 is a MAX471. Pins 2 and 3 of the detection chip U1 are connected to the output terminal of the fuse F1. Pins 1 and 4 of the detection chip U1 are connected to ground. Pin 8 of the detection chip U1 is connected to the output terminal of the detection resistor RL. Pin 5 of the detection chip U1 is connected to the input terminal of the resistor R2. The output terminal of the resistor R2 is grounded and connected to the output terminal of the capacitor C1. The input terminal of the capacitor C1 is connected to pin 8 of the detection chip U1. Pins 6 and 7 of the detection chip U1 are connected to output a signal. The current compensation circuit (5) includes a power chip U3, a diode D1, a capacitor C2, a capacitor C3 and a capacitor C4. The VIN terminal of the power chip U3 is connected to the output terminal of the diode D1 and to the input terminal of the capacitor C2. The input terminal of the diode D1 is connected to the input power supply. The output terminal of the capacitor C2 is connected to the GND terminal of the power chip U3 and then grounded. The VOUT terminal of the power chip U3 is connected to the input terminal of the capacitor C3 and to the input terminal of the detection resistor RL (2) and to the input terminal of the capacitor C4. The output terminals of the capacitors C3 and C4 are connected and then grounded. The output terminal of the chip U3 is also connected to a relay KA1 and a diode D2. The relay KA1 is connected to the VOUT terminal of the chip U3. The control terminal of the relay KA1 is connected to pin 37 of the chip U2. The output terminal of the relay KA1 is connected to the input terminal of the diode D2. The output terminal of the diode D2 is connected to the input terminal of the detection resistor RL (2).

2. The loop stability compensation circuit for an LDO with varying output current as described in claim 1, characterized in that: The controller (4) uses chip U2, which is an STM32L chip. Pin 15 of chip U2 is connected to pin 6 of the detection chip U1.

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