Hardware timestamp resolution verification method and device, electronic equipment and storage medium

Abstract

The application provides a hardware timestamp resolution verification method and device, electronic equipment and a storage medium. The method comprises the following steps: controlling a to-be-verified hardware to send a plurality of trigger signals based on a plurality of set trigger timestamps; obtaining a capture event hardware timestamp corresponding to each trigger signal, wherein the capture event hardware timestamp is obtained by the to-be-verified hardware through capturing the trigger signal; and verifying the hardware timestamp resolution of the to-be-verified hardware based on the capture event hardware timestamp corresponding to each trigger signal and the plurality of set trigger timestamps.

Description

Technical Field

[0001] This application relates to the field of network communication technology, and in particular to a hardware timestamp resolution verification method, apparatus, electronic device and storage medium. Background Technology

[0002] With the development of network technology and the increasing complexity of network time and frequency applications, time synchronization has become increasingly important in communication networks. Currently, network message transmission based on the IEEE 1588 (Precise Time Protocol, PTP) standard is widely used to support network communication and time synchronization.

[0003] Hardware based on the PTP standard can use hardware timestamps for reading and writing timestamps, eliminating uncertain time delays caused by software processing and thus improving network time synchronization accuracy.

[0004] Time synchronization accuracy is affected by hardware performance metrics (such as hardware timestamp resolution), and it is necessary to verify the hardware timestamp resolution to ensure time synchronization accuracy. However, how to verify it becomes a problem. Summary of the Invention

[0005] This application provides the following technical solution:

[0006] This application provides a hardware timestamp resolution verification method, including:

[0007] The hardware to be verified is controlled to send multiple trigger signals based on multiple set trigger timestamps;

[0008] Obtain the capture event hardware timestamp corresponding to each of the trigger signals, wherein the capture event hardware timestamp is obtained by the hardware to be verified by capturing the trigger signals;

[0009] Based on the capture event hardware timestamp corresponding to each trigger signal and the plurality of set trigger timestamps, verify the hardware timestamp resolution of the hardware to be verified.

[0010] Optionally, based on the capture event hardware timestamp corresponding to each of the trigger signals and the plurality of set trigger timestamps, the hardware timestamp resolution of the hardware to be verified is verified, including:

[0011] Based on the multiple set trigger timestamps, trigger setting information corresponding to each set trigger timestamp is determined, and the trigger setting information is used to characterize the incremental change of the set trigger timestamp;

[0012] Based on the capture event hardware timestamp corresponding to each trigger signal, event capture information corresponding to each capture event hardware timestamp is determined, and the event capture information is used to characterize the incremental change of the capture event hardware timestamp;

[0013] The trigger setting information and the event capture information are output to verify the hardware timestamp resolution of the hardware to be verified based on the trigger setting information and the event capture information.

[0014] Optionally, the set trigger timestamp includes a first trigger time portion and a second trigger time portion, wherein the time precision of the second trigger time portion is consistent with the time precision of the hardware timestamp resolution;

[0015] The step of determining the trigger setting information corresponding to each of the multiple set trigger timestamps includes:

[0016] Based on the second trigger time portion of each of the set trigger timestamps, determine the increment and increment order representation value corresponding to each of the second trigger time portions.

[0017] Optionally, the hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time portion and a second capture event time portion, wherein the time precision of the second capture event time portion is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified.

[0018] The step of determining the event capture information corresponding to each capture event hardware timestamp based on the capture event hardware timestamp corresponding to each trigger signal includes:

[0019] Based on the second capture event time portion of the hardware timestamp of each capture event, determine the increment and increment order representation value corresponding to each second capture event time portion.

[0020] Optionally, the hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time portion and a second capture event time portion, wherein the time precision of the second capture event time portion is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified.

[0021] The step of verifying the hardware timestamp resolution of the hardware to be verified based on the capture event hardware timestamp corresponding to each trigger signal and the plurality of set trigger timestamps includes:

[0022] Based on each of the set trigger timestamps, determine the set trigger timestamp resolution;

[0023] Based on the set trigger timestamp resolution and the hardware timestamp resolution, starting from the earliest set trigger timestamp among the set trigger timestamps corresponding to each trigger signal, the set trigger timestamps corresponding to each trigger signal are grouped to obtain at least one set of set trigger timestamps. The set of set trigger timestamps contains n set trigger timestamps, the n set trigger timestamps are consecutive, and n is equal to the ratio of the hardware timestamp resolution to the set trigger timestamp resolution.

[0024] Select a set of capture event hardware timestamps that correspond to the set of set trigger timestamps from each of the trigger signals;

[0025] Determine whether the hardware timestamps of the first n-1 captured events in the set of captured event hardware timestamps are consistent, and whether the time difference between the second captured event time portion of the hardware timestamp of the nth captured event and the second captured event time portion of one of the hardware timestamps of the first n-1 captured events is equal to the hardware timestamp resolution;

[0026] If so, the hardware timestamp resolution of the hardware to be verified is confirmed to be valid.

[0027] Optionally, the control of the hardware to be verified sends multiple trigger signals based on multiple set trigger timestamps, including:

[0028] Configure the trigger signal format, the trigger resource used to send the trigger signal, the port, and multiple trigger timestamps;

[0029] A trigger command is sent to the hardware to be verified, so that the hardware to be verified sends multiple trigger signals based on the trigger signal format, the trigger resource, the port, and the multiple set trigger timestamps.

[0030] Optionally, before obtaining the capture event hardware timestamp corresponding to each of the trigger signals, the method further includes:

[0031] Determine if a hardware timestamp for the captured event has been generated;

[0032] If so, determine whether the event resources used to capture the trigger signal are the same as the pre-configured event resources;

[0033] If so, obtain the hardware timestamp of the capture event corresponding to each of the trigger signals.

[0034] Another aspect of this application provides a hardware timestamp resolution verification device, comprising:

[0035] The triggering unit is used to control the hardware to be verified to send multiple trigger signals based on multiple set trigger timestamps;

[0036] The acquisition unit is configured to acquire a capture event hardware timestamp corresponding to each of the trigger signals, wherein the capture event hardware timestamp is obtained by the hardware to be verified by capturing the trigger signals;

[0037] The verification unit is used to verify the hardware timestamp resolution of the hardware to be verified based on the capture event hardware timestamp corresponding to each trigger signal and the plurality of set trigger timestamps.

[0038] A third aspect of this application provides an electronic device, characterized in that it includes: a memory and a processor;

[0039] The memory is used to store at least one set of instructions;

[0040] The processor is configured to call and execute the instruction set in the memory, and execute the hardware timestamp resolution verification method as described above by executing the instruction set.

[0041] A fourth aspect of this application provides a storage medium storing a computer program that implements the hardware timestamp resolution verification method as described in any of the preceding claims, the computer program being executed by a processor to implement the hardware timestamp resolution verification method as described in any of the preceding claims.

[0042] In this application, the hardware to be verified sends multiple trigger signals based on multiple set trigger timestamps, and the hardware to be verified obtains the hardware timestamp of the captured event by capturing the trigger signals, thus ensuring the reliability of the obtained hardware timestamp of the captured event. On this basis, the hardware timestamp resolution of the hardware to be verified is verified based on the hardware timestamp of the captured event corresponding to each trigger signal and the set trigger timestamp, which can ensure the accuracy of the verification. Attached Figure Description

[0043] To more clearly illustrate the technical solutions in the embodiments of this application, the accompanying drawings used in the description of the embodiments will be briefly introduced below. Obviously, the accompanying drawings described below are only some embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0044] Figure 1 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 1 of this application;

[0045] Figure 2 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 2 of this application;

[0046] Figure 3This is a schematic diagram illustrating the incremental change of the hardware timestamp for capturing events, as provided in Embodiment 2 of this application.

[0047] Figure 4 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 4 of this application;

[0048] Figure 5 A flowchart illustrating a hardware timestamp resolution verification method is provided in Embodiment 5 of this application;

[0049] Figure 6 This is a schematic diagram of the structure of a hardware timestamp resolution verification device provided in this application. Detailed Implementation

[0050] The technical solutions of the embodiments of this application will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those of ordinary skill in the art without creative effort are within the scope of protection of this application.

[0051] To make the above-mentioned objectives, features and advantages of this application more apparent and understandable, the application will be further described in detail below with reference to the accompanying drawings and specific embodiments.

[0052] Reference Figure 1 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 1 of this application. Figure 1 As shown, the method may include, but is not limited to, the following steps:

[0053] Step S101: Control the hardware to be verified to send multiple trigger signals based on multiple set trigger timestamps.

[0054] In this embodiment, multiple preset trigger timestamps can be pre-stored in the registers of the hardware to be verified, corresponding to the triggering function of the hardware to be verified. Based on the multiple preset trigger timestamps pre-stored in the registers of the hardware to be verified, the hardware to be verified sends multiple trigger signals based on the multiple preset trigger timestamps.

[0055] Of course, multiple trigger timestamps can also be sent to the hardware to be verified, so that the hardware to be verified can send multiple trigger signals when it receives multiple trigger timestamps.

[0056] Sending multiple trigger signals based on multiple set trigger timestamps may include, but is not limited to, sending one trigger signal for each set trigger timestamp.

[0057] The difference between any two adjacent trigger timestamps shall not exceed the hardware timestamp resolution of the hardware to be verified. The hardware to be verified can increment the hardware timestamp based on the hardware timestamp resolution. The hardware timestamp resolution can be understood as the minimum time interval between increments corresponding to two adjacent hardware timestamps. Specifically, a new hardware timestamp can be obtained by incrementing every other hardware timestamp resolution. For example, if the hardware timestamp resolution is 8ns, and the current time is x.100000056 seconds, the hardware timestamp corresponding to x.100000056 seconds is 1551399816,100000056. The hardware timestamps corresponding to x.100000057 seconds, x.100000058 seconds, x.100000059 seconds, x.100000060 seconds, x.100000061 seconds, x.100000062 seconds, and x.100000063 seconds are still 1551399816,100000056. The new hardware timestamp is obtained by incrementing at x.100000064 seconds, which is 1551399816,100000064.

[0058] Step S102: Obtain the capture event hardware timestamp corresponding to each trigger signal. The capture event hardware timestamp is obtained by the hardware to be verified through capturing the trigger signal.

[0059] In this embodiment, the hardware under test generates a timestamp for each trigger signal it captures. This timestamp serves as the hardware timestamp of the capture event corresponding to the trigger signal. The hardware under test can then store the obtained capture event timestamp into a data register.

[0060] It is understandable that, in implementations that increment timestamps based on hardware timestamp resolution, the hardware timestamps of the capture events corresponding to every two trigger signals may be the same or different.

[0061] Step S103: Based on the capture event hardware timestamp corresponding to each trigger signal and multiple set trigger timestamps, verify the hardware timestamp resolution of the hardware to be verified.

[0062] In this embodiment, the capture event hardware timestamp and multiple set trigger timestamps corresponding to each trigger signal can reflect the pattern of the hardware to be verified incrementing the timestamp based on the actual hardware timestamp resolution. Therefore, based on the capture event hardware timestamp and multiple set trigger timestamps corresponding to each trigger signal, the hardware timestamp resolution of the hardware to be verified can be verified.

[0063] In this embodiment, the hardware to be verified sends multiple trigger signals based on multiple set trigger timestamps, and the hardware to be verified obtains the hardware timestamp of the captured event by capturing the trigger signals, thus ensuring the reliability of the obtained hardware timestamp of the captured event. On this basis, the hardware timestamp resolution of the hardware to be verified is verified based on the hardware timestamp of the captured event corresponding to each trigger signal and the set trigger timestamp, which can ensure the accuracy of the verification.

[0064] Furthermore, it does not require any other hardware and has the advantage of being easy and feasible to operate.

[0065] As another optional embodiment of this application, refer to Figure 2 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 2 of this application. This embodiment mainly refines step S103 in Embodiment 1 above, such as... Figure 2 As shown, step S103 may include, but is not limited to, the following steps:

[0066] Step S1031: Based on multiple set trigger timestamps, determine the trigger setting information corresponding to each set trigger timestamp. The trigger setting information is used to characterize the incremental change of the set trigger timestamps.

[0067] In this embodiment, for each set trigger timestamp, the trigger setting information of the set trigger timestamp can be determined based on the set trigger timestamps adjacent to the set trigger timestamp.

[0068] In this embodiment, the trigger timestamp is set to include a first trigger time portion and a second trigger time portion. The time precision of the second trigger time portion is consistent with the time precision of the hardware timestamp resolution. For example, if the hardware timestamp resolution is 8ns, the first trigger time portion can be the portion greater than a second, and the second trigger time portion can be the portion less than a second. The time precision of the portion less than a second can be in nanoseconds.

[0069] In an implementation where the corresponding trigger timestamp includes a first trigger time portion and a second trigger time portion, step S1031 may include, but is not limited to:

[0070] S10311. Based on the second trigger time portion of each set trigger timestamp, determine the increment and increment order representation value corresponding to each second trigger time portion.

[0071] In this embodiment, the increment and increment order representation value corresponding to each second trigger time part can be determined based on the second trigger time part of each set trigger timestamp and the time trigger information protocol, but is not limited to.

[0072] The implementation method, which uses a time precision of s for the portion above seconds and ns for the portion below seconds, can be found in Table 1 for the time triggering information protocol.

[0073] Table 1

[0074]

[0075]

[0076] For example, if multiple trigger timestamps are set as follows:

[0077] 1551399817,100000050

[0078] 1551399818,100000051

[0079] 1551399819,100000052

[0080] 1551399820,100000053

[0081] 1551399821,100000054

[0082] 1551399822,100000055

[0083] 1551399823,100000056

[0084] 1551399824,100000057

[0085] 1551399817, 1551399818, 1551399819…1551399824 represent times greater than seconds with a precision of seconds (s). 100000050, 100000051, 100000052,…100000057 represent times less than seconds with a precision of seconds (ns). For 1551399818 and 100000051, we can use…

[0086] Given 1551399817, 100000050, the increment of 100000051 is determined to be 1 ns, and the remainder of 100000051 after 100 ms is 51, indicating that the increment order is 51. For 1551399819, 100000052, based on 1551399818, 100000051, the increment of 100000052 is determined to be 1 ns, and the remainder after 100 ms is 51. The remainder of 000052 after 100ms is 52, which means the increment sequence value is 52. The trigger setting information corresponding to 1551399818,100000051 includes 1551399818,100000051, an increment of 1ns, and an increment sequence value of 51. The trigger setting information can be represented as $TRIG,1551399817,100000050,50,1*05.

[0087] Step S1032: Based on the hardware timestamp of the capture event corresponding to each trigger signal, determine the event capture information corresponding to each hardware timestamp of the capture event. The event capture information is used to characterize the incremental change of the hardware timestamp of the capture event.

[0088] In this embodiment, for each trigger signal, the event capture information corresponding to the capture event hardware timestamp can be determined based on the capture event hardware timestamps adjacent to the capture event hardware timestamp corresponding to the trigger signal.

[0089] In this embodiment, the hardware timestamp of the capture event corresponding to the trigger signal may include, but is not limited to, a first capture event time portion and a second capture event time portion. The time precision of the second capture event time portion is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified. For example, if the hardware timestamp resolution is 8ns, the first capture event time portion can be the portion greater than a second, and the second capture event time portion can be the portion less than a second. The time precision of the portion less than a second can be ns.

[0090] The implementation of a capture event hardware timestamp corresponding to the trigger signal that includes a first capture event time portion and a second capture event time portion, step S1032 may include, but is not limited to:

[0091] S10321. Based on the second capture event time portion of the hardware timestamp of each capture event, determine the increment and increment order representation value corresponding to each second capture event time portion.

[0092] In this embodiment, the increment and increment order representation value corresponding to each second capture event time part can be determined based on the second capture event time part of the hardware timestamp of each capture event and the event capture information protocol, but is not limited to.

[0093] The implementation method, which uses a time precision of s for the portion above seconds and ns for the portion below seconds, can be found in Table 2 for the event capture information protocol.

[0094] Table 2

[0095]

[0096]

[0097] For example, if multiple captured event hardware timestamps are:

[0098] 1551399817,100000056

[0099] 1551399818,100000056

[0100] 1551399819,100000056

[0101] 1551399820,100000056

[0102] 1551399821,100000056

[0103] 1551399822,100000056

[0104] 1551399823,100000056

[0105] 1551399824,100000064

[0106] 1551399817, 1551399818, 1551399819, ... 1551399824 represent times greater than seconds with a precision of seconds (s), while 100000056, ... 100000064 represent times less than seconds with a precision of seconds (ns). For 1551399818 and 100000056, we can use...

[0107] Given 1551399817, 100000056, the increment of 100000056 is determined to be 0 ns, and the remainder after 100 ms is 56, indicating the increment order is 56; ... For 1551399824, 100000064, based on 1551399823, 100000056, the increment of 100000064 is determined to be 8 ns, and the remainder after 100 ms is 56. The remainder of 00064 after 100ms is 64, which means the incrementing order representation value is 64. The event capture information corresponding to 1551399818,100000056 can include 1551399818,100000056, an increment of 0ns, and an incrementing order representation value of 56. The event capture information can be represented as $EVNT,1551399818,100000056,56,0*0A.

[0108] Step S1033: Output trigger setting information and event capture information to verify the hardware timestamp resolution of the hardware to be verified based on the trigger setting information and event capture information.

[0109] In this embodiment, setting information and event capture information can be triggered via, but are not limited to, serial port or network output.

[0110] By outputting trigger setting information and event capture information, users can obtain the actual hardware timestamp resolution of the hardware to be verified based on the trigger setting information and event capture information. The hardware timestamp resolution is verified by comparing the actual hardware timestamp resolution with the actual hardware timestamp resolution. If the actual hardware timestamp resolution and the actual hardware timestamp resolution are consistent, the hardware timestamp resolution passes verification.

[0111] Corresponding to steps S10311 and S10312, step S1033 is illustrated with an example, such as setting multiple trigger timestamps as follows:

[0112] 1551399817,100000050

[0113] 1551399818,100000051

[0114] 1551399819,100000052

[0115] 1551399820,100000053

[0116] 1551399821,100000054

[0117] 1551399822,100000055

[0118] 1551399823,100000056

[0119] 1551399824,100000057

[0120] The hardware timestamp for the capture event corresponding to 1551399817,100000050 is 1551399817,100000056; the hardware timestamp for the capture event corresponding to 1551399818,100000051 is 1551399818,100000056; the hardware timestamp for the capture event corresponding to 1551399819,100000052 is 1551399819,100000056; and the hardware timestamp for the capture event corresponding to 1551399820,100000053 is 1551399820,100000056. The hardware timestamp of the capture event corresponding to 1551399821,100000054 is 1551399821,100000056; the hardware timestamp of the capture event corresponding to 1551399822,100000055 is 1551399822,100000056; the hardware timestamp of the capture event corresponding to 1551399823,100000056 is 1551399823,100000056; and the hardware timestamp of the capture event corresponding to 1551399824,100000057 is 1551399824,100000064.

[0121] Based on the protocols corresponding to Tables 1 and 2, the following trigger setting information and event capture information can be obtained:

[0122] $TRIG,1551399817,100000050,50,1*05

[0123] $EVNT,1551399817,100000056,56,0*05

[0124] $TRIG,1551399818,100000051,51,1*0A

[0125] $EVNT,1551399818,100000056,56,0*0A

[0126] $TRIG,1551399819,100000052,52,1*0B

[0127] $EVNT,1551399819,100000056,56,0*0B

[0128] $TRIG,1551399820,100000053,53,1*01

[0129] $EVNT,1551399820,100000056,56,0*01

[0130] $TRIG,1551399821,100000054,54,1*00

[0131] $EVNT,1551399821,100000056,56,0*00

[0132] $TRIG,1551399822,100000055,55,1*03

[0133] $EVNT,1551399822,100000056,56,0*03

[0134] $TRIG,1551399823,100000056,56,1*02

[0135] $EVNT,1551399823,100000056,56,0*02

[0136] $TRIG,1551399824,100000057,57,1*05

[0137] $EVNT,1551399824,100000064,64,8*0D

[0138] Among them, $TRIG,1551399817,100000050,50,1*05,

[0139] $TRIG,1551399818,100000051,51,1*0A,

[0140] $TRIG,1551399819,100000052,52,1*0B,

[0141] $TRIG,1551399820,100000053,53,1*01,

[0142] $TRIG,1551399821,100000054,54,1*00,

[0143] $TRIG,1551399822,100000055,55,1*03,

[0144] $TRIG,1551399823,100000056,56,1*02,

[0145] $TRIG,1551399824,100000057,57,1*05 represents the trigger settings information, while the rest represents event capture information.

[0146] Based on the trigger settings and event capture information described above, users can determine that the second capture event time portion of the hardware timestamp for seven consecutive capture events is the same value with an increment of 0, while the eighth capture event shows a jump with an increment of 8. This indicates that the actual hardware timestamp resolution is 8ns, which is consistent with the hardware timestamp resolution. The incrementing variation of the hardware timestamp for capture events can be found in [link to relevant documentation]. Figure 3 ,like Figure 3 As shown, "*" represents the value of the second capture event time portion.

[0147] In this embodiment, the hardware to be verified sends multiple trigger signals based on multiple set trigger timestamps, and the hardware to be verified obtains the hardware timestamp of the captured event by capturing the trigger signals, ensuring the reliability of the obtained hardware timestamp of the captured event. Based on this, trigger setting information corresponding to each set trigger timestamp is determined based on multiple set trigger timestamps, and event capture information corresponding to each captured event hardware timestamp is determined based on the hardware timestamp of the captured event corresponding to each trigger signal. The trigger setting information and event capture information are output to verify the hardware timestamp resolution of the hardware to be verified based on the trigger setting information and event capture information, which can ensure the accuracy of the verification.

[0148] As another optional embodiment of this application, this embodiment is mainly a refinement of step S103 in embodiment 1 above. The trigger timestamp is set to include a first trigger time portion and a second trigger time portion, the time precision of the second trigger time portion being consistent with the time precision of the hardware timestamp resolution; the hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time portion and a second capture event time portion, the time precision of the second capture event time portion being consistent with the time precision of the hardware timestamp resolution of the hardware to be verified. Step S103 may include, but is not limited to, the following steps:

[0149] Step S1034: Determine the resolution of the set trigger timestamp based on each set trigger timestamp.

[0150] Step S1034 may include, but is not limited to:

[0151] Step S10341: Determine the difference between the second trigger time portions of every two set trigger timestamps in each set trigger timestamp;

[0152] S10342. Determine the set trigger timestamp resolution based on each difference.

[0153] Specifically, if all differences are the same, the differences can be used as the resolution for setting the trigger timestamp.

[0154] Step S1035: Based on the set trigger timestamp resolution and the hardware timestamp resolution, take the earliest set trigger timestamp in the set trigger timestamps corresponding to each trigger signal as the starting point, and group the set trigger timestamps corresponding to each trigger signal to obtain at least one set of set trigger timestamps.

[0155] A set of set trigger timestamps contains n set trigger timestamps, the n set trigger timestamps are consecutive, and n is equal to the ratio of the hardware timestamp resolution to the set trigger timestamp resolution.

[0156] For example, if the hardware timestamp resolution is 8ns and the set trigger timestamp resolution is 1ns, then a set of set trigger timestamps contains 8 set trigger timestamps, and the 8 set trigger timestamps are consecutive.

[0157] Step S1036: Select a set of capture event hardware timestamps that correspond to a set of set trigger timestamps from the capture event hardware timestamps corresponding to each trigger signal.

[0158] For example, a set of trigger timestamps includes the following 8 trigger timestamps:

[0159] 1551399817,100000050

[0160] 1551399818,100000051

[0161] 1551399819,100000052

[0162] 1551399820,100000053

[0163] 1551399821,100000054

[0164] 1551399822,100000055

[0165] 1551399823,100000056

[0166] 1551399824,100000057

[0167] A set of capture event hardware timestamps corresponding to a set of set trigger timestamps includes the following 8 capture event hardware timestamps:

[0168] 1551399817,100000056

[0169] 1551399818,100000056

[0170] 1551399819,100000056

[0171] 1551399820,100000056

[0172] 1551399821,100000056

[0173] 1551399822,100000056

[0174] 1551399823,100000056

[0175] 1551399824,100000064

[0176] Step S1037: Determine whether the hardware timestamps of the first n-1 captured events in a set of captured event hardware timestamps are consistent, and whether the time difference between the second captured event time portion of the hardware timestamp of the nth captured event and the second captured event time portion of one of the hardware timestamps of the first n-1 captured events is equal to the hardware timestamp resolution.

[0177] If so, confirm that the hardware timestamp resolution of the hardware to be verified passes the verification.

[0178] For example, if the hardware timestamps of the first 7 captured events in the sequence 1551399817,100000056, 1551399818,100000056, 1551399819,100000056, 1551399820,100000056, 1551399821,100000056, 1551399822,100000056, 1551399823,100000056, 1551399824,100000064 are consistent, and the time difference between the hardware timestamp of the 8th captured event (100000064) and the 100000056 among the first 7 events is equal to 8 ns, then the hardware timestamp resolution can be verified.

[0179] In this embodiment, the hardware to be verified sends multiple trigger signals based on multiple set trigger timestamps, and the hardware to be verified obtains the hardware timestamp of the captured event by capturing the trigger signals, ensuring the reliability of the obtained hardware timestamp of the captured event. Based on this, the set trigger timestamp resolution is determined based on each set trigger timestamp. Based on the set trigger timestamp resolution and the hardware timestamp resolution, the set trigger timestamps corresponding to each trigger signal are grouped starting from the earliest set trigger timestamp in the set trigger timestamps corresponding to each trigger signal, resulting in at least one set of set trigger timestamps. From the hardware timestamps of the captured event corresponding to each trigger signal, a set of captured event hardware timestamps corresponding to a set of set trigger timestamps is selected. It is determined whether the hardware timestamps of the first n-1 captured event hardware timestamps in the set of captured event hardware timestamps are consistent, and whether the time difference between the second captured event time portion of the nth captured event hardware timestamp and the second captured event time portion of one of the first n-1 captured event hardware timestamps is equal to the hardware timestamp resolution. If so, the hardware timestamp resolution of the hardware to be verified is determined to pass the verification, which can ensure the accuracy of the verification.

[0180] As another optional embodiment of this application, refer to Figure 4 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 4 of this application. This embodiment mainly refines step S101 in Embodiment 1 above, such as... Figure 4 As shown, step S101 may include, but is not limited to, the following steps:

[0181] Step S1011: Set the trigger signal format, the trigger resource used to send the trigger signal, the port, and multiple trigger timestamps.

[0182] For an implementation where the hardware to be verified is the DP83640 chip, step S1011 may include, but is not limited to:

[0183] 1. Set the Page Select Register (PAGESEL) to 5, which selects the PTP 1588 Configuration register;

[0184] 2. Configure the PTP Trigger Configuration Register (PTP_TRIG), set the trigger signal format to pulse trigger mode (set bit 15 of the register to 1), set the corresponding trigger sequence number (set to 4, which can be specified according to the actual trigger resource usage), and set the corresponding trigger GPIO port (set to 5, which can be specified according to the actual GPIO port resource usage).

[0185] 3. Set the page selection register (PAGESEL) to 4, which selects the PTP 1588 Base register;

[0186] 4. Configure the PTP Control Register (PTP_CTL), setting the load trigger mode (bit 6 of the register is set to 1), PTP clock enable (bit 3 of the register is set to 1), and the corresponding trigger sequence number set in step 2 (set to 4, which can be specified according to the actual trigger resource usage, ranging from 0 to 7).

[0187] 5. Configure the PTP Time Data Register (PTP_TDR). Set the time at which the write setting needs to be triggered (it needs to lag behind the current time). This time is based on the accumulated PTP time and is written in two parts: one above the second and one below the second. (The part above the second is in seconds, and the part below the second is in nanoseconds. The minimum value can be set to 1 ns).

[0188] 6. Configure the PTP time data register (PTP_TDR). Set the pulse width for writing to 100ms;

[0189] 7. Configure the PTP control register (PTP_CTL). Set the trigger enable mode (bit 8 of the register is set to 1) (to enable pulse trigger function), PTP clock enable (bit 3 of the register is set to 1), and the corresponding trigger sequence number set in step 2 (set to 4, which can be specified according to the actual trigger resource usage).

[0190] Step S1012: Send a trigger command to the hardware to be verified, so that the hardware to be verified sends multiple trigger signals based on the trigger signal format, trigger resource, port and multiple set trigger timestamps.

[0191] For the implementation where the hardware to be verified is the DP83640 chip, the settings for the trigger signal capture event in this embodiment may include, but are not limited to:

[0192] 1. Set the page selection register (PAGESEL) to 5, which selects the PTP 1588 configuration register;

[0193] 2. Configure the PTP Event Configuration register (PTP_PTP_EVNT). Set the write event information enable (bit 0 of the register is set to 1), the event number (set to 3, which can be specified according to the actual event resource usage, ranging from 0 to 7), and the corresponding GPIO port for capture (same as the trigger GPIO port).

[0194] 3. Configure the PTP event configuration register (PTP_PTP_EVNT). Enable event rising edge detection (set register bit 14 to 1), enable event information writing (set register bit 0 to 1), event number (set to 3, which can be specified according to the actual event resource usage, ranging from 0 to 7), and the corresponding GPIO port for capture.

[0195] In this embodiment, by setting the trigger signal format, trigger resources for sending the trigger signal, port, and multiple set trigger timestamps, a trigger command is sent to the hardware to be verified. This enables the hardware to be verified to send multiple trigger signals based on the trigger signal format, trigger resources, port, and multiple set trigger timestamps. The hardware to be verified obtains the hardware timestamp of the captured event by capturing the trigger signal, ensuring the reliability of the obtained hardware timestamp of the captured event. Based on this, the hardware timestamp resolution of the hardware to be verified is verified based on the hardware timestamp of the captured event corresponding to each trigger signal and the set trigger timestamp, which can ensure the accuracy of the verification.

[0196] As another optional embodiment of this application, refer to Figure 5 This is a flowchart illustrating a hardware timestamp resolution verification method provided in Embodiment 5 of this application. This embodiment is mainly an extension of the hardware timestamp resolution verification method described in Embodiment 1 above. The method may include, but is not limited to:

[0197] Step S201: Control the hardware to be verified to send multiple trigger signals based on multiple set trigger timestamps.

[0198] For a detailed description of step S201, please refer to the relevant description of step S101 in Example 1, which will not be repeated here.

[0199] Step S202: Determine whether a hardware timestamp for the captured event has been generated.

[0200] The hardware timestamp of the captured event is obtained by the hardware to be verified through capturing the trigger signal.

[0201] In this embodiment, when the hardware to be verified generates a hardware timestamp for the captured event, it can write the corresponding status value into the first register. Accordingly, step S202 may include, but is not limited to:

[0202] Determine whether the status value matches the specified status value.

[0203] For example, if a specified status value of 1 indicates that a hardware timestamp for a captured event has been generated, then it can be determined whether the status value is consistent with the specified status value.

[0204] If so, proceed to step S203.

[0205] Step S203: Determine whether the event resources used to capture the trigger signal are the same as the pre-configured event resources.

[0206] In this embodiment, the hardware to be verified can pre-configure event resources, write the description information of the pre-configured event resources into the second register, and write the description information of the event resources used to capture the trigger signal into the third register. Accordingly, step S203 may include, but is not limited to:

[0207] Determine whether the description information in the third register is the same as the description information in the second register.

[0208] For the implementation where the hardware to be verified is the DP83640 chip, the DP83640 chip can be configured as follows to achieve steps S202-S203:

[0209] 1. Set the page selection register (PAGESEL) to 4, which means selecting the PTP 1588 base register (PTP1588Baseregister);

[0210] 2. Read the PTP Status Register (PTP_STS) information. Check if the event timestamp status bit (bit 8 of the register) is 1. If it is 1, it means that the hardware timestamp of the captured event has been captured; otherwise, the process ends.

[0211] 3. Read the PTP Event Status Register (PTP_ESTS) information. Check if the event timestamp status bit (bit 0 of the register) is 1. If it is 1, it means that the hardware timestamp of the captured event has been captured. Confirm whether it is the same as the captured event number. If they are the same, proceed to the next step of data reading; otherwise, end.

[0212] 4. Read the PTP Event Data Register (PTP_EDATA) information to obtain the corresponding hardware timestamp of the captured event.

[0213] If so, proceed to step S204.

[0214] Step S204: Obtain the hardware timestamp of the capture event corresponding to each trigger signal.

[0215] Step S205: Based on the capture event hardware timestamp corresponding to each trigger signal and multiple set trigger timestamps, verify the hardware timestamp resolution of the hardware to be verified.

[0216] For a detailed description of steps S204-S205, please refer to the relevant description of steps S102-S103 in Example 1, which will not be repeated here.

[0217] In this embodiment, the hardware to be verified sends multiple trigger signals based on multiple set trigger timestamps to determine whether a capture event hardware timestamp is generated. If so, it is determined whether the event resources used to capture the trigger signal are the same as the pre-configured event resources. If so, the capture event hardware timestamp corresponding to each trigger signal is obtained to ensure the reliability of the obtained capture event hardware timestamp. Based on this, the hardware timestamp resolution of the hardware to be verified is verified based on the capture event hardware timestamp corresponding to each trigger signal and the set trigger timestamp, which can ensure the accuracy of the verification.

[0218] The following section describes a hardware timestamp resolution verification device provided in this application. The hardware timestamp resolution verification device described below can be referred to in correspondence with the hardware timestamp resolution verification method described above.

[0219] Please see Figure 6 The hardware timestamp resolution verification device includes: a triggering unit 100, an acquisition unit 200, and a verification unit 300.

[0220] Trigger unit 100 is used to control the hardware to be verified to send multiple trigger signals based on multiple set trigger timestamps.

[0221] The acquisition unit 200 is used to obtain the capture event hardware timestamp corresponding to each trigger signal. The capture event hardware timestamp is obtained by the hardware to be verified by capturing the trigger signal.

[0222] The verification unit 300 is used to verify the hardware timestamp resolution of the hardware to be verified based on the capture event hardware timestamp corresponding to each trigger signal and multiple set trigger timestamps.

[0223] Verification unit 300 can be specifically used for:

[0224] Based on multiple set trigger timestamps, the trigger setting information corresponding to each set trigger timestamp is determined. The trigger setting information is used to characterize the incremental change of the set trigger timestamp.

[0225] Based on the hardware timestamp of the capture event corresponding to each trigger signal, the event capture information corresponding to each hardware timestamp of the capture event is determined. The event capture information is used to characterize the incremental change of the hardware timestamp of the capture event.

[0226] Output trigger setting information and event capture information to verify the hardware timestamp resolution of the hardware to be verified based on the trigger setting information and event capture information.

[0227] The trigger timestamp is set to include a first trigger time part and a second trigger time part. The time precision of the second trigger time part is consistent with the time precision of the hardware timestamp resolution.

[0228] Accordingly, the process by which the verification unit 300 determines the trigger setting information corresponding to each set trigger timestamp based on multiple set trigger timestamps may specifically include:

[0229] Based on the second trigger time portion of each set trigger timestamp, determine the increment and increment order representation value corresponding to each second trigger time portion.

[0230] The hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time part and a second capture event time part. The time precision of the second capture event time part is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified.

[0231] Accordingly, the process by which the verification unit 300 determines the event capture information corresponding to each capture event hardware timestamp based on the capture event hardware timestamp corresponding to each trigger signal may specifically include:

[0232] Based on the second capture event time portion of the hardware timestamp of each capture event, determine the increment and increment order representation value corresponding to each second capture event time portion.

[0233] The hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time portion and a second capture event time portion. The time precision of the second capture event time portion is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified. Accordingly, the verification unit 300 can be specifically used for:

[0234] Determine the resolution of the set trigger timestamp based on each set trigger timestamp;

[0235] Based on the set trigger timestamp resolution and the hardware timestamp resolution, starting from the earliest set trigger timestamp in the set trigger timestamps corresponding to each trigger signal, the set trigger timestamps corresponding to each trigger signal are grouped to obtain at least one set of set trigger timestamps. One set of set trigger timestamps contains n set trigger timestamps, the n set trigger timestamps are consecutive, and n is equal to the ratio of the hardware timestamp resolution to the set trigger timestamp resolution.

[0236] Select a set of capture event hardware timestamps that correspond to a set of set trigger timestamps from each trigger signal;

[0237] Determine whether the hardware timestamps of the first n-1 captured events in a set of captured event hardware timestamps are consistent, and whether the time difference between the second captured event time portion of the hardware timestamp of the nth captured event and the second captured event time portion of the hardware timestamp of one of the first n-1 captured events is equal to the hardware timestamp resolution;

[0238] If so, the hardware timestamp resolution of the hardware to be verified is confirmed to be valid.

[0239] In this embodiment, the triggering unit 100 can be specifically used for:

[0240] Configure the trigger signal format, the trigger resource used to send the trigger signal, the port, and multiple trigger timestamps;

[0241] Send a trigger command to the hardware to be verified, so that the hardware to be verified sends multiple trigger signals based on the trigger signal format, trigger resource, port and multiple set trigger timestamps.

[0242] In this embodiment, the hardware timestamp resolution verification device may further include:

[0243] Determine the unit, used for:

[0244] Determine if a hardware timestamp for the captured event has been generated;

[0245] If so, determine whether the event resources used to capture the trigger signal are the same as the pre-configured event resources;

[0246] If so, obtain the hardware timestamp of the capture event corresponding to each trigger signal.

[0247] Corresponding to the above embodiment of the hardware timestamp resolution verification method provided in this application, this application also provides an embodiment of an electronic device that applies the hardware timestamp resolution verification method.

[0248] Electronic devices may include the following structures:

[0249] Memory and processor.

[0250] Memory, used to store at least one set of instructions;

[0251] The processor is used to call and execute the instruction set in memory, and execute the hardware timestamp resolution verification method as described in any one of the above method embodiments 1-5.

[0252] Corresponding to the above embodiment of the hardware timestamp resolution verification method provided in this application, this application also provides an embodiment of a storage medium.

[0253] In this embodiment, the storage medium stores a computer program that implements the hardware timestamp resolution verification method as described in any one of the embodiments 1-5. The computer program is executed by a processor to implement the hardware timestamp resolution verification method as described in any one of the embodiments 1-5.

[0254] It should be noted that each embodiment focuses on describing the differences from other embodiments, and the same or similar parts between the embodiments can be referred to accordingly. For the device embodiments, since they are basically similar to the method embodiments, the description is relatively simple, and the relevant parts can be referred to the description of the method embodiments.

[0255] Finally, it should be noted that in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0256] For ease of description, the above devices are described in terms of function, divided into various modules. Of course, in implementing this application, the functions of each module can be implemented in one or more software and / or hardware.

[0257] As can be seen from the above description of the embodiments, those skilled in the art can clearly understand that this application can be implemented by means of software plus necessary general-purpose hardware platforms. Based on this understanding, the technical solution of this application, in essence, or the part that contributes to the prior art, can be embodied in the form of a software product. This computer software product can be stored in a storage medium, such as ROM / RAM, magnetic disk, optical disk, etc., and includes several instructions to cause a computer device (which may be a personal computer, server, or network device, etc.) to execute the methods described in various embodiments or some parts of the embodiments of this application.

[0258] The above provides a detailed description of a hardware timestamp resolution verification method, apparatus, electronic device, and storage medium provided in this application. Specific examples have been used to illustrate the principles and implementation methods of this application. The descriptions of the above embodiments are only for the purpose of helping to understand the method and core ideas of this application. At the same time, for those skilled in the art, there will be changes in the specific implementation methods and application scope based on the ideas of this application. Therefore, the content of this specification should not be construed as a limitation of this application.

Claims

1. A method for verifying hardware timestamp resolution, characterized in that, include: The hardware to be verified is controlled to send multiple trigger signals based on multiple set trigger timestamps; Obtain the capture event hardware timestamp corresponding to each of the trigger signals, wherein the capture event hardware timestamp is obtained by the hardware to be verified by capturing the trigger signals; Based on the capture event hardware timestamp corresponding to each of the trigger signals and the plurality of set trigger timestamps, verify the hardware timestamp resolution of the hardware to be verified; Specifically, verifying the hardware timestamp resolution of the hardware to be verified based on the capture event hardware timestamp corresponding to each trigger signal and the plurality of set trigger timestamps includes: Based on the multiple set trigger timestamps, trigger setting information corresponding to each set trigger timestamp is determined, and the trigger setting information is used to characterize the incremental change of the set trigger timestamp; Based on the capture event hardware timestamp corresponding to each trigger signal, event capture information corresponding to each capture event hardware timestamp is determined, and the event capture information is used to characterize the incremental change of the capture event hardware timestamp; The trigger setting information and the event capture information are output to verify the hardware timestamp resolution of the hardware to be verified based on the trigger setting information and the event capture information.

2. The method according to claim 1, characterized in that, The set trigger timestamp includes a first trigger time portion and a second trigger time portion, and the time precision of the second trigger time portion is consistent with the time precision of the hardware timestamp resolution. The step of determining the trigger setting information corresponding to each of the multiple set trigger timestamps includes: Based on the second trigger time portion of each of the set trigger timestamps, determine the increment and increment order representation value corresponding to each of the second trigger time portions.

3. The method according to claim 1, characterized in that, The hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time part and a second capture event time part, and the time precision of the second capture event time part is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified. The step of determining the event capture information corresponding to each capture event hardware timestamp based on the capture event hardware timestamp corresponding to each trigger signal includes: Based on the second capture event time portion of the hardware timestamp of each capture event, determine the increment and increment order representation value corresponding to each second capture event time portion.

4. The method according to claim 1, characterized in that, The hardware timestamp of the capture event corresponding to the trigger signal includes a first capture event time part and a second capture event time part, and the time precision of the second capture event time part is consistent with the time precision of the hardware timestamp resolution of the hardware to be verified. The step of verifying the hardware timestamp resolution of the hardware to be verified based on the capture event hardware timestamp corresponding to each trigger signal and the plurality of set trigger timestamps includes: Based on each of the set trigger timestamps, determine the set trigger timestamp resolution; Based on the set trigger timestamp resolution and the hardware timestamp resolution, starting from the earliest set trigger timestamp among the set trigger timestamps corresponding to each trigger signal, the set trigger timestamps corresponding to each trigger signal are grouped to obtain at least one set of set trigger timestamps. The set of set trigger timestamps contains n set trigger timestamps, the n set trigger timestamps are consecutive, and n is equal to the ratio of the hardware timestamp resolution to the set trigger timestamp resolution. Select a set of capture event hardware timestamps that correspond to the set of set trigger timestamps from each of the trigger signals; Determine whether the hardware timestamps of the first n-1 captured events in the set of captured event hardware timestamps are consistent, and whether the time difference between the second captured event time portion of the hardware timestamp of the nth captured event and the second captured event time portion of one of the hardware timestamps of the first n-1 captured events is equal to the hardware timestamp resolution; If so, the hardware timestamp resolution of the hardware to be verified is confirmed to be valid.

5. The method according to claim 1, characterized in that, The control hardware to be verified sends multiple trigger signals based on multiple preset trigger timestamps, including: Configure the trigger signal format, the trigger resource used to send the trigger signal, the port, and multiple trigger timestamps; A trigger command is sent to the hardware to be verified, so that the hardware to be verified sends multiple trigger signals based on the trigger signal format, the trigger resource, the port, and the multiple set trigger timestamps.

6. The method according to claim 1, characterized in that, Before obtaining the capture event hardware timestamp corresponding to each of the trigger signals, the method further includes: Determine if a hardware timestamp for the captured event has been generated; If so, determine whether the event resources used to capture the trigger signal are the same as the pre-configured event resources; If so, obtain the hardware timestamp of the capture event corresponding to each of the trigger signals.

7. A hardware timestamp resolution verification device, characterized in that, include: The triggering unit is used to control the hardware to be verified to send multiple trigger signals based on multiple set trigger timestamps; The acquisition unit is configured to acquire a capture event hardware timestamp corresponding to each of the trigger signals, wherein the capture event hardware timestamp is obtained by the hardware to be verified by capturing the trigger signals; The verification unit is configured to determine trigger setting information corresponding to each of the plurality of set trigger timestamps, wherein the trigger setting information is used to characterize the incremental change of the set trigger timestamps; determine event capture information corresponding to each of the captured event hardware timestamps based on the captured event hardware timestamps corresponding to each of the trigger signals, wherein the event capture information is used to characterize the incremental change of the captured event hardware timestamps; and output the trigger setting information and the event capture information to verify the hardware timestamp resolution of the hardware to be verified based on the trigger setting information and the event capture information.

8. An electronic device, characterized in that, include: Memory and processor; The memory is used to store at least one set of instructions; The processor is configured to call and execute the instruction set in the memory, and execute the hardware timestamp resolution verification method as described in any one of claims 1-6 by executing the instruction set.

9. A storage medium storing a computer program that implements the hardware timestamp resolution verification method as described in any one of claims 1-6, the computer program being executed by a processor to implement the hardware timestamp resolution verification method as described in any one of claims 1-6.

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