Method and device for implementing lin compliance test based on dma data customization

Abstract

The application discloses a method and device for realizing LIN consistency test based on DMA data customization, and the method comprises the following steps: obtaining a test command; customizing a test waveform according to the test command, wherein the customization of the test waveform comprises level waveform customization and data waveform customization; when the test waveform satisfies a sending condition, sequentially enabling a direct memory access (DMA) and a timer (Timer), outputting the customized test waveform to a general input / output port (GPIO) of a LIN bus, realizing data output or data interference on the LIN bus. The application uses the DMA of an MCU to combine the Timer and the GPIO to complete LIN test data waveform customization output, triggers the DMA to carry LIN test data to the GPIO pin output through the Timer period, completes customized data output and completes data interference on the LIN bus, thereby completing the LIN consistency test. Compared with the prior art, the application has the advantages of low cost, high portability and small development technical difficulty.

Description

Technical Field

[0001] This invention belongs to the field of automotive industrial equipment, and particularly relates to a method for using DMA (Direct Memory Access) combined with a timer and GPIO (General-Purpose Input / Output Ports) to customize data waveforms and interfere with data in LIN (Local Interconnect Network) consistency testing. Background Technology

[0002] Currently, there are two main solutions for LIN conformance testing equipment:

[0003] (1) Purchasing mature equipment to form a test system, such as purchasing oscilloscopes and logic analyzers, is a costly and complex system with large size and weight, making it inconvenient to carry. For example, Chinese Patent No. CN102801573A, published on November 28, 2012, discloses a LIN bus data link layer test method, which directly uses a logic analyzer and a waveform generator to connect to the RX and TX pins of the LIN controller under test in the LIN bus under test, respectively. The logic analyzer, waveform generator, and the upper-level mechanism that controls and analyzes them constitute the lower tester. The test module containing the LIN controller under test, except for the part of the LIN controller under test, constitutes the upper tester. Through the coordinated work of the upper and lower testers, it is verified whether the data link layer of the LIN bus under test meets the consistency requirements of the LIN bus protocol.

[0004] (2) A solution from a professional automotive equipment manufacturer uses an FPGA chip to implement LIN conformance testing. This solution offers good performance and portability, but is costly and requires highly skilled technicians. Summary of the Invention

[0005] To overcome the shortcomings of the prior art, the present invention provides a method and apparatus for implementing LIN conformance testing based on DMA data customization, which can solve the problems of high testing cost, poor portability and high development difficulty while meeting all the requirements of LIN conformance testing.

[0006] According to one aspect of the present invention, a method for implementing LIN consistency testing based on DMA data customization is provided, comprising:

[0007] Get the test command;

[0008] According to the test command, the test waveform is customized, wherein the customization of the test waveform includes the customization of the level waveform and the customization of the data waveform;

[0009] When the test waveform meets the transmission conditions, Direct Memory Access (DMA) and Timer are enabled in sequence, and the customized test waveform is output to the LIN bus general purpose input / output port GPIO to achieve data output or data interference to the LIN bus.

[0010] The above technical solution uses the MCU's DMA combined with Timer and GPIO to complete the customized output of LIN test data waveform. The DMA is triggered by the Timer period to move the LIN test data to the GPIO pin for output, thereby completing the customized data output and interfering with the LIN bus data, thus completing the LIN consistency test. Compared with the existing technology, it has the advantages of low cost, high portability and low development difficulty.

[0011] As a further technical solution, the method also includes: multiplexing the LIN bus transmit pin LIN_TXD as a GPIO output function.

[0012] As a further technical solution, the method also includes: defining a structure for encoding arbitrary data frames required for LIN conformance testing; and allocating a global array in random access memory (RAM) to store encoded data for storing encoded data formed by customized test waveforms.

[0013] As a further technical solution, the level waveform customization includes: customizing the length of the frame header, customizing the length of the response, and customizing the length of the wake-up signal.

[0014] As a further technical solution, the customization of the length of the frame header and response further includes: customizing the length of the LIN data frame interval break, interval delimiter, inter-byte space, and response space.

[0015] As a further technical solution, the method also includes: encapsulating a level waveform encoding interface to encode the break interval, break delimeter, inter-byte space, and response interval into level data of a specified length.

[0016] As a further technical solution, the data waveform customization is used to interfere with and flip certain bits or a segment of a bit of the data to form interference data.

[0017] As a further technical solution, the method also includes: encapsulating a data waveform encoding interface to complete the encoding of the original data or interference data.

[0018] As a further technical solution, the method further includes: if a certain bit of the interference data is all interference data, then the corresponding bit is first flipped and then encoded into the array to be transmitted; if the interference data only performs partial level interference on a certain bit, then the interference start position and interference length are specified, and then encoded into the array to be transmitted.

[0019] According to one aspect of the present invention, an apparatus for implementing LIN consistency testing based on DMA data customization is provided, comprising:

[0020] The input unit is used to obtain test commands;

[0021] A waveform customization unit is used to customize a test waveform according to the test command, wherein the customization of the test waveform includes level waveform customization and data waveform customization;

[0022] The output unit is used to sequentially enable Direct Memory Access (DMA) and Timer when the test waveform meets the transmission conditions, and output the customized test waveform to the LIN bus general purpose input / output port GPIO to realize data output or data interference to the LIN bus.

[0023] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0024] (1) This invention uses the DMA of the MCU in combination with the Timer and GPIO to complete the customized output of LIN test data waveform. The DMA is triggered by the Timer period to move the LIN test data to the GPIO pin for output, thereby completing the customized data output and interfering with the LIN bus data, thus completing the LIN conformance test. This solves the problem that the existing LIN conformance test requires the purchase of professional equipment, resulting in high test costs, and also solves the problem that the test solution has high requirements for developers.

[0025] (2) This invention is based on a general-purpose MCU and has a low product solution cost. Attached Figure Description

[0026] Figure 1 This is a flowchart of a method according to an embodiment of the present invention.

[0027] Figure 2 This is a diagram of the LIN physical layer protocol structure according to an embodiment of the present invention.

[0028] Figure 3 This is a diagram of the spaced domain structure according to an embodiment of the present invention.

[0029] Figure 4 This is a schematic diagram of a wake-up signal according to an embodiment of the present invention.

[0030] Figure 5 This is a data byte structure diagram according to an embodiment of the present invention.

[0031] Figure 6 This is a test scheme topology diagram according to an embodiment of the present invention.

[0032] Figure 7 This is a schematic diagram of a level waveform customized according to an embodiment of the present invention.

[0033] Figure 8 This is a schematic diagram illustrating the relationship between level waveform encoding, data waveform encoding, and structure content calling according to an embodiment of the present invention.

[0034] Figure 9 This is a schematic diagram illustrating the generation of low-level waveform data according to an embodiment of the present invention.

[0035] Figure 10 This is a schematic diagram illustrating the generation of high-level waveform data according to an embodiment of the present invention.

[0036] Figure 11 This is a schematic diagram illustrating the generation of customized data according to an embodiment of the present invention.

[0037] Figure 12 This is a schematic diagram illustrating the generation of whole-bit interference data according to an embodiment of the present invention.

[0038] Figure 13 This is a schematic diagram illustrating the generation of bit-level interference data according to an embodiment of the present invention.

[0039] Figure 14 This is a schematic diagram of the DMA output waveform triggered by a Timer according to an embodiment of the present invention. Detailed Implementation

[0040] The technical solutions of various embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0041] This invention provides a method for LIN conformance testing based on DMA data customization. It uses the MCU's DMA in combination with a timer and GPIO to complete the customized output of LIN test data waveforms. The DMA is triggered by the timer period to move the LIN test data to the GPIO pin for output, thus completing the customized data output and interfering with the LIN bus data, thereby completing the LIN conformance test. While meeting all the requirements of LIN conformance testing, it solves the problems of high cost, poor portability, and high development difficulty.

[0042] LIN communication physical layer protocol structure as follows Figure 2 As shown, a frame of data is divided into a frame header and a response. The frame header can only be sent by the master, while the response can be sent by either the master or the slave.

[0043] The interval field structure, wake-up signal, and data byte structure of the data frame are as follows: Figures 3 to 5 As shown.

[0044] like Figure 6 As shown, the entire testing system consists of a PC host computer, testing equipment, and an IUT. The PC host computer provides a user interface, the testing equipment completes the test data waveform customization output to the LIN bus according to the test commands of the host computer, and the IUT is the product under test.

[0045] To meet the requirements of LIN conformance testing, it is necessary to customize the level waveform and the data waveform, define a structure, and allocate a global array in RAM to store the encoded data.

[0046] Specifically, the structure is shown in Table 1:

[0047] Table 1 Structure

[0048]

[0049]

[0050] This structure can be used to encode any data frame required for LIN conformance testing, including: (i) data frames with only the break field.

[0051] (ii) Data frames with only the break field and synchronization field.

[0052] (iii) Data frames with complete headers but no response

[0053] (iv) Data frames with complete headers but incomplete responses

[0054] (v) Complete data frame

[0055] The five data frames listed above can all have their frame structures customized. The lengths of the break interval, break delimiter, inter-byte space, and response space can be set arbitrarily, and the data for sync, pid, data, and checksum can be any value.

[0056] The waveform customization required for completing the LIN conformance test in this invention is divided into level waveform customization and data waveform customization.

[0057] In one implementation, level waveform customization includes the following three aspects:

[0058] 1. Frame header length reception compatibility

[0059] 2. Reception compatibility of response length

[0060] 3. Sending the wake-up signal

[0061] LIN data frames are mainly composed of break, break delimiter, sync, pid, response space, data, checksum, and inter-byte space. sync, pid, data, and checksum are data with a fixed baud rate and constant length. Therefore, by customizing the lengths of break, break delimiter, inter-byte space, and response space, different header and response lengths can be achieved. This allows testing whether the node under test can correctly recognize and receive the data, thus completing the reception compatibility test for header and response lengths. Similarly, by customizing the wake-up signal length, the node under test can correctly recognize the wake-up signal. Figure 7 As shown.

[0062] The waveform customization of break, break delimeter, inter-byte space, and response-space is actually the customization of level waveforms. Its output level is a fixed level (as shown in Table 2). It is only necessary to change its duration according to the test requirements. Therefore, a level waveform encoding interface is encapsulated to encode break, break delimeter, inter-byte space, and response-space into level data of a specified length.

[0063] Table 2 Output Levels in the Signal Domain

[0064] signal domain break Breakdelimeter inter-bytespace response-space Output level low level high level high level / low level high level

[0065] In one implementation, data waveform customization includes the following three aspects:

[0066] 1. Frame error

[0067] 2. Bit error

[0068] 3. Sampling point identification

[0069] By customizing the data stop bit or data bit to a high or low level, interference is achieved with the stop bit or data bit, and the test node is used to check whether it can identify frame errors or bit errors and whether the sampling point is correct.

[0070] Customizing data waveforms essentially involves interfering with and flipping certain bits or a segment of a bit in the data. Therefore, a data waveform encoding interface is encapsulated to encode either the original data or the interference data. Interference data encoding methods include... Figure 9 and Figure 10 As shown.

[0071] The relationship between data waveform encoding, level waveform encoding, and the calling of structure members, such as... Figure 8 As shown.

[0072] The 2 bits in the diagram are for illustrative purposes only; in practice, there are no restrictions, and data of any length can be encoded.

[0073] As one implementation method, such as Figure 1 As shown, the specific implementation steps include:

[0074] 1. Calculate the Timer period, period (µs) = 1000000 / LIN communication baud rate / 32 (or 16).

[0075] 2. Initialize Timer and DMA, but both are only configured with parameters and not started.

[0076] 3. Initialize the LIN TXD pin multiplexed as a GPIO output function.

[0077] 4. Encode the break and break delimeter waveform data and place them into the array to be transmitted. Each encoded data set requires 32 (or 16) elements to represent 1 bit of actual data. For example... Figure 9 and Figure 10 As shown.

[0078] 5. Encode the data to be sent and place it into an array to be sent. Each array contains 32 (or 16) elements to represent 1 bit of actual data. For example... Figure 11 As shown.

[0079] If the data to be transmitted is interference data, and a certain 1 bit is entirely interference data, then the corresponding bit needs to be flipped before being encoded into the array to be transmitted, such as... Figure 12 As shown.

[0080] If the data to be transmitted is interference data, and only a portion of a 1-bit bit is subjected to level interference, then the interference start position and interference length need to be specified, and then encoded into the array to be transmitted, such as... Figure 13As shown.

[0081] 6. Check if the conditions for sending the customized data waveform are met. If the conditions are met, immediately enable DMA and then enable Timer, and data begins to be transferred to the GPIO output register. LIN_TXD and LIN RXD are shorted through the LIN transceiver, so data sent by LIN TXD can also be received on LIN RXD, thus completing the output of customized data waveforms on the LIN bus or interfering with the LIN bus data, such as... Figure 14 As shown.

[0082] 7. After the DMA completes the transfer of the specified length of data, a transfer completion interrupt is generated, and the Timer is turned off in the interrupt.

[0083] The present invention also provides an apparatus for implementing LIN consistency testing based on DMA data customization, comprising:

[0084] The input unit is used to obtain test commands;

[0085] A waveform customization unit is used to customize a test waveform according to the test command, wherein the customization of the test waveform includes level waveform customization and data waveform customization;

[0086] The output unit is used to sequentially enable Direct Memory Access (DMA) and Timer when the test waveform meets the transmission conditions, and output the customized test waveform to the LIN bus general purpose input / output port GPIO to realize data output or data interference to the LIN bus.

[0087] The device can be implemented using the methods described above, and will not be elaborated further here.

[0088] In the description of this specification, the references to terms such as "one embodiment," "some embodiments," "illustrative embodiment," "example," "specific example," or "some examples," etc., indicate that a specific feature, structure, material, or characteristic described in connection with the embodiment or example is included in at least one embodiment or example of the invention. In this specification, the illustrative expressions of the above terms do not necessarily refer to the same embodiment or example. Furthermore, the specific features, structures, materials, or characteristics described may be combined in any suitable manner in one or more embodiments or examples.

[0089] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, and not to limit them; although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some or all of the technical features therein; and these modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the technical solutions of the embodiments of the present invention.

Claims

1. A method for implementing LIN consistency testing based on DMA data customization, characterized in that, include: Get the test command; According to the test command, the test waveform is customized, wherein the customization of the test waveform includes the customization of the level waveform and the customization of the data waveform; When the test waveform meets the transmission conditions, Direct Memory Access (DMA) and Timer are enabled in sequence, and the customized test waveform is output to the LIN bus general purpose input / output port GPIO to achieve data output or data interference to the LIN bus. The method also includes: multiplexing the LIN bus transmit pin LIN_TXD as a GPIO output function.

2. The method for implementing LIN consistency testing based on DMA data customization according to claim 1, characterized in that, The method further includes: defining a structure for encoding the data frames required for LIN conformance testing; and allocating a global array in random access memory (RAM) to store the encoded data formed by the customized test waveform.

3. The method for implementing LIN consistency testing based on DMA data customization according to claim 2, characterized in that, The customized level waveforms include: customizing the length of the frame header, customizing the length of the response, and customizing the length of the wake-up signal.

4. The method for implementing LIN consistency testing based on DMA data customization according to claim 3, characterized in that, The customization of the length of the frame header and response further includes: customizing the length of the LIN data frame interval (break), interval delimiter, inter-byte space, and response space.

5. The method for implementing LIN consistency testing based on DMA data customization according to claim 3, characterized in that, The method further includes: encapsulating a level waveform encoding interface to encode the break interval, break delimeter, inter-byte space, and response interval into level data of a specified length.

6. The method for implementing LIN consistency testing based on DMA data customization according to claim 1, characterized in that, The data waveform customization is used to interfere with and flip certain bits or a segment of a bit in the data to form interference data.

7. The method for implementing LIN consistency testing based on DMA data customization according to claim 6, characterized in that, The method further includes: encapsulating a data waveform encoding interface to complete the encoding of the original data or interference data.

8. An apparatus for implementing LIN consistency testing based on DMA data, characterized in that, include: The input unit is used to obtain test commands; A waveform customization unit is used to customize a test waveform according to the test command, wherein the customization of the test waveform includes level waveform customization and data waveform customization; The output unit is used to sequentially enable Direct Memory Access (DMA) and Timer when the test waveform meets the transmission conditions, and output the customized test waveform to the general purpose input / output port (GPIO) of the LIN bus to realize data output or data interference to the LIN bus; wherein, the device multiplexes the LIN bus transmit pin LIN_TXD as a GPIO output function.

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