Transient stability control and analysis method based on grid-forming vsc current limiting strategy

Abstract

The application discloses a kind of based on network type VSC current limiting strategy's transient stability control and analysis method, its steps include:1, in voltage control loop using anti-integrator saturation module;2, introduce current saturation angle and determine its optimum value;3, based on the introduction current saturation angle to improve VSC current limiting module;4, based on current limiting module and current saturation angle, using phase diagram to analyze system transient stability.The application introduces current saturation angle to carry out transient stability control, can effectively promote the transient stability of the system formed by network type VSC and infinite grid, and the transient stability of network type VSC is qualitatively analyzed by phase diagram.

Description

Technical Field

[0001] This invention relates to the field of transient stability control and analysis of network-type VSCs, specifically to a transient stability control and analysis method based on a current limiting strategy for network-type VSCs. Background Technology

[0002] New energy power generation will see vigorous development in the future. New energy power generation systems are connected to the grid via voltage source converters (VSCs) and will be prevalent in the grid in the future. The advantage of VSCs is their complete controllability; power conversion and transmission can be achieved through different control methods depending on the characteristics of the renewable energy source and the strength of the grid. Droop control simulates the dynamic characteristics of a traditional synchronous generator (SG) in terms of frequency and voltage regulation, but still lacks inertia. VSCs controlled by virtual synchronous generators (VSGs) have damping characteristics and inertial features similar to traditional synchronous generators, enabling them to respond to grid regulation requirements. Due to the voltage source characteristics of grid-connected VSCs, special attention needs to be paid to overcurrent protection. Compared to synchronous generators that can support up to seven times their rated current, grid-connected VSCs can only handle overcurrents typically around 20%. Therefore, grid-connected converters must rely solely on control to prevent extreme faults such as short circuits, heavy load connections, line tripping / reclosing, and voltage phase jumps, while simultaneously maintaining synchronization with the power system.

[0003] To limit current during large transients, numerous control strategies have been proposed for network-type VSCs. One strategy uses a current saturation algorithm (CSA) to limit current. This technique essentially applies a reference current generated by the VSC by saturating the reference current during overcurrent. Another well-known current-limiting strategy is based on virtual impedance (VI), which simulates the effect of impedance when the current exceeds its rated value. This method has demonstrated its effectiveness in limiting current transients under various event conditions while maintaining the voltage source characteristics of the power converter. However, the aforementioned current-limiting strategies also suffer from difficulties in mode switching, complex parameter design, and challenges in post-fault recovery. Therefore, improving current-limiting strategies, evaluating VSC transient stability through new methods, and achieving transient stability analysis and control are problems that urgently need to be solved by those skilled in the art. Summary of the Invention

[0004] To address the problems existing in the application of current limiting strategies for grid-type VSCs in transient stability analysis and control, this invention proposes a transient stability control and analysis method based on the current limiting strategy of grid-type VSCs, aiming to effectively improve the transient stability of the system composed of grid-type VSCs and infinite power grids, and to qualitatively analyze the transient stability of grid-type VSCs through phase diagrams.

[0005] To achieve the above-mentioned objectives, the present invention adopts the following technical solution:

[0006] The transient stability control method based on a network-type VSC current limiting strategy of the present invention is characterized by the following steps:

[0007] Step S1: Design an anti-integrator saturation module in the voltage control loop, thereby using equation (1) to shield the integrator under the current limiting strategy:

[0008]

[0009] In equation (1), I dref and I qref These are the d-axis and q-axis current reference values ​​output by the voltage control loop, respectively; I s For the dq axis composite current; I m y is the maximum value of the saturation current; y is the output of the anti-integrator saturation module. When the output is 1, the integrator of the voltage control loop is not shielded; when the output is 0, the integrator of the voltage control loop is shielded.

[0010] S2: Introduce the current saturation angle and determine its optimal value:

[0011] Define the d-axis of the voltage source converter (VSC) in the dq coordinate system as parallel to the grid voltage. The angle δ′ between them is the virtual power angle. When the power grid is operating normally, the active power P and reactive power Q output by the VSC under steady state are calculated by equation (2):

[0012]

[0013] In equation (3), R and X are the equivalent resistance and equivalent reactance between the VSC and the infinite grid, respectively; U and E are the voltage amplitude at the common coupling point and the grid voltage amplitude, respectively.

[0014] Define the current saturation angle φ as the maximum value of the saturation current I. m The angle with the d-axis; after the fault, the active power output by VSC is calculated by equation (3):

[0015]

[0016] In equation (3), P′ is the active power output by the VSC after the fault; E sag This represents the magnitude of the voltage drop in the power grid after the fault.

[0017] Using the constraint condition of the current saturation angle φ in equation (4):

[0018]

[0019] Considering the variation of the short-circuit ratio (SCR), the optimal value of the current saturation angle (φ) can be obtained using equation (5). opt :

[0020]

[0021] In equation (5), SCR min and SCR max These are the maximum and minimum values ​​of the short-circuit ratio (SCR), respectively.

[0022] S3: Using equation (6), a current limiting module is designed. By controlling the saturation current angle φ, the transient stability of the system composed of the grid-type VSC and the infinite power grid can be controlled.

[0023]

[0024] In equation (6), I drefs and I qrefs These are the d-axis and q-axis current reference values ​​output by the current limiting module, respectively.

[0025] The transient stability analysis method based on the current limiting strategy of a grid-type VSC in this invention is characterized by using phase diagrams to analyze the transient stability of the system composed of the grid-type VSC and an infinite power grid, and includes the following steps:

[0026] S4: Based on the current limiting module and current saturation angle φ:

[0027] S4.1: Using equation (7), the control equations for the active and reactive power loops of the VSC are obtained:

[0028]

[0029] In equation (7), ω vsc ω0 and ω0 are the output frequency and frequency reference value of VSC, respectively; J is the moment of inertia; D p P is the damping coefficient; ref Q is the reference value for the active power of the VSC. ref K is the reference value for VSC reactive power. q is the reactive power integral coefficient; U0 is the voltage reference value of VSC; s is the Laplace operator;

[0030] S4.2: Equation (8) is obtained from equation (7):

[0031]

[0032] S4.3: Let variable x1 = δ′, variable x2 = dδ′ / dt, and variable x3 = U, and then use equation (9) to construct the state equation before the fault occurs:

[0033]

[0034] In equation (9), and Let x1, x2, and x3 represent the derivatives of x1, x2, and x3 with respect to time, respectively.

[0035] S4.4: Construct the state equation after the fault occurs using equation (10):

[0036]

[0037] S4.5: Draw a phase diagram based on the two state equations to obtain the transient stability analysis results of the system.

[0038] The present invention provides an electronic device, including a memory and a processor, wherein the memory is used to store a program that supports the processor in executing the transient stability control and analysis method, and the processor is configured to execute the program stored in the memory.

[0039] The present invention discloses a computer-readable storage medium on which a computer program is stored, wherein the computer program is executed by a processor to perform the steps of the transient stability control and analysis method.

[0040] Compared with the prior art, the beneficial effects of the present invention are as follows:

[0041] 1) This invention addresses the problems existing in the current limiting circuit of the existing network-type VSC by adopting anti-integrator saturation measures in the voltage control loop to shield the integrator during the overcurrent stage and prevent the integrator output from being too large after switching back to normal operation.

[0042] 2) Compared with other methods, the current limiting strategy of the grid-type VSC proposed in this invention introduces the current saturation angle, determines the optimal value of the current saturation angle and thereby improves the current limiting strategy, effectively enhancing the transient stability of the system composed of the grid-type VSC and the infinite power grid.

[0043] 3) This invention utilizes the phase diagram analysis method to qualitatively analyze the impact of the introduced current saturation angle on the transient stability of the system composed of a grid-type VSC and an infinite power grid, and obtains the transient stability analysis results of the system. Attached Figure Description

[0044] Figure 1 This is a schematic diagram of the VSC grid connection method used in this invention;

[0045] Figure 2 This is a structural diagram of the voltage control loop anti-saturation measure for the integrator in this invention;

[0046] Figure 3This is the phasor diagram of the current saturation strategy used in the VSC of this invention;

[0047] Figure 4 This is a graph showing the d-axis current output by the current limiting circuit as a function of time when the current saturation angle φ is 0.3.

[0048] Figure 5 This is a comparison chart showing the changes in inverter voltage amplitude and virtual power angle over time in the Simulink model when φ is 0.3 and 0 respectively.

[0049] Figure 6 This is a comparison chart showing the changes in virtual power angle, virtual power angle change rate, and inverter voltage amplitude over time, obtained by using the phase diagram program when φ is 0.3 and 0 respectively.

[0050] Figure 7 This is a comparison chart showing the virtual power angle change rate and inverter voltage amplitude as a function of virtual power angle, obtained by using the phase diagram program when φ is 0.3 and 0 respectively. Detailed Implementation

[0051] In this embodiment, a transient stability control and analysis method based on a network-type VSC current limiting strategy is proposed. This method introduces the current saturation angle for transient stability control to improve the transient stability of the system. Specifically, it includes the following steps:

[0052] Step S1: Design an anti-integrator saturation module in the voltage control loop. The grid-connected VSC configuration used in this embodiment is shown in the diagram below. Figure 1 As shown; in a network-type VSC, an automatic current-limiting strategy is applied during overcurrent. To prevent the integrator in the voltage control loop from continuing to integrate while the current-limiting strategy is in effect, thus preventing the integrator from functioning correctly when the current-limiting strategy is exited, the integrator in the voltage control loop under the current-limiting strategy needs to be shielded. The structural diagram of the voltage control loop anti-integrator saturation measures is shown below. Figure 2 .

[0053] The integrator under the rate limiting strategy is masked using equation (1):

[0054]

[0055] In equation (1), I dref and I qref These are the d-axis and q-axis current reference values ​​output by the voltage control loop, respectively; I s For the dq axis composite current; I m y is the maximum value of the saturation current, which is generally taken as 1.2pu; y is the output of the anti-integrator saturation module. When the output is 1, the integrator of the voltage control loop is not shielded. When the output is 0, the integrator of the voltage control loop is shielded.

[0056] S2: Introduce the current saturation angle and determine its optimal value:

[0057] Analogous to the concept of the power angle, the d-axis of the VSC in the dq coordinate system is defined to be perpendicular to the grid voltage. The angle δ′ between them is the virtual power angle. When the power grid is operating normally, the active power P and reactive power Q output by the VSC under steady state are calculated by equation (2):

[0058]

[0059] In equation (3), R and X are the equivalent resistance and equivalent reactance between the VSC and the infinite grid, respectively; U and E are the voltage amplitude at the common coupling point and the grid voltage amplitude, respectively.

[0060] Define the current saturation angle φ as the maximum value of the saturation current I. m The angle with the d-axis. After the fault, the current saturation angle φ is introduced, and the current limiting strategy is put into operation. At this time, the resistance is ignored, and the active power output of VSC is calculated by equation (3):

[0061]

[0062] In equation (3), P′ is the active power output of VSC after the fault; E sag This represents the magnitude of the grid voltage drop after the fault. The phasor diagram of the VSC using the current saturation strategy is shown below. Figure 3 As shown.

[0063] A reasonable value for the current saturation angle φ can increase the stability margin after a fault. The constraint condition for the current saturation angle φ is obtained by using equation (4):

[0064]

[0065] Considering the variation of the short-circuit ratio (SCR), the optimal value of the current saturation angle (φ) can be obtained using equation (5). opt :

[0066]

[0067] In equation (5), SCR min and SCR max These represent the maximum and minimum short-circuit ratios, respectively.

[0068] S3: Introducing the current saturation angle φ, and using Equation (6) to design a current limiting module, thereby improving the transient stability of the system composed of the grid-type VSC and the infinite power grid by controlling the saturation current angle φ:

[0069]

[0070] In equation (6), I drefs and Iqrefs These are the d-axis and q-axis current reference values ​​output by the current limiting circuit, respectively.

[0071] S4: Based on the current limiting module and current saturation angle φ:

[0072] S4.1: The active power loop of the network-type VSC uses virtual synchronous machine control, and the reactive power loop uses an integral regulator to achieve zero-error reactive power control. Using equation (7), the control equations for the VSC active and reactive power loops are obtained:

[0073]

[0074] In equation (7), ω vsc ω0 and ω0 are the output frequency and frequency reference value of VSC, respectively; J is the moment of inertia; D p P is the damping coefficient; ref This is the VSC active power reference value; Q ref VSC reactive power reference value; K q U0 is the reactive power integral coefficient; U0 is the VSC voltage reference value; s is the Laplace operator.

[0075] S4.2: Equation (8) is obtained from equation (7):

[0076]

[0077] S4.3: Let variable x1 = δ′, variable x2 = dδ′ / dt, and variable x3 = U, and then use equation (9) to construct the state equation before the fault occurs:

[0078]

[0079] In equation (9), and Let x1, x2, and x3 represent the derivatives of x1, x2, and x3 with respect to time, respectively.

[0080] S4.4: Construct the state equation after the fault occurs using equation (10):

[0081]

[0082] S4.5: Draw a phase diagram based on the two state equations to obtain the transient stability analysis results of the system.

[0083] In this embodiment, an electronic device includes a memory and a processor. The memory stores a program that supports the processor in executing the above-described method, and the processor is configured to execute the program stored in the memory.

[0084] In this embodiment, a computer-readable storage medium stores a computer program, which is executed by a processor to perform the steps of the above method.

[0085] To verify the effect of the proposed current saturation angle on transient stability and the feasibility of phase diagram analysis for transient stability, a model of a single-machine VSC connected to an infinite grid and a phase diagram analysis program were built in Matlab / Simulink. Simulation results verified the feasibility of the strategy. The model was set to experience a three-phase short circuit in the grid at t=5s, causing the grid voltage to drop to 0.2 pu; at t=5.8s, the fault was cleared, and the grid voltage recovered. The simulation results were analyzed to determine the duration of the current limiting strategy, the impact of the current saturation angle φ on parameter recovery, and a comparison with phase diagram analysis results. Figure 4 The d-axis current output by the current limiting circuit when the current saturation angle φ = 0.3; Figure 5 The simulation results show a comparison of the inverter voltage amplitude and virtual power angle over time in the Simulink model when φ is set to 0.3 and 0, respectively. Simulink simulation results indicate that, under the set conditions, the value of the current saturation angle φ is related to whether the system can recover to its original state after a fault. When φ = 0, the system cannot recover to its pre-fault state; when φ = 0.3, the system can recover to its pre-fault state; and when φ = 0.3, the current limiting strategy lasts for approximately 6.6 seconds.

[0086] Phase diagram analysis using Matlab. Figure 6 Comparison of the virtual power angle, virtual power angle change rate, and inverter voltage amplitude changes over time when φ is 0.3 and 0 respectively, using the phase diagram program; Figure 7 The virtual power angle change rate and inverter voltage amplitude as a function of the virtual power angle were compared using the phase diagram program when φ was set to 0.3 and 0, respectively. Simulation results from the phase diagram analysis program show that the value of the current saturation angle φ is related to whether the system can recover to its original state after a fault. When φ = 0, the system cannot recover to the state before the fault; when φ = 0.3, the system can recover to the state before the fault. The phase diagram program verifies the conclusions of the Simulink model. By establishing the state equations and drawing the phase diagram, the effect of introducing the saturation current angle φ was verified, proving that introducing the saturation current angle φ can improve the transient stability of the system.

[0087] The simulation results show that introducing the current saturation angle φ, compared to not introducing it, can restore the voltage and phase angle to the pre-fault level under the same voltage drop, thus proving the effectiveness of the proposed strategy.

Claims

1. A transient stability control method based on a network-type VSC current limiting strategy, characterized in that, Includes the following steps: Step S1: Design an anti-integrator saturation module in the voltage control loop, thereby using equation (1) to shield the integrator under the current limiting strategy: (1) In equation (1), I dref and I qref These are the d-axis and q-axis current reference values ​​output by the voltage control loop, respectively; I s For the dq axis composite current; I m y represents the maximum saturation current; y is the output of the anti-integrator saturation module. When the output is 1, the integrator of the voltage control loop is not shielded; when the output is 0, the integrator of the voltage control loop is shielded. S2: Introduce the current saturation angle and determine its optimal value: Define the d-axis of the voltage source converter (VSC) in the dq coordinate system as parallel to the grid voltage. Angle between As a virtual power angle, when the power grid is operating normally, the active power P and reactive power Q output by the VSC under steady state are calculated by equation (2): (2) In equation (3), R and X are the equivalent resistance and equivalent reactance between the VSC and the infinite grid, respectively; U and E are the voltage amplitude at the common coupling point and the grid voltage amplitude, respectively. Define the current saturation angle ϕ as the maximum value of the saturation current I. m The angle with the d-axis; after the fault, the active power output by VSC is calculated by equation (3): (3) In equation (3), This represents the active power output by the VSC after the fault. This represents the magnitude of the voltage drop in the power grid after the fault. Using the constraint condition of the current saturation angle ϕ in equation (4): (4) Considering the variation of the short-circuit ratio (SCR), the optimal value of the current saturation angle (ϕ) is obtained using equation (5). opt : (5) In equation (5), SCR min and SCR max These are the maximum and minimum values ​​of the short-circuit ratio (SCR), respectively. S3: Using equation (6), a current limiting module is designed. By controlling the saturation current angle ϕ, the transient stability of the system consisting of the grid-type VSC and the infinite power grid is controlled. (6) In equation (6), I drefs and I qrefs These are the d-axis and q-axis current reference values ​​output by the current limiting module, respectively.

2. A transient stability analysis method based on a network-type VSC current limiting strategy, characterized in that, The transient stability analysis method is based on the transient stability control method of claim 1. It uses phase diagrams to analyze the transient stability of the system composed of the grid-type VSC and the infinite power grid, and includes the following steps: S4: Based on the current limiting module and the current saturation angle ϕ: S4.1: Using equation (7), the control equations for the active and reactive power loops of the VSC are obtained: (7) In equation (7), ω vsc ω0 and ω0 are the output frequency and frequency reference value of VSC, respectively; J is the moment of inertia; D p P is the damping coefficient; ref Q is the reference value for the active power of the VSC. ref K is the reference value for VSC reactive power. q U0 is the reactive power integral coefficient; U0 is the voltage reference value of VSC. s is the Laplace operator; S4.2: Equation (8) is obtained from equation (7): (8) S4.3: Let variable x1 = variable x2= , variable x3=U, and thus use equation (9) to construct the state equation before the fault occurs: (9) In equation (9), , and Let x1, x2, and x3 represent the derivatives of x1, x2, and x3 with respect to time, respectively. S4.4: Construct the state equation after the fault occurs using equation (10): (10) S4.5: Draw a phase diagram based on the two state equations to obtain the transient stability analysis results of the system.

3. An electronic device, comprising a memory and a processor, characterized in that, The memory is used to store programs that support the processor in executing the transient stability control and analysis method of claim 1 or 2, and the processor is configured to execute the programs stored in the memory.

4. A computer-readable storage medium storing a computer program thereon, characterized in that, The computer program is executed by the processor to perform the steps of the transient stability control and analysis method according to claim 1 or 2.

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