A high order curvature temperature compensated bandgap reference circuit

Abstract

The application discloses a high-order curvature temperature-compensated bandgap reference circuit, characterized by comprising a positive temperature current generating circuit, a negative temperature current generating circuit, a high-order temperature compensation circuit and a current-voltage conversion circuit which are connected in sequence, the positive temperature current generating circuit is used for generating a current positively related to absolute temperature, and the negative temperature current generating circuit is used for generating a current negatively related to absolute temperature; the high-order temperature compensation circuit generates a compensation current for compensating high-order temperature-related components in the current; and the voltage conversion circuit converts the current after superposition of the three currents into a bandgap reference voltage VREF. The application improves the stability of the circuit system.

Description

TECHNICAL FIELD

[0001] The present application belongs to the field of analog integrated circuit design. BACKGROUND

[0002] In most analog and mixed signal circuit systems, bandgap reference circuits for generating constant voltage reference are very important components in various circuit systems. Since the circuit systems need to work in various environments, and the voltage output precision of the bandgap reference circuit determines the maximum achievable precision of the overall circuit system, the low temperature coefficient of the reference voltage is crucial.

[0003] At present, the compensation structure of the bandgap reference mainly has three types, the first type is Banba type bandgap reference structure, the disadvantage of this structure is that there is only first-order temperature compensation, which leads to large temperature drift of the output reference voltage; the second type is a bandgap reference structure with segmented linear compensation, the disadvantage of this structure is that the structure of multiple segmented compensation branches is complex, which increases the power consumption of the reference circuit; the third type is a bandgap reference structure with resistance temperature characteristic compensation, the disadvantage of this structure is that the process requirement of the resistance is high, and a lot of trimming needs to be done. SUMMARY

[0004] The present application provides a high-order curvature temperature compensation bandgap reference circuit.

[0005] The present application provides a high-order curvature temperature compensation bandgap reference circuit, which comprises positive temperature current generating circuit, negative temperature current generating circuit, high-order temperature compensation circuit and current-voltage conversion circuit connected in sequence, the positive temperature current generating circuit is used for generating current I PTAT positively related to absolute temperature; the negative temperature current generating circuit is used for generating current I CTAT negatively related to absolute temperature; the high-order temperature compensation circuit generates compensation current I COMP for compensating the high-order temperature related components in the current; the voltage conversion circuit converts the current I PTAT , current I CTAT and the current after superposition of compensation current I COMP into bandgap reference voltage VREF.

[0006] Further, the positive temperature current generating circuit comprises a first amplifier, first and second bipolar PNP transistors, first and second P-type field effect transistors and a first resistor; the sources of the first and second P-type field effect transistors are connected to a power supply VDD, the gate of the first P-type field effect transistor is connected to the gate of the second P-type field effect transistor, the output of the high-order temperature compensation circuit and the first amplifier, the non-inverting input of the first amplifier is connected to the drain of the first P-type field effect transistor and the source of the first bipolar PNP transistor, the inverting input of the first amplifier is connected to the drain of the second P-type field effect transistor, one end of the first resistor is connected to the negative temperature current generating circuit, the other end of the first resistor is connected to the source of the second bipolar PNP transistor, and the gates and drains of the first and second bipolar PNP transistors are grounded.

[0007] Further, the negative temperature current generating circuit comprises a second operational amplifier, a third P-type field effect transistor and a second resistor; the non-inverting input of the second operational amplifier is connected to the positive temperature current generating circuit, the inverting input of the second operational amplifier is connected to the drain of the third P-type field effect transistor and one end of the second resistor, the gate of the third P-type field effect transistor is connected to the output of the second operational amplifier and the high-order temperature compensation circuit, the source of the third P-type field effect transistor is connected to the power supply VDD, and the other end of the second resistor is grounded.

[0008] Further, the high-order temperature compensation circuit comprises first to fourth N-type field effect transistors, a fourth and fifth P-type field effect transistor, a third operational amplifier and a third resistor; the gate of the first N-type field effect transistor is connected to the drain of the first N-type field effect transistor, the gate of the second N-type field effect transistor and the drain of the fourth P-type field effect transistor, the gate of the fourth P-type field effect transistor is connected to the positive temperature current generating circuit, the source of the fourth P-type field effect transistor is connected to the power supply VDD, the source of the fifth P-type field effect transistor is connected to the drain of the first N-type field effect transistor, one end of the third resistor, the gate of the third N-type field effect transistor, the gate of the fourth N-type field effect transistor, the drain of the fourth N-type field effect transistor and the voltage conversion circuit; the gate of the fifth P-type field effect transistor is connected to the negative temperature current generating circuit, and the source is connected to the power supply VDD; the drain of the fourth N-type field effect transistor is grounded, the other end of the third resistor is connected to the output of the third operational amplifier and the inverting input of the third operational amplifier, the non-inverting input of the third operational amplifier is connected to the source of the second N-type field effect transistor and the drain of the third N-type field effect transistor, the drain of the second N-type field effect transistor is connected to the power supply VDD, and the source of the third N-type field effect transistor is grounded.

[0009] Further, the current-voltage conversion circuit comprises a sixth P-type field effect transistor, a seventh P-type field effect transistor, a fifth N-type field effect transistor and a fourth resistor; the gate of the fifth N-type field effect transistor is connected with the high-order temperature compensation circuit, the drain of the fifth N-type field effect transistor is connected with the drain of the sixth P-type field effect transistor, the gate of the sixth P-type field effect transistor is connected with the gate of the seventh P-type field effect transistor, the source of the sixth and seventh P-type field effect transistors are connected with the power supply VDD, the drain of the seventh P-type field effect transistor is connected with one end of the fourth resistor as the output end of the current-voltage conversion circuit, and the other end of the fourth resistor is grounded.

[0010] Beneficial effects: The application effectively solves the problem of high temperature coefficient of output voltage of the traditional bandgap reference circuit, reduces the temperature drift characteristic through the high-order temperature compensation circuit with feedback loop, and improves the stability of the circuit system, and the structure of the application is simple, the number of transistors used is small, and the layout area is reduced; compared with other traditional high-order compensation bandgap reference circuit schemes, the power consumption is significantly reduced because the high-order compensation circuit of the application has few current branches and small current in each branch. BRIEF DESCRIPTION OF DRAWINGS

[0011] Figure 1 is a system block diagram of the application;

[0012] Figure 2 is a circuit structure schematic diagram of the application;

[0013] Figure 3 is a comparison simulation diagram of output voltage temperature drift before and after high-order temperature compensation. DETAILED DESCRIPTION

[0014] The accompanying drawings, which form a part of the present application, are used to provide further understanding of the present application, and serve as an explanation of the illustrative embodiments of the present application, and do not constitute improper limitations to the present application.

[0015] As shown in Figure 1 , the high-order curvature temperature compensation bandgap reference circuit designed by the application comprises a positive temperature current generation circuit, a negative temperature current generation circuit, a high-order temperature compensation circuit and a current-voltage conversion circuit. The positive temperature current generation circuit is used to generate a current I PTAT , i.e. a positive temperature coefficient current, which is positively related to absolute temperature; the negative temperature current generation circuit is used to generate a current I CTAT , i.e. a negative temperature coefficient current, which is negatively related to absolute temperature; the high-order temperature compensation circuit is used to generate a compensation current I COMP , which is used to compensate the high-order temperature related component in the current; and the voltage conversion circuit is used to convert the superimposed current of the positive temperature coefficient current, the negative temperature coefficient current and the compensation current I COMP into a target voltage VREF.

[0016] As shown in Figure 2 The application designs a new high-order curvature temperature compensation bandgap reference circuit, which specifically designs positive temperature current generating circuit, negative temperature current generating circuit, high-order temperature compensation circuit and current-voltage conversion circuit in actual application process, including amplifier A1, amplifier A2, resistor R1, resistor R2, bipolar PNP transistor Q1, bipolar PNP transistor Q2, P-type field effect transistor MP1, P-type field effect transistor MP2, P-type field effect transistor MP3, power supply VDD, ground GND, P-type field effect transistor MP4, P-type field effect transistor MP5, N-type field effect transistor MN1, N-type field effect transistor MN2, amplifier A3, N-type field effect transistor MN3, N-type field effect transistor MN4, N-type field effect transistor MN5, P-type field effect transistor MP6, P-type field effect transistor MP7, resistor R4 and resistor R3.

[0017] The positive input end of the amplifier A1 is connected with the emitter of the bipolar PNP transistor Q1, the reverse input end of the amplifier A1 is connected with one end of the resistor R1, and the output end of the amplifier A1 is connected with the gate of the P-type field effect transistor MP1.

[0018] The base of the bipolar PNP transistor Q1 is connected to the ground GND, the emitter is connected with the positive input end of the amplifier A1, and the collector is connected to the ground GND.

[0019] The base of the bipolar PNP transistor Q2 is connected to the ground GND, the emitter is connected with one end of the resistor R1, and the collector is connected to the ground GND.

[0020] One end of the resistor R1 is connected to the emitter of the bipolar PNP transistor Q2, and the other end is connected to the reverse input end of the amplifier A1.

[0021] The gate of the P-type field effect transistor MP1 is connected with the output end of the amplifier A1, the source is connected with the power supply VDD, and the drain is connected with the emitter of the bipolar PNP transistor Q1.

[0022] The gate of the P-type field effect transistor MP2 is connected with the output end of the amplifier A1, the source is connected with the power supply VDD, and the drain is connected with one end of the resistor R1.

[0023] The gate of the P-type field effect transistor MP3 is connected with the output end of the amplifier A2, the source is connected with the power supply VDD, and the drain is connected with one end of the resistor R2.

[0024] The positive input terminal of the amplifier A2 is connected to the negative input terminal of the amplifier Al, the negative input terminal of the amplifier A2 is connected to one end of the resistor R2, and the output terminal of the amplifier A2 is connected to the gate of the P-type field effect transistor MP2;

[0025] One end of the resistor R2 is connected to the drain of the P-type field effect transistor MP3, and the other end is connected to the ground GND;

[0026] The gate of the P-type field effect transistor MP4 is connected to the output terminal of the amplifier Al, the source is connected to the power supply VDD, and the drain is connected to the drain of the N-type field effect transistor MN1;

[0027] The gate of the P-type field effect transistor MP5 is connected to the output terminal of the amplifier A2, the source is connected to the power supply VDD, and the drain is connected to the source of the N-type field effect transistor MN1;

[0028] The gate of the N-type field effect transistor MN1 is connected to the gate of the N-type field effect transistor MN2, the source is connected to the drain of the P-type field effect transistor MP5, and the drain is connected to the gate of the N-type field effect transistor MN1;

[0029] The gate of the N-type field effect transistor MN2 is connected to the drain of the N-type field effect transistor MN1, the source is connected to the positive input terminal of the amplifier A3, and the drain is connected to the power supply VDD;

[0030] The positive input terminal of the amplifier A3 is connected to the drain of the N-type field effect transistor MN3, the negative input terminal is connected to one end of the resistor R3, and the output terminal of the amplifier A3 is connected to one end of the resistor R3;

[0031] The gate of the N-type field effect transistor MN3 is connected to the gate of the N-type field effect transistor MN4, the drain is connected to the source of the N-type field effect transistor MN2, and the source is connected to the ground GND;

[0032] The gate of the N-type field effect transistor MN4 is connected to the gate of the N-type field effect transistor MN5, the source is connected to the ground GND, and the drain is connected to the gate and the source of the N-type field effect transistor MN1;

[0033] One end of the resistor R3 is connected to the output terminal of the amplifier A3, and the other end is connected to the drain of the N-type field effect transistor MN4;

[0034] The gate of the N-type field effect transistor MN5 is connected to the gate of the N-type field effect transistor MN4, the drain is connected to the drain of the P-type field effect transistor MP6, and the source is connected to the ground GND;

[0035] The gate of the P-type field effect transistor MP6 is connected to the gate of the P-type field effect transistor MP7, the source is connected to the power supply VDD, and the drain is connected to the drain of the N-type field effect transistor MN5, and also connected to the gate of the P-type field effect transistor MP6;

[0036] The gate of the P-type field effect transistor MP7 is connected to the gate of the P-type field effect transistor MP6, the source is connected to the power supply VDD, and the drain is connected to the resistor R4, and also connected to the output port VREF;

[0037] One end of the resistor R4 is connected to the drain of the P-type field effect transistor MP7, and the other end is connected to the ground GND;

[0038] I COMP is generated by the gate-source voltage V gs1 of the MN1 transistor and the gate-source voltage V gs2 of the MN2 transistor, and the voltage difference between the two gate-source voltages is applied to the circuit R3, thereby generating the compensation current I COMP . I PTAT provides a positive temperature coefficient current for the branch of the MN1 transistor, so that the gate-source voltage V gs1 of the MN1 transistor is related to the positive temperature coefficient. I CTAT The function of the current is mainly to superimpose the negative temperature coefficient component carried by this current on the positive temperature coefficient current I PTAT , and copy the current to the N-type field effect transistor MN2 through the current mirror composed of the N-type field effect transistor MN4 and the N-type field effect transistor MN3, so that the temperature characteristics of the currents flowing through the MN1 and MN2 transistors are not the same.

[0039] I PTAT is generated by the amplifier A1, the P-type field effect transistor MP1, the P-type field effect transistor MP2, the bipolar PNP transistor Q1, the bipolar PNP transistor Q2, and the resistor R1 in the circuit. The emitter-base voltage of the bipolar PNP transistor Q1 is V BE1 , the emitter-base voltage of the bipolar PNP transistor Q2 is V BE2 , and through the virtual short and virtual open characteristics of the amplifier A1, the voltage at the upper end of the resistor R1 is the emitter-base voltage of the bipolar PNP transistor Q1, which is V BE1 , and the voltage at the lower end of the resistor R1 is the emitter-base voltage of the bipolar PNP transistor Q2, which is V BE2 , so the voltage difference on the resistor R1 is V BE1 -V BE2 Since this voltage difference exhibits a positive temperature characteristic, the current generated on the resistor R1 also exhibits a positive temperature characteristic, that is, a positive temperature coefficient current I PTAT is generated on R1.

[0040] I CTAT The generation is through the amplifier A2, P-type field effect transistor MP3, bipolar PNP transistor Q1, resistor R2 in the circuit. Through the virtual short virtual break characteristics of amplifier A2, the upper end voltage of resistor R2 is the emitter-base voltage of bipolar PNP transistor Q1, which is V BE1 , and because the emitter-base voltage V BE1 embodies the negative temperature characteristic, so the current generated on the resistor R2 embodies the negative temperature characteristic, that is, the negative temperature coefficient current I CTAT .

[0041] Figure 3 The upper half of the simulation diagram in the range of-40℃~125℃, the output voltage is 2V, the output voltage temperature drift comparison simulation diagram before and after high-order temperature compensation; Figure 3 The upper half of the simulation diagram in the range of-40℃~125℃, the output voltage is 2V, the output voltage temperature drift comparison simulation diagram before and after high-order temperature compensation; Figure 3 The lower half of the simulation diagram in the range of-40℃~125℃, the output voltage is 2V, the output voltage temperature drift comparison simulation diagram before and after high-order temperature compensation;

[0042] In addition, it should be noted that various specific technical features described in the above specific embodiments can be combined in any appropriate manner without contradiction. In order to avoid unnecessary repetition, various possible combinations are not described again.

Claims

1. A high-order curvature temperature-compensated bandgap reference circuit, characterized in that, It includes a positive temperature current generating circuit, a negative temperature current generating circuit, a high-order temperature compensation circuit, and a current-to-voltage conversion circuit cascaded in sequence. The positive temperature current generating circuit is used to generate a current I that is positively correlated with the absolute temperature. PTAT The negative temperature current generating circuit is used to generate a current I that is negatively correlated with absolute temperature. CTAT The high-order temperature compensation circuit generates a compensation current I. COMP This is used to compensate for higher-order temperature-dependent components in the current. The voltage conversion circuit converts the current I PTAT Current I CTAT and compensation current I COMP The superimposed current is converted into a bandgap reference voltage VREF; The high-order temperature compensation circuit includes first to fourth N-type field-effect transistors, fourth and fifth P-type field-effect transistors, a third operational amplifier, and a third resistor. The gate of the first N-type field-effect transistor is connected to the drain of the first N-type field-effect transistor. The gate of the second N-type field-effect transistor and the drain of the fourth P-type field-effect transistor are connected. The gate of the fourth P-type field-effect transistor is connected to a positive temperature current generating circuit. The source of the fourth P-type field-effect transistor is connected to the power supply VDD. The source of the first N-type field-effect transistor is connected to the drain of the fifth P-type field-effect transistor. One end of the third resistor is connected to the gate of the third N-type field-effect transistor. The third resistor is connected to the gate of the fourth N-type field-effect transistor, the drain of the fourth N-type field-effect transistor, and the voltage conversion circuit; the gate of the fifth P-type field-effect transistor is connected to the negative temperature current generating circuit, and the source is connected to the power supply VDD; the drain of the fourth N-type field-effect transistor is grounded; the other end of the third resistor is connected to the output terminal and the inverting input terminal of the third operational amplifier; the non-inverting input terminal of the third operational amplifier is connected to the source of the second N-type field-effect transistor and the drain of the third N-type field-effect transistor; the drain of the second N-type field-effect transistor is connected to the power supply VDD; and the source of the third N-type field-effect transistor is grounded.

2. The high-order curvature temperature-compensated bandgap reference circuit according to claim 1, characterized in that, The positive temperature current generating circuit includes a first amplifier, first and second bipolar PNP transistors, first and second P-type field-effect transistors, and a first resistor. The sources of the first and second P-type field-effect transistors are connected to the power supply VDD. The gate of the first P-type field-effect transistor is connected to the gate of the second P-type field-effect transistor. A high-order temperature compensation circuit is connected to the output of the first amplifier. The non-inverting input of the first amplifier is connected to the drain of the first P-type field-effect transistor and the source of the first bipolar PNP transistor. The inverting input of the first amplifier is connected to the drain of the second P-type field-effect transistor. One end of the first resistor is connected to the negative temperature current generating circuit. The other end of the first resistor is connected to the source of the second bipolar PNP transistor. The gates and drains of the first and second bipolar PNP transistors are both grounded.

3. The high-order curvature temperature-compensated bandgap reference circuit according to claim 1, characterized in that, The negative temperature current generating circuit includes a second operational amplifier, a third P-type field-effect transistor, and a second resistor. The non-inverting input of the second operational amplifier is connected to the positive temperature current generating circuit, the inverting input is connected to the drain of the third P-type field-effect transistor, and one end of the second resistor. The gate of the third P-type field-effect transistor is connected to the output of the second operational amplifier and a high-order temperature compensation circuit. The source of the third P-type field-effect transistor is connected to the power supply VDD, and the other end of the second resistor is grounded.

4. The high-order curvature temperature-compensated bandgap reference circuit according to claim 1, characterized in that, The current-to-voltage conversion circuit includes a sixth and a seventh P-type field-effect transistor, a fifth N-type field-effect transistor, and a fourth resistor. The gate of the fifth N-type field-effect transistor is connected to a high-order temperature compensation circuit, and its drain is connected to the drain of the sixth P-type field-effect transistor. The gates of the sixth and seventh P-type field-effect transistors are connected to the power supply VDD. The drain of the seventh P-type field-effect transistor serves as the output terminal of the current-to-voltage conversion circuit and is connected to one end of the fourth resistor. The other end of the fourth resistor is grounded.

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