An intelligent production process, control system, device and storage medium for a circuit board

Abstract

An embodiment of this specification provides an intelligent production process, control system, device and storage medium for a circuit board. The system includes a full-automatic punching machine, a hole inspection machine, a data storage device and a processor. The full-automatic punching machine, the hole inspection machine and the data storage device are communicatively connected to the processor. The processor is configured to: obtain at least one set of preset punching parameters from the data storage device, generate an initial control instruction based on the at least one set of preset punching parameters; control the full-automatic punching machine to perform a trial punching on at least one layer of the circuit board based on the initial control instruction; adjust the at least one set of preset punching parameters based on at least one detection image of the at least one layer of the circuit board after the trial punching obtained by the hole inspection machine, generate adjusted punching parameters and send them to the data storage device; generate an updated control instruction based on the adjusted punching parameters; and control the full-automatic punching machine to perform a formal punching on at least one layer of the circuit board based on the updated control instruction.

Description

Technical Field

[0001] This specification relates to the technical field of circuit boards, and particularly to an intelligent production process, control system, device and storage medium of a circuit board. Background Art

[0002] With the growth of the overall technological level and the continuous improvement of the industrial level, the printed circuit board industry has developed vigorously, and the automated production and quality control of printed circuit boards (PCBs) have become a research hotspot in the industry.

[0003] CN107817774B provides an intelligent manufacturing process for printed circuit boards. Its process steps include raw material warehousing of PCB boards, raw material outbound of PCB boards, blanking, inner layer, lamination, drilling, electroplating, outer layer circuit, solder mask, text, immersion gold, forming, electrical testing, final inspection and packaging. Each process is connected together, automatically connected and adjusted through a production control system, and the production parameters are automatically optimized according to the test conditions, etc., to form an automated production of printed circuit boards. However, this invention does not involve trial drilling and adjusting the drilling parameters based on the situation of trial drilling, which may lead to inaccurate drilling parameters and a certain degree of scrap rate.

[0004] Therefore, it is desired to provide an intelligent production process, control system, device and storage medium of a circuit board to improve the quality and efficiency of circuit board drilling while realizing the automation and intelligence of circuit board drilling. Summary of the Invention

[0005] One or more embodiments of this specification provide an intelligent production control system for circuit boards. The intelligent production control system for circuit boards includes: a full-automatic drilling machine, a hole inspection machine, a data storage device and a processor. The full-automatic drilling machine, the hole inspection machine and the data storage device are communicatively connected to the processor. The processor is configured to: obtain at least one set of preset drilling parameters from the data storage device, generate an initial control instruction based on the at least one set of preset drilling parameters; control the full-automatic drilling machine to perform trial drilling on at least one layer of the circuit board based on the initial control instruction; adjust the at least one set of preset drilling parameters based on at least one detection image of the at least one layer of the circuit board after trial drilling obtained by the hole inspection machine, generate adjusted drilling parameters and send them to the data storage device; generate an updated control instruction based on the adjusted drilling parameters; and control the full-automatic drilling machine to perform formal drilling on the at least one layer of the circuit board based on the updated control instruction.

[0006] One embodiment of this specification provides an intelligent production process for circuit boards. The production process is executed by a processor of an intelligent production control system for circuit boards. The production process includes: obtaining at least one set of preset punching parameters, generating an initial control instruction based on the at least one set of preset punching parameters; controlling a full-automatic punching machine to perform trial punching on at least one layer of circuit boards based on the initial control instruction; adjusting the at least one set of preset punching parameters based on at least one detection image of the at least one layer of circuit boards after trial punching obtained by a hole inspection machine, and generating adjusted punching parameters; generating an updated control instruction based on the adjusted punching parameters; and controlling the full-automatic punching machine to perform formal punching on the at least one layer of circuit boards based on the updated control instruction.

[0007] One or more embodiments of this specification provide an intelligent production control device for circuit boards, including at least one memory and at least one processor. The at least one memory is used to store computer instructions, and the at least one processor executes the computer instructions or part of the instructions to implement the above-mentioned intelligent production process for circuit boards.

[0008] One or more embodiments of this specification provide a computer-readable storage medium. The storage medium stores computer instructions. When a computer reads the computer instructions in the storage medium, the computer executes the above-mentioned intelligent production process for circuit boards. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] This specification will be further described by way of exemplary embodiments, which will be described in detail through the drawings. These embodiments are not restrictive. In these embodiments, the same numbers represent the same structures, where:

[0010] Figure 1 is a schematic diagram of the system structure of an intelligent production control system for circuit boards shown in some embodiments of this specification;

[0011] Figure 2 is an exemplary flowchart of an intelligent production process for circuit boards shown in some embodiments of this specification;

[0012] Figure 3 is an exemplary schematic diagram of adjusting preset punching parameters shown in some embodiments of this specification;

[0013] Figure 4 is an exemplary schematic diagram of an evaluation model shown in some embodiments of this specification;

[0014] Figure 5 is an exemplary flowchart of determining a punching order shown in some embodiments of this specification. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0015] To more clearly illustrate the technical solutions of the embodiments of this specification, the following will briefly introduce the drawings required for the description of the embodiments. Obviously, the drawings in the following description are only some examples or embodiments of this specification. For those of ordinary skill in the art, without creative efforts, this specification can also be applied to other similar scenarios based on these drawings. Unless obvious from the language context or otherwise stated, the same reference numerals in the figures represent the same structure or operation.

[0016] It should be understood that the "system", "device", "unit" and / or "module" used herein is a method for distinguishing different components, elements, parts, portions or assemblies at different levels. However, if other words can achieve the same purpose, the said words can be replaced by other expressions.

[0017] As shown in this specification and the claims, unless the context clearly indicates an exception, words such as "a", "an", "one" and / or "the" are not specifically singular and may also include the plural. Generally speaking, the terms "comprising" and "including" only indicate the inclusion of the clearly identified steps and elements, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.

[0018] Flowcharts are used in this specification to illustrate the operations performed by the system according to the embodiments of this specification. It should be understood that the previous or subsequent operations do not necessarily need to be executed precisely in sequence. On the contrary, they can be executed in reverse order or simultaneously. At the same time, other operations can also be added to these processes, or one or several steps can be removed from these processes.

[0019] In recent years, the output of PCBs has been increasing continuously. In order to make circuit board manufacturing more automated and intelligent, improve production efficiency, and reduce the defective rate. CN107817774B discloses an intelligent manufacturing process for printed circuit boards. However, in the drilling stage, this patent only connects a fully automatic drilling machine and a hole inspection machine together, imports production parameters into the equipment, completes the automatic through-hole drilling operation of the PCB board, conducts automatic hole inspection, and automatically transfers the qualified boards to the electroplating workshop, and enters the unqualified product information into the production control system. It is difficult to timely detect problems occurring during drilling and cannot timely adjust production parameters. In view of this, in some embodiments of this specification, it is desired to provide an improved intelligent production process and control system for circuit boards, which can automatically update and adjust the drilling parameters of the circuit board by conducting trial drilling, reduce the number of repeated tests, and improve production efficiency.

[0020] Figure 1 It is a schematic structural diagram of an intelligent production control system for circuit boards shown in some embodiments of this specification.

[0021] In some embodiments, such as Figure 1 shown, the intelligent production control system 100 of the circuit board (hereinafter referred to as the system 100) may include a full-automatic punching machine 110, a hole inspection machine 120, a data storage device 130, and a processor 140. In some embodiments, the full-automatic punching machine 110, the hole inspection machine 120, the data storage device 130 are communicatively connected to the processor 140.

[0022] The full-automatic punching machine 110 may be a device for automatically punching the circuit board. For example, the full-automatic punching machine 110 may punch through holes, blind holes, buried holes, etc. on the circuit board. In some embodiments, the full-automatic punching machine 110 may include an interface for communicatively connecting with other modules or devices, for receiving control instructions, etc. In some embodiments, the full-automatic punching machine 110 may perform punching operations according to default parameters, control instructions, etc.

[0023] The hole inspection machine 120 may be a device for inspecting the punching condition of the circuit board. For example, the hole inspection machine 120 may include an X-RAY (X-ray) detector, etc. In some embodiments, the hole inspection machine 120 may include an image detection module, which can be used to obtain a circuit board detection image reflecting the punching condition.

[0024] The data storage device 130 may be used to store data and / or instructions (such as preset punching parameters, initial control instructions, etc.). The data storage device 130 may be configured separately or inside the processor 140.

[0025] The processor 140 refers to a device with computing functions. The processor 140 may obtain at least one set of preset punching parameters from the data storage device, generate an initial control instruction based on the at least one set of preset punching parameters; based on the initial control instruction, control the full-automatic punching machine to perform a trial punch on at least one layer of the circuit board; based on at least one detection image of at least one layer of the circuit board after the trial punch obtained by the hole inspection machine, adjust the at least one set of preset punching parameters, generate adjusted punching parameters and send them to the data storage device; generate an updated control instruction based on the adjusted punching parameters; based on the updated control instruction, control the full-automatic punching machine to perform a formal punch on at least one layer of the circuit board.

[0026] In some embodiments, the processor 140 may include one or more sub-processing devices (such as a single processing device or a multi-core multi-chip processing device). By way of example only, the processor 140 may include a central processing unit (CPU), an application specific integrated circuit (ASIC), etc. or any combination of the above.

[0027] Communicative connection may refer to a connection method that constitutes communication between devices through signal transmission and interaction. For example, communicative connection may include wireless connection, wired connection, serial cable connection, etc.

[0028] For more information about the preset punching parameters, control instructions and other parameters described above, please refer to other parts of this specification (such as Figure 2 etc.) and their related descriptions.

[0029] It should be noted that the above description of the intelligent production control system of the circuit board and its modules is only for convenience of description, and does not limit this specification within the scope of the examples given. It can be understood that for those skilled in the art, after understanding the principle of the system, they may, without departing from this principle, make any combination of the various modules, or form a subsystem and connect it with other modules.

[0030] Figure 2 is an exemplary flowchart of the intelligent production process of the circuit board shown in some embodiments of this specification. As Figure 2 shown, process 200 includes the following steps. In some embodiments, process 200 may be executed by processor 140.

[0031] Step 210, obtain at least one set of preset punching parameters, and generate an initial control instruction based on the at least one set of preset punching parameters.

[0032] The preset punching parameters may be the default parameters of the preset punching operation. For example, it includes at least one of the preset aperture, position, shape, depth, quantity, type, etc.

[0033] In some embodiments, the processor may obtain the preset punching parameters from the data storage device 130. The preset punching parameters may be set based on experience or punching requirements, or determined by querying the historical punching parameter table.

[0034] The initial control instruction may be an instruction for initially controlling the full-automatic punching machine 110 to perform punching. The control instruction may include instructions for controlling the aperture, position, shape, depth, quantity, type, etc. of the punching.

[0035] In some embodiments, the processor 140 may generate an initial control instruction based on at least one set of preset punching parameters in various feasible ways. For example, the preset punching parameters may be input into the full-automatic punching machine driver interface to automatically generate the initial control instruction.

[0036] Step 220, based on the initial control instruction, control the full-automatic punching machine to perform a trial punch on at least one layer of the circuit board.

[0037] In some embodiments, the processor 140 may send the initial control instruction to the full-automatic punching machine 110 through the communication connection with the full-automatic punching machine 110 to control the full-automatic punching machine 110 to perform a trial punch on at least one layer of the circuit board.

[0038] Step 230: Based on at least one detection image of at least one layer of the circuit board after trial drilling obtained by the hole inspection machine, adjust at least one set of preset drilling parameters to generate adjusted drilling parameters.

[0039] The detection image may refer to the image of the circuit board after trial drilling. For example, the hole inspection machine forms an image through the change in light intensity after detection light such as X-rays penetrates different density parts of the circuit board. The detection image can present the characteristics of the surface and internal holes of the circuit board and reflect the drilling situation of the circuit board.

[0040] In some embodiments, the processor 140 may detect the circuit board after trial drilling based on the hole inspection machine 120 to obtain detection images. When the circuit board includes multiple layers, multiple detection images can be obtained.

[0041] In some embodiments, for a multi-layer circuit board, when buried vias may be involved during drilling, it is necessary to obtain detection images in different cases. Among them, a buried via refers to drilling and electroplating between the inner layers of the circuit board for connecting two or more inner layers. For example, for a 4-layer circuit board, if there are no buried vias in the design drawing, only one trial drilling is required for the adhered 4-layer circuit board, and then one detection image can be obtained correspondingly, corresponding to one set of preset drilling parameters.

[0042] If there are buried vias in the design drawing, according to the situation of the buried vias, multiple trial drillings can be carried out successively, and multiple detection images can be obtained correspondingly, corresponding to multiple sets of preset drilling parameters. For example, for a 4-layer circuit board, the second and third layers are in the middle position, the first layer is the top layer, and the fourth layer is the bottom layer. The adhered second and third layer circuit boards can be subjected to the first trial drilling, corresponding to the first set of preset drilling parameters, to obtain the detection image after the first trial drilling; then through the lamination process, after adhering the first layer circuit board above the second layer and the fourth layer circuit board below the third layer, the second trial drilling is carried out, corresponding to the second set of preset drilling parameters, to obtain the detection image after the second trial drilling.

[0043] In some embodiments, the processor 140 may adjust at least one set of preset drilling parameters based on at least one detection image in various feasible ways. For example, analyze whether at least one of the characteristics of the holes in the detection image meets the requirements through image recognition, and adjust the drilling parameters corresponding to the hole characteristics (such as position) that do not meet the requirements based on experience.

[0044] In some embodiments, the processor may also adjust the preset drilling parameters based on a preset algorithm, which can be referred to Figure 3 and its related descriptions.

[0045] In some embodiments, the processor 140 may send the adjusted drilling parameters to the data storage device 130 for storage.

[0046] Step 240: Generate an updated control instruction based on the adjusted punching parameters.

[0047] In some embodiments, the processor 140 may generate an updated control instruction based on the adjusted punching parameters by the method of Step 210, which will not be elaborated here.

[0048] Step 250: Based on the updated control instruction, control the full-automatic punching machine to perform formal punching on at least one layer of the circuit board.

[0049] In some embodiments, the processor 140 may control the full-automatic punching machine 110 to perform formal punching on the circuit board based on the updated control instruction by the method of Step 220.

[0050] In some embodiments of this specification, by controlling the full-automatic punching machine to perform trial punching based on the initial control instruction, adjusting the preset punching parameters based on the detection image after the trial punching, generating the adjusted punching parameters and generating an updated control instruction, so as to perform formal punching, it can automatically update and adjust the punching parameters of the circuit board, reduce the number of repeated trials, and improve production efficiency.

[0051] It should be noted that the above description of the process 200 of the intelligent production process of the circuit board is only for illustration and explanation, and does not limit the scope of application of this specification. For those skilled in the art, various modifications and changes can be made to the process 200 under the guidance of this specification. However, these modifications and changes are still within the scope of this specification.

[0052] Figure 3 It is an exemplary schematic diagram of adjusting the preset punching parameters shown in some embodiments of this specification.

[0053] In some embodiments, as Figure 3 shown, the processor may further be used to extract the target image 320 based on at least one detection image 310; determine the punching feature 330 of the trial punching based on the target image 320; and adjust at least one set of preset punching parameters through a preset algorithm 340 based on the punching feature 330 of the trial punching to determine the adjusted punching parameters 350.

[0054] The target image may refer to the detection image of this trial punching. For example, the detection image may contain multiple detection images generated by multiple trial punchings on the circuit board, and the target image is the newly generated detection image during this trial punching process. For more content about the detection image, please refer to Figure 2 and its related descriptions.

[0055] In some embodiments, the processor 140 may extract a target image based on at least one detected image in various feasible ways. For example, the processor 140 may determine, based on the generation time of at least one detected image, the detected image with the generation time closest to the current trial punching time as the target image.

[0056] In some embodiments, in response to the trial punching being the first trial punching, the processor may determine at least one detected image as the target image; in response to the trial punching not being the first trial punching, the processor may remove all the holes on the first comparison image from at least one detected image to determine the target image.

[0057] In some embodiments, in response to the trial punching being the first trial punching, the processor may directly determine at least one detected image as the target image.

[0058] The first comparison image may be an image taken in advance for comparison before the current trial punching. In some embodiments, before each trial punching, the processor may collect a detected image of the circuit board through the hole inspection machine 120 and use it as the first comparison image.

[0059] In some embodiments, in response to the trial punching not being the first trial punching, the processor may remove all the holes on the first comparison image from at least one detected image by means of image recognition, artificial intelligence, etc. to determine the target image.

[0060] In some embodiments of the present specification, according to whether the trial punching is the first trial punching, the target image is determined in different ways, taking into account the influence of superimposing other circuit boards on the imaging shadow of the hole inspection machine on the basis of the previous punching, making the determination of the target image more accurate.

[0061] The punching feature of the trial punching may be the feature of the holes on the circuit board after the trial punching.

[0062] In some embodiments, the punching feature may include at least one of the type and corresponding quantity of the holes, the shape feature of the holes, and the position feature of the holes. In some embodiments, the processor 140 may process the target image through a feature extraction model to determine the punching feature of the trial punching.

[0063] The type and corresponding quantity of the holes may include through holes and their quantity, blind holes and their quantity, etc. A through hole is a hole drilled from the upper layer to the bottom layer of the circuit board; a blind hole is a via hole connecting the surface layer and the inner layer of the circuit board without penetrating the whole board. Different types of holes absorb X-rays of the hole inspection machine differently, and the shadow degrees reflected in the target image are different.

[0064] The shape features of the holes can be features related to the shape of the holes. In some embodiments, the shape features of the holes can include at least one of hole area, hole aspect ratio, hole wall roughness, hole verticality, etc. Among them, the hole area is the area enclosed by the hole edge contour; the hole aspect ratio is the diameter ratio of the hole in the longitudinal and transverse directions; the hole wall roughness includes the total area / total length of burrs, pointed tips, acute angles, etc. appearing at parts such as the hole edge; the hole verticality is the degree of deviation of the hole in the vertical direction.

[0065] The position features of the holes can be the position coordinates of the holes on the circuit board, which can be used to reflect whether the drill bit positioning is accurate and / or whether the drill bit slips. The position features of the holes can be determined based on the center point of the hole cross-sectional area.

[0066] In some embodiments, the feature extraction model can be a machine learning model or a neural network model. For example, a Convolutional Neural Networks (CNN) model, etc.

[0067] In some embodiments, the processor 140 can train a feature extraction model based on multiple first training samples and first labels through methods such as gradient descent. The first training samples can include multiple groups of sample target images, which can be obtained from historical detection images. The first label is the actual punching feature corresponding to each group of sample target images, which can be determined by manual annotation or automatic annotation.

[0068] Utilizing the feature extraction model to mine the correlation between the target image and the punching features can improve the accuracy and efficiency of punching feature determination, and provide data support for subsequent adjustment of the preset punching parameters based on trial punching.

[0069] The preset algorithm can include various feasible algorithms, such as the particle swarm algorithm, genetic algorithm, etc.

[0070] In some embodiments, the preset algorithm can also be a vector matching algorithm. Exemplarily, the processor 140 can construct a vector to be matched based on the preset punching parameters and punching features. The processor 140 can retrieve in the vector database based on the vector to be matched, obtain a reference vector whose vector distance from the vector to be matched meets the distance threshold, and determine the historical adjustment scheme corresponding to the reference vector as the current required adjustment scheme. Among them, the vector database is used to store several historical vectors and their corresponding historical adjustment schemes. The historical vectors are constructed based on historical preset punching parameters and historical punching features. The historical adjustment scheme includes the adjustment amount of each punching parameter.

[0071] For more content on adjusting the preset punching parameters through the preset algorithm, see Figure 4 and its related descriptions.

[0072] In some embodiments of the present specification, by determining the drilling characteristics of the trial drilling corresponding to the target image and adjusting the preset drilling parameters through a preset algorithm, the state of the hole after the trial drilling can be quantitatively analyzed, and the preset drilling parameters can be feedback-adjusted based on the actual drilling results, making the adjustment process of the preset drilling parameters more reasonable and improving the accuracy of the adjustment.

[0073] Figure 4 It is an exemplary schematic diagram of an evaluation model shown in some embodiments of the present specification.

[0074] In some embodiments, the processor 140 may be configured to generate at least one set of candidate drilling speeds based on at least one set of preset drilling parameters; perform at least one round of iterative update on at least one set of candidate drilling speeds based on the drilling characteristics of the trial drilling and a preset algorithm to determine at least one set of updated drilling speeds; and when a preset iteration condition is satisfied, stop the iteration and evaluate at least one set of updated drilling speeds through an evaluation algorithm to determine the target drilling speed.

[0075] The candidate drilling speed may be a drilling speed that may be selected and become the target drilling speed. In some embodiments, the candidate drilling speed is randomly increased or decreased by a certain value based on the preset drilling speed and then randomly combined. In some embodiments, a set of candidate drilling speeds may include multiple sets of sub-candidate drilling speeds corresponding to multiple sets of drill bits. The multiple sets of drill bits are grouped according to the drilling depth and the aperture size. When the drilling depth and the aperture size of the drill bits are the same, they are divided into one group. Each group of drill bits is connected to the same rotating main shaft, and the corresponding drilling speed is controlled by the main shaft.

[0076] In some embodiments, the processor 140 may randomly generate a set of candidate drilling speeds within a preset drilling speed range.

[0077] In some embodiments, among at least one set of candidate drilling speeds, the drilling speeds of at least one set of drill bits are related to the drilling depth. The drilling depth may be determined based on the drilling parameters. For the content about the drilling parameters, please refer to Figure 2 and its related descriptions.

[0078] In some embodiments, the drilling speeds of at least one set of drill bits may first increase and then decrease stage by stage as the drilling depth increases. For example, if the drilling depth of a certain set of drill bits is L millimeters, the drilling speed of this set of drill bits may be divided into three preset speed stages according to the increase in the drilling depth (for example, the speed in the first 1 / 3L millimeters is A, the speed in the middle 1 / 3L millimeters is B, and the speed in the last 1 / 3L millimeters is C). The division of the drilling depth may also be other ways, and the present specification does not limit this.

[0079] In some embodiments of the present specification, by correlating the drilling speed with the drilling depth, at the beginning of drilling, the drilling speed is slow first and then fast, avoiding the problem that the circuit board is easily damaged when the drill bit slips and the speed is too fast. At the end of drilling, the drilling speed is appropriately reduced, avoiding the sudden stop of the drilling machine from the state of high-speed rotation, which can extend the life of the drilling machine and improve the qualification rate.

[0080] In some embodiments, the processor may perform at least one round of iterative update on at least one set of candidate drilling speeds based on a preset algorithm to determine the updated drilling speed. The candidate drilling speed can be expressed as (X i1 , X i2 , …, X in , …, X iD ). Wherein, i represents the candidate drilling speed number, n represents the drill bit group number, and D represents the total number of drill bit groups.

[0081] In some embodiments, multiple initial candidate drilling speeds can be generated by a random method. For example, the initial candidate drilling speed can be randomly generated as (X 0 i1 , X 0 i2 , …, X 0 in , …, X 0 iD ), etc. Wherein, 0 is an identifier (representing the 0th round of iteration, that is, the initial value before the iteration starts).

[0082] In some embodiments, the iterative update may include multiple rounds, and when the preset iteration condition is satisfied, the iteration ends. The processor can obtain multiple updated candidate drilling speeds after multiple rounds of iteration based on multiple candidate drilling speeds. The updated candidate drilling speed can be used to determine the target drilling speed. In some embodiments, the processor can also determine the target drilling speed based on multiple updated candidate drilling speeds through an evaluation algorithm. For the content of determining the target drilling speed by the preset iteration condition and the evaluation algorithm, refer to the following description.

[0083] In some embodiments, at least one round of iterative update may include: for at least one candidate drilling speed, updating the multi-dimensional increment of the candidate drilling speed (that is, the multi-dimensional increment to be updated) to obtain the updated multi-dimensional increment; based on the updated multi-dimensional increment, updating the candidate drilling speed to determine the updated drilling speed.

[0084] The multi-dimensional increment refers to the update amplitude of the drilling speed corresponding to each group of drill bits in the candidate drilling speed. There can be multiple multi-dimensional increments, and multiple multi-dimensional increments can correspond one-to-one with multiple candidate drilling speeds. The multi-dimensional increment can include multiple sub-increments, and each sub-increment represents an element of each dimension of the multi-dimensional increment. Multiple sub-increments can correspond one-to-one with the drilling speeds of each group of drill bits in the candidate drilling speed. The multi-dimensional increment can be expressed as (V i1 ,V i2 ,…,V in ,…,V iD ), where V in represents the update amplitude of the drilling speed of the nth group of drill bits.

[0085] The iterative update of the candidate drilling speed by the processor includes iteratively updating the drilling speed of each group of drill bits based on the sub-increment corresponding to each group of drill bits. For example, the sub-increment can be added to the original drilling speed to obtain the updated drilling speed, that is, the updated drilling speed can be expressed as (X i1 +V i1 ,X i2 +V i2 ,…,X in +V in ,…,X iD +V iD ).

[0086] In some embodiments, the initial values of the multi-dimensional increments corresponding to multiple candidate drilling speeds can be the same or different. Among them, the initial multi-dimensional increment can be generated based on a random method.

[0087] In some embodiments, for at least one round of the multi-round iterative update, the processor can update the multi-dimensional increment based on the relationship between the candidate drilling speed and the historical optimal solution. For example, if the difference between the candidate drilling speed and the historical optimal solution is small, the corresponding multi-dimensional increment is small; otherwise, it is large.

[0088] In some embodiments, for the candidate drilling speed A, the historical optimal solution includes the individual optimal solution corresponding to the candidate drilling speed A, and the population optimal solution corresponding to multiple candidate drilling speeds. Among them, the population optimal solution corresponding to multiple candidate drilling speeds is the same, and the individual optimal solutions are different.

[0089] The individual optimal solution corresponding to the ith candidate drilling speed refers to the updated candidate drilling speed with the optimal evaluation value among the multiple updated candidate drilling speeds corresponding to the ith candidate drilling speed as of the current iterative update round. For example, at the Kth iteration, the individual optimal solution corresponding to the ith candidate drilling speed can be the updated candidate drilling speed with the optimal evaluation value among all the updated ith candidate drilling speeds during the previous K-1 iterations.

[0090] The population optimal solution corresponding to the i-th candidate punching speed refers to the updated candidate punching speed with the optimal evaluation value among all updated candidate punching speeds corresponding to multiple candidate punching speeds up to the current iteration round. For example, at the K-th iteration, the population optimal solution corresponding to the i-th candidate punching speed can be the updated candidate punching speed with the optimal evaluation value among all candidate punching speeds during the previous K - 1 iteration rounds.

[0091] The multi-dimensional increment corresponding to the updated candidate punching speed of the processor can be determined for each sub-component of the multi-dimensional increment based on the following formula: The updated sub-increment = weight 1 * the sub-increment of the original multi-dimensional component + weight 2 * the first difference + weight 3 * the second difference.

[0092] Among them, the first difference corresponds to the difference between the candidate punching speed and the individual optimal solution; the second difference corresponds to the difference between the candidate punching speed and the population optimal solution.

[0093] The weights 1, 2, and 3 can be preset or determined by other means. For example, they can be determined based on algorithms such as regression analysis.

[0094] The preset iteration condition can be that the evaluation value is greater than the preset value, or the evaluation value converges, or the iteration reaches a specified number of times, etc. The evaluation value can be the difference between the adjusted punching feature and the target punching feature, which is used to reflect the effect of punching based on the candidate punching speed. For the determination of the evaluation value, the adjusted punching feature and the target punching feature, reference can be made to Figure 4 and the relevant descriptions in the following text.

[0095] In some embodiments, after the iteration stops, the processor can evaluate at least one set of updated punching speeds through an evaluation algorithm to determine the target punching speed. In some embodiments, the processor can also evaluate the updated punching speeds generated in each iteration based on the evaluation algorithm without waiting for the iteration to stop.

[0096] The evaluation algorithm can refer to an algorithm used to evaluate the punching quality of circuit board punching based on the updated punching speed. For example, the evaluation algorithm can evaluate the difference between the adjusted punching feature of circuit board punching based on the updated punching speed and the target punching feature.

[0097] The target punching speed can be the punching speed finally used for formal punching.

[0098] In some embodiments, the processor can evaluate at least one set of updated punching speeds based on the evaluation algorithm to determine the evaluation value. For example, the processor can compare the adjusted punching feature of punching based on the updated candidate punching speed with the target punching feature and determine the reciprocal of the difference value as the evaluation value.

[0099] In some embodiments, the processor may first determine whether the types and corresponding quantities of holes in the adjusted punching features are the same as those in the target punching features. If they are different, the difference value is determined to be the maximum, for example, the preset maximum difference value is 100. If they are the same, the similarities between the shape features and position features in the adjusted punching features and the target punching features are determined. The greater the similarity, the smaller the difference value. For example, the similarity can be determined through image recognition technology.

[0100] In some embodiments, the processor may determine the candidate punching speed with the smallest difference from the target punching features among the candidate punching speeds as the target punching speed.

[0101] In some embodiments, the processor may determine the updated candidate punching speed with the maximum evaluation value as the target punching speed based on the evaluation value.

[0102] In some embodiments, the evaluation algorithm may include determining the differences between the adjusted punching feature vectors of at least one set of updated punching speeds and the target punching features; the adjusted punching features can be determined through an evaluation model.

[0103] In some embodiments, as Figure 4 shown, the evaluation model includes a feature extraction layer 420 and a feature prediction layer 480. The feature extraction layer 420 can be used to process the circuit board design diagram 410 to determine the circuit board feature vector 430; the feature prediction layer 480 can be used to process the punching features 440 of the trial punching, the circuit board feature vector 430, at least one set of updated punching speeds 450, the thicknesses of the aluminum plate and the backing plate 460, and the target punching speed 470 of the preset number of punching times before the current punching to determine the adjusted punching features 490.

[0104] The evaluation model can be the custom machine learning model described above, or it can be a neural network model, such as a convolutional neural network model.

[0105] In some embodiments, the circuit board design diagram 410 can be one layer or multiple layers. If it is multiple layers, the feature extraction layer 420 can be used to process each layer of the circuit board design diagram 410 to determine multiple circuit board feature vectors 430.

[0106] Among them, for the content of the punching features of the trial punching, reference can be made to Figure 3 and its related descriptions.

[0107] The circuit board feature vector 430 can be a vector used to reflect the line distribution and / or hole position distribution, etc. in the circuit board.

[0108] The adjusted punching feature may be a punching feature that may be obtained by trial punching based on the updated candidate punching feature vector. In some embodiments, the adjusted punching feature may be represented in the form of a vector, and the elements in the vector are respectively the type and quantity of holes, the shape features of the holes, and the position features of the holes.

[0109] The target punching feature may be the punching feature that is expected to be obtained. The punching quality corresponding to the target punching feature is relatively good.

[0110] For the content of determining the difference based on the adjusted punching feature and the target punching feature, refer to the above description.

[0111] The aluminum plate and the backing plate are tools used for assistance in the process of punching the circuit board. The thicknesses of the aluminum plate and the backing plate will affect the punching speed and depth.

[0112] The target punching speed for the preset number of punching times before the current punching may be: the target punching speeds during the previous several punchings of the current punching. For example, if the current punching is the 5th punching operation, the target punching speeds for the preset number of punching times before the current punching may be the target punching speeds during the 1st, 2nd, 3rd, and 4th punchings.

[0113] In some embodiments, the evaluation model may be obtained through joint training. The methods of joint training may include the gradient descent method and the like.

[0114] In some embodiments, the second training samples for training the evaluation model may include multiple groups of sample circuit board design diagrams, the punching features of sample trial punchings, the adjusted sample trial punching speeds, the thicknesses of the sample aluminum plate and the backing plate, and the target punching speeds of the previous several punchings in the sample history. The second training samples may be obtained from historical data. The second label may be the actual adjusted punching feature corresponding to the second training sample. In some embodiments, the processor may perform trial punching based on the adjusted sample trial punching speed, obtain the target image, and determine the actual adjusted punching feature based on the feature extraction model as the second label.

[0115] In some embodiments of this specification, through the machine learning model, by comprehensively considering multiple aspects and factors such as the circuit board design diagram, the trial punching feature, the circuit board feature vector, the punching feature of the trial punching, the updated punching speed, the thicknesses of the aluminum plate and the backing plate, and the target punching speed, the adjusted punching feature is obtained, making the result more accurate and improving the efficiency.

[0116] In some embodiments of this specification, by presetting the punching parameters and iterating the punching speed based on a preset algorithm, the punching speed is adjusted through iteration. If the preset iteration condition is met, it is evaluated through the evaluation algorithm, and finally the target punching speed is confirmed. The obtained target punching speed is more accurate, which is beneficial to improving the production quality.

[0117] Figure 5 is an exemplary flowchart for determining a drilling sequence as shown in some embodiments of this specification. As Figure 5 shown, process 500 includes the following steps. In some embodiments, process 500 can be executed by processor 140.

[0118] In some embodiments, the processor can also be used to determine the drilling sequence of at least one set of drill bits during drilling based on a preset method. For each set of drill bits, the implementation of determining the drilling sequence based on the preset method is as follows:

[0119] Step 510, generate at least one set of candidate drilling sequences, and determine at least one target drilling speed for at least one set of candidate drilling sequences through a preset algorithm.

[0120] The candidate drilling sequence can refer to a drilling sequence that may be selected and become the target drilling sequence. The drilling sequence is the sequence in which each set / each drill bit performs drilling. In some embodiments, the candidate drilling sequence can be default generated by processor 140. Randomly generate a preset number of groups (such as 10 groups) of candidate drilling sequences within the preset constraint conditions. The constraint conditions can be determined based on actual drilling requirements. For example, the constraint conditions can be that the holes corresponding to group A drill bits and the holes corresponding to group B drill bits need to be drilled separately; group C drill bits and group D drill bits must be combined for drilling, etc.

[0121] In some embodiments, the drilling sequence can include the number of operations and at least one set of drill bit numbers for each operation. Correspondingly, the candidate drilling sequence also includes the number of operations and at least one set of drill bit numbers for each operation.

[0122] The number of operations can be the number of drilling times required to complete the drilling of the circuit board.

[0123] The serial number of the drill bit can be a preset drill bit number.

[0124] For example, assume there are 5 sets of drill bits numbered A, B, C, D, and E respectively.

[0125] If the circuit board drilling requires 5 operations, and each time is operated by a set of drill bits alone, the drilling sequence can be A→B→C→D→E, or C→D→E→B→A or other sequences, etc.

[0126] If the drilling requires 3 operations, the 5 sets of drill bits can be combined according to the drilling requirements. Then the drilling sequence can be AB→C→DE, or A→BC→DE or other combinations and sequences, etc.

[0127] For other drilling steps, such as drilling in 2 or 4 operations, the principle of arranging the drilling sequence is similar to the above.

[0128] In some embodiments of the present specification, by setting the number of operation times and the operation sequence of each operation for the punching sequence, the punching sequence can be made more precise, improving the punching quality.

[0129] In some embodiments, for each group of candidate punching sequences in at least one group of candidate punching sequences, the processor can obtain a target punching speed through a preset algorithm.

[0130] Suppose there are 5 groups of drill bits (numbered: ABCDE), and a total of 3 groups of candidate punching sequences need to be generated, namely candidate punching sequence 1 (A→B→C→D→E), candidate punching sequence 2 (AB→C→DE), and candidate punching sequence 3 (ABC→DE).

[0131] For candidate punching sequence 1 (A→B→C→D→E), the processor can randomly generate at least one group of candidate punching speeds within the preset punching speed range, and then iteratively update the at least one group of candidate punching speeds corresponding to candidate punching sequence 1 through a preset algorithm to determine the target punching speed corresponding to candidate punching sequence 1. For more content on iteratively updating and determining the target punching speed based on the preset algorithm, reference can be made to the relevant descriptions above.

[0132] Similarly, for candidate punching sequence 2, candidate punching sequence 3, etc., the corresponding target punching speeds are determined based on the same method as above.

[0133] Step 520, determine at least one adjusted punching feature of at least one target punching speed based on the evaluation model.

[0134] In some embodiments, the content of the processor determining at least one adjusted punching feature corresponding to at least one target punching speed based on the target evaluation model can be found in Figure 4 and its related descriptions. It should be noted that when processing based on the evaluation model here, Figure 4 the candidate punching speed in the input of the evaluation model needs to be replaced with the target punching speed.

[0135] In some embodiments, since multiple groups of candidate punching sequences correspond to multiple groups of target punching speeds, therefore, the evaluation model needs to be processed multiple times to determine the adjusted punching features corresponding to multiple target punching speeds.

[0136] Step 530, based on at least one group of candidate punching sequences, predict the fault type and fault probability of the circuit board corresponding to each group of candidate punching sequences through the fault prediction model.

[0137] The types of failures can include specific types of failures that may occur during circuit board drilling. For example, it includes circuit board breakage, the degree of board warping not meeting the requirements, blade breakage, etc. The failure probability is the probability that each type of failure may occur. In some embodiments, the maximum of the failure probabilities corresponding to multiple types of failures can be selected as the failure probability for the final circuit board drilling.

[0138] In some embodiments, the failure prediction model can be a machine learning model, or a neural network model, such as a classification model, etc.

[0139] In some embodiments, the processor can process at least one set of candidate drilling sequences, at least one target drilling speed, the circuit sub-board feature vector, and the target drilling sequence with a preset number of drillings before the current drilling, to determine the type of failure and the failure probability of the circuit board corresponding to at least one set of candidate drilling sequences. Among them, one set of candidate drilling sequences corresponds to the type of failure and the failure probability of one circuit board.

[0140] The target drilling sequence with a preset number of drillings before the current drilling can be the target drilling sequence of the previous several drillings before the current drilling.

[0141] For more content about the target drilling speed and the circuit sub-board feature vector, see Figure 4 and its related descriptions.

[0142] In some embodiments, the failure prediction model can be obtained through training by means such as the gradient descent method. The third training sample for training the failure prediction model can be obtained from historical data. The third label is the actual type of failure and the probability of each type of failure occurring corresponding to the third training sample, which can be determined based on the ratio of the amount of data with a certain type of failure in the historical data to the total amount of data.

[0143] In some embodiments of this specification, by predicting through the failure prediction model the types and probabilities of failures that the circuit board may occur when drilling based on different candidate drilling sequences and the corresponding target drilling speeds, it can provide reliable data support for determining the target drilling sequence based on the type of failure and the failure probability in the subsequent stage; at the same time, predicting through the failure prediction model can improve the prediction efficiency and accuracy.

[0144] Step 540, based on at least one failure probability and at least one adjusted drilling feature, determine the target drilling sequence as the drilling sequence for each group of drill bits.

[0145] The target drilling sequence can be the drilling sequence finally used for formal drilling.

[0146] In some embodiments, the processor 140 may determine the target punching order in various ways based on at least one failure probability and at least one adjusted punching feature. For example, the processor may determine, from multiple sets of candidate punching orders, the candidate punching order whose failure probability and adjusted punching feature meet the preset requirements as the target punching order.

[0147] For example, the processor 140 may first determine, from all the candidate punching orders, at least one set of first candidate punching orders whose failure probability is lower than the first threshold. The first threshold is a preset failure probability threshold. Then, from the at least one set of first candidate punching orders, determine at least one set of second candidate punching orders whose corresponding adjusted punching feature has a difference less than the second threshold from the target punching feature. The second threshold is a preset difference threshold, and the adjusted punching feature that meets the difference threshold with the target punching feature meets the punching accuracy requirement. Select, from the at least one set of second candidate punching orders, the second candidate punching order whose corresponding adjusted punching feature has the smallest difference from the target punching feature as the target punching order.

[0148] In some embodiments, determining the target punching order may further include: determining the target punching order based on the punching time of at least one set of candidate punching orders.

[0149] The punching time may be the time to complete the punching of the circuit board.

[0150] In some embodiments, the processor may determine the punching time of at least one set of second candidate punching orders and determine the second candidate punching order with the shortest punching time as the target punching order. In some embodiments, the punching time is proportional to the number of operations. The processor may determine the punching time based on the number of operations in each set of second candidate punching orders.

[0151] In some embodiments of this specification, the target punching order obtained by selecting the candidate punching order with a short punching time can improve production efficiency.

[0152] In some embodiments of this specification, by confirming the target punching speed for the candidate punching order and determining the corresponding adjusted punching feature, then predicting the possible failure conditions of punching the circuit board based on the candidate punching speed, and comprehensively determining the target punching order, it is possible to make the failure rate of the circuit board smaller and the punching quality better when punching based on the determined target punching order.

[0153] Some embodiments of this specification also provide a circuit board intelligent production control device, which includes at least one memory and at least one processor. The at least one memory is used to store computer instructions, and the at least one processor executes the computer instructions or part of the instructions to implement the circuit board intelligent production process described in any one of the above embodiments.

[0154] Some embodiments of this specification also provide a computer-readable storage medium, which stores computer instructions. When a computer reads the computer instructions in the storage medium, the computer executes the intelligent circuit board production process described in any one of the above embodiments.

[0155] The basic concepts have been described above. Obviously, for those skilled in the art, the above detailed disclosure is only an example and does not constitute a limitation to this specification. Although not explicitly stated here, those skilled in the art may make various modifications, improvements, and corrections to this specification. Such modifications, improvements, and corrections are suggested in this specification, so such modifications, improvements, and corrections still fall within the spirit and scope of the exemplary embodiments of this specification.

[0156] Meanwhile, this specification uses specific terms to describe the embodiments of this specification. For example, "an embodiment", "one embodiment", and / or "some embodiments" mean a certain feature, structure, or characteristic related to at least one embodiment of this specification. Therefore, it should be emphasized and noted that the "an embodiment" or "one embodiment" or "an alternative embodiment" mentioned twice or more at different positions in this specification does not necessarily refer to the same embodiment. In addition, certain features, structures, or characteristics in one or more embodiments of this specification can be combined appropriately.

[0157] In addition, unless explicitly stated in the claims, the order of the processing elements and sequences, the use of numbers and letters, or the use of other names in this specification are not used to limit the order of the processes and methods in this specification. Although various examples are discussed in the above disclosure for some currently useful inventive embodiments, it should be understood that such details only serve the purpose of illustration. The appended claims are not limited to the disclosed embodiments. On the contrary, the claims are intended to cover all modifications and equivalent combinations that conform to the essence and scope of the embodiments of this specification. For example, although the system components described above can be implemented by hardware devices, they can also be implemented only through software solutions, such as installing the described system on existing servers or mobile devices.

[0158] Similarly, it should be noted that, in order to simplify the expression of this specification disclosure and thus help the understanding of one or more inventive embodiments, in the previous description of the embodiments of this specification, sometimes multiple features are merged into one embodiment, drawing, or description thereof. However, this disclosure method does not mean that the features required by the subject of this specification are more than those mentioned in the claims. In fact, the features of the embodiments are fewer than all the features of the single embodiments disclosed above.

[0159] In some embodiments, numbers are used to describe components and the quantity of attributes. It should be understood that such numbers used in the description of embodiments are, in some examples, modified by the modifiers "about", "approximate" or "substantially". Unless otherwise specified, "about", "approximate" or "substantially" indicate that the said numbers allow a variation of ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may vary according to the characteristics required by individual embodiments. In some embodiments, the numerical parameters should consider the specified significant digits and adopt the method of retaining the general number of digits. Although the numerical ranges and parameters used in some embodiments of this specification to confirm the breadth of their scope are approximate values, in specific embodiments, such numerical settings are as precise as possible within the feasible range.

[0160] For each patent, patent application, patent application publication, and other materials cited in this specification, such as articles, books, specifications, publications, documents, etc., their entire contents are hereby incorporated into this specification by reference. Except for the application history documents that are inconsistent with or conflict with the content of this specification, and also except for the documents that limit the broadest scope of the claims of this specification (currently or subsequently appended to this specification). It should be noted that if there are inconsistencies or conflicts between the descriptions, definitions, and / or uses of terms in the supplementary materials of this specification and the content described in this specification, the descriptions, definitions, and / or uses of terms in this specification shall prevail.

[0161] Finally, it should be understood that the embodiments described in this specification are only used to illustrate the principles of the embodiments of this specification. Other variations may also fall within the scope of this specification. Therefore, by way of example and not limitation, alternative configurations of the embodiments of this specification may be considered consistent with the teachings of this specification. Accordingly, the embodiments of this specification are not limited to the embodiments explicitly introduced and described in this specification.

Claims

1. An intelligent production control system for a circuit board, characterized in that, The system includes a fully automatic punching machine, a hole inspection machine, a data storage device, and a processor. The fully automatic punching machine, the hole inspection machine, and the data storage device are communicatively connected to the processor; The processor is configured to: Obtain at least one set of preset punching parameters from the data storage device, and generate an initial control instruction based on the at least one set of preset punching parameters; Based on the initial control instruction, control the fully automatic punching machine to perform trial punching on a multi-layer circuit board; Based on multiple detection images of the multi-layer circuit board after the trial punching obtained by the hole inspection machine, adjust the at least one set of preset punching parameters, generate adjusted punching parameters, and send them to the data storage device; Determine a punching sequence of at least one set of drill bits during punching based on a preset method. The punching sequence includes the number of operations and at least one set of drill bit numbers for each operation; The preset method includes: For each set of drill bits: Generate at least one set of candidate punching sequences, and determine at least one target punching speed for the at least one set of candidate punching sequences through a preset algorithm; Determine at least one adjusted punching feature of the at least one target punching speed based on an evaluation model. The evaluation model is a machine learning model; Based on the at least one set of candidate punching sequences, predict the fault type and fault probability of the circuit board corresponding to each set of candidate punching sequences through a fault prediction model. The fault prediction model is a machine learning model; Based on at least one of the fault probabilities, the at least one adjusted punching feature, and the punching time of the at least one set of candidate punching sequences, determine a target punching sequence as the punching sequence for each set of drill bits; Generate an updated control instruction based on the adjusted punching parameters and the punching sequence; Based on the updated control instruction, control the fully automatic punching machine to perform formal punching on the multi-layer circuit board.

2. The system according to claim 1, wherein The processor is further configured to: Extract a target image based on the multiple detection images; Determine the punching feature of the trial punching based on the target image; Based on the punching feature of the trial punching, adjust the at least one set of preset punching parameters through the preset algorithm.

3. The system according to claim 2, wherein The processor is further configured to: Generate at least one set of candidate punching speeds based on the at least one set of preset punching parameters; Based on the punching feature of the trial punching, perform at least one round of iterative update on the at least one set of candidate punching speeds based on the preset algorithm, and determine at least one set of updated punching speeds; In response to a preset iteration condition being satisfied, stop the iteration, and evaluate the at least one set of updated punching speeds through an evaluation algorithm to determine the target punching speed.

4. An intelligent production process for a circuit board, characterized in that, The production process is executed by the processor of the intelligent production control system for circuit boards. The production process includes: Obtain at least one set of preset punching parameters, and generate an initial control instruction based on the at least one set of preset punching parameters; Based on the initial control instruction, control a fully automatic punching machine to perform trial punching on a multi-layer circuit board; Based on multiple detection images of the multi-layer circuit board after the trial punching obtained by a hole inspection machine, adjust the at least one set of preset punching parameters, and generate adjusted punching parameters; Determine the drilling sequence of at least one set of drill bits during drilling based on a preset method, where the drilling sequence includes the number of operations and the serial numbers of at least one set of drill bits for each operation; the preset method includes: For each set of drill bits: Generate at least one set of candidate drilling sequences, and determine at least one target drilling speed for the at least one set of candidate drilling sequences through a preset algorithm; Determine at least one adjusted drilling feature of the at least one target drilling speed based on an evaluation model; the evaluation model is a machine learning model; Based on the at least one set of candidate drilling sequences, predict the fault type and fault probability of the circuit board corresponding to each set of candidate drilling sequences through a fault prediction model; the fault prediction model is a machine learning model; Based on at least one of the fault probabilities, the at least one adjusted drilling feature, and the drilling time of the at least one set of candidate drilling sequences, determine the target drilling sequence as the drilling sequence of each set of drill bits; Generate an updated control instruction based on the adjusted drilling parameters and the drilling sequence; Based on the updated control instruction, control the full-automatic drilling machine to perform formal drilling on the multi-layer circuit board.

5. The production process according to claim 4, characterized in that, The adjustment of the at least one set of preset drilling parameters based on multiple detection images of the multi-layer circuit board after trial drilling obtained by the hole inspection machine to generate adjusted drilling parameters includes: Extract a target image based on the multiple detection images; Determine the drilling feature of the trial drilling based on the target image; Based on the drilling feature of the trial drilling, adjust the at least one set of preset drilling parameters through the preset algorithm.

6. The production process according to claim 5, characterized in that, The adjustment of the at least one set of preset drilling parameters through the preset algorithm based on the drilling feature of the trial drilling includes: Generate at least one set of candidate drilling speeds based on the at least one set of preset drilling parameters; Based on the drilling feature of the trial drilling, perform at least one round of iterative update on the at least one set of candidate drilling speeds based on the preset algorithm to determine at least one set of updated drilling speeds; In response to the satisfaction of a preset iteration condition, stop the iteration, and evaluate the at least one set of updated drilling speeds through an evaluation algorithm to determine the target drilling speed.

7. An intelligent production control device for a circuit board, characterized in that, The device includes at least one memory and at least one processor. The at least one memory is used to store computer instructions, and the at least one processor executes the computer instructions or part of the instructions to implement the circuit board intelligent production process described in any one of claims 4-6.

8. A computer-readable storage medium, characterized in that, The storage medium stores computer instructions. When the computer reads the computer instructions, the computer executes the circuit board intelligent production process described in any one of claims 4-6.

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