A multi-battery pack charging and discharging control system and scheduling method

Abstract

The present invention provides a multi-battery pack charge and discharge control system and scheduling method, including multiple stacked battery packs and connected energy storage converters, and also including a host, the host transmits the voltage, current and power required by the battery pack to the energy storage converter; each battery pack has its own charge and discharge MOS switch, analog front end, control chip and dial switch, the host performs charge and discharge priority sorting according to the acquired charge and discharge status and the voltage data, temperature data and fault status of each battery pack, the battery pack with a fault state or a temperature rise value exceeding a threshold within a certain period of time does not participate in the sorting, the battery pack with the highest voltage priority is charged and discharged first, and the sorting cycle is carried out in real time, and the battery pack is switched when the switching voltage exceeds a preset value. The present invention avoids the generation of circulating currents between battery packs, improves the safety of the entire system, and achieves technical effects such as charge and discharge sequence control and faulty battery pack elimination.

Description

Technical Field

[0001] The present invention belongs to the technical field of battery pack switch control, and in particular relates to a multi-battery pack charge and discharge control system and a scheduling method. Background Art

[0002] As the world's attention to sustainable development and environmental protection continues to increase, new energy technologies have been widely promoted and applied, which has had a huge impact on the demand for battery packs, making them face more stringent requirements and challenges. The capacity output of a single battery pack is relatively limited and cannot meet certain applications with high capacity requirements. In addition, in a single battery pack system, if the battery pack fails or fails, the entire system may be affected and unable to continue working. In response to the above problems, in order to meet the growing market demand, the solution of connecting multiple battery packs in parallel came into being.

[0003] In a multi-battery pack parallel system, there may be voltage differences between the battery packs. When the battery packs are connected in parallel, there will be a problem of large current mutual charging between the battery packs. Currently, the method of alternating charging and discharging is adopted, but this method may cause some battery packs to be charged or discharged more times than other battery packs, making the charging and discharging time of the battery packs in the battery pack unbalanced, resulting in energy waste. For example, patent CN202210704942.2 discloses a power management method for a multi-battery pack parallel system, which first charges the last battery pack slave, and after the last battery pack slave is full, the next battery pack slaves are closed in turn for charging. After all the battery pack slaves are full, the battery pack host is charged. After the battery pack host is full, it remains in a closed state and stops charging. At the same time, this charging control strategy will generate a large circulating current when the battery packs are switched due to the large voltage difference, which will trigger battery protection and even affect battery life.

[0004] There is also a method that uses minimum voltage charging and maximum voltage discharging. All battery packs are turned on only when the voltages are consistent. However, this strategy has high consistency requirements on the voltage, capacity, internal resistance, etc. of the battery pack, and is controlled by the host. If the host fails, the overall system will not work properly. For example, patent 202210371719.0 discloses a battery pack parallel control method and system based on CAN communication, which uses broadcasting to identify the master and slave machines. The host is first identified and assigned a corresponding identity number, and then the host assigns the identity number of the slave machine. This method is relatively inefficient, and the identity numbers of the master and slave machines are inconsistent each time they are turned on, and the controllability, stability and reliability are all poor. In this patent, the discharge is performed by first discharging a single pack, and then judging whether there is a battery pack that meets the battery pack parallel discharge conditions based on the battery pack status information. If so, the host controls the slave battery pack to be connected to the load in turn to form a battery pack parallel discharge mode. This discharge mode cannot control the number of battery packs discharged, and the number of battery packs that can be connected in parallel under different conditions is uncertain. In addition, the logical judgment and switching of multiple battery packs involved in this mode may make fault diagnosis more complicated. If one of the battery packs fails or is abnormal, more time and resources may be required to determine the problem, increasing maintenance costs. Summary of the invention

[0005] In order to solve the above-mentioned deficiencies in the prior art, an object of the present invention is to provide a multi-battery pack charge and discharge control system and a scheduling method, so as to simplify the system design and management of the battery pack and improve the safety and reliability of the system.

[0006] The first aspect of the present invention provides a multi-battery pack charge and discharge control system, comprising a plurality of stacked battery packs and an energy storage converter connected to the battery packs, and also comprising a host, wherein the host is connected to the energy storage converter, and the host transmits the voltage, current and power required by the battery pack to the energy storage converter; each of the battery packs has its own charge and discharge MOS switch, analog front end, control chip and dip switch, wherein the charge and discharge MOS switch, analog front end and dip switch are all connected to the control chip, and the control chip is all connected to the host for communication;

[0007] The analog front end is used to obtain the current data, voltage data and temperature data of the battery pack and send them to the control chip. The control chip uses the above data to judge the fault of the battery pack and sends the fault judgment result together with the voltage data and temperature data to the host. The dip switch is used to determine the fixed address of each battery pack, and the host identifies the battery pack through the broadcast addressing command.

[0008] The host performs charge and discharge priority sorting by acquiring the charge and discharge status as well as the voltage data, temperature data and fault status of each battery pack. Battery packs that are in a fault state or whose temperature rises by more than a threshold within a certain period of time are not included in the sorting. The control chip of the battery pack with the highest voltage priority controls the closure of its charge and discharge MOS switch, and performs real-time cyclic sorting during charge and discharge, and switches the battery packs when the switching voltage exceeds a preset value.

[0009] Preferably, among the multiple stacked battery packs, the battery pack with the dial code 1 preferentially supplies power to the host. After the priority charging and discharging priority sorting is completed, the battery pack with the highest charging priority is used for power during charging, and the battery pack with the highest discharging priority is used for power during discharging.

[0010] Preferably, the model of the analog front end is detection chip SH367309.

[0011] Preferably, the dip switch is used to determine the fixed address of each battery pack, and the host identifies the battery pack by broadcasting the addressing command, specifically: turning off the switches of all battery packs so that the battery packs and the host are both in a power-off state; in order to avoid confusion and duplication, the dip switch of each battery pack is numbered, and the numbering process ensures that the number 1 is included to ensure that the power supply to the host is realized; the dip switch is set according to the number, and the battery pack has a unique and fixed address through the dip switch;

[0012] The host sends a broadcast addressing command through the RS485 bus to notify all battery packs to respond to the addressing; when the battery pack receives the addressing command from the host, it replies with the set address in turn according to the address set by the dip switch; the host waits for the reply from all battery packs, collects and records the address information of each battery pack, and the host can obtain the number of battery packs and the address of each battery pack; the host completes the identity recognition of the battery pack, and stops the broadcast addressing after obtaining the address information.

[0013] A second aspect of the present invention provides a multi-battery pack charge and discharge scheduling algorithm, which is applied to the control system as described in the first aspect and includes the following process:

[0014] S1, real-time acquisition of voltage data, temperature data, fault status data and battery health status SOH data sent by each battery pack;

[0015] S2, determine whether each battery pack has a fault. If a fault occurs, this battery pack will not be included in the sorting;

[0016] S3, determining whether the temperature rise of each battery pack exceeds a threshold within a certain period of time. If so, the battery pack will not be included in the sorting;

[0017] S4, determine the battery health status SOH. If the difference in SOH between battery packs is greater than a certain value, the battery pack with a smaller SOH has the lowest priority regardless of charging or discharging. If the difference is less than a certain value, it will not be considered and directly enter S5;

[0018] S5, sorting the battery packs according to the voltage of each battery pack. If the battery packs are in a charging state, the battery packs with a smaller voltage have a higher charging priority. If the battery packs are in a discharging state, the battery packs with a larger voltage have a higher priority.

[0019] S6, according to the priority ranking, control the charging and discharging MOS switch of the battery pack with the highest priority to close; at the same time, loop S1 to S5, when the voltage of the battery pack being charged minus the voltage of the new battery pack with the highest priority is greater than the switching voltage, control the switch to charge the new battery pack with the highest priority; when the voltage of the new battery pack with the highest priority minus the voltage of the battery pack being discharged is greater than the switching voltage, control the switch to discharge the new battery pack with the highest priority;

[0020] S7, cycle S1 to S6 until charging and discharging are completed.

[0021] Preferably, whether each battery pack has a fault is determined based on the acquired real-time current data, voltage data and temperature data, and thresholds for overvoltage, undervoltage, overcurrent, high temperature and low temperature are set. If the real-time data is higher than the overvoltage threshold, overcurrent threshold, high temperature threshold or lower than the undervoltage threshold, low temperature threshold, it is judged to be a fault state.

[0022] Preferably, the battery health status SOH data is counted by the control chip on each battery pack based on the number of charge and discharge times and sent to the host. When performing priority sorting, if the SOH difference between the battery packs is greater than 3%, the battery pack with a smaller SOH has the lowest priority regardless of charge and discharge. If the difference is less than or equal to 3%, it will not be considered and directly enters S5.

[0023] Preferably, in step S2, if a fault occurs, the charge and discharge MOS switch of the battery pack is controlled to be turned off and an alarm is displayed.

[0024] Preferably, the switching voltage in step S6 should be less than V_switch:

[0025] V_switch=I_max*R_internal

[0026] Among them, V_switch is the maximum switching voltage allowed during the charging and discharging process after the battery pack is connected in parallel; I_max is the maximum charging and discharging current value allowed by the battery pack; R_internal is the internal resistance of the battery pack during the charging and discharging process.

[0027] The third aspect of the present invention provides a multi-battery pack charge and discharge scheduling device, the device includes at least one processor and at least one memory, the processor and the memory are coupled; the memory stores a computer execution program of the charge and discharge scheduling algorithm as described in the first aspect; when the processor executes the computer execution program stored in the memory, the processor can execute a multi-battery pack charge and discharge scheduling method.

[0028] The fourth aspect of the present invention provides a computer-readable storage medium, characterized in that: the computer-readable storage medium stores a computer execution program of the charge and discharge scheduling algorithm as described in the first aspect, and when the computer execution program is executed by a processor, a multi-battery pack charge and discharge scheduling method can be implemented.

[0029] Compared with the prior art, the present invention has the following advantages and beneficial effects:

[0030] Compared with the prior art, the present invention proposes a charge and discharge scheduling algorithm and system for parallel battery packs, which adopts a one-master-multiple-slave control system architecture to improve the coordinated control of battery packs, and realizes technical effects such as variable number of battery packs, charge and discharge sequence control, and elimination of faulty battery packs. In order to enhance the reliability and stability of address allocation and improve work efficiency, the present invention adopts a DIP switch to determine the addresses of all battery packs; in order to avoid circulating currents between battery packs and improve the safety of the entire system, the present invention adopts a mode of continuous charge and discharge switching of battery packs during the charge and discharge process, sets switching conditions, always charges the battery pack with the smallest power and always discharges the battery pack with the largest power; at the same time, the method of always keeping only one battery pack for charging and discharging can also clearly judge and eliminate faulty battery packs, solving the technical problems of complex system design, high battery pack matching requirements, and large fault impact in the existing battery pack parallel scheme.

[0031] Specifically, the system of the present invention is composed of an independently controlled host and multiple battery pack slaves. The variable number of slaves simplifies the system design, and the parameters of different battery packs do not need to be strictly matched, which lowers the application threshold. The host sorts the slave battery packs according to their priorities and only controls one battery pack to work, avoiding the imbalance problem between battery packs and extending the battery life. When the battery pack reaches the switching condition, the system can smoothly switch to the next battery pack to ensure the reliable and continuous operation of the system. In addition, if a faulty battery pack occurs, the system can remove it and continue to work, instead of the entire system failing to work normally as in the prior art, which greatly reduces the impact of a single fault point and improves the stability and safety of the system. Users can also increase or decrease the number of slave battery packs as needed, and the system has strong flexibility and scalability. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the technical solutions of the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, what is described below is only one embodiment of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.

[0033] Figure 1 This is a schematic structural diagram of the multi-battery pack charge and discharge control system provided by the present invention.

[0034] Figure 2 This is a flow chart of the multi-battery pack charge and discharge scheduling algorithm provided by the present invention.

[0035] Figure 3 This is a flow chart of switching charge and discharge in the multi-battery pack charge and discharge scheduling algorithm provided by the present invention.

[0036] Figure 4 It is a simplified structural block diagram of the multi-battery pack charge and discharge scheduling device of the present invention. DETAILED DESCRIPTION

[0037] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of the present invention.

[0038] The embodiment of the present invention provides a multi-battery pack charge and discharge control system to realize charge and discharge scheduling control, specifically as follows Figure 1 As shown, it includes multiple stacked battery packs and an energy storage inverter connected to the battery packs, and also includes a host, which is connected to the energy storage inverter. The host transmits the voltage, current and power required by the battery pack to the energy storage inverter; each of the battery packs has its own charge and discharge MOS switch, analog front end, control chip and dip switch, the charge and discharge MOS switch, analog front end and dip switch are all connected to the control chip, and the control chip is connected to the host for communication.

[0039] The overall system of multiple battery packs in parallel of the present invention is mainly composed of a host and multiple battery packs of slaves, and adopts a one-master-multiple-slave control architecture. Data is transmitted between the host and the battery pack via the RS485 bus, and the host and the external energy storage converter are transmitted via the CAN bus. The distributed communication method improves the stability, reliability and anti-interference of the system. The host of the system is only a separate control board, which is a fixed control unit. It is mainly responsible for tasks such as algorithm scheduling, communication, charge and discharge management control, power display and slave battery pack alarm display. The slave battery pack is required to power the host. Among the multiple stacked battery packs, the battery pack with a dial code of 1 gives priority to powering the host. After the priority charge and discharge priority sorting is completed, the battery pack with the highest charging priority is used to power the host, and the battery pack with the highest discharge priority is used to power the host. Each battery pack has an independent control system, which can realize independent control of the battery pack protection. The number of battery packs can be increased or decreased according to user needs, and the address of the battery pack can be set by a dial switch.

[0040] The dip switches are used to determine the fixed address of each battery pack. The host identifies the battery pack through the broadcast addressing command. The specific process of setting the slave address through the dip switches is as follows: turn off the switches of all slave battery packs so that both the slave and the host are in a power-off state. In order to avoid confusion and duplication, the dip switches of each battery pack are numbered. The numbering process ensures that number 1 is included to ensure that the slave can power the host. The dip switches are set according to the numbers, and the slave battery packs have unique and fixed addresses through the dip switches.

[0041] After the slave battery determines the address, the host needs to identify the slave battery pack. The specific process is: the host sends a broadcast addressing command through the RS485 bus to notify all slave battery packs to respond to the addressing; when the slave battery pack receives the addressing command from the host, it replies with the set address in sequence according to the address set by the dip switch; the host waits for the reply of all slave battery packs, collects and records the address information of each slave battery pack, and the host can obtain the number of slave battery packs and the address of each battery pack; the host completes the identification of the slave battery pack, and stops the broadcast addressing after obtaining the address information.

[0042] After the host obtains the address of the slave battery pack, it sends data request commands to the battery pack in sequence through the RS485 bus and filters the slave data, thereby realizing priority sorting of the slave battery packs.

[0043] The analog front end (AFE) is used to obtain the current data, voltage data and temperature data of the battery pack and send them to the control chip. The model of the analog front end can be the detection chip SH367309. This is a mature existing technology, including but not limited to this chip model, and no specific limitation is made here.

[0044] The control chip uses the above data to judge the battery pack fault, and sends the fault judgment result together with the voltage data and temperature data to the host; the host sorts the charge and discharge priorities according to the acquired charge and discharge status and the voltage data, temperature data and fault status of each battery pack. Battery packs with fault status or temperature rise exceeding the threshold within a certain period of time are not included in the sorting. The control chip of the battery pack with the highest voltage priority controls the closure of its charge and discharge MOS switch, and cyclically sorts in real time during charge and discharge, and switches the battery pack when the switching voltage exceeds the preset value.

[0045] This embodiment provides a specific multi-battery pack charge and discharge scheduling algorithm, which adopts a mode of continuous charge and discharge switching of the battery pack during the charge and discharge process, sets switching conditions, and always charges the battery pack with the smallest power and always discharges the battery pack with the largest power. At the same time, the method of always keeping only one battery pack for charging and discharging can also clearly judge and eliminate faulty battery packs, which solves the technical problems of complex system design, high battery pack matching requirements, and large fault impact in the existing battery pack parallel solution.

[0046] The flowchart of the scheduling algorithm is as follows Figure 2 As shown, the following process is included:

[0047] S1, real-time acquisition of voltage data, temperature data, fault status data and battery health status SOH sent by each battery pack;

[0048] S2, determine whether each battery pack has a fault. If a fault occurs, this battery pack will not be included in the sorting;

[0049] S3, determining whether the temperature rise of each battery pack exceeds a threshold within a certain period of time. If so, the battery pack will not be included in the sorting;

[0050] S4, determine the battery health status SOH. If the difference in SOH between battery packs is greater than a certain value, the battery pack with a smaller SOH has the lowest priority regardless of charging or discharging. If the difference is less than a certain value, it will not be considered and directly enter S5;

[0051] S5, sorting the battery packs according to the voltage of each battery pack. If the battery packs are in a charging state, the battery packs with a smaller voltage have a higher charging priority. If the battery packs are in a discharging state, the battery packs with a larger voltage have a higher priority.

[0052] S6, according to the priority ranking, control the charging and discharging MOS switch of the battery pack with the highest priority to close; at the same time, loop S1 to S5, when the voltage of the battery pack being charged minus the voltage of the new battery pack with the highest priority is greater than the switching voltage, control the switch to charge the new battery pack with the highest priority; when the voltage of the new battery pack with the highest priority minus the voltage of the battery pack being discharged is greater than the switching voltage, control the switch to discharge the new battery pack with the highest priority;

[0053] S7, cycle S1 to S6 until charging and discharging are completed.

[0054] The charging management control mode is: the host controls the MOS switch of the battery pack with the highest charging priority to close, and the MOS switches of other battery packs to open, and the battery pack with the highest charging priority is charged, and the host updates the charging priority of the battery pack in real time; when the voltage of the battery pack being charged increases to a level higher than the voltage of the new battery pack with the highest charging priority, and higher than the switching voltage value, the MOS switch of the new battery pack with the highest charging priority is closed first, and then the MOS switch of the battery pack being charged at the previous moment is disconnected to realize the charging switching of the battery pack; after the battery pack switching is completed, the host updates the charging priority of the battery pack and continues the cyclic charging control according to the above steps.

[0055] The discharge management control mode is: the host controls the MOS switch of the battery pack with the highest discharge priority to close, and the MOS switches of other battery packs to open, and the battery pack with the highest discharge priority is discharged, and the host updates the discharge priority of the battery pack in real time; when the voltage of the discharging battery pack drops to a level lower than the voltage of the new battery pack with the highest discharge priority, and is lower than the switching voltage value, the MOS switch of the new battery pack with the highest discharge priority is closed first, and then the MOS switch of the battery pack that was discharging at the previous moment is disconnected to realize the discharge switching of the battery pack; after the battery pack switching is completed, the host updates the discharge priority of the battery pack and continues the cyclic discharge control according to the above steps.

[0056] The host determines whether each battery pack has a fault based on the data. If a fault occurs, the host will display the location of the faulty battery pack and issue an alarm, and the faulty battery pack will be removed from the sorting. The host determines whether each battery pack has a fault based on the real-time current data, voltage data and temperature data obtained, and has overvoltage, undervoltage, overcurrent, high temperature and low temperature thresholds. If the real-time data is higher than the overvoltage threshold, overcurrent threshold, high temperature threshold or lower than the undervoltage threshold and low temperature threshold, it is judged to be a fault state.

[0057] Among them, the battery health status SOH data is counted by the control chip on each battery pack through the number of charge and discharge times and sent to the host. When prioritizing, if the SOH difference between battery packs is greater than 3%, the battery pack with a smaller SOH has the lowest priority regardless of charge and discharge. If the difference is less than or equal to 3%, it will not be considered and directly enter S5.

[0058] The host predicts whether high temperature will occur based on the temperature data of each battery pack. If the temperature increases rapidly to avoid thermal runaway, the battery pack will not be temporarily included in the sorting and will participate in the sorting again after the temperature recovers. If the temperature increases rapidly, the threshold will be set according to the actual situation, such as a temperature rise of greater than or equal to 2°C within 5 seconds; recovery conditions include a temperature rise of less than 2°C within 5 seconds and a temperature below 50°C.

[0059] The host sorts the battery packs according to the total voltage of each battery pack. The total voltage of the battery pack in the static state is inconsistent with that in the charging and discharging state. The present invention uniformly uses the static voltage for comparison. The static voltage of the battery pack in the charging state is:

[0060] Vcharge_idle=Vcharge-I*R_internal

[0061] Where Vcharge_idle is the static voltage of the battery pack during charging, Vcharge is the dynamic voltage during charging, I is the charging current, and R_internal is the internal resistance of the battery.

[0062] The static voltage of the battery pack in the discharge state is:

[0063] Vdischarge_idle=Vdischarge+I*R_internal

[0064] Where Vdischarge_idle is the static voltage of the battery pack during discharge, Vdischarge is the dynamic voltage during discharge, I is the discharge current, and R_internal is the internal resistance of the battery.

[0065] like Figure 3 As shown, after the slave priorities are sorted, the host determines the working status of the slave battery pack according to the working status of the energy storage inverter; if the host determines that it is in the charging state, it enters the charging management control mode according to the charging priority; if the host determines that it is in the discharging state, it enters the discharging management control mode according to the discharging priority.

[0066] like Figure 4As shown, the present invention also provides a multi-battery pack charge and discharge scheduling device, the device includes at least one processor and at least one memory, and also includes a communication interface and an internal bus; the memory stores a computer execution program of the charge and discharge scheduling algorithm as described in this example; when the processor executes the computer execution program stored in the memory, the processor can execute a multi-battery pack charge and discharge scheduling method. The internal bus can be an Industry Standard Architecture (ISA) bus, a Peripheral Component (PCI) bus, or an Extended Industry Standard Architecture (EISA) bus. The bus can be divided into an address bus, a data bus, a control bus, etc. For ease of representation, the bus in the drawings of the present application is not limited to only one bus or one type of bus. The memory may include a high-speed RAM memory, and may also include a non-volatile storage NVM, such as at least one disk memory, and may also be a U disk, a mobile hard disk, a read-only memory, a disk or an optical disk.

[0067] The device may be provided as a terminal, a server or other forms of devices.

[0068] Figure 4 is a block diagram of a device shown as an example. The device may include one or more of the following components: a processing component, a memory, a power component, a multimedia component, an audio component, an input / output (I / O) interface, a sensor component, and a communication component. The processing component generally controls the overall operation of the electronic device, such as operations associated with display, phone calls, data communications, camera operations, and recording operations. The processing component may include one or more processors to execute instructions to complete all or part of the steps of the above method. In addition, the processing component may include one or more modules to facilitate interaction between the processing component and other components. For example, the processing component may include a multimedia module to facilitate interaction between the multimedia component and the processing component.

[0069] The memory is configured to store various types of data to support operations on the electronic device. Examples of such data include instructions for any application or method operating on the electronic device, contact data, phone book data, messages, pictures, videos, etc. The memory can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk.

[0070] The power supply assembly provides power to various components of the electronic device. The power supply assembly may include a power management system, one or more power supplies, and other components associated with generating, managing, and distributing power for the electronic device. The multimedia assembly includes a screen that provides an output interface between the electronic device and the user. In some embodiments, the screen may include a liquid crystal display (LCD) and a touch panel (TP). If the screen includes a touch panel, the screen may be implemented as a touch screen to receive input signals from the user. The touch panel includes one or more touch sensors to sense touch, slide, and gestures on the touch panel. The touch sensor may not only sense the boundaries of the touch or slide action, but also detect the duration and pressure associated with the touch or slide operation. In some embodiments, the multimedia assembly includes a front camera and / or a rear camera. When the electronic device is in an operating mode, such as a shooting mode or a video mode, the front camera and / or the rear camera may receive external multimedia data. Each front camera and rear camera may be a fixed optical lens system or have a focal length and optical zoom capability.

[0071] The audio component is configured to output and / or input audio signals. For example, the audio component includes a microphone (MIC), and when the electronic device is in an operating mode, such as a call mode, a recording mode, and a voice recognition mode, the microphone is configured to receive an external audio signal. The received audio signal can be further stored in a memory or sent via a communication component. In some embodiments, the audio component also includes a speaker for outputting an audio signal. The I / O interface provides an interface between the processing component and the peripheral interface module, and the above-mentioned peripheral interface module can be a keyboard, a click wheel, a button, etc. These buttons may include, but are not limited to: a home button, a volume button, a start button, and a lock button.

[0072] The sensor assembly includes one or more sensors for providing various aspects of status assessment for the electronic device. For example, the sensor assembly can detect the on / off state of the electronic device, the relative positioning of components, such as the display and keypad of the electronic device, and the sensor assembly can also detect the position change of the electronic device or a component of the electronic device, the presence or absence of user contact with the electronic device, the orientation or acceleration / deceleration of the electronic device and the temperature change of the electronic device. The sensor assembly may include a proximity sensor configured to detect the presence of nearby objects without any physical contact. The sensor assembly may also include a light sensor, such as a CMOS or CCD image sensor, for use in imaging applications. In some embodiments, the sensor assembly may also include an accelerometer, a gyroscope sensor, a magnetic sensor, a pressure sensor or a temperature sensor.

[0073] The communication component is configured to facilitate wired or wireless communication between the electronic device and other devices. The electronic device can access a wireless network based on a communication standard, such as WiFi, 2G or 3G, or a combination thereof. In an exemplary embodiment, the communication component receives a broadcast signal or broadcast-related information from an external broadcast management system via a broadcast channel. In an exemplary embodiment, the communication component also includes a near field communication (NFC) module to facilitate short-range communication. For example, the NFC module can be implemented based on radio frequency identification (RFID) technology, infrared data association (IrDA) technology, ultra-wideband (UWB) technology, Bluetooth (BT) technology and other technologies.

[0074] In an exemplary embodiment, the electronic device may be implemented by one or more application specific integrated circuits (ASICs), digital signal processors (DSPs), digital signal processing devices (DSPDs), programmable logic devices (PLDs), field programmable gate arrays (FPGAs), controllers, microcontrollers, microprocessors or other electronic components to perform the above methods.

[0075] The present invention also provides a computer-readable storage medium, in which a computer execution program of the charge and discharge scheduling algorithm as described in this embodiment is stored. When the computer execution program is executed by a processor, a multi-battery pack charge and discharge scheduling can be implemented.

[0076] Specifically, a system, device or equipment equipped with a readable storage medium may be provided, on which a software program code for implementing the functions of any of the above-mentioned embodiments is stored, and a computer or processor of the system, device or equipment reads and executes the instructions stored in the readable storage medium. In this case, the program code read from the readable medium itself can implement the functions of any of the above-mentioned embodiments, so the machine-readable code and the readable storage medium storing the machine-readable code constitute a part of the present invention.

[0077] The above storage medium can be implemented by any type of volatile or non-volatile storage device or a combination thereof, such as static random access memory (SRAM), electrically erasable programmable read-only memory (EEPROM), erasable programmable read-only memory (EPROM), programmable read-only memory (PROM), read-only memory (ROM), magnetic memory, flash memory, magnetic disk or optical disk (such as CD-ROM, CD-R, CD-RW, DVD-20ROM, DVD-RAM, DVD-RW, DVD-RW), magnetic tape, etc. The storage medium can be any available medium that can be accessed by a general or special-purpose computer.

[0078] It should be understood that the processor may be a central processing unit (CPU), other general-purpose processors, digital signal processors (DSP), application-specific integrated circuits (ASIC), etc. A general-purpose processor may be a microprocessor or any conventional processor. The steps of the method disclosed in the invention may be directly implemented by a hardware processor or implemented by a combination of hardware and software modules in the processor.

[0079] It should be understood that the storage medium is coupled to the processor so that the processor can read information from the storage medium and write information to the storage medium. Of course, the storage medium can also be a component of the processor. The processor and the storage medium can be located in an application specific integrated circuit (ASIC). Of course, the processor and the storage medium can also exist as discrete components in a terminal or server.

[0080] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0081] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be customized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0082] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application shall be included in the protection scope of the present application.

[0083] Although the above describes the specific implementation methods of the present invention, it is not intended to limit the scope of protection of the present invention. Those skilled in the art should understand that various modifications or variations that can be made by those skilled in the art on the basis of the technical solution of the present invention without creative work are still within the scope of protection of the present invention.

Claims

1. A method for scheduling charging and discharging of multiple battery packs, characterized in that: Applied to a multi-battery pack charge and discharge control system, comprising a plurality of stacked battery packs and an energy storage converter connected to the battery packs, characterized in that: it also comprises a host, the host is connected to the energy storage converter, and the host transmits the voltage, current and power required by the battery pack to the energy storage converter; each of the battery packs has its own charge and discharge MOS switch, analog front end, control chip and dip switch, the charge and discharge MOS switch, analog front end and dip switch are all connected to the control chip, and the control chip is in communication connection with the host; The analog front end is used to obtain the current data, voltage data and temperature data of the battery pack and send them to the control chip. The control chip uses the above data to judge the fault of the battery pack and sends the fault judgment result together with the voltage data and temperature data to the host. The dip switch is used to determine the fixed address of each battery pack, and the host identifies the battery pack through the broadcast addressing command. The host performs charge and discharge priority sorting by acquiring the charge and discharge status and the voltage data, temperature data and fault status of each battery pack. Battery packs with fault status or whose temperature rises by more than a threshold value within a certain period of time are not included in the sorting. The control chip of the battery pack with the highest voltage priority controls the closing of its charge and discharge MOS switch, and sorts them in real time during charge and discharge, and switches the battery packs when the switching voltage exceeds a preset value. The dip switch is used to determine the fixed address of each battery pack. The host identifies the battery pack by broadcasting the addressing command, specifically: turn off the switches of all battery packs to make the battery packs and the host in a power-off state; in order to avoid confusion and duplication, the dip switch of each battery pack is numbered, and the numbering process ensures that the number 1 is included to ensure that the power supply to the host is realized; the dip switch is set according to the number, and the battery pack has a unique and fixed address through the dip switch; The host sends a broadcast addressing command through the RS485 bus to notify all battery packs to respond to the addressing; when the battery pack receives the addressing command from the host, it replies with the address set by the dip switch in turn; the host waits for the reply of all battery packs, collects and records the address information of each battery pack, and the host can obtain the number of battery packs and the address of each battery pack; the host completes the identification of the battery pack, and stops broadcast addressing after obtaining the address information; The charging and discharging scheduling method includes the following processes: S1, real-time acquisition of voltage data, temperature data, fault status data and battery health status SOH data sent by each battery pack; S2, determine whether each battery pack has a fault. If a fault occurs, this battery pack will not be included in the sorting; S3, determining whether the temperature rise of each battery pack exceeds a threshold within a certain period of time. If so, the battery pack will not be included in the sorting; S4, determining the battery health state SOH. The battery health state SOH data is counted by the control chip on each battery pack for the number of charge and discharge times and sent to the host. When performing priority sorting, if the SOH difference between battery packs is greater than 3%, the battery pack with a smaller SOH has the lowest priority regardless of charge and discharge. If the difference is less than or equal to 3%, it is not considered and directly enters S5; S5, sorting the battery packs according to the voltage of each battery pack. If the battery packs are in a charging state, the battery packs with a smaller voltage have a higher charging priority. If the battery packs are in a discharging state, the battery packs with a larger voltage have a higher priority. S6, according to the priority ranking, control the charging and discharging MOS switch of the battery pack with the highest priority to close; at the same time, loop S1 to S5, when the voltage of the battery pack being charged minus the voltage of the new battery pack with the highest priority is greater than the switching voltage, control the switch to charge the new battery pack with the highest priority; when the voltage of the new battery pack with the highest priority minus the voltage of the battery pack being discharged is greater than the switching voltage, control the switch to discharge the new battery pack with the highest priority; S7, cycle S1 to S6 until charging and discharging are completed.

2. A multi-battery pack charge and discharge scheduling method as claimed in claim 1, characterized in that: Among the multiple stacked battery packs, the battery pack with the dial code 1 preferentially supplies power to the host. After the priority charging and discharging priority sorting is completed, the battery pack with the highest charging priority is used for power supply during charging, and the battery pack with the highest discharging priority is used for power supply during discharging.

3. A multi-battery pack charge and discharge scheduling method as claimed in claim 1, characterized in that: The model of the analog front end is the detection chip SH367309.

4. A multi-battery pack charge and discharge scheduling method as claimed in claim 1, characterized in that: Whether each battery pack has a fault is determined based on the real-time current data, voltage data and temperature data obtained, and thresholds for overvoltage, undervoltage, overcurrent, high temperature and low temperature are set. If the real-time data is higher than the overvoltage threshold, overcurrent threshold, high temperature threshold or lower than the undervoltage threshold, low temperature threshold, it is judged as a fault state.

5. A multi-battery pack charge and discharge scheduling method as claimed in claim 1, characterized in that: In step S2, if a fault occurs, the charge and discharge MOS switch of the battery pack is controlled to be turned off and an alarm is displayed.

6. A multi-battery pack charge and discharge scheduling method as claimed in claim 1, characterized in that: The switching voltage in step S6 is less than V_switch: V_switch=I_max*R_internal Among them, V_switch is the maximum switching voltage allowed during the charging and discharging process after the battery pack is connected in parallel; I_max is the maximum charging and discharging current value allowed by the battery pack; R_internal is the internal resistance of the battery pack during the charging and discharging process.

7. A multi-battery pack charge and discharge scheduling device, characterized in that: The device includes at least one processor and at least one memory, the processor and the memory are coupled; the memory stores a computer execution program of the charge and discharge scheduling method as described in claim 1; when the processor executes the computer execution program stored in the memory, the processor can execute a multi-battery pack charge and discharge scheduling method.

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