FFT calculation zero-filling control device and method based on data storage indication control

By adopting a zero-compensation control device based on data storage indication control in the FFT computing device, the problem of complex and low efficiency of zero-compensation operations in the prior art is solved, and a simple, real-time and efficient FFT calculation zero-compensation process is realized.

CN117216458BActive Publication Date: 2025-02-21HUNAN GREAT LEO MICROELECTRONICS CO LTD
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Patent Information

Application Number
CN202311119547.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2023-08-31
Publication Date
2025-02-21
Estimated Expiration
2043-08-31

AI Technical Summary

Technical Problem

The zero-compensation operation in existing FFT computing devices is complex, costly and inefficient, making it difficult to meet real-time requirements.

Method used

Using the FFT calculation zero-compensation control device based on data storage indication control, the data is collected in real time by real-time data acquisition module and sending storage status and address to the indication register module. The indication register module configures the indication register to identify the data bits in the storage space, and the data output is The control module controls the output of storage data or zero-complement data according to the instruction register.

Benefits of technology

It simplifies the zero-compensation operation in the FFT calculation process, reduces hardware resource consumption, improves real-time and robustness, and is suitable for various FFT calculation scenarios that require zero-compensation.

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Abstract

The present invention discloses a zero-filling control device and method for FFT calculation based on data storage indication control, the device comprises: a real-time data acquisition module, used for real-time acquisition of data required for FFT calculation and writing it into a designated storage space, and sending the storage state and storage address of the written data in the storage space to an indication register module; an indication register module, used for configuring each data bit in the indication register according to the data storage state and storage address, wherein each data bit corresponding to the stored data is configured as a first flag, and the remaining data bits are configured as a second flag; a data output control module, used for, when receiving a data read request, controlling the output of data to a data reading module in an FFT processor according to each data bit in the indication register. The present invention has the advantages of simple implementation method, low complexity, low hardware resource consumption, strong real-time performance and robustness.
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Description

Technical Field

[0001] The present invention relates to the technical field of FFT (Fast Fourier Transform) computing equipment, and in particular to a FFT computing zero-filling control device and method based on data storage indication control. Background Art

[0002] Fast Fourier Transform (FFT) is a commonly used algorithm in digital signal processing. The number of input points of collected data supported by the FFT computing device is closely related to the FFT algorithm used. For example, if FFT uses a radix-N algorithm (N is usually 2 or 4), the hardware device can only support N x (x=1,2,...x max , The maximum number of points supported by the designed FFT) is the input of the data collected. In practical applications, the number of data points M is usually not equal to N. x Completely fit, but satisfy the following relationship: N x-1 <M<N x , that is, the number of data points M collected at one time cannot reach the N required for FFT calculation x Point number requirement, so it is necessary to fill the number of collected data points with zeros to expand it to N x , thus meeting the FFT operation requirements.

[0003] In an FFT computing device for real-time data collection and calculation, the collected data is sequentially written into a readable and writable RAM in the form of a data stream. After all the collected data are written, the FFT computing device reads out the corresponding data sequentially for calculation. Therefore, in the prior art, the zero-filling operation in the FFT computing device is usually implemented by controlling the zero-filling at the end of the data stream, that is, firstly determining the number of points to be stored, and after storing M data in the FFT data storage RAM, determining that a zero-filling operation is required, and then calculating the number of zero-filling N. x -M, then at the end of the data stream in the process of writing data, continue N x -M zero data are written into the FFT data storage RAM. However, in order to complete the zero-padding operation of an FFT calculation, the above method of controlling the zero-padding of FFT calculation at the end of the data stream requires multiple operations such as zero-padding judgment, zero-padding quantity calculation, and zero-padding corresponding address generation. This is not only complex and costly to implement, but also has low overall zero-padding execution efficiency, making it difficult to meet real-time requirements and affecting the real-time performance of FFT calculation. Summary of the invention

[0004] The technical problem to be solved by the present invention is: in response to the technical problems existing in the prior art, the present invention provides an FFT calculation zero-padding control device and method based on data storage indication control, which has a simple implementation method, low complexity, low hardware resource consumption, and strong real-time and robustness.

[0005] In order to solve the above technical problems, the technical solution proposed by the present invention is:

[0006] A FFT calculation zero-filling control device based on data storage indication control, comprising:

[0007] The real-time data acquisition module is used to collect the M data required for FFT calculation in real time and write them into the specified storage space, and send the storage status and storage address of the written data in the storage space to the indication register module, where M≤N x , N x is the number of calculation points that the FFT processor can support;

[0008] An indication register module, used for configuring each data bit in the indication register according to the storage state and storage address of the data required for the real-time collected FFT calculation in the storage space, wherein each data bit in the indication register corresponding to the storage space storing data is configured as a first flag, and the remaining data bits are configured as a second flag;

[0009] The data output control module is used to control the output N according to each data bit in the indication register when receiving a data read request. x data to the data reading module in the FFT processor, wherein if the first flag is set, the data in the storage space is directly output, and if the second flag is set, a zero padding operation is performed, N x is the number of calculation points that the FFT processor can support.

[0010] Furthermore, the real-time data acquisition module includes a data acquisition unit and a status sending unit that are interconnected. The data acquisition unit acquires M data required for FFT calculation in real time and writes them into a designated storage space. The status sending unit sends the storage status and storage address of the M data to the indication register module.

[0011] Furthermore, the indication register module further includes a configuration unit connected to the indication register, so as to configure the data bits of the M written data in the indication register corresponding to the storage space as the first flag, and to configure the data bits of the N written data in the storage space as the first flag when the real-time data acquisition module writes the M FFT calculation data required for the real-time acquisition into the designated storage space. x -M data bits to which no data is written are configured as the second flag.

[0012] Furthermore, the number of data bits of the indication register corresponds to the size of the storage space, that is, each data in the storage space corresponds to a data bit in the indication register.

[0013] Furthermore, the indication register module also includes a reset control unit connected to the indication register, which is used to control the indication register to reset when a valid reset signal is received.

[0014] Furthermore, the data output control module includes a flag judgment unit and a control selection unit connected to each other. When a data read request is received and N data needs to be output from the storage space, x When the M data is stored in the storage space, the flag judgment unit judges the data bits in the indication register in turn. If it is the first flag, the control selection unit is started to control the M data stored in the storage space to be directly output according to the first control logic. If it is the second flag, the control selection unit is started to control the zero padding operation according to the second control logic to expand the final output data to N. x indivual.

[0015] Furthermore, the storage space is any one of RAM memory, flash memory, cache or auxiliary memory.

[0016] An FFT processor includes a data reading module and an FFT calculation module, wherein the data reading module is used to read the N required for FFT calculation. x The FFT calculation module calculates N data according to the data reading module. x The front end of the data reading module is also provided with the above-mentioned FFT calculation zero-filling control device, which is used to collect the M data required for FFT calculation in real time and fill in zeros to expand to N data. x After receiving the data, it is output to the data reading module.

[0017] A method for controlling zero padding in FFT calculation based on data storage indication control, comprising the steps of:

[0018] Step S01. Real-time acquisition of M data required for FFT calculation is written into the specified storage space, and the storage status and storage address of the M written data in the storage space are output, where M≤N x , N x is the number of calculation points that the FFT processor can support;

[0019] Step S02. According to the storage state and storage address of the M FFT calculations required for the data collected in real time, an indication register is configured for each data bit in the storage space, wherein each data bit corresponding to the M data stored in the storage space is configured as a first flag, and N data bits in the storage space are configured as a first flag. x-M data bits that have not been written are configured as the second flag;

[0020] Step S03. When a data read request is received, output N is controlled according to each data bit in the indication register. x The data are sent to the data reading module in the FFT processor, wherein if the first flag is used, the data in the storage space is directly output, and if the second flag is used, a zero padding operation is performed.

[0021] Furthermore, before step S01, the step also includes resetting each data bit in the control indication register when a reset signal is received and is valid.

[0022] Compared with the prior art, the advantages of the present invention are as follows: the present invention aims at the characteristics of FFT data storage, realizes the zero-filling indication control of FFT calculation data from the perspective of FFT data storage, collects the data required for FFT calculation in real time by the real-time data collection module and writes it into the specified storage space, and sends the storage status and storage address of the written data in the storage space to the indication register module at the same time, and the indication register module configures each data bit in the indication register according to the storage status and storage address of the M FFT calculation data collected in real time in the storage space, so that different data bits correspond to the state of whether data is stored, and then combined with the data output control module, the output storage data or zero filling is directly controlled according to each data bit in the indication register, so that there is no need to perform complex operations such as point number judgment, zero filling judgment, zero filling number calculation, zero filling address generation, etc., and the zero filling operation in the FFT calculation process can be quickly realized, which greatly reduces the complexity of zero filling in the FFT calculation process and the required hardware resources, and has very good robustness, and can be applicable to various types of occasions requiring zero filling in FFT calculation. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 It is a structural diagram of the FFT calculation zero-padding control device based on data storage indication control in this embodiment.

[0024] Figure 2 It is a schematic diagram of the principle of implementing FFT calculation based on zero-padding operation in this embodiment.

[0025] Figure 3 It is a schematic diagram of the structural principle of an FFT calculation zero-filling control device based on data storage indication control in a specific application embodiment of the present invention.

[0026] Figure 4 It is a detailed implementation flow diagram of FFT calculation zero padding in a specific application embodiment of the present invention.

[0027] Legend: 1. Real-time data acquisition module; 101. Data acquisition unit; 102. Status sending unit; 2. Indication register module; 201. Indication register; 202. Configuration unit; 203. Reset control unit; 3. Data output control module; 301. Flag judgment unit; 302. Control selection unit; 4. Data reading module. DETAILED DESCRIPTION

[0028] The present invention is further described below in conjunction with the accompanying drawings and specific preferred embodiments, but the protection scope of the present invention is not limited thereby.

[0029] As shown in the disclosure of the present invention, unless the context clearly indicates an exception, the words "one", "a kind of" and / or "the" do not specifically refer to the singular, but may also include the plural. The words "first", "second" and similar words used in the disclosure of the present invention do not indicate any order, quantity or importance, but are only used to distinguish different components. Similarly, words such as "include" or "comprise" mean that the elements or objects appearing before the word include the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connect" or "connected" and similar words are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect.

[0030] In the FFT computing device, a real-time data acquisition module and an FFT data storage RAM are usually provided. The real-time data acquisition module is used to collect the data required for FFT calculation in real time and store it in the FFT data storage RAM. In order to realize the zero-filling operation in the FFT computing device, the traditional operation is usually to set a zero-filling device between the real-time data acquisition module and the FFT data storage RAM. When the real-time data acquisition module starts to store data in the FFT data storage RAM, the zero-filling device obtains the number of data currently stored at one time, M, and then makes a point judgment based on this to see whether the M value is N. x , if not N x Then you need to fill in zeros and calculate M and N x (N x-1 <M<N x ) x -M is the number of zero padding; after the real-time data acquisition module stores M data in the FFT data storage RAM, the zero padding device continues to generate N zero padding at the end of the data stream of the real-time data acquisition module. x -M samples of all-zero data stream, and according to the storage address of the Mth data of the real-time data acquisition module, N x -M samples storage address, store the required zero-filled data into FFT data storage RAM, fill M data with zeros to N xThe data is stored in the FFT data storage RAM. As can be seen from the above, in order to realize the FFT calculation zero-filling operation, the traditional operations such as point number judgment, zero-filling judgment, zero-filling quantity calculation, and zero-filling address generation are required, which makes the FFT zero-filling process complex, resource-intensive and inefficient.

[0031] When the real-time data acquisition module stores each set of FFT calculation data, regardless of whether the number of data M is equal to N x , the next set of real-time data collection will always be N times the starting storage address. x , that is, when storing, 1. different groups will not overwrite data; 2. the initial storage addresses between different groups will be N intervals. x The present invention specifically considers the above-mentioned storage characteristics of FFT calculation data in the FFT processor, and realizes zero-filling indication control of FFT calculation data from the perspective of FFT data storage. The real-time data collection module collects the data required for FFT calculation in real time and writes it into the specified storage space, and sends the storage status and storage address of the written data in the storage space to the indication register module. The indication register module configures each data bit in the indication register according to the storage status and storage address of the M data required for FFT calculation collected in real time in the storage space, so that different data bits correspond to the state of whether data is stored. Then, the data output control module directly controls the output of the stored data or zero-filling according to each data bit in the indication register, so that there is no need to perform complex operations such as point number judgment, zero-filling judgment, zero-filling number calculation, and zero-filling address generation, and the zero-filling operation in the FFT calculation process can be quickly realized, which greatly reduces the complexity of zero-filling in the FFT calculation process and the required hardware resources. At the same time, it has very good robustness and can be applied to various types of occasions requiring zero-filling in FFT calculation.

[0032] like Figure 1 As shown, the FFT calculation zero-padding control device based on data storage indication control in this embodiment includes:

[0033] The real-time data acquisition module 1 is used to collect the M data required for FFT calculation in real time and write them into the specified storage space, and send the storage status and storage address of the written data in the storage space to the indication register module 2, where M≤N x , N x is the number of calculation points that the FFT processor can support;

[0034] The indication register module 2 is used to configure each data bit in the indication register 201 according to the storage state and storage address of the data required for the real-time FFT calculation in the storage space, wherein each data bit in the indication register 201 corresponding to the storage space storing data is configured as a first flag, and the remaining data bits are configured as a second flag;

[0035] The data output control module 3 is used to control the output N according to each data bit in the indication register 201 when receiving a data read request. x The data is sent to the data reading module 4 in the FFT processor, wherein if the first flag is set, the data in the storage space is directly output, and if the second flag is set, a zero padding operation is performed. x is the number of calculation points that the FFT processor can support.

[0036] In this embodiment, the input end of the real-time data acquisition module 1 is connected to the real-time data acquisition module in the FFT calculation device, and the output end is respectively connected to the specified storage space and the indication register module 2, so as to control the FFT calculation data collected in real time by the real-time data acquisition module to be written into the specified storage space, and at the same time send the data storage status and storage address to the indication register module 2.

[0037] Further, in this embodiment, the real-time data acquisition module 1 specifically includes a data acquisition unit 101 and a state sending unit 102. The data acquisition unit 101 collects M data required for FFT calculation in real time and writes them into a specified storage space. The state sending unit 102 sends the storage state and storage address of the M data to the indication register module 2. Whenever a real-time collected FFT required calculation data is stored in the storage space, the corresponding storage state and storage address are sent to the indication register module 2. For example, "1" is used to indicate the state of data storage, and "0" is used to indicate the state of no data storage. The "1" / "0" indicating the storage state is sent to the indication register module 2 together with the storage address. Then, when the indication register module 2 receives the above-mentioned state information, the data storage state of each storage address in the storage space can be determined. It can be understood that it can also be configured according to actual needs that after storing M data, the storage state of each storage address is uniformly obtained and sent to the indication register module 2, which can be specifically configured according to actual needs.

[0038] In an optional embodiment, the real-time data acquisition module 1 can realize the data acquisition function by the real-time data acquisition module inside the FFT computing device, and at the same time, a status sending unit 102 is configured for the real-time data acquisition module to send the storage status and storage address of the data collected by the real-time data acquisition module in real time to the indication register module 2. That is, the real-time data acquisition module 1 can add the function of sending the data storage status on the basis of the original real-time data acquisition module in the FFT processor, so that it can indicate the state of data storage in the storage space in combination with the indication register module 2, and then quickly realize the zero filling indication control from the perspective of the storage of FFT data in the storage space, without the need to add a zero filling device between the real-time data acquisition module and the storage module to complete the complex operations such as point number judgment, zero filling judgment, zero filling quantity calculation, zero filling address generation, etc. as the traditional FFT processor needs.

[0039] When the real-time data acquisition module 1 performs real-time data acquisition, multiple FFT calculation data groups will be placed in the storage space at one time, so the full storage space indication is required. In this embodiment, an indication register 201 is configured in the indication register module 2. The number of data bits of the indication register 201 corresponds to the size of the storage space, that is, each data in the storage space corresponds to a data bit in the indication register 201. Each data bit in the indication register 201 corresponds to the data storage state of the entire storage space, and the amount of data required for one FFT calculation corresponds to the data bit corresponding to each group of FFT calculation data. For example, if there are N x data bits correspond to a set of FFT calculation data, where the storage space corresponding to M data bits stores data, and N x -The storage space corresponding to the M data bits does not store data, and the output N x When data is received by the data reading module in the FFT processor, each data bit indicates whether to directly read the stored data in the storage space or to fill in zeros. This embodiment can directly control the zero-filling operation by using the indication method of the indication memory, without the need to perform complex operations such as point number judgment, zero-filling judgment, zero-filling quantity calculation, and zero-filling address generation.

[0040] In this embodiment, a configuration unit 202 connected to the indication register 201 is further included, so as to configure the data bits of the M written data in the indication register 201 corresponding to the storage space as the first flag, and to configure the data bits of the N written data in the storage space as the first flag when the real-time data acquisition module 1 writes the M FFT calculation data collected in real time into the designated storage space. x -M data bits that have not been written are configured as the second flag, and the first flag and the second flag are used to respectively mark whether the storage space stores data, thereby controlling whether the output data is the data stored in the storage space or a zero-filling operation is performed based on the different flags.

[0041] It can be understood that an indication register can be configured in the indication register module 2, and each data bit in the indication register corresponds to the number of spaces in the entire storage space that can store samples. Of course, multiple indication registers can also be configured, and each indication register corresponds to the number of spaces in the entire storage space that can store samples. In this way, the zero-filling operation in the FFT calculation process can be performed in batches at the same time. The number of indication registers and the data bit settings can be configured according to actual needs.

[0042] In this embodiment, the first flag is specifically configured as "1" to indicate that data has been stored in the corresponding position of the storage space, and the corresponding output data is the stored data in the storage space. The second flag is specifically configured as "0" to indicate that data has not been stored in the corresponding position of the storage space, and the corresponding output data needs to be padded with zeros. x When calculating data, the real-time data acquisition module 1 collects M data in real time and writes them into the specified storage space. The data bit corresponding to the M data in the control indication register is 1, and the data is read out normally. M is the number of data points actually stored in the storage space by the real-time data acquisition module; the latter N x -M data need to be padded with zeros, then the control indication register should be x -M data bit is 0, and the subsequent control output of real-time acquisition data or zero-filled data is based on the data bits in the indicator register. x It is understandable that the first flag and the second flag can be configured as other types of flags according to actual needs, and it is only necessary to ensure that the first flag is different from the second flag to identify whether the data output is storage data or zero-filled data.

[0043] In this embodiment, the indication register module 2 further includes a reset control unit 203 connected to the indication register, which is used to control the indication register 201 to reset when receiving a valid reset signal. For example, when the last zero-filling operation needs to be reset, a reset signal is generated to the indication register module 2. After receiving the valid reset signal, the indication register module 2 controls the data bits of each indication register 201 to reset to the initial state, waiting for the next zero-filling control operation.

[0044] In an optional embodiment, the configuration unit 202 and the reset control unit 203 can be implemented by the same controller, the input end of the controller is connected to the output end of the real-time data acquisition module 1, the reset control end receives a reset signal, and the output end of the controller is connected to the indication register 201. When the controller receives the data storage state and storage address sent by the data writing module 1, the indication register 201 is controlled to configure the value of each corresponding data bit according to the data storage state and storage address, and when the reset signal is received, the data bits of each indication register 201 are controlled to be reset to the initial state.

[0045] In this embodiment, the data output control module 3 specifically includes a flag judgment unit 301 and a control selection unit 302. When a data read request is received and a data needs to be output from the storage space each time, the flag judgment unit 301 judges each data bit in the indication register 201 in turn. If it is the first flag, the control selection unit 302 is started to control the data stored in the storage space to be directly output according to the first control logic. If it is the second flag, the control selection unit 302 is started to control the zero padding operation according to the second control logic, that is, the control output is 0, so that the final output data can be expanded to N. x This implements the zero-filling function for FFT calculation.

[0046] This embodiment configures the indication register to identify the storage status of the data required for FFT calculation in the storage space, and then controls the output of the data stored in the storage space or the zero-filled data according to the storage status identified by the indication register, so as to achieve zero-filling for FFT calculation. When the reset signal is valid, the operation of setting all indication registers to 0 is executed. When M real-time collected data that need to be filled with zero enter the storage space, the data is normally written to the first M spaces of the RAM, and the corresponding M indication registers in the indication register module are set to 1. The N after the storage space x -M spaces are not written, and the corresponding indication register maintains the value of 0. x When the first M data are stored by real-time data acquisition module 1, the indication register is 1 when reading, and the data is read normally; the last N data are stored by real-time data acquisition module 1. x -M data need to be padded with zeros, and the indicator register is 0 when reading. The data output control module 3 selects the output data according to the value of the indicator register. When the indicator register is 1, the M data normally stored in the storage space are output; when the indicator register is 0, the N data that need to be padded with zeros are output. x -M zero data output. So far, M real-time collected data have completed zero padding to N x FFT calculation data requirements, based on the N x Perform FFT calculation on the data, such as Figure 2 shown.

[0047] In this embodiment, the storage space may be a RAM memory, a flash memory, a cache or an auxiliary memory, etc. The following takes the use of RAM as the FFT calculation data storage space as an example to further illustrate the method of the present invention.

[0048] like Figure 3 As shown, in the FFT calculation zero-filling control device based on data storage indication control in this embodiment, the FFT calculation data storage space is RAM. When it is necessary to perform FFT calculation, the data required for the real-time FFT calculation collected is written into the RAM according to the address provided by the real-time data acquisition module, and the storage status of each space of the RAM is identified and sent to the indication register module 2. The corresponding data is read out of the RAM according to the address provided by the data reading module, and the data reading in the RAM is controlled by the data output control module 3. The indication register module 2 sets a corresponding number of one-bit indication registers according to the size of the RAM space, and configures each data bit according to the data storage status in the RAM. When the real-time data acquisition module writes to the RAM, the indication register module sets the corresponding indication register to "1" according to the write address, that is, the data bit corresponding to the data stored is configured to "1", and the data bit without data stored is configured to "0". The data output control module 3 receives the output data of the RAM and the indication register module 2, and controls the selection of outputting the data in the RAM or 0 data to the reading data module according to the indication of each data bit of the indication register module 2. Specifically, when the data reading module reads out the RAM, the indicator register module 2 outputs the indicator register data corresponding to the address to the data control output module 3. The data control output module 3 outputs the corresponding data in the RAM to the data reading module if the indicator register is 1 according to the indicator register data provided by the indicator register module, and outputs zero data to the data reading module 4 if the indicator register is 0. When the external reset signal is valid, all the indicator registers in the module are reset to 0, that is, the indicator register module 2 receives the external valid reset signal and resets all the registers in the module to 0; when storing data, the module sets the corresponding indicator register to 1 according to the storage data address; when reading data, the module outputs the corresponding indicator register data according to the read data address.

[0049] This embodiment also provides an FFT processor, including a data reading module and an FFT calculation module. The data reading module is used to read the N required for FFT calculation. x The FFT calculation module calculates N data according to the data reading module. x The front end of the data reading module is also provided with the FFT calculation zero-filling control device based on the data storage indication control as described above, so as to collect the M data required for the FFT calculation in real time and fill in the zeros to expand to N data. x After receiving the data, it is output to the data reading module.

[0050] This embodiment also provides an FFT calculation zero-padding control method based on data storage indication control, the steps comprising:

[0051] Step S01. Real-time acquisition of M data required for FFT calculation is written into the specified storage space, and the storage status and storage address of the M written data in the storage space are output, where M≤N x , N x is the number of calculation points that the FFT processor can support;

[0052] Step S02. According to the storage status and storage address of the data required for the M FFT calculations collected in real time, an indication register 201 is configured for each data bit, wherein each data bit corresponding to the M data stored in the storage space is configured as a first flag, and each data bit corresponding to the N data stored in the storage space is configured as a first flag. x -M data bits that have not been written are configured as the second flag;

[0053] Step S03. When a data read request is received, the output N is controlled according to each data bit in the indication register 201. x The data is sent to the data reading module 4 in the FFT processor, wherein if the first flag is set, the data in the storage space is directly output, and if the second flag is set, a zero padding operation is performed. x is the number of calculation points that the FFT processor can support.

[0054] In this embodiment, before step S01 , the step further includes resetting each data bit in the control indication register 201 when a reset signal is received and is valid.

[0055] The FFT calculation zero-padding control method based on data storage indication control in this embodiment corresponds to the FFT calculation zero-padding control device based on data storage indication control described above, and will not be described in detail here.

[0056] In an optional application embodiment, if Figure 4 As shown, when the FFT calculation data storage space is specifically a RAM memory, the detailed steps of performing FFT calculation using the above device of this embodiment are as follows:

[0057] Step 1) An effective reset signal is input externally, and the FFT calculation zero-filling device of the present invention is reset.

[0058] Step 2) indicates that register module 2 receives an external reset signal and sets all internal registers to 0.

[0059] Step 3) The RAM stores the input data of the real-time data acquisition module and at the same time instructs the register module 2 to set the corresponding register data position to 1 according to the storage status of the RAM.

[0060] Step 4) The data output control module 2 sends a data read request to the FFT calculation zero-filling device of the present invention.

[0061] Step 5) The RAM outputs the corresponding data to the data output control module 3 according to the read request, and the indication register module 2 outputs the corresponding indication register data to the data output control module 3 according to the read request.

[0062] Step 6) The data output control module 3 selects to output the RAM data or 0 data to the data reading module according to the value of each indication register, wherein if it is 1, the data stored in the RAM is output, and if it is 0, zero is filled.

[0063] Step 7) Data output control module 3 reads real-time collected data and zero-filled data for N x Point FFT operation.

[0064] The above is only a preferred embodiment of the present invention, and does not limit the present invention in any form. Although the present invention has been disclosed as a preferred embodiment, it is not intended to limit the present invention. Therefore, any simple modification, equivalent change and modification made to the above embodiment according to the technical essence of the present invention without departing from the content of the technical solution of the present invention shall fall within the scope of protection of the technical solution of the present invention.

Claims

1. A FFT calculation zero-filling control device based on data storage indication control, characterized in that: include: The real-time data acquisition module (1) is used to collect M data required for FFT calculation in real time and write them into the specified storage space, and send the storage status and storage address of the written data in the storage space to the indication register module (2), where M≤N x , N x is the number of calculation points that the FFT processor can support; An indication register module (2) is used to configure each data bit in the indication register (201) according to the storage state and storage address of the data required for the real-time FFT calculation in the storage space, wherein each data bit in the indication register (201) corresponding to the storage space storing data is configured as a first flag, and the remaining data bits are configured as a second flag; A data output control module (3) is used to sequentially determine each data bit in the indication register (201) when receiving a data read request, and control the output N according to each data bit in the indication register (201). x data to a data reading module (4) in an FFT processor, wherein if it is determined as the first flag, the data in the storage space is directly output, and if it is determined as the second flag, a zero padding operation is performed; The indication register module (2) further comprises a configuration unit (202) connected to the indication register (201), for configuring the data bits of the indication register (201) corresponding to the M written data in the storage space as the first flag, and configuring the data bits of the N written data in the storage space as the first flag, when the real-time data acquisition module (1) writes the M data required for FFT calculation collected in real time into the designated storage space. x -M data bits to which no data is written are configured as the second flag.

2. The FFT calculation zero-padding control device based on data storage indication control according to claim 1, characterized in that: The real-time data acquisition module (1) comprises a data acquisition unit (101) and a status sending unit (102) which are connected to each other. The data acquisition unit (101) acquires M data required for FFT calculation in real time and writes them into a designated storage space. The status sending unit (102) sends the storage status and storage address of the M data to the indication register module (2).

3. The FFT calculation zero-padding control device based on data storage indication control according to claim 1, characterized in that: The number of data bits of the indication register (201) corresponds to the size of the storage space, that is, each data in the storage space corresponds to a data bit in the indication register (201).

4. The FFT calculation zero-padding control device based on data storage indication control according to claim 3 is characterized in that: The indication register module (2) further comprises a reset control unit (203) connected to the indication register (201), and configured to control the indication register (201) to reset when receiving a valid reset signal.

5. The FFT calculation zero-padding control device based on data storage indication control according to any one of claims 1 to 4, characterized in that: The data output control module (3) comprises a flag judgment unit (301) and a control selection unit (302) which are connected to each other. When a data read request is received and N data needs to be output from the storage space, x When the M data are stored in the storage space, the flag judgment unit (301) judges the data bits in the indication register (201) in sequence. If the first flag is displayed, the control selection unit (302) is started to control the M data stored in the storage space to be directly output according to the first control logic. If the second flag is displayed, the control selection unit (302) is started to control the zero padding operation according to the second control logic to expand the final output data to N. x indivual.

6. The FFT calculation zero-padding control device based on data storage indication control according to any one of claims 1 to 4, characterized in that: The storage space is any one of RAM memory, flash memory, cache or auxiliary memory.

7. An FFT processor, comprising a data reading module and an FFT calculation module, wherein the data reading module is used to read the N required for FFT calculation x The FFT calculation module calculates N data according to the data reading module. x The FFT calculation is performed on the data, which is characterized by: The front end of the data reading module is also provided with an FFT calculation zero-filling control device as claimed in any one of claims 1 to 6, so as to collect M data required for FFT calculation in real time and fill in zeros to expand to N data. x After receiving the data, it is output to the data reading module.

8. A method for controlling zero padding in FFT calculation based on data storage indication control, characterized in that the steps include: Step S01. Real-time acquisition of M data required for FFT calculation is written into the specified storage space, and the storage status and storage address of the M written data in the storage space are output, where M≤N x , N x is the number of calculation points that the FFT processor can support; Step S02. According to the storage status and storage address of the data required for the M FFT calculations collected in real time, an indication register (201) is configured to indicate each data bit in the storage space, wherein each data bit corresponding to the M data stored in the storage space is configured as a first flag, and each data bit corresponding to the M data stored in the storage space is configured as a first flag. x -M data bits that have not been written are configured as the second flag; Step S03. When a data read request is received, the data bits in the indication register (201) are judged in turn, and the output N is controlled according to the data bits in the indication register (201). x The data is sent to a data reading module (4) in the FFT processor, wherein if it is determined as the first flag, the data in the storage space is directly output, and if it is determined as the second flag, a zero padding operation is performed.

9. The FFT calculation zero-padding control method based on data storage indication control according to claim 8, characterized in that: Before step S01, the method further includes, when a reset signal is received and is valid, resetting each data bit in the control indication register (201).

Citation Information

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