Qubit frequency drive signal generator, and quantum computer system

Abstract

The application discloses a kind of quantum bit frequency driving signal generators, comprising: first clock module is configured as according to received clock source signal and second pulse signal distribution multiple mutually synchronized working clock signals;Wherein, the second pulse signal is used to align multiple the working clock signal;Control module is configured as receiving task data and trigger signal and according to the working clock signal forwarding task data and the trigger signal;Multiple signal output modules, each signal output module is configured as responding the trigger signal and according to received the task data and the working clock signal output multiple way for driving quantum bit frequency parameter pulse signal.The application improves the synchronization accuracy of pulse signal for driving quantum bit frequency.

Description

Technical Field

[0001] This application belongs to the quantum field, and in particular to a qubit frequency-driven signal generator and a quantum computer system. Background Technology

[0002] The quantum processor is the core component for performing quantum computing. A quantum processor integrates multiple qubits. To ensure the normal operation of these qubits, various driving signals are required. These include frequency driving signals that drive the operating frequency of the qubits or the tunable couplers between adjacent qubits. These frequency driving signals include not only DC signals that drive the qubits or tunable couplers to perform single-qubit gate operations, but also pulse signals that drive the qubits or tunable couplers to perform two-qubit or multi-qubit gate operations. Both DC and pulse signals are low-frequency signals, provided by corresponding signal source modules. Therefore, a dedicated quantum measurement and control system is needed. Within this system, multiple signal source modules provide various control signals to each qubit. For example, a signal generator can be used to provide pulse signals to adjust the operating frequency of the qubits or the tunable couplers between adjacent qubits.

[0003] With the development of quantum technology, the number of bits in quantum processors is increasing, and the quantum computing tasks running on quantum processors are becoming more and more complex. Consequently, the number of signal source modules that need to be integrated into the corresponding quantum measurement and control system is also increasing. This makes it difficult to synchronize the clocks of multiple signal source modules, resulting in very low synchronization of the frequency drive signals applied to the quantum processor and reducing the computational accuracy of the quantum processor.

[0004] Therefore, how to improve the clock synchronization of multiple signal source modules in a quantum measurement and control system has become a technical problem that urgently needs to be solved in this field.

[0005] It should be noted that the information disclosed in the background section of this application is intended only to enhance the understanding of the general background of this application, and should not be construed as an admission or in any way implying that the information constitutes prior art known to those skilled in the art. Summary of the Invention

[0006] The purpose of this application is to provide a qubit frequency driving signal generator and a quantum computer system, which improves the synchronization accuracy of the pulse signal used to drive the qubit frequency.

[0007] The specific technical solution of this application is as follows:

[0008] One aspect of this application provides a quantum bit frequency-driven signal generator, comprising:

[0009] A first clock module is configured to distribute multiple mutually synchronized working clock signals based on a received clock source signal and a second pulse signal; wherein the second pulse signal is used to align the multiple working clock signals.

[0010] The control module is configured to receive task data and trigger signals and forward the task data and trigger signals according to the working clock signal;

[0011] Multiple signal output modules are configured to respond to the trigger signal and output multiple pulse signals for driving the frequency parameters of the qubits based on the received task data and the working clock signal.

[0012] The quantum bit frequency driving signal generator described above preferably further includes a board body, on which the first clock module, the control module, and the plurality of signal output modules are all integrated.

[0013] The quantum bit frequency driving signal generator described above preferably further includes a memory, which is communicatively connected to the control module and is used to store the task data.

[0014] The quantum bit frequency drive signal generator described above preferably further includes a second clock module configured to output a clock signal for the operation of the memory.

[0015] The quantum bit frequency drive signal generator described above preferably further includes a third clock module, which is configured to output a clock signal for configuring the control module.

[0016] The quantum bit frequency driving signal generator described above preferably further includes a plurality of signal connectors, each of which is configured to receive the clock source signal and / or the second pulse signal, and / or output the pulse signal.

[0017] The quantum bit frequency driving signal generator described above preferably further includes a power supply module, which is configured to provide power signals for the operation of the first clock module, the control module, and the signal output module.

[0018] In the quantum bit frequency driving signal generator described above, preferably, the control module includes an FPGA, MCU, MPU, or DSP.

[0019] In the quantum bit frequency-driven signal generator described above, preferably, the signal output module includes a DAC.

[0020] In another aspect, this application provides a quantum driving device, including a backplane and a plurality of qubit frequency driving signal generators as described above, wherein the plurality of qubit frequency driving signal generators are integrated on the backplane.

[0021] In another aspect, this application provides a quantum control system, including a central control system and a plurality of the aforementioned quantum driving devices, wherein the central control system is configured to control the plurality of quantum driving devices to output pulse signals for driving qubit frequency parameters.

[0022] In another aspect, this application provides a quantum computer system, including the aforementioned quantum control system and quantum processor, wherein the quantum processor performs quantum computation based on pulse signals output by the quantum control system.

[0023] Compared with the prior art, this application has the following beneficial effects:

[0024] This application provides a qubit frequency driving signal generator, including a first clock module, a control module, and multiple control modules. The first clock module is configured to distribute multiple synchronized working clock signals based on a received clock source signal and a second pulse signal, wherein the second pulse signal is used to align the multiple working clock signals. The control module is configured to receive task data and forward the task data and a trigger signal based on the working clock signals. Each signal output module is configured to respond to the trigger signal and output multiple pulse signals for driving qubit frequency parameters based on the received task data and the working clock signals. This application ensures that the multiple working clock signals are from the same source by receiving the clock source signal and dividing it into multiple working clock signals through the first clock module, and by using the second pulse signal to align the multiple working clock signals, ensuring very high synchronization accuracy between the multiple working clock signals distributed to the control module and the signal output modules. Furthermore, the trigger signal forwarded by the control module ensures that the triggering of the multiple signal output modules is also synchronized, thereby ensuring very high synchronization accuracy of the pulse signals for driving qubit frequency parameters output by the multiple signal output modules based on the task data received from the control module, improving the computational accuracy of the quantum processor.

[0025] The quantum drive device, quantum control system, and quantum computer system proposed in this application belong to the same concept as the quantum bit frequency drive signal generator, and therefore have the same beneficial effects, which will not be elaborated here. Attached Figure Description

[0026] Figure 1 A schematic diagram of a quantum measurement and control system built using the prior art provided in the embodiments of this application;

[0027] Figure 2A schematic diagram of a quantum bit frequency driving signal generator provided in this application embodiment. Figure 1 ;

[0028] Figure 3 A schematic diagram of a quantum bit frequency driving signal generator provided in this application embodiment. Figure 2 ;

[0029] Figure 4 This is a schematic diagram of a quantum drive device provided in an embodiment of this application.

[0030] Explanation of reference numerals in the attached figures:

[0031] 1 - First clock module, 2 - Control module, 3 - Signal output module, 4 - Memory, 5 - Second clock module, 6 - Third clock module. Detailed Implementation

[0032] The following detailed description is illustrative only and is not intended to limit the embodiments and / or their application or use. Furthermore, it is not intended to be construed as being bound by any express or implied information presented in the preceding "Background Art" or "Summary of the Invention" or "Detailed Description" sections.

[0033] To make the objectives, technical solutions, and advantages of the embodiments of this application clearer, one or more embodiments are now described with reference to the accompanying drawings, wherein similar reference numerals are used throughout the text to refer to similar components. In the following description, numerous specific details are set forth for purposes of explanation in order to provide a more thorough understanding of one or more embodiments. However, it will be apparent that one or more embodiments may be practiced in various circumstances without these specific details, and the various embodiments may be combined with and referenced to each other without contradiction.

[0034] It should be noted that the terms "first," "second," etc., in the specification, claims, and accompanying drawings of this application are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence. It should be understood that such data can be interchanged where appropriate so that the embodiments of this application described herein can be implemented in orders other than those illustrated or described herein. Furthermore, the terms "comprising" and "having," and any variations thereof, are intended to cover non-exclusive inclusion; for example, a process, method, system, product, or apparatus that comprises a series of steps or units is not necessarily limited to those steps or units explicitly listed, but may include other steps or units not explicitly listed or inherent to such processes, methods, products, or apparatus.

[0035] Typically, a quantum processor contains multiple qubits and data transmission lines. Each qubit includes a detector and a qubit device coupled together. The qubit device can be an artificial superconducting qubit constructed using a superconducting Josephson junction and capacitance to ground, and the detector can be a resonant cavity. The qubit device has a first control signal line and a second control signal line, and the detector coupled to the qubit device has a third control signal line. The first control signal line transmits quantum state control signals to manipulate the quantum state information of the qubit device; the second control signal line transmits frequency control signals to manipulate the frequency parameters of the qubit device; and the third control signal line transmits both measurement signals for reading from the detector and outputs the readback signals returned by the detector, thus achieving indirect reading and measurement of the qubit device's state. Therefore, the quantum control system for qubit manipulation and measurement in the quantum processor needs to generate and output three control signals, respectively, to the first to third control signal lines to achieve the manipulation and measurement of the qubits in the quantum processor.

[0036] like Figure 1 The prior art shown depicts a quantum measurement and control system built using commercial instruments. As is well known, a quantum processor has multiple qubits, and quantum computing tasks can be performed by a single qubit or by multiple qubits working together. To ensure the normal operation of each qubit, various driving signals are needed, such as frequency driving signals to drive single or multiple qubits to perform gate operations. Specifically, this includes single-qubit gate frequency driving signals, provided by a DC signal source, and multi-qubit gate frequency driving signals, provided by a pulse signal source. Furthermore, when a qubit performs quantum computation, it needs to be modulated to a target quantum state, specifically through a microwave signal source outputting quantum state driving signals. After the quantum processor completes its quantum computation, signal acquisition and processing equipment are needed to measure and process the results to obtain the final computational outcome.

[0037] Multiple signal sources are typically independent commercial signal sources. Furthermore, when the number of qubits integrated on a quantum processor is very large, and quantum computing requires multiple driving signals of the same type, a single signal source cannot meet the demand. Multiple signal sources of the same type need to work together to provide these signals. It is conceivable that when multiple independent commercial signal sources work together to provide frequency driving signals for the quantum processor to perform quantum computing, clock errors between the signal sources will make it difficult to guarantee the synchronization of the output frequency driving signals. This directly affects the driving effect on the quantum processor, and consequently, the accuracy of the quantum computing performed by the quantum processor.

[0038] like Figure 2As shown, this application provides a qubit frequency driving signal generator, including a first clock module 1, which is configured to distribute multiple mutually synchronized working clock signals according to a received clock source signal and a second pulse signal; a control module 2, which is configured to receive task data and forward the task data and a trigger signal according to the working clock signals; and multiple signal output modules 3, each of which is configured to respond to the trigger signal and output multiple pulse signals for driving qubit frequency parameters according to the received task data and the working clock signals.

[0039] The system receives a clock source signal and distributes multiple working clock signals. These signals are then aligned using a second pulse signal to ensure synchronization between the control module 2 and the signal output module 3. The control module 2 receives task data and trigger signals and forwards them to the signal output module 3. The trigger signals ensure that the triggering of multiple signal output modules 3 is also synchronized, thereby ensuring a very high synchronization accuracy of the multiple pulse signals output by the multiple signal output modules 3 according to the task parameters.

[0040] Furthermore, the pulse signal driving the qubit frequency parameters is typically a square wave signal. By adjusting the amplitude of the square wave signal, the frequency of the qubit reaches a preset value. Similarly, by adjusting the pulse width of the square wave signal, the frequency of the qubit reaches the preset value within a preset time period, thus enabling the execution of a multi-bit gate operation. Once the multi-bit gate operation is complete, the pulse signal output by signal output module 3 can be stopped.

[0041] This application receives a clock source signal through a first clock module 1 and divides it into multiple working clock signals to ensure that the multiple working clock signals are from the same source. It also uses a second pulse signal to align the multiple working clock signals, ensuring that the synchronization accuracy between the multiple working clock signals distributed to the control module 2 and the signal output module 3 is very high. Furthermore, the trigger signal forwarded by the control module 2 ensures that the triggering of the multiple signal output modules 3 is also synchronized. This further ensures that the synchronization accuracy of the pulse signals output by the multiple signal output modules 3 based on the task data received from the control module 2 to drive the frequency parameters of the qubits is very high, thereby improving the computational accuracy of the quantum processor.

[0042] As one embodiment of this application, the quantum bit frequency driving signal generator further includes a board body, on which the first clock module 1, the control module 2, and the plurality of signal output modules 3 are all integrated. Specifically, the first clock module 1, the control module 2, and the plurality of signal output modules 3 are all integrated circuits. By using a board body to integrate all functional modules onto a single board, the device is small in size, highly integrated, and easy to expand.

[0043] like Figure 3As shown in the embodiment of this application, the qubit frequency driving signal generator further includes a memory 4, which is communicatively connected to the control module 2 and used to store the task data. The task data specifically includes the signal waveform parameters and timing of the pulse signal. The signal waveform parameters specifically refer to the waveform parameters of the pulse signal output by the signal output module 3, such as pulse amplitude, pulse width, and ringing amplitude. The signal waveform timing refers to the application time of the pulse signal. When the quantum processor executes a quantum computing task, the multiple driving signals applied to the qubit have a time sequence and must be applied strictly according to a preset time sequence to ensure the driving effect and accuracy of the qubit. For quantum computing tasks, the corresponding task data typically occupies a large amount of memory. After being received by the control module 2, it is stored in the memory 4 and read from the memory 4 when forwarding is required, saving the memory consumption of the control module 2. In this embodiment, the memory 4 is preferably DDR, and the number of DDRs can be multiple. In other embodiments, other devices with similar data storage functions can also be selected, and no limitation is made here.

[0044] As one embodiment of this application, the quantum bit frequency driving signal generator further includes a second clock module 5, which is configured to output a clock signal for the operation of the memory 4. Specifically, the second clock module 5 may include a crystal oscillator and is connected to the memory 4 through a phase-locked loop circuit to provide a stable high-frequency clock signal for the memory 4.

[0045] As one embodiment of this application, the quantum bit frequency driving signal generator further includes a third clock module 6, which is configured to output a clock signal for configuring the control module 2. Before the control module 2 operates, its built-in parameters, such as the clock signal, also need to be configured. The third clock module 6 configures the built-in clock parameters of the control module 2 to ensure its normal operation.

[0046] It should be added that the working clock signal distributed from the first clock module 1 to the control module 2 is the clock signal used by the control module 2 to control multiple signal output modules 3 to collaboratively output pulse waveforms. The control module 2 is actively configuring the working clock signal of the signal output modules 3. However, when the third clock module 6 is used to configure the built-in clock of the control module 2, the control module 2 is passively configured. By configuring the built-in clock parameters and working clock parameters of the control module 2 through the first clock module 1 and the third clock module 6, the clock performance of the control module 2 during quantum computing tasks is ensured to be stable. In addition, both the second clock module 5 and the third clock module 6 can use crystal oscillators for easy integration.

[0047] As one embodiment of this application, the quantum bit frequency driving signal generator further includes several signal connectors. Each signal connector is configured to receive the clock source signal and / or the second pulse signal, and / or output the pulse signal. Both the clock source signal and the second pulse signal are externally transmitted signals, and the pulse signal generated by the signal output module 3 also needs to be output to the quantum processor. Using signal connectors for receiving and / or outputting signals facilitates cable connection and disconnection. In this embodiment, SSMA RF connectors are preferred, fixed to the board body, and are small in size, structurally sound, and have stable performance. In other embodiments, other devices with similar functions may be used, and no limitation is made here.

[0048] As one embodiment of this application, the quantum bit frequency driving signal generator further includes a power supply module, which is configured to provide power signals for the operation of the first clock module 1, the control module 2, and the signal output modules 3. The first clock module 1, the first control module 2, and the multiple signal output modules 3 are all active devices, and the power supply module provides power signals for the operation of other functional modules.

[0049] In one embodiment of this application, the control module 2 includes an FPGA, MCU, MPU, or DSP. The control module 2 is a device with data forwarding and processing functions, and can generally be an FPGA (Field Programmable Gate Array), MCU (Microcontroller Unit), MPU (Microprocessor Unit), or DSP (Digital Signal Processor). In this embodiment, the control module 2 is preferably an FPGA; in other embodiments, other devices with similar data processing functions may be used, and no limitation is made here.

[0050] In one embodiment of this application, the signal output module 3 includes a DAC. The signal output module 3 is a device that outputs pulse signals based on task data, and a DAC (Digital to Analog Converter) can generally be selected. In this embodiment, the pulse signal is used to drive a square wave signal for multi-bit gate operations of the qubits. By adjusting parameters such as the pulse amplitude and pulse width of the square wave signal, the pulse amplitude can be approximately ±2V, and the pulse width can be tens of nanoseconds. Therefore, in this embodiment, a sampling rate of approximately 1GHz for the corresponding DAC is preferably selected to meet the pulse signal parameter adjustment accuracy.

[0051] As described above, in this embodiment, the control module 2 is preferably an FPGA, the signal output module 3 is preferably a DAC, and the control module 2 and the multiple signal output modules 3 communicate through the JESD204B interface. The data transmission efficiency is high, and the board space of the main board is reduced, the pin size and package size of the device are reduced, which is beneficial for integration.

[0052] like Figure 4 As shown, based on the same concept, this application also provides a quantum driving device, including a backplane and a plurality of the aforementioned qubit frequency driving signal generators, which are integrated on the backplane. Each module of the qubit frequency driving signal generator can be an integrated device, integrated onto a board body; and multiple board bodies can be integrated onto a single backplane, allowing multiple qubit frequency driving signal generators to be integrated on one backplane, facilitating expansion and providing frequency driving signals for quantum processors with more qubits.

[0053] Based on the same concept, embodiments of this application also provide a quantum control system, including a central control system and multiple quantum drive devices as described above. The central control system is configured to control the multiple quantum drive devices to output pulse signals for driving qubit frequency parameters. With the development of quantum technology, the number of qubits integrated on quantum processors is increasing, requiring more quantum drive devices as signal sources to provide frequency drive signals for the qubits. As the number of quantum drive devices also increases, a central control system is used to control multiple quantum drive devices. Through a backplane, the control of multiple qubit frequency drive signal generators on the quantum drive devices is achieved, ensuring the stability of the clock and trigger synchronization of the entire control system, thereby ensuring the synchronization of the frequency drive signals output to the quantum processor.

[0054] Based on the same concept, embodiments of this application also provide a quantum computer system, including the aforementioned quantum control system and quantum processor, wherein the quantum processor performs quantum computation based on pulse signals output by the quantum control system.

[0055] The above description, based on the embodiments shown in the drawings, details the structure, features, and effects of this application. The above description is only a preferred embodiment of this application, but this application does not limit the scope of implementation to what is shown in the drawings. Any changes made in accordance with the concept of this application, or modifications to equivalent embodiments, that do not exceed the spirit covered by the specification and drawings, should be within the protection scope of this application.

Claims

1. A quantum bit frequency-driven signal generator, characterized in that, include: A first clock module is configured to distribute multiple mutually synchronized working clock signals based on a received clock source signal and a second pulse signal; wherein the second pulse signal is used to align the multiple working clock signals. A control module is configured to receive task data and trigger signals and forward the task data and trigger signals according to the working clock signal; wherein the task data is sent to a memory connected in a communication link for storage; Multiple signal output modules, each of which is configured to respond to the trigger signal and output multiple pulse signals for driving the frequency parameters of the qubits based on the received task data and the working clock signal; The second clock module is configured to output a clock signal for memory operation; The third clock module is configured to output a clock signal for configuring the control module.

2. The quantum bit frequency driving signal generator according to claim 1, characterized in that, It also includes a board body, on which the first clock module, the control module and the multiple signal output modules are integrated.

3. The quantum bit frequency driving signal generator according to claim 1, characterized in that, It also includes a memory, which is communicatively connected to the control module and is used to store the task data.

4. The quantum bit frequency driving signal generator according to claim 1, characterized in that, It also includes a number of signal connectors, each of which is configured to receive the clock source signal and / or the second pulse signal, and / or output the pulse signal.

5. The quantum bit frequency driving signal generator according to claim 1, characterized in that, It also includes a power module configured to provide power signals for the operation of the first clock module, the control module, and the signal output module.

6. The quantum bit frequency driving signal generator according to claim 1, characterized in that, The control module includes an FPGA, MCU, MPU, or DSP.

7. The quantum bit frequency driving signal generator according to claim 1, characterized in that, The signal output module includes a DAC.

8. A quantum drive device, characterized in that, It includes a backplane and a plurality of qubit frequency drive signal generators as described in any one of claims 1-7, wherein the plurality of qubit frequency drive signal generators are integrated on the backplane.

9. A quantum control system, characterized in that, It includes a central control system and a plurality of quantum drive devices as described in claim 8, wherein the central control system is configured to control the plurality of quantum drive devices to output pulse signals for driving the frequency parameters of qubits.

10. A quantum computer system, characterized in that, The system includes the quantum control system and quantum processor of claim 9, wherein the quantum processor performs quantum computation based on the pulse signal output by the quantum control system.

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