Semiconductor device and electronic apparatus

Abstract

The embodiment of the application provides a semiconductor device and an electronic equipment, the semiconductor device comprises a substrate, a nucleation layer, a buffer layer, a channel layer and a barrier layer which are sequentially arranged on the substrate, and a source electrode, a gate electrode and a drain electrode are arranged on the barrier layer. It also includes a first connecting hole, and at least a first connecting hole is arranged in the source region, the width of the first connecting hole is smaller than the width of the source electrode or the drain electrode. The first end of the first connecting hole extends to the substrate, the second end of the first connecting hole extends to the inside of the channel layer in sequence through the nucleation layer and the buffer layer, and does not penetrate the channel layer. The first connecting hole is filled with a heat-conducting medium, the heat-generating point channel layer and the substrate are directly connected through the first connecting hole and the heat-conducting medium in the first connecting hole, the heat generated by the channel layer can be directly transmitted to the substrate through the heat-conducting medium to achieve heat dissipation, effectively improving the heat dissipation capacity of the semiconductor device, and reducing or avoiding the influence of the first connecting hole on the performance of the device, and improving the reliability of the device.

Description

TECHNICAL FIELD

[0001] Embodiments of the present application relate to the technical field of semiconductor technology, and in particular to a semiconductor device and an electronic device. BACKGROUND

[0002] Gallium nitride (GaN) and its related wide bandgap semiconductors are considered as potential materials for next generation high power, high frequency electronic devices, GaN-based semiconductor devices have higher breakdown field and drift velocity than silicon (Si)-based semiconductor devices, and can generate lower loss at high temperature and high pressure. The superior performance of GaN-based semiconductor devices is not only related to the inherent characteristics of the material, but also related to the semiconductor device technology of GaN-based heterostructures, since the two-dimensional electron gas (2DEG) formed at the heterojunction interface has high mobility, the high electron mobility transistor (HEMT) device based on GaN-based heterostructures provides great potential for power switches and radio frequency applications.

[0003] A GaN-based HEMT device generally includes a substrate, an epitaxial layer disposed on the substrate, and a source electrode, a drain electrode and a gate electrode disposed on the epitaxial layer, the epitaxial layer includes a nucleation layer, a buffer layer, a channel layer and a barrier layer disposed in sequence on the substrate, and the source electrode, the drain electrode and the gate electrode are disposed on the barrier layer. A complete GaN HEMT device has an active region and a passive region, part of the source electrode, part of the gate electrode and part of the drain electrode are located in the active region, and the region outside the active region is the passive region. The main ways of heat dissipation of the device are as follows: one is to dissipate heat vertically through the substrate, the other is to transfer heat from the active region to the passive region horizontally, and the third is to dissipate heat by contacting with air.

[0004] However, the above-mentioned ways of dissipating heat of the semiconductor device have the problem of poor heat dissipation capacity, which affects the performance of the device. SUMMARY

[0005] Embodiments of the present application provide a semiconductor device and an electronic device, which solve the problem of poor heat dissipation performance of the existing semiconductor device affecting the performance of the device.

[0006] The first aspect of the present application provides a semiconductor device, comprising: a substrate, an epitaxial layer, a source electrode, a drain electrode and a gate electrode, the epitaxial layer includes a channel layer and a barrier layer disposed in sequence on the substrate, the channel layer and the barrier layer form a heterojunction structure, and the source electrode, the drain electrode and the gate electrode are disposed on the barrier layer. The semiconductor device includes an active region, part of the source electrode, part of the drain electrode and part of the gate electrode are located in the active region.

[0007] The semiconductor device further includes a plurality of first connection holes, a first end of the first connection hole extending to the substrate, a second end of the first connection hole extending into the channel layer, and the first connection hole being filled with a heat-conducting medium, that is, the second end of the first connection hole does not penetrate through the channel layer but is located in the channel layer and does not contact the barrier layer. In this way, the heat generated by the channel layer is directly connected to the substrate through the first connection hole and the heat-conducting medium in the first connection hole, and the heat generated by the channel layer can be directly transmitted to the substrate through the heat-conducting medium in the first connection hole to achieve heat dissipation, thereby effectively improving the heat dissipation effect and the heat dissipation capacity of the semiconductor device.

[0008] At least the first connection hole is located in the active region, and the heat generated in the active region can be well transmitted to the substrate through the heat-conducting medium in the first connection hole to achieve heat dissipation, thereby further improving the heat dissipation effect.

[0009] The width of each first connection hole in the first direction is less than the width of the source electrode or the drain electrode in the first direction, and the first direction is parallel to the substrate and perpendicular to the extension direction of the source electrode or the drain electrode. The size of the first connection hole is reduced, the influence of the setting of the first connection hole on the quality of the epitaxial layer is reduced, the performance of the semiconductor device is ensured, and the reliability of the semiconductor device is improved under the condition of improving the heat dissipation capacity of the semiconductor device.

[0010] In a possible implementation, the distance between the end face of the second end of the first connection hole and the end face of the barrier layer facing one end of the channel layer is greater than or equal to 30 nm. It is ensured that the first connection hole does not penetrate through the channel layer to contact the barrier layer, thereby achieving direct heat dissipation between the channel layer and the substrate through the first connection hole and the heat-conducting medium therein, and improving the heat dissipation performance.

[0011] In addition, the second end of the first connection hole is far away from the heterojunction structure and the two-dimensional electron gas formed between the channel layer and the barrier layer, the influence of the opening of the first connection hole on the two-dimensional electron gas is reduced or avoided, the performance of the semiconductor device is ensured, and the reliability of the device is improved.

[0012] In a possible implementation, the active region includes a first region, a second region, and a third region, the vertical projection of the first region on the substrate is located in the vertical projection of the source electrode on the substrate, the vertical projection of the second region on the substrate is located in the vertical projection of the drain electrode on the substrate, and the third region is the region of the active region excluding the first region and the second region.

[0013] The plurality of first connection holes are respectively located in the first region, the second region, and the third region, that is, the first connection hole can be provided below the source electrode, below the drain electrode, and below the region between the source electrode and the drain electrode (for example, the region where the gate electrode is located), so that the semiconductor device has good heat dissipation capacity.

[0014] In a possible implementation, the active region includes a first region, a second region and a third region, the vertical projection of the first region on the substrate is located within the vertical projection of the source electrode on the substrate, the vertical projection of the second region on the substrate is located within the vertical projection of the drain electrode on the substrate, and the third region is the region of the active region excluding the first region and the second region.

[0015] The plurality of first connection holes are respectively located in the first region and the second region, and no first connection hole is arranged in the third region, that is, only the first connection hole is arranged directly below the source electrode and the drain electrode, and no first connection hole is arranged directly below the region (such as the gate electrode) between the source electrode and the drain electrode. Under the condition of improving the heat dissipation capacity of the semiconductor device, the number of the first connection holes in the active region can be reduced, the influence of the first connection holes on the quality of the epitaxial layer is reduced, and the performance of the semiconductor device is ensured.

[0016] In a possible implementation, the area of the vertical projection of the first connection hole located in the first region and the second region on the substrate and the proportion of the area of the vertical projection of the first connection hole located in the first region and the second region on the substrate to the sum of the areas of the vertical projections of the first region and the second region on the substrate are 0.1%-15%. Under the condition of improving the heat dissipation capacity of the semiconductor device, the number of the first connection holes directly below the source electrode and the drain electrode is reduced, the influence of the arrangement of the first connection holes on the quality of the epitaxial layer is reduced, the performance of the semiconductor device is ensured, and the reliability of the device is improved.

[0017] In a possible implementation, the area of the vertical projection of the first connection hole located in the third region on the substrate and the proportion of the area of the vertical projection of the first connection hole located in the third region on the substrate to the area of the vertical projection of the third region on the substrate are less than or equal to 10%. Under the condition of improving the heat dissipation capacity of the semiconductor device, the number of the first connection holes directly below the region between the source electrode and the drain electrode is reduced, and the performance of the semiconductor device is ensured.

[0018] In addition, the reduction of the first connection holes directly below the region between the source electrode and the drain electrode can reduce the influence of the first connection holes on the connection lines of the source electrode and the drain electrode, and further improve the performance of the semiconductor device.

[0019] In a possible implementation, the semiconductor device further includes a heat dissipation base, the heat dissipation base is located on the side of the substrate away from the epitaxial layer, and the first end of the first connection hole penetrates through the substrate and extends to the heat dissipation base. The heat generated by the channel layer can be directly transmitted to the heat dissipation base through the heat-conducting medium in the first connection hole to achieve heat dissipation, further improve the heat dissipation effect, and improve the heat dissipation capacity of the semiconductor device.

[0020] In a possible implementation, the semiconductor device further includes a grounding layer, the grounding layer is located on the side of the substrate away from the epitaxial layer, the first end of the first connection hole penetrates through the substrate and extends to the grounding layer, and the heat generated by the channel layer can be directly transmitted to the grounding layer through the heat-conducting medium in the first connection hole to achieve heat dissipation, which can also effectively improve the heat dissipation effect.

[0021] The ground source electrode is arranged on the barrier layer and is located outside the active region.

[0022] The second connecting hole is arranged outside the active region, a first end of the second connecting hole extends to the ground layer, a second end of the second connecting hole extends to the ground source electrode through the substrate and the epitaxial layer, and a vertical projection of the second connecting hole on the substrate is located in the third projection. The second connecting hole is filled with the electrically and thermally conductive medium. In this way, the ground source electrode is electrically connected to the ground layer through the electrically and thermally conductive medium in the second connecting hole, and the source electrode is grounded. Moreover, the second connecting hole extends to the ground source electrode through the substrate and the epitaxial layer, and the heat generated in the channel layer and the like of the epitaxial layer can be transmitted to the substrate and the ground layer through the electrically and thermally conductive medium in the second connecting hole for heat dissipation, which helps to further improve the heat dissipation effect, and the heat dissipation capacity of the semiconductor device is improved while the source electrode of the semiconductor device is grounded.

[0023] In a possible implementation, the thermally conductive medium includes a thermally conductive material with a thermal conductivity greater than or equal to 200 W / m·K. The thermally conductive medium can well transmit the heat in the channel layer to the substrate for heat dissipation, and the heat dissipation effect is improved.

[0024] In a possible implementation, the thermally conductive material includes one or a combination of metal material, insulating material and semiconductor material.

[0025] In a possible implementation, the epitaxial layer further includes a nucleation layer and a buffer layer, which helps to form the channel layer and the barrier layer and improve the quality of the channel layer and the barrier layer.

[0026] The nucleation layer is arranged between the substrate and the buffer layer, the buffer layer is arranged between the nucleation layer and the channel layer, and the second end of the first connecting hole extends to the channel layer through the nucleation layer and the buffer layer.

[0027] In a possible implementation, the nucleation layer is formed of aluminum nitride or gallium nitride.

[0028] The buffer layer is formed of aluminum gallium nitride or gallium nitride.

[0029] The channel layer is formed of gallium nitride.

[0030] The barrier layer is formed of aluminum gallium nitride, indium aluminum gallium nitride, indium gallium nitride or aluminum nitride.

[0031] In a possible implementation, the barrier layer is formed of at least one of aluminum and indium, and the proportion of aluminum or indium in the barrier layer is greater than or equal to 0.01, which helps to improve the quality of the epitaxial layer.

[0032] In a possible implementation, the forming material of the substrate includes silicon, silicon carbide, aluminum oxide, diamond, or gallium nitride.

[0033] In a possible implementation, the forming material of the heat dissipation substrate includes a metal material, an insulating material, or a semiconductor material.

[0034] The second aspect of the present application provides an electronic device, including at least a shell and the semiconductor device of any one of the above. The semiconductor device is arranged in the shell. By including the semiconductor device, the semiconductor device has good heat dissipation capacity and high reliability, which helps to improve the heat dissipation effect and stability of the electronic device, and further improves the performance of the electronic device. BRIEF DESCRIPTION OF DRAWINGS

[0035] Figure 1 A cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0036] Figure 2 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0037] Figure 3 A partial perspective structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0038] Figure 4 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0039] Figure 5 A front view schematic diagram of a partial perspective structure of a semiconductor device provided by an embodiment of the present application;

[0040] Figure 6 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0041] Figure 7 A partial structure cross-sectional schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0042] Figure 8 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0043] Figure 9 A partial perspective structure schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0044] Figure 10 A partial structure cross-sectional schematic diagram of a semiconductor device provided by an embodiment of the present application;

[0045] Figure 11 A front view schematic diagram of a cross-sectional structure of a semiconductor device provided by an embodiment of the present application;

[0046] Figure 12 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application is provided;

[0047] Figure 13 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application is provided;

[0048] Figure 14 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application is provided;

[0049] Figure 15 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application is provided;

[0050] Figure 16 Another cross-sectional structure schematic diagram of a semiconductor device provided by an embodiment of the present application is provided;

[0051] Legend of reference signs:

[0052] 100 – semiconductor device; 10 – substrate; 20 – epitaxial layer;

[0053] 21 – nucleation layer; 22 – buffer layer; 23 – channel layer;

[0054] 24 – barrier layer; 25 – two-dimensional electron gas; 30 – source electrode;

[0055] 40 – drain electrode; 50 – gate electrode; 60a – active region;

[0056] 61a – first region; 61b – second region; 61c – third region;

[0057] 60b – passive region; 70 – first connecting hole; 80 – second connecting hole;

[0058] 90 – heat dissipation base; 110 – ground layer; 120 – ground source electrode. DETAILED DESCRIPTION

[0059] The terms used in the embodiment part of the present application are only used for explaining the specific embodiments of the present application, and are not intended to limit the present application.

[0060] The electronic device provided by the embodiments of the present application can be a radio frequency (RF) device, for example, can be a power amplifier, a low-noise amplifier, etc., or the electronic device can also be a power switch device, for example, can be a high-voltage resistant switch device, etc.

[0061] Taking an electronic device as an example, the electronic device can include a shell and a semiconductor device, and the semiconductor device is arranged in the shell. The semiconductor device is an electronic device that uses the special electrical characteristics of a semiconductor material between a good conductor and an insulator to complete a specific function, and can be used to generate, control, receive, transform, amplify signals, and perform energy conversion.

[0062] Specifically, the semiconductor device can be a high electron mobility transistor (HEMT), which is a field effect transistor that uses the high mobility characteristics of two-dimensional electron gas in a heterojunction or modulation doped structure. For example, the semiconductor device can be a gallium nitride (GaN)-based HEMT device. Of course, in some other examples, the semiconductor device can also be a field effect transistor based on other semiconductor materials.

[0063] Figure 1 A cross-sectional structure diagram of a semiconductor device is provided for the embodiments of the present application.

[0064] Referring to Figure 1 As shown, the semiconductor device 100 includes a substrate 10, an epitaxial layer 20, a source electrode 30, a drain electrode 40, and a gate electrode 50. The epitaxial layer 20 is arranged on the substrate 10, and the source electrode 30, the drain electrode 40, and the gate electrode 50 are arranged on the side of the epitaxial layer 20 away from the substrate 10. Specifically, the epitaxial layer 20 can include a nucleation layer 21, a buffer layer 22, a channel layer 23, and a barrier layer 24 arranged in sequence on the substrate 10, and the source electrode 30, the drain electrode 40, and the gate electrode 50 can be formed on the barrier layer 24.

[0065] It should be noted that in some other examples, the epitaxial layer 20 can also include other film layers, for example, the epitaxial layer 20 can also include a cap layer (not shown in the figure), which is arranged on the side of the barrier layer 24 away from the channel layer 23. The cap layer can protect the barrier layer 24, and the source electrode 30, the gate electrode 50, and the drain electrode 40 can be formed on the cap layer.

[0066] The forming material of the substrate 10 can include silicon (Si), silicon carbide (SiC), aluminum oxide (Al2O3), diamond, and gallium nitride (GaN). The nucleation layer 21, the buffer layer 22, the channel layer 23, and the barrier layer 24 can be formed in sequence on the substrate 10 by using a molecular beam epitaxy (MBE) method.

[0067] Of course, in some other examples, other methods can also be used to form the nucleation layer 21, the buffer layer 22, and the channel layer 23 in sequence on the substrate 10, for example, a metal organic chemical vapor deposition method can be used.

[0068] Specifically, the forming material of the nucleation layer 21 can include, but is not limited to, aluminum nitride (AlN) or gallium nitride (GaN).

[0069] The forming material of the buffer layer 22 can include, but is not limited to, aluminum gallium nitride (AlGaN) or gallium nitride (GaN).

[0070] The forming material of the channel layer 23 can include, but is not limited to, gallium nitride (GaN).

[0071] The forming material of the barrier layer 24 can include at least one of aluminum element (Al) or indium element (In), for example, the forming material of the barrier layer 24 can include, but is not limited to, aluminum gallium nitride (AlGaN), indium aluminum gallium nitride (InAlGaN), indium gallium nitride (InGaN) or aluminum nitride (AlN).

[0072] In the forming material of the barrier layer 24, the ratio of aluminum or indium composition to the total composition of the material is greater than or equal to 0.01, for example, taking the forming material of the barrier layer 24 as aluminum gallium nitride (AlGaN) as an example, wherein the mass of the aluminum component accounts for greater than or equal to 0.01 of the total mass of the aluminum gallium nitride, which is conducive to improving the quality of the epitaxial layer 20.

[0073] Wherein, the nucleation layer 21 and the channel layer 23 can form a heterojunction structure, and a two-dimensional electron gas 25 (Two Dimensional Electron Gas, 2DEG for short) can be formed at the interface of the heterojunction structure. The source electrode 30 and the drain electrode 40 can make the two-dimensional electron gas 25 flow in the channel layer 23 between the source electrode 30 and the drain electrode 40 under the effect of electric field, and the conduction between the source electrode 30 and the drain electrode 40 occurs at the two-dimensional electron gas 25 in the channel layer 23. The gate electrode 50 can extend between the source electrode 30 and the drain electrode 40 to apply an electric signal to control the concentration of the two-dimensional electron gas 25 between the source electrode and the drain electrode.

[0074] The forming material of the source electrode 30, the gate electrode 50 and the drain electrode 40 can be a metal material, for example, the forming material of the source electrode 30 and the drain electrode 40 can include, but is not limited to, titanium (Ti), aluminum (Al) or a metal or alloy containing silicon (Si). The forming material of the gate electrode 50 can include, but is not limited to, titanium (Ti), nickel (Ni), gold (Au).

[0075] Continuing to refer to Figure 1 As shown, the semiconductor device further includes an active region 60a and a passive region 60b, and the region outside the active region 60a is the passive region 60b.

[0076] It should be noted that the two-dimensional electron gas 25 only exists in the active region 60a, and the two-dimensional electron gas in the passive region 60b does not exist or is destroyed. For example, referring toFigure 1 As shown, the barrier layer in the passive region 60b can be removed by etching or the like. Alternatively, the barrier layer in the passive region 60b can be doped with impurities or the like to make the barrier layer in the passive region invalid, so that the two-dimensional electron gas cannot be formed between the barrier layer and the channel layer in the passive region.

[0077] Figure 2 Another schematic diagram of a cross section of a semiconductor device is provided for the embodiments of the present application.

[0078] Referring to Figure 2 As shown, the semiconductor device 100 can include a plurality of active units 101, and each active unit 101 is composed of a source electrode 30, a gate electrode 50 and a drain electrode 40. The passive region 60b is located between two adjacent active units 101 to isolate the two-dimensional electron gas between the two adjacent active units 101.

[0079] It should be noted that one active unit 101 can include one source electrode 30, one gate electrode 50 and one drain electrode 40, or one active unit 101 can include a plurality of source electrodes 30, a plurality of gate electrodes 50 and a plurality of drain electrodes 40.

[0080] Figure 3 Another schematic diagram of a partial perspective structure of a semiconductor device is provided for the embodiments of the present application.

[0081] Specifically, referring to Figure 3 As shown, the source electrode 30 and the drain electrode 40 can be oppositely arranged, and the first end of the gate electrode 50 extends into the region between the source electrode 30 and the drain electrode 40, and the second end of the gate electrode 50 is located outside the region between the source electrode 30 and the drain electrode 40. It should be noted that the nucleation layer 21 and the buffer layer 22 between the substrate 10 and the channel layer 23 are not shown in the Figure 3 diagram.

[0082] The source electrode 30 can include a source bottom surface facing the barrier layer 24 and a source top surface facing away from the barrier layer 24, the drain electrode 40 can include a drain bottom surface facing the barrier layer 24 and a drain top surface facing away from the barrier layer 24, and the gate electrode 50 can include a gate bottom surface facing the barrier layer 24 and a gate top surface facing away from the barrier layer 24. The source electrode 30 further includes a first side surface 30a opposite to the drain electrode 40, and a second side surface 30b connecting the first side surface 30a, the source top surface and the source bottom surface, and the second side surface 30b is located at a side of the source electrode 30 close to the second end of the gate electrode 50. The drain electrode 40 further includes a third side surface 40a opposite to the source electrode 30, and a fourth side surface 40b connecting the third side surface 40a, the drain top surface and the drain bottom surface, and the fourth side surface 40b is located at a side of the drain electrode 40 close to the second end of the gate electrode 50. A plane in which an end surface 50a of the first end of the gate electrode 50 is located, a plane in which the second side surface 30b and the fourth side surface 40b are located, a plane in which the first side surface 30a is located, and a plane in which the third side surface 40a is located, intersect to jointly form an active region 60a.

[0083] Part of the source electrode 30 is located in the active region 60a and part of the source electrode 30 is located in the passive region 60b, part of the drain electrode 40 is located in the active region 60a and part of the drain electrode 40 is located in the passive region 60b, and part of the gate electrode 50 is located in the active region 60a and part of the gate electrode 50 is located in the passive region 60b.

[0084] The semiconductor device generates heat during operation, and the heat points are mainly located at the interface between the channel layer and each epitaxial layer in the active region. The heat dissipation modes of the semiconductor device usually include the following modes: one is to vertically dissipate heat through the substrate, most of the heat generated by the semiconductor device is vertically transmitted to the substrate to achieve heat dissipation, and the heat dissipation capacity is limited. Two is to guide the heat generated by the semiconductor device from the active region to the passive region for heat dissipation, for example, in the related art, a heat dissipation medium is deposited between the active region and the passive region, which increases the cost of the device and the heat dissipation effect needs to be improved. Three is to dissipate heat through air on the surface of the device, which needs to be in contact with air in a large area, and the heat dissipation effect of the packaged semiconductor device is limited. Four is to realize grounding of the ground source electrode and heat dissipation at the same time by using a grounding back hole, for example, a grounding back hole is formed on the substrate, the grounding back hole is located in the passive region, the grounding back hole extends from the substrate to the ground source electrode in the passive region, and the grounding back hole can realize heat dissipation at the same time of grounding, but the heat dissipation effect still needs to be further improved.

[0085] The heat generated by the semiconductor device cannot be dissipated in time, which greatly affects the structure and performance of the semiconductor device. For example, it can cause the Schottky contact to degrade, reduce the height of the potential barrier, and thus increase the gate electrode leakage current, and in severe cases, cause the device to fail. Moreover, as the temperature rises, the energy of the carriers in the device also increases, and the carriers are more likely to cross the barrier layer, thereby also causing an increase in the gate electrode leakage current. In addition, as the temperature rises, the phonon scattering experienced by the two-dimensional electron gas in the channel also increases, and the mobility of the two-dimensional electron gas rapidly decreases, which rapidly reduces the output current of the device, thereby affecting the output power of the power device, and further causing the degradation of the radio frequency and microwave performance of the device, etc.

[0086] Figure 4 Another schematic diagram of a cross-sectional structure of a semiconductor device is provided in the embodiments of the present application.

[0087] Based on this, in the embodiments of the present application, in order to improve the heat dissipation performance of the semiconductor device, in combination with Figure 3 and Figure 4 , the semiconductor device 100 further includes a plurality of first connection holes 70, and a heat-conducting medium can be filled in the first connection holes 70.

[0088] The first end of the first connection hole 70 extends to the substrate 10. Specifically, the first end of the first connection hole 70 can be provided on the substrate 10, the first connection hole 70 can penetrate the substrate 10, or the first connection hole 70 can extend into the substrate 10 but not penetrate the substrate 10. Alternatively, the first end of the first connection hole 70 can only be in contact with the substrate 10 without extending into the substrate 10, so that the heat-conducting medium filled in the first connection hole 70 can be in contact with the substrate 10 to achieve heat conduction.

[0089] In the embodiments of the present application, continuing to refer to Figure 3 , the extension directions of the source electrode 30, the gate electrode 50, and the drain electrode 40 are parallel to each other, such as the x direction in Figure 3 . The stacking direction of the component layers such as the nucleation layer 21, the buffer layer 22, the channel layer 23, and the barrier layer 24 in the epitaxial layer 20 is perpendicular to the extension direction of the source electrode 30, such as the z direction in the figure. The first direction is perpendicular to the stacking direction of the component layers of the epitaxial layer 20 and the extension direction of the source electrode 30, such as the y direction in the figure. The extension direction of the first connection hole 70 can be perpendicular to the substrate 10, which is the z direction.

[0090] The second end of the first connection hole 70 extends into the channel layer 23 in sequence after penetrating the nucleation layer 21 and the buffer layer 22. It should be noted that the second end of the first connection hole 70 extends into the channel layer 23, that is, the second end of the first connection hole 70 does not penetrate the channel layer 23, in combination with Figure 4As shown, the second end of the first connecting hole 70 is located in the channel layer 23 and does not contact the barrier layer 24. In this way, the heat generated by the channel layer 23 in the active region 60a is directly connected to the substrate 10 through the first connecting hole 70 and the heat-conducting medium in the first connecting hole 70, and the heat generated by the channel layer 23 in the active region 60a can be directly transmitted to the substrate 10 through the heat-conducting medium in the first connecting hole 70 to achieve heat dissipation, thereby effectively improving the heat dissipation effect and improving the heat dissipation capacity of the semiconductor device 100.

[0091] As shown in Figure 4 As shown, at least the active region 60a has the first connecting hole 70. That is, at least part of the first connecting hole 70 is located in the active region 60a. In other words, the vertical projection of the active region 60a on the substrate 10 or the x-y plane is the first projection, and the vertical projection of at least part of the first connecting hole 70 on the substrate 10 is located in the first projection. When the semiconductor device 100 is working, the heat generated by the channel layer in the active region 60a can be well transmitted to the substrate 10 through the heat-conducting medium in the first connecting hole 70 to achieve heat dissipation, thereby further improving the heat dissipation effect.

[0092] As shown, at least the active region 60a has the first connecting hole 70. That is, at least part of the first connecting hole 70 is located in the active region 60a. In other words, the vertical projection of the active region 60a on the substrate 10 or the x-y plane is the first projection, and the vertical projection of at least part of the first connecting hole 70 on the substrate 10 is located in the first projection. When the semiconductor device 100 is working, the heat generated by the channel layer in the active region 60a can be well transmitted to the substrate 10 through the heat-conducting medium in the first connecting hole 70 to achieve heat dissipation, thereby further improving the heat dissipation effect.

[0093] As shown in Figure 3 As shown in Figure 4 As shown, at least the active region 60a has the first connecting hole 70. That is, at least part of the first connecting hole 70 is located in the active region 60a. In other words, the vertical projection of the active region 60a on the substrate 10 or the x-y plane is the first projection, and the vertical projection of at least part of the first connecting hole 70 on the substrate 10 is located in the first projection. When the semiconductor device 100 is working, the heat generated by the channel layer in the active region 60a can be well transmitted to the substrate 10 through the heat-conducting medium in the first connecting hole 70 to achieve heat dissipation, thereby further improving the heat dissipation effect.

[0094] As shown, at least the active region 60a has the first connecting hole 70. That is, at least part of the first connecting hole 70 is located in the active region 60a. In other words, the vertical projection of the active region 60a on the substrate 10 or the x-y plane is the first projection, and the vertical projection of at least part of the first connecting hole 70 on the substrate 10 is located in the first projection. When the semiconductor device 100 is working, the heat generated by the channel layer in the active region 60a can be well transmitted to the substrate 10 through the heat-conducting medium in the first connecting hole 70 to achieve heat dissipation, thereby further improving the heat dissipation effect. Figure 3The first connection holes 70 can be evenly distributed under the source electrode 30, under the drain electrode 40, and under the region (e.g., the gate electrode 50) between the source electrode 30 and the drain electrode 40, respectively. The first connection holes 70 under the source electrode 30 can also be evenly distributed along the extension direction (x direction) of the source electrode 30. Correspondingly, the first connection holes 70 under the drain electrode 40 and the region between the source electrode 30 and the drain electrode 40 can also be evenly distributed along the x direction.

[0095] Of course, in some other examples, the first connection holes 70 can also be irregularly distributed, and the specific arrangement can be selected according to the heat dissipation requirement.

[0096] The cross-sectional shape (formed along the x-y plane) of the first connection hole 70 can be a regular shape such as a circle or a square, or can be an irregular shape. The cross-sectional shapes of the first connection holes 70 can be the same or different.

[0097] In addition, the extension lengths of the first connection holes 70 can be the same or different. The cross-sectional sizes of the first connection holes 70 can also be the same or different.

[0098] The heat-conductive medium filled in the first connection hole 70 can be a high-thermal-conductivity material. For example, the heat-conductive medium can be a thermal-conductivity material with a thermal conductivity of not less than 200 W / m·K, so as to ensure that the heat-conductive medium can well transfer the heat in the channel layer 23 to the substrate 10 to achieve heat dissipation and improve the heat dissipation effect.

[0099] The heat-conductive material included in the heat-conductive medium can be one of a metal material, an insulating material, and a semiconductor material, or can be a combination of several of the above heat-conductive materials.

[0100] Figure 5 Another partial perspective structure of a semiconductor device is provided in the embodiments of the present application.

[0101] The width of each first connection hole 70 in the first direction can be less than the width of the source electrode 30 or the drain electrode 40 in the first direction, so that the size (in the x direction and in the y direction) of the vertical projection of each first connection hole 70 on the substrate 10 is less than the size (in the x direction and in the y direction) of the vertical projection of the source electrode 30 or the drain electrode 40 on the substrate 10. See Figure 3 The width of the first connection hole 70 in the first direction is d1, as shown. It should be noted that the width of the first connection hole 70 in the first direction refers to the maximum width of the first connection hole 70 in the first direction. Taking the case where the cross-sectional shape of the first connection hole 70 is a circle as an example, the width of the first connection hole 70 in the y direction is the diameter of the first connection hole 70.

[0102] The width of the source electrode 30 and the drain electrode 40 in the first direction can be equal or can not be equal. For example, the width of the source electrode 30 and the drain electrode 40 in the first direction is d2, and the width of the source electrode 30 or the drain electrode 40 in the first direction refers to the maximum width of the source electrode 30 or the drain electrode 40 in the first direction. For example, the source electrode 30 is a rectangle, and the extension direction (x direction) is the length direction, and the width of the source electrode 30 in the y direction is the length of the source electrode 30 in the width direction.

[0103] The d1 is less than the d2, which reduces the size of the first connecting hole 70, further reduces the influence of the setting of the first connecting hole 70 on the quality of the epitaxial layer 20, ensures the performance of the semiconductor device 100, and improves the reliability of the semiconductor device 100 under the condition of improving the heat dissipation capacity of the semiconductor device 100.

[0104] The second end of the first connecting hole 70 does not penetrate the channel layer 23, that is, the first connecting hole 70 has a certain distance from the cross section of the one end of the barrier layer 24 facing the channel layer 23. Specifically, referring to FIG. 2, the vertical distance between the end surface of the second end of the first connecting hole 70 and the end surface of the one end of the barrier layer 24 facing the channel layer 23 is h, and h can be greater than or equal to 30 nm. Figure 5 The first connecting hole 70 does not penetrate the channel layer 23 and contacts the barrier layer 24, so that the direct heat dissipation between the channel layer 23 and the substrate 10 is realized through the heat-conducting medium in the first connecting hole 70, and the heat dissipation performance is improved.

[0105] In addition, h is greater than or equal to 30 nm, which can also make the second end of the first connecting hole 70 far away from the heterojunction structure formed between the channel layer 23 and the barrier layer 24 and the two-dimensional electron gas 25, reduce or avoid the influence of the opening of the first connecting hole 70 on the two-dimensional electron gas 25, ensure the performance of the semiconductor device 100, and improve the reliability of the device.

[0106] Figure 6 Another cross-sectional structure of a semiconductor device provided by the embodiment of the present application is provided.

[0107] For further improving the heat dissipation effect, referring to FIG. 4, a semiconductor device provided by another embodiment of the present application is provided. Figure 6As shown, the semiconductor device 100 can further include a heat dissipation base 90, and specifically, the heat dissipation base 90 can be located on the side of the substrate 10 opposite to the epitaxial layer 20, and the first end of the first connecting hole 70 can penetrate the substrate 10 and extend to the heat dissipation base 90. The channel layer 23 and the heat dissipation base 90 are directly connected through the first connecting hole 70 and the heat-conducting medium therein, and the heat generated by the channel layer 23 can be directly transmitted to the heat dissipation base 90 through the heat-conducting medium in the first connecting hole 70 to achieve heat dissipation, further improving the heat dissipation effect and the heat dissipation capacity of the semiconductor device 100.

[0108] The forming material of the heat dissipation base 90 can be one of a metal material, an insulating material, and a semiconductor material, or a combination of several of the above materials, as long as it has good heat conduction effect. The heat dissipation base 90 can be a single layer, or the heat dissipation base 90 can also be composed of multiple layers.

[0109] The first end of the first connecting hole 70 can penetrate the heat dissipation base 90, or the first end of the first connecting hole 70 can extend into the heat dissipation base 90 but not penetrate the heat dissipation base 90. Alternatively, the first end of the first connecting hole 70 can only contact the heat dissipation base 90 without extending into the heat dissipation base 90, as long as the heat-conducting medium filled in the first connecting hole 70 can contact the heat dissipation base 90 to achieve heat conduction.

[0110] In the embodiments of the present application, the first connecting hole 70 is arranged only in the active area 60a, that is, the vertical projection of the first connecting hole 70 on the substrate 10 is located in the first projection of the active area 60a.

[0111] Specifically, continuing to refer to Figure 6 As shown, the active area 60a can be divided into a first region 61a, a second region 61b, and a third region 61c. The vertical projection of the first region 61a on the substrate 10 is a first partial projection, and the first partial projection is entirely located in the vertical projection of the source electrode 30 on the substrate 10, that is, the first region 61a is directly opposite to the source electrode 30. The vertical projection of the second region 61b on the substrate 10 is a second partial projection, and the second partial projection is entirely located in the vertical projection of the drain electrode 40 on the substrate 10, that is, the second region 61b is directly opposite to the drain electrode 40. The third region 61c is the region of the active area 60a excluding the first region 61a and the second region 61b, and the vertical projection of the third region 61c on the substrate 10 can be a third partial projection, and the third partial projection is entirely located in the vertical projection of the region between the source electrode 30 and the drain electrode 40 on the substrate 10, that is, the third region 61c is directly opposite to the region between the source electrode 30 and the drain electrode 40.

[0112] Correspondingly, the arrangement of the plurality of first connection holes 70 in the active region 60 can be various. For example, the first connection holes 70 can be arranged in the first region 61a, the second region 61b and the third region 61c. Alternatively, the first connection holes 70 can be arranged in two of the first region 61a, the second region 61b and the third region 61c. Alternatively, the first connection holes 70 can be arranged in only one of the first region 61a, the second region 61b and the third region 61c.

[0113] For example, in a possible implementation, referring to Figure 6 As shown in the figure, the first connection holes 70 are arranged in the first region 61a, the second region 61b and the third region 61c, that is, the plurality of first connection holes 70 are distributed in the first region 61a, the second region 61b and the third region 61c, and the vertical projections of the plurality of first connection holes 70 on the substrate 10 are respectively distributed in the first partial projection, the second partial projection and the third partial projection.

[0114] Figure 7 Another partial structure cross-sectional schematic view of a semiconductor device is provided for the embodiments of the present application.

[0115] In combination with Figure 6 and Figure 7 As shown in the figure, that is, the first connection holes 70 can be arranged directly below the source electrode 30, directly below the drain electrode 40 and in the region (for example, the region where the gate electrode 50 is located) between the source electrode 30 and the drain electrode 40, so that the semiconductor device 100 has good heat dissipation capacity.

[0116] Specifically, the plurality of first connection holes 70 can be arranged in the first region 61a, the second region 61b and the third region 61c in a regular array distribution manner. Of course, in some other examples, the plurality of first connection holes 70 can also be distributed in an irregular manner.

[0117] In the first region 61a and the second region 61b, the sum of the areas of the vertical projections of the first connection holes 70 on the substrate 10 is S1, that is, the sum of the areas of the vertical projections of the first connection holes 70 directly below the source electrode 30 and the drain electrode 40 on the substrate 10 is S1. The sum of the areas of the vertical projections of the first region 61a and the second region 61b on the substrate 10 (i.e., the first partial projection and the second partial projection) is S2, and the ratio of S1 to S2 is 0.1%-15%. In this way, under the condition of improving the heat dissipation capacity of the semiconductor device 100, the number of the first connection holes 70 directly below the source electrode 30 and the drain electrode 40 is reduced, that is, the number of the first connection holes 70 in the active region 60a is reduced, the influence of the arrangement of the first connection holes 70 on the quality of the epitaxial layer 20 is reduced, the performance of the semiconductor device 100 is ensured, and the reliability of the device is improved.

[0118] In the third region 61c, the area of the vertical projection of the first connection hole 70 on the substrate 10 is S3, and the area of the vertical projection of the third region 61c on the substrate 10 (i.e. the third partial projection) is S4. The ratio of S3 to S4 is less than or equal to 10%. In the condition of improving the heat dissipation capability of the semiconductor device 100, the number of the first connection holes 70 directly below the region between the source electrode 30 and the drain electrode 40 is reduced, and the number of the first connection holes 70 in the active region 60a is reduced, so as to ensure the performance of the semiconductor device 100.

[0119] In addition, the first connection holes 70 directly below the region (e.g. the region where the gate electrode 50 is located) between the source electrode 30 and the drain electrode 40 are reduced more, so as to reduce the influence of the first connection holes 70 on the connection lines of the source electrode 30 and the drain electrode 40, and further improve the performance of the semiconductor device 100.

[0120] Figure 8 Fig. 6 shows a sectional structure schematic diagram of another semiconductor device provided by the embodiment of the present application, Figure 9 Fig. 7 shows a partial perspective structure schematic diagram of another semiconductor device provided by the embodiment of the present application, Figure 10 Fig. 8 shows a partial structure sectional schematic diagram of another semiconductor device provided by the embodiment of the present application.

[0121] Alternatively, in another possible implementation, referring to Fig. 5, Figure 8 As shown in Fig. 5, the first connection holes 70 are arranged only in the first region 61a and the second region 61b, i.e. the plurality of first connection holes 70 are distributed in the first region 61a and the second region 61b, and the third region 61c is free of the first connection holes 70. The vertical projection of the plurality of first connection holes 70 on the substrate 10 is located only in the first partial projection and the second partial projection.

[0122] In combination with Figure 9 and Figure 10 As shown in Fig. 5, in other words, the first connection holes 70 are arranged only directly below the source electrode 30 and the drain electrode 40, and the region (e.g. the region where the gate electrode 50 is located) between the source electrode 30 and the drain electrode 40 is free of the first connection holes 70. In the condition of improving the heat dissipation capability of the semiconductor device 100, the number of the first connection holes 70 can be reduced, the influence of the arrangement of the first connection holes 70 in the active region 60a on the quality of the epitaxial layer 20 is reduced, and the performance of the semiconductor device 100 is ensured.

[0123] In addition, the region (e.g. the region where the gate electrode 50 is located) between the source electrode 30 and the drain electrode 40 is free of the first connection holes 70, so as to reduce or avoid the influence of the first connection holes 70 on the connection lines of the source electrode 30 and the drain electrode 40, and further improve the performance of the semiconductor device 100.

[0124] The ratio of the area S1 of the vertical projection of the first connection hole 70 located in the first region 61a and the second region 61b onto the substrate 10 to the area S2 of the vertical projection of the first region 61a and the second region 61b onto the substrate 10 can also be in the range of 0.1%-15%. This ensures the performance of the semiconductor device 100 while improving its heat dissipation performance.

[0125] Figure 11 This is a front view of a cross-sectional structure of another semiconductor device provided in an embodiment of this application. Figure 12 This is a cross-sectional structural schematic diagram of another semiconductor device provided in an embodiment of this application.

[0126] Furthermore, in this implementation, the first end of the first connection hole 70 can extend onto the substrate 10 (see reference). Figure 8 (as shown), or see Figure 11 As shown, a heat dissipation substrate 90 can also be provided on the side of the substrate 10 facing away from the epitaxial layer 20, combined with... Figure 12 As shown, the first end of the first connection hole 70 can penetrate the substrate 10 and extend to the heat dissipation substrate 90, so that the heat generated by the channel layer 23 can be directly transferred to the heat dissipation substrate 90 through the heat-conducting medium in the first connection hole 70 to achieve heat dissipation.

[0127] Figure 13 This is a partial perspective view of another semiconductor device provided in an embodiment of this application. Figure 14 This is a cross-sectional structural schematic diagram of another semiconductor device provided in an embodiment of this application. Figure 15 This is a partial structural cross-sectional schematic diagram of another semiconductor device provided in an embodiment of this application.

[0128] In the embodiments of this application, see Figure 13 As shown, a ground layer 110 can also be provided on the side of the substrate 10 facing away from the epitaxial layer 20, in conjunction with... Figure 14 As shown, the first end of the first connection hole 70 can penetrate the substrate 10 and extend to the ground layer 110, and the second end of the first connection hole 70 sequentially penetrates the nucleation layer 21 and the buffer layer 22 and extends into the channel layer 23. The channel layer 23 and the ground layer 110 are directly connected through the first connection hole 70 and the thermally conductive medium inside the first connection hole 70. The heat of the channel layer 23 can be directly transferred to the ground layer 110 through the thermally conductive medium inside the first connection hole 70 to achieve heat dissipation, which can also effectively improve the heat dissipation effect.

[0129] Correspondingly, the first end of the first connecting hole 70 can also penetrate the ground layer 110, or the first end of the first connecting hole 70 can also extend into the ground layer 110 but not penetrate the ground layer 110. Alternatively, the first end of the first connecting hole 70 can also only be in contact with the ground layer 110 without extending into the ground layer 110, so that the thermally conductive medium filled in the first connecting hole 70 can be in contact with the ground layer 110 to achieve heat conduction.

[0130] The semiconductor device 100 can further include a ground source electrode 120 disposed on the barrier layer 24, the ground source electrode 120 being located in the passive region and used to achieve grounding of the source electrode, wherein a vertical projection of the ground source electrode 120 on the substrate 10 can be a third projection, and the third projection is located in the second projection of the passive region.

[0131] The semiconductor device 100 can further include a second connecting hole 80, the second connecting hole 80 being located in the passive region, and a vertical projection of the second connecting hole 80 on the substrate 10 can be located in the third projection. Figure 15 As shown, that is, the second connecting hole 80 can be located directly below the ground source electrode 120, the second connecting hole 80 extends in the z direction, and the size (length in the x direction and the y direction) of the vertical projection of each second connecting hole 80 on the substrate 10 can be smaller than the size (length in the x direction and the y direction) of the vertical projection of the ground source electrode 120 on the substrate 10, so that the vertical projection of the second connecting hole 80 on the substrate 10 can fall entirely within the third projection.

[0132] The first end of the second connecting hole 80 can extend to the ground layer 110, and the second end of the second connecting hole 80 can penetrate the substrate 10, the nucleation layer 21, the buffer layer 22, the channel layer 23, the barrier layer 24 in turn and extend to the ground source electrode 120, and can achieve electrical contact with the ground source electrode 120. The second connecting hole 80 can be filled with a conductive and thermally conductive medium, and the ground source electrode 120 can achieve electrical connection with the ground layer 110 through the conductive and thermally conductive medium in the second connecting hole 80, thereby achieving grounding of the source electrode.

[0133] In addition, the second connecting hole 80 penetrates the substrate 10 and the epitaxial layer 20 and extends to the ground source electrode 120, and the heat generated in the channel layer 23 and the like of the epitaxial layer 20 can also be transmitted to the substrate 10 and the ground layer 110 through the conductive and thermally conductive medium in the second connecting hole 80 for heat dissipation, which helps to further improve the heat dissipation effect. That is, through the arrangement of the ground layer 110 and the first connecting hole 70 and the second connecting hole 80, the grounding of the source electrode of the semiconductor device 100 is achieved, and the heat dissipation capacity of the semiconductor device 100 is improved.

[0134] The forming material of the ground layer 110 can be a metal material with electrical conductivity, or a non-metal material with electrical conductivity and thermal conductivity. The forming material of the ground layer 110 can be the same as or different from the forming material of the heat dissipation base 90.

[0135] The ground layer 110 is used to ground the source electrode 30 and dissipate heat. The ground layer 110 can be used as the heat dissipation base 90. The semiconductor device 100 can include only the ground layer 110 to ground the source electrode 30 and improve heat dissipation, or include both the ground layer 110 and the heat dissipation base 90, where the heat dissipation base 90 is located on the side of the ground layer 110 away from the substrate 10.

[0136] In addition, the conductive and heat-conductive medium filled in the second connecting hole 80 can be a conductive and heat-conductive material, for example, a metal material, and the thermal conductivity of the conductive and heat-conductive material can be greater than or equal to 200 W / m·K. The material of the conductive and heat-conductive medium in the second connecting hole 80 can be the same as or different from the material of the heat-conductive medium in the first connecting hole 70.

[0137] The number of the second connecting holes 80 can also be multiple, and one ground source electrode 120 can correspond to one second connecting hole 80, or one ground source electrode 120 can correspond to multiple second connecting holes 80.

[0138] The cross-sectional shape of the multiple second connecting holes 80 can be a regular shape such as a circle or a square, or an irregular shape. The cross-sectional shapes of the multiple second connecting holes 80 can be the same or different, and the cross-sectional sizes of the multiple second connecting holes 80 can be the same or different.

[0139] It should be understood that in the architecture of grounding and improving heat dissipation performance by using the second connecting hole 80 and the ground layer 110, the first connecting hole 70 can be arranged in the active region, and the first connecting hole 70 can also be arranged in the passive region, that is, the vertical projections of the multiple first connecting holes 70 on the substrate 10 are located in the first projection of the active region and the second projection of the passive region, respectively.

[0140] Alternatively, the first connecting hole 70 can be arranged only in the active region, and the passive region can not have the first connecting hole 70 (see FIG. 2B), that is, the vertical projections of the multiple first connecting holes 70 on the substrate 10 are located in the first projection of the active region, but not in the second projection, which can improve the heat dissipation of the semiconductor and ensure the performance of the semiconductor device 100. Figure 13

[0141] ​Taking the example of having multiple first connection holes 70 only in the active region, the arrangement of the first connection holes 70 can also be varied. For example, the multiple first connection holes 70 can be distributed in the first region, the second region, and the third region of the active region, that is, the first connection holes 70 can be provided directly below the source electrode 30, directly below the drain electrode 40, and directly below the region between the source electrode 30 and the drain electrode 40 (such as the region where the gate electrode 50 is located). Figure 13 (As shown).

[0142] Figure 16 This is a partial perspective view of another semiconductor device provided in an embodiment of this application.

[0143] Alternatively, multiple first connection holes 70 can be located in the first region and the second region respectively, while no first connection holes 70 are provided in the third region.

[0144] See Figure 16 As shown, the first connection hole 70 is provided only directly below the source electrode 30 and the drain electrode 40, and is not provided directly below the region between the source electrode 30 and the drain electrode 40 (such as the gate electrode 50). This ensures the performance of the semiconductor device 100 while improving the semiconductor's heat dissipation capability.

[0145] The structure, distribution, and extension direction of the first connection hole 70 can be found in the previous section on the first connection hole 70. Specifically, the width of each first connection hole 70 in the first direction can be smaller than the width of the source electrode 30 or the drain electrode 40 in the first direction, so that the size of the vertical projection of each first connection hole 70 on the substrate 10 (the size in the x and y directions) is smaller than the size of the vertical projection of the source electrode 30 or the drain electrode 40 on the substrate 10 (the size in the x and y directions). This further reduces the impact of the arrangement of the first connection holes 70 on the quality of the epitaxial layer 20, and improves the reliability of the semiconductor device 100 while enhancing its heat dissipation capability.

[0146] The vertical distance between the end face of the second end of the first connection hole 70 and the end face of the barrier layer 24 facing the channel layer 23 can also be greater than or equal to 30nm, so as to ensure the performance of the semiconductor device 100 while improving heat dissipation capacity.

[0147] The ratio of the area of the vertical projection of the first connection hole 70 on the substrate 10 in the first region and the second region and S1 to the area of the vertical projection of the first region and the second region on the substrate 10 and S2 can also range from 0.1% to 15%. The ratio of the area of the vertical projection of the first connection hole 70 on the substrate 10 in the third region and S3 to the area of the vertical projection of the third region on the substrate 10 and S4 is less than or equal to 10%. In the condition of improving the heat dissipation performance of the semiconductor device 100, the influence of the opening of the first connection hole 70 in the active region 60a on the quality of the epitaxial layer 20 is reduced, and the performance of the semiconductor device 100 is ensured.

[0148] It should be noted that the preparation method of the semiconductor device in the embodiments of the present application is not limited, for example, during the preparation of the semiconductor device, the electrodes (source electrode, drain electrode and gate electrode) on the epitaxial layer can be prepared first, and then the connection holes (first connection hole and second connection hole) can be prepared; or the connection holes can be prepared first, and then the electrodes can be prepared. In addition, the bottom and top of the source electrode, the drain electrode and the gate electrode can not be in the same horizontal plane. In addition, the barrier layer can also be partially etched first, and then second epitaxial growth is performed. The above-mentioned device preparation methods are not limited in the embodiments of the present application.

[0149] In the description of the embodiments of the present application, it should be noted that, unless otherwise explicitly specified and limited, the terms "mounting", "connection", "connection" should be understood in a broad sense, for example, it can be fixedly connected, or indirectly connected through an intermediate medium, or the connection between two elements or the interaction relationship between two elements. For those skilled in the art, the specific meaning of the above terms in the embodiments of the present application can be understood according to the specific circumstances.

[0150] The terms "first", "second", "third", "fourth" and the like (if any) in the description and claims of the embodiments of the present application and the above-mentioned drawings are used to distinguish similar objects, and do not necessarily describe a specific order or sequence.

[0151] Finally, it should be noted that: the above embodiments are only used to illustrate the technical solutions of the embodiments of the present application, and not to limit them; although the embodiments of the present application have been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that they can still modify the technical solutions recorded in the foregoing embodiments, or make equivalent replacement for part or all of the technical features; and these modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A semiconductor device, characterized by, The semiconductor device comprises a substrate, an epitaxial layer, a source electrode, a drain electrode and a gate electrode, the epitaxial layer comprises a channel layer and a barrier layer arranged in sequence on the substrate, the channel layer and the barrier layer form a heterojunction structure, the source electrode, the drain electrode and the gate electrode are arranged on the barrier layer, and the semiconductor device further comprises an active region, part of the source electrode, part of the drain electrode and part of the gate electrode are located in the active region. The semiconductor device further comprises a plurality of first connection holes, a first end of the first connection hole extends to the substrate, a second end of the first connection hole extends into the channel layer, and the first connection hole is filled with a heat-conducting medium. At least the active region has the first connection hole, and the width of each first connection hole in the first direction is less than the width of the source electrode or the drain electrode in the first direction, and the first direction is parallel to the substrate and perpendicular to the extension direction of the source electrode or the drain electrode. The distance between the end face of the second end of the first connection hole and the end face of the barrier layer facing one end of the channel layer is greater than or equal to 30 nm.

2. The semiconductor device according to claim 1, wherein The active region comprises a first region, a second region and a third region, the vertical projection of the first region on the substrate is located in the vertical projection of the source electrode on the substrate, the vertical projection of the second region on the substrate is located in the vertical projection of the drain electrode on the substrate, and the third region is the region of the active region excluding the first region and the second region.

3. The semiconductor device of claim 1, wherein A plurality of first connection holes are respectively located in the first region, the second region and the third region. The active region comprises a first region, a second region and a third region, the vertical projection of the first region on the substrate is located in the vertical projection of the source electrode on the substrate, the vertical projection of the second region on the substrate is located in the vertical projection of the drain electrode on the substrate, and the third region is the region of the active region excluding the first region and the second region.

4. The semiconductor device of claim 1, wherein A plurality of first connection holes are respectively located in the first region and the second region. The area of the vertical projection of the first connection hole located in the first region and the second region on the substrate accounts for 0.1%-15% of the area of the vertical projection of the first region and the second region on the substrate.

5. The semiconductor device according to claim 3 or 4, wherein The area of the vertical projection of the first connection hole located in the third region on the substrate accounts for less than or equal to 10% of the area of the vertical projection of the third region on the substrate.

6. The semiconductor device of claim 3, wherein Further comprising a heat dissipation substrate, the heat dissipation substrate is located on the side of the substrate away from the epitaxial layer, and the first end of the first connection hole extends through the substrate and extends to the heat dissipation substrate.

7. The semiconductor device according to any one of claims 1 to 4, wherein Further comprising a ground layer, the ground layer is located on the side of the substrate away from the epitaxial layer, and the first end of the first connection hole extends through the substrate and extends to the ground layer.

8. The semiconductor device according to any one of claims 1 to 4, wherein Further comprising a ground source electrode, the ground source electrode is arranged on the barrier layer, and the ground source electrode is located outside the active region. ​ A second connecting hole is further included outside the active region, a first end of the second connecting hole extends to the ground layer, a second end of the second connecting hole penetrates the substrate, the epitaxial layer and extends to the ground source electrode, and the second connecting hole is filled with a conductive and heat-conductive medium.

9. The semiconductor device according to any one of claims 1 to 4, wherein The heat-conductive medium includes a heat-conductive material with a thermal conductivity greater than or equal to 200 W / m•K.

10. The semiconductor device of claim 9, wherein, The heat-conductive material includes one or more combinations of metal material, insulating material and semiconductor material.

11. The semiconductor device according to any one of claims 1 to 4, wherein The epitaxial layer further includes a nucleation layer and a buffer layer. The nucleation layer is arranged between the substrate and the buffer layer, the buffer layer is arranged between the nucleation layer and the channel layer, and the second end of the first connecting hole penetrates the nucleation layer and the buffer layer and extends into the channel layer.

12. The semiconductor device of claim 11, wherein, The nucleation layer is made of aluminum nitride or gallium nitride. The buffer layer is made of aluminum gallium nitride or gallium nitride. The channel layer is made of gallium nitride. The barrier layer is made of aluminum gallium nitride, indium aluminum gallium nitride, indium gallium nitride or aluminum nitride.

13. The semiconductor device according to any one of claims 1 to 4, wherein The barrier layer includes at least one of aluminum or indium, and the ratio of aluminum or indium in the barrier layer is greater than or equal to 0.

01.

14. The semiconductor device according to any one of claims 1 to 4, wherein The substrate is made of silicon, silicon carbide, aluminum oxide, diamond or gallium nitride.

15. The semiconductor device of claim 7, wherein, The heat-dissipating substrate is made of metal material, insulating material or semiconductor material.

16. An electronic device, comprising: At least a housing and the semiconductor device of any one of claims 1-15 are arranged in the housing.

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