A method for calculating equivalent resistance between nodes in a resistor network

Abstract

The present application discloses a method for calculating the equivalent resistance between nodes in a resistor network, which includes: determining the admittance matrix G of the resistor network; converting the admittance matrix into a non-singular matrix #imgabs0# based on the permutation matrix P; performing LDL on the non-singular matrix #imgabs1# T Decompose and obtain the lower triangular matrix L with diagonal 1 and its elimination tree, diagonal matrix D; determine the equivalent resistance R to be calculated in the resistor network ij Node i, node j, and the standard unit vector e corresponding to node i i , the standard unit vector e corresponding to node j j With the permutation matrix P and the lower triangular matrix L, establish the equation group to be solved LXi=P T e i , LX j =P T e j , X i 、X j is the solution of the system of equations to be solved; based on the elimination tree, determine the solution X of the system of equations to be solved i 、X j The non-zero position of ; based on the solution of the equation system X i 、X j The non-zero position of the equation to be solved is calculated i 、X j ; Based on the solution X of the system of equations to be solved i 、X j And the diagonal matrix D, calculate the equivalent resistance R between node i and node j ij .

Description

Technical Field

[0001] This patent application belongs to the field of circuit design technology, and in particular relates to a method for calculating equivalent resistance between nodes in a resistor network. Background Art

[0002] With the development of advanced semiconductor processes, extracting circuit layout parasitic parameters has become an essential part of circuit simulation. Accurate and rapid equivalent resistance analysis of extracted large-scale resistor networks is particularly important. Equivalent resistance calculations often require a many-to-many calculation model. This model involves selecting multiple node pairs from the resistor network and calculating the equivalent resistance between all of these node pairs.

[0003] However, the existing solutions for obtaining equivalent resistance have a large amount of computational complexity and low efficiency. Summary of the Invention

[0004] This patent application provides a method for calculating the equivalent resistance between nodes in a resistor network to overcome or alleviate the defects of the prior art.

[0005] The present invention provides a method for calculating the equivalent resistance between nodes in a resistor network, which includes:

[0006] Determine the admittance matrix G of the resistor network;

[0007] Convert the admittance matrix into a non-singular matrix

[0008] Based on the permutation matrix P, the non-singular matrix LDL T Decompose to obtain the lower triangular matrix L with diagonal 1 and its elimination tree and diagonal matrix D;

[0009] Determine the equivalent resistance R between the resistors in the resistor network to be calculated ij Node i, node j, and the standard unit vector e corresponding to node i i , the standard unit vector e corresponding to node j j ;

[0010] Based on the standard unit vector e corresponding to the node i i , the standard unit vector e corresponding to the node j j , and the permutation matrix P, the lower triangular matrix L, to establish the equation group LX i =P T e i , LX j =P T e j , X i 、X jis the solution of the system of equations to be solved;

[0011] Based on the elimination tree, determine the solution X of the equation system to be solved i 、X j The non-zero position of

[0012] Based on the solution X of the equation system i 、X j The non-zero position of the equation to be solved is calculated i 、X j ;

[0013] Based on the solution X of the equations to be solved i 、X j and the diagonal matrix D, calculate the equivalent resistance R between the node i and the node j ij .

[0014] Optionally, converting the admittance matrix into a non-singular matrix includes: deleting any row and corresponding column of the admittance matrix G to obtain the non-singular matrix

[0015] Optionally, the non-singular matrix G is obtained by deleting any one row and corresponding column of the admittance matrix G. It includes: deleting the last row and the last column of the admittance matrix G to obtain the non-singular matrix

[0016] Optionally, according to the following formula, based on the permutation matrix P, the non-singular matrix LDL T break down:

[0017]

[0018] Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

[0019] Optionally, the solution X based on the equation system i 、X i The non-zero position of the equation to be solved is calculated i 、X j ,include:

[0020] Based on the solution X of the system of equations to be solved i and X j The non-zero position of , through sparse downward back substitution operation, obtain the solution X of the equation group to be solved i 、X j .

[0021] Optionally, according to the following formula, based on the solution X of the equations to be solved i 、X j and the diagonal matrix D, calculate the equivalent resistance R between the node i and the node j ij :

[0022] BRIEF DESCRIPTION OF THE DRAWINGS

[0023] Figure 1 Schematic diagram of the principle of calculating equivalent resistance based on an external power supply in an embodiment of the present application.

[0024] Figure 2 Schematic diagram of a flow chart of a method for calculating equivalent resistance between nodes in a resistor network in an embodiment of the present application. DETAILED DESCRIPTION

[0025] The following will be combined with the drawings in the embodiments of this patent application to clearly describe the technical solutions in the embodiments of this patent application. Obviously, the embodiments described are part of the embodiments of this patent application, not all of the embodiments. Based on the embodiments in this patent application, all other embodiments obtained by ordinary technicians in this field are within the scope of protection of this patent application.

[0026] The terms "first," "second," and the like in the specification and claims of this patent application are used to distinguish similar objects, and are not used to describe a specific order or precedence. It should be understood that the terms used in this manner are interchangeable where appropriate, so that the embodiments of this patent application can be implemented in an order other than that illustrated or described herein, and that the objects distinguished by "first," "second," and the like are generally of the same type, and do not limit the number of objects. For example, the first object can be one or more. In addition, the term "and / or" in the specification and claims indicates at least one of the connected objects, and the character " / " generally indicates that the objects connected are in an "or" relationship.

[0027] Figure 1 Schematic diagram of the principle of calculating equivalent resistance based on external power supply in the embodiment of this application. Figure 1 As shown, the independent power sources in the resistor network are set to zero (including independent voltage source short circuit, independent current source open circuit), and the capacitors are disconnected. If the equivalent resistance between node i and node j is to be calculated, a 1V voltage source (with node current fi) is connected to node i, and a 0V voltage source (with node current f) is connected to node j. j ) and ground these two voltage sources. In the circuit equation using the modified nodal analysis method (MNA), adding an independent voltage source adds two "bad component" branch equations to the general original circuit equation GV = I. Therefore, the following circuit equation exists:

[0028]

[0029] Where G is the admittance matrix of the resistor network, which is usually a sparse matrix with a matrix dimension of n; I is the independent current source vector of the resistor network (I = 0); G and I are determined by the component filling rules in the node analysis method MNA and are known quantities; V is the unknown node voltage vector, e i and e j is a standard unit vector (e.g., e i and e j It can be: e1=(1, 0, ..., 0), e2=(0, 1, ..., 0), ...e n = any two different ones in (0, 0, ..., 1), where the i-th or j-th element is 1, corresponding to e i and e j ). By solving the node current f i or f j , the reciprocal of the current is the equivalent resistance R between nodes i and j ij .

[0030] In the above calculation process, a node pair consisting of two different nodes can be arbitrarily selected from the resistor network, and the equivalent resistance between the node pairs can be calculated. In this way, the set consisting of all selected node pairs can be traversed, and the calculation of the equivalent resistance between nodes in the resistor network can be realized in a many-to-many calculation mode.

[0031] Figure 2 1 is a flow chart of a method for calculating the equivalent resistance between nodes in a resistor network according to an embodiment of the present application. In this embodiment, the calculation of the equivalent resistance between node i and node j is used as an example for explanation.

[0032] like Figure 2 As shown, the equivalent resistance between nodes in the resistor network includes:

[0033] S1. Determine the admittance matrix G of the resistor network;

[0034] S2. Convert the admittance matrix into a non-singular matrix

[0035] S3, based on the permutation matrix P, the non-singular matrix LDL T Decompose to obtain the lower triangular matrix L with diagonal 1 and its elimination tree and diagonal matrix D;

[0036] S4, determine the equivalent resistance R to be calculated in the resistor network ij Node i, node j, and the standard unit vector e corresponding to node i i, the standard unit vector e corresponding to node j j ;

[0037] S5, based on the standard unit vector e corresponding to the node i i , the standard unit vector e corresponding to the node j j , and the permutation matrix P, the lower triangular matrix L, to establish the equation group LX i =P T e i and LX j =P T e j , X i and X j is the solution of the system of equations to be solved;

[0038] S6, based on the elimination tree, determine the solution X of the equation group to be solved i and X j The non-zero position of

[0039] S7, based on the solution X of the equation group i and X j The non-zero position of the equation to be solved is calculated i and X j ;

[0040] S8, according to the solution X of the equation group to be solved i and X j and the diagonal matrix D, calculate the equivalent resistance R between the node i and the node j ij .

[0041] In the above embodiment, step S4 is not limited to be executed only after step S3. In fact, it only needs to be executed before step S5.

[0042] In this embodiment, as described above, in step S1 , the admittance matrix G is determined, for example, by the element filling rule in the node analysis method MNA.

[0043] In this embodiment, in step S2, the last row and the last column of the admittance matrix G are deleted to obtain a non-singular matrix The circuit equation (1) is transformed into the following form:

[0044]

[0045] Referring to the above formula (2), we can see that is the admittance matrix G with the last row removed and the last column (G0 g0) T Obtained later.

[0046] Refer to the above formula (2), assuming that the dimension of the original admittance matrix is ​​n×n, then The dimension of G0 is (n-1)×(n-1); and G0, e i and e j are all (n-1)×1 vectors. The variable V is a (n-1)×1 vector, (v0, f i , f j ) T Constitute a 3×1 vector. In the right-hand term It is a (n-1)×1 vector whose elements are all 0.

[0047] Based on the above In the implementation of the equivalent resistance calculation of this application, the elimination method of matrix solution is used. The last three rows and three columns of the left-hand matrix in formula (2) are retained. The corresponding solution variables and the last three terms on the right-hand side are also retained. In this way, the above formula (2) is converted into a form represented by the 3×3 matrix in the lower right corner, as shown in the following formula (3):

[0048]

[0049] For this purpose, for example, the equivalent resistance R between nodes i and j is determined by solving the inverse of the node current fi. ij When the equivalent resistance R ij , which is expressed as the following formula (4):

[0050]

[0051] In this embodiment, in step S3, the non-singular matrix is ​​transformed into LDL T break down:

[0052]

[0053] Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

[0054] P is determined by a given sorting algorithm, thereby reducing the number of filler elements generated during the decomposition process and further reducing the computational complexity of subsequent sparse back-substitution.

[0055] Based on the above formula (5), LDL T During the decomposition process, an elimination tree of the lower triangular matrix is ​​also established. The specific process of establishing the elimination tree can be selected by ordinary technicians in this field according to the application scenario.

[0056] In addition, when calculating the equivalent resistance of any two nodes in a resistor network based on the many-to-many mode, only one LDL TBreakdown, or LDL T The result of the decomposition is: P is a permutation matrix, L is a lower triangular matrix with diagonal 1, and D is a diagonal matrix. They can be stored and reused, thereby reducing the amount of calculation.

[0057] In this embodiment, in step S4, the standard unit vector e corresponding to node i is i The value of the i-th element in is 1, and the standard unit vector e corresponding to node j j The value of the jth element in is 1, and the standard unit vector e i , standard unit vector e j The dimension is (n-1), which is the same as the non-singular matrix The dimensions of are the same, i and j are positive integers greater than or equal to 1 and less than or equal to (n-1), and i is not equal to j.

[0058] In this embodiment, in step S5, a set of equations to be solved is established.

[0059] LX i =P T e i

[0060] LX j =P T e j (6)

[0061] where X i and X j Represents the solution of the equations to be solved, which is essentially a sparse vector.

[0062] In this embodiment, in steps S6 and S7, the elimination tree established in the decomposition process is used to find the solution X of the equation system to be solved. i and X j After the non-zero position of i and X j The non-zero position of , through sparse downward back substitution operation, thus obtaining the solution X of the equation group to be solved i and X j .

[0063] In addition, in the process of downward substitution, due to the standard unit vector e on the right side i , standard unit vector e j Extremely sparse, which greatly reduces the complexity and amount of computation required. In contrast, in general, for linear equations e i and The direct method is used to solve Do LU decomposition Where L is a lower triangular matrix with diagonal 1, and U is an upper triangular matrix; then do a step of downward substitution to solve the system of equations LX i =e i and LX j =e j Solution X i and X j ; Finally, do upward substitution to obtain the equation UY i =X i and UY j =X j Solution Y i and Y j . Combined with formula (4), R ij Can be done by Y i and Y j Represented as R ij =e i T Y i +e j T Y j -e i T Y j -e j T Y i If this method is used to back-substitute upward, it is necessary to use X which is denser than the unit vector. i and X j Do the right side of the linear equations so that the solution Y i and Y j The node voltage vector between node i and node j is denser, which greatly increases the amount of calculation.

[0064] In this embodiment, in step S8, based on the above formulas (4)-(6), the following deduction is performed to obtain formula (7):

[0065]

[0066] It can be proved That is:

[0067]

[0068] Refer to the above formula (7), since the solution X i and X j is a sparse vector, so it is equivalent to the inner product operation based on the sparse vector to obtain the equivalent resistance, thus avoiding the problem based on X=X i -X j , R ij =X T D -1The solution of X, in this idea, due to the sparse vector X i and X j The different positions of non-zero elements result in a lot of extra processing during vector subtraction.

[0069] The following is an illustrative description of the application of the above embodiment of the present application using a scenario as an example.

[0070] For example, a resistor network with a matrix dimension of 226,405 is used, and the total number of pin pairs to be calculated is 20,000. Referring to the above process, after removing one row and one column from the admittance matrix of the resistor network, an LDL is performed. T After decomposition, according to the node numbers i and j corresponding to the pins, set the corresponding filling positions i and j of the right-hand term to 1, and then perform downward substitution (Formula (6)) and vector inner product (Formula (7)) according to the number of pin pairs to obtain the equivalent resistance R between each pin pair. ij . This loop uses parallel computing.

[0071] Using the conventional direct method with a two-step dense back-substitution solution, the total time required to calculate the equivalent resistance between 20,000 pin pairs was 32.74 seconds (16 threads). Using the sparse solution based on this application (essentially an improved direct method), the total time required to calculate the equivalent resistance between the same group of pin pairs was reduced to 0.44 seconds (16 threads), achieving a 74.6x speedup compared to the conventional direct method. Table 1 compares the performance of equivalent resistance calculations based on this application's method with that based on the conventional direct method for different thread sizes. This algorithm demonstrates good scalability.

[0072] Table 1 Comparison of equivalent resistance solution performance based on the improved direct method and the ordinary direct method

[0073] Number of threads 1 2 4 8 16 Ordinary direct method 528.05s 213.09s 113.10s 57.88s 32.74s This application method 6.37s 2.87s 1.47s 0.77s 0.44s

[0074] The embodiments of the present patent application are described above in conjunction with the accompanying drawings, but the present patent application is not limited to the above-mentioned specific implementation methods. The above-mentioned specific implementation methods are merely illustrative and not restrictive. Under the guidance of this patent application, ordinary technicians in this field can also make many forms without departing from the purpose of this patent application and the scope of protection of the claims, all of which fall within the scope of protection of this patent application.

Claims

1. A method for calculating the equivalent resistance between nodes in a resistor network, characterized in that: include: Determine the admittance matrix G of the resistor network; Convert the admittance matrix into a non-singular matrix Based on the permutation matrix P, the non-singular matrix LDL T Decompose to obtain the lower triangular matrix L with diagonal 1 and its elimination tree and diagonal matrix D; Determine the equivalent resistance R between the resistors in the resistor network to be calculated ij Node i, node j, and the standard unit vector e corresponding to node i i , the standard unit vector e corresponding to node j j ; Based on the standard unit vector e corresponding to the node i i , the standard unit vector e corresponding to the node j j , and the permutation matrix P, the lower triangular matrix L, to establish the equation group LX i =P T e i , LX j =P T e j , X i 、X j is the solution of the system of equations to be solved; Based on the elimination tree, the solution X of the equation system to be solved is determined i 、X j The non-zero position of Based on the solution X of the equations i 、X j The non-zero position of the equation to be solved is calculated i 、X j ; Calculate the equivalent resistance R based on the following derived formula ij : Derive the formula:

2. The method according to claim 1, characterized in that The converting the admittance matrix into a non-singular matrix includes: deleting any row and corresponding column of the admittance matrix G to obtain the non-singular matrix 3. The method according to claim 2, characterized in that The non-singular matrix G is obtained by deleting any row and corresponding column of the admittance matrix G. It includes: deleting the last row and the last column of the admittance matrix G to obtain the non-singular matrix 4. The method according to claim 1, wherein According to the following formula, based on the permutation matrix P, the non-singular matrix LDL T break down: Where P is a permutation matrix, L is a lower triangular matrix with 1s on the diagonal, and D is a diagonal matrix.

5. The method according to claim 1, wherein The solution X based on the equation system i 、X j The non-zero position of the equation to be solved is calculated i 、X j ,include: Based on the solution X of the system of equations to be solved i and X j The non-zero position of , through sparse downward back substitution operation, obtain the solution X of the equation group to be solved i 、X j .

Images