Parallel system and its slow start control method and device, storage medium

Abstract

The application provides a parallel system and a slow start control method, device and storage medium thereof. In the parallel system, multiple devices are connected in parallel, and each device comprises a corresponding DC source and a DC / DC converter. One side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected to a bus side in parallel through a second buffer unit. The method comprises: obtaining the DC source side voltage of each device; wherein the DC source side voltage is the voltage value between the DC / DC converter and the corresponding DC source; selecting a device with a DC source side voltage greater than a set start voltage as a target device; controlling the target device to buffer the bus side through the first buffer unit to complete the start of the bus side; and controlling the remaining devices to buffer from the bus side through the second buffer unit and complete the start. The application can avoid the situation that one or more devices fail to start when all devices of the parallel system start at the same time.

Description

Technical Field

[0001] This invention relates to the field of parallel system control technology, and in particular to a parallel system and its soft-start control method, device, and storage medium. Background Technology

[0002] In the current field of electrical equipment control, electrical equipment may be used in parallel operation applications. For multi-device parallel systems, to avoid current surges during the initial power-on phase that could affect the safety and reliability of equipment operation, buffer circuits are installed between the busbar and the equipment. Related parallel system control schemes typically involve starting multiple devices simultaneously. However, if the buffering speeds of the devices are inconsistent or if the internal capacitors of some devices cannot buffer the current, one or more devices may fail to start up. Summary of the Invention

[0003] This invention provides a parallel system and its soft-start control method, device, and storage medium to solve the problem of one or more devices failing to start when all devices in a parallel system are started simultaneously.

[0004] In a first aspect, embodiments of the present invention provide a soft-start control method for a parallel system, wherein multiple devices are connected in parallel in the parallel system, and each device includes a correspondingly connected DC source and a DC / DC converter; one side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected in parallel to the bus side through a second buffer unit; the method includes:

[0005] Obtain the DC source-side voltage of each device; where the DC source-side voltage is the voltage value between the DC / DC converter and the corresponding DC source;

[0006] Select a device whose DC source voltage is greater than the set start-up voltage as the target device;

[0007] The target device is controlled to provide buffering to the bus side through the first buffer unit in order to complete the bus side startup;

[0008] The remaining devices are controlled to start up by passing through the second buffer unit from the bus side.

[0009] In one possible implementation, the bus side is connected to the grid via an inverter, and the DC source side is connected to a battery; or...

[0010] Both the bus side and the DC source side are connected to a DC source; or,

[0011] The busbar side is connected to the battery, and the DC source side is connected to the photovoltaic panel.

[0012] In one possible implementation, when both the bus side and the DC source side are connected to a DC source, the method further includes:

[0013] When the DC power source connected to the bus side is turned on first, the control of each device is completed from the bus side through the second buffer unit.

[0014] In one possible implementation, the first buffer unit includes a first buffer contactor; the second buffer unit includes a second buffer contactor; the first buffer contactor is connected in parallel to the first main contactor; the second buffer contactor is connected in parallel to the second main contactor; a first capacitor is connected between each DC / DC converter and the DC source; and a second capacitor is connected between each DC / DC converter and the bus side.

[0015] Accordingly, controlling the target device to buffer the bus side through the first buffer unit to complete the bus side startup includes:

[0016] The first buffer contactor and the second main contactor corresponding to the target device are controlled to engage so as to buffer the DC source and the DC / DC converter corresponding to the target device through the first capacitor and the second capacitor.

[0017] When the voltage of the first capacitor and the second capacitor reaches the preset voltage, the bus-side startup is confirmed to be complete.

[0018] In one possible implementation, the bus side is connected to the power grid via an inverter, and the DC source side is connected to a battery; alternatively, when both the bus side and the DC source side are connected to a DC source, after the control of the remaining devices to buffer and complete the startup from the bus side, the following is also included:

[0019] Control the first capacitor corresponding to the DC / DC converter of each device to step down the voltage;

[0020] When the voltage across the first capacitor equals the voltage across the corresponding DC source, the corresponding first main contactor is closed.

[0021] In one possible implementation, when the battery is connected to the bus side and the photovoltaic panel is connected to the DC source side, after the control of the remaining devices to buffer and complete the startup from the bus side, the following method is further included:

[0022] Control the second capacitor corresponding to the DC / DC converter of each device to boost the voltage;

[0023] When the voltage across the second capacitor equals the bus voltage, the corresponding second main contactor is closed.

[0024] In one possible implementation, selecting a device whose DC source side voltage is greater than the set power-on voltage as the target device includes:

[0025] Select the device corresponding to the maximum DC source voltage as the target device; or...

[0026] From the devices whose DC source voltage is greater than the set power-on voltage, randomly select one device as the target device; or...

[0027] Among the devices whose DC source voltage is greater than the set power-on voltage, the device with the longest time since its most recent power-on is selected as the target device.

[0028] Secondly, embodiments of the present invention provide a soft-start control device for a parallel system, wherein multiple devices are connected in parallel in the parallel system, and each device includes a correspondingly connected DC source and a DC / DC converter; one side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected in parallel to the bus side through a second buffer unit; the device includes:

[0029] The acquisition unit is used to acquire the DC source-side voltage of each device; wherein, the DC source-side voltage is the voltage value between the DC / DC converter and the corresponding DC source;

[0030] The selection unit is used to select a device whose DC source side voltage is greater than the set power-on voltage as the target device;

[0031] The control unit is used to control the target device to be buffered on the bus side through the first buffer unit to complete the bus side startup, and to control the remaining devices to be buffered on the bus side through the second buffer unit and complete the startup.

[0032] Thirdly, embodiments of the present invention provide a parallel system, including multiple devices connected in parallel and a control device connected to each device, wherein each device includes a DC source and a DC / DC converter connected accordingly; one side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected in parallel to the bus side through a second buffer unit;

[0033] The control device includes a memory, a processor, and a computer program stored in the memory and executable on the processor, characterized in that the processor, when executing the computer program, implements the steps of the method as described in the first aspect or any possible implementation of the first aspect above.

[0034] Fourthly, embodiments of the present invention provide a computer-readable storage medium storing a computer program that, when executed by a processor, implements the steps of the method as described in the first aspect or any possible implementation thereof.

[0035] This invention provides a parallel system and its soft-start control method, device, and storage medium. By acquiring the voltage value between the DC / DC converter of each device and its corresponding DC source (i.e., the DC source side voltage), and selecting a device whose DC source side voltage is greater than a set start-up voltage as the target device, the system prioritizes the soft start-up of the bus side, ensuring that the DC source side power meets the bus soft-start requirements. After controlling the target device to buffer the bus side through a first buffer unit and complete the bus side start-up, the remaining devices are controlled to buffer from the bus side through a second buffer unit and complete the start-up. This avoids situations where some devices cannot start up smoothly due to inconsistent buffering speeds or lack of buffering capacity when devices start simultaneously. Attached Figure Description

[0036] To more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative effort.

[0037] Figure 1 This is an application scenario diagram of the soft start control method for a parallel system provided in an embodiment of the present invention;

[0038] Figure 2 This is a schematic diagram of the soft-start circuit structure of a parallel system provided in an embodiment of the present invention;

[0039] Figure 3 This is a flowchart illustrating the implementation of a soft-start control method for a parallel system according to an embodiment of the present invention.

[0040] Figure 4 This is a schematic diagram of the soft start control device for a parallel system provided in an embodiment of the present invention;

[0041] Figure 5 This is a schematic diagram of a control device provided in an embodiment of the present invention. Detailed Implementation

[0042] In the following description, specific details such as particular system architectures and techniques are set forth for illustrative purposes and not for limitation, in order to provide a thorough understanding of the embodiments of the invention. However, those skilled in the art will understand that the invention can be implemented in other embodiments without these specific details. In other instances, detailed descriptions of well-known systems, apparatuses, circuits, and methods are omitted so as not to obscure the description of the invention with unnecessary detail.

[0043] To make the objectives, technical solutions, and advantages of the present invention clearer, specific embodiments will be described below in conjunction with the accompanying drawings.

[0044] Figure 1 This diagram illustrates an application scenario of the soft-start control method for a parallel system provided in an embodiment of the present invention. For example... Figure 1 As shown, 10 devices are connected in parallel, and the current from the bus side of each device is combined and connected to the bus. Each device includes a corresponding DC source and a DC / DC converter. One side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected in parallel to the bus side through a second buffer unit.

[0045] When the bus input terminal is connected to the mains power, an inverter AC / DC converter is connected between the mains power and the parallel-connected equipment after the current is combined.

[0046] Figure 2 This is a schematic diagram of the soft-start circuit structure of the parallel system provided in an embodiment of the present invention. Figure 2 The example shown is a soft-start circuit structure between a device and the bus side, where the BUS side is the bus side and the BAT side is the DC source side.

[0047] The device's DC / DC converter is connected to the corresponding DC source through the first buffer unit (i.e., buffer unit 1) and connected to the bus side through the second buffer unit (i.e., buffer unit 2).

[0048] The first buffer unit includes a first buffer contactor K1, and the second buffer unit includes a second buffer contactor K2. The first buffer contactor K1 is connected in parallel to the first main contactor K3, and the second buffer contactor K2 is connected in parallel to the second main contactor K4. A first capacitor C1 is connected between the DC / DC converter and the DC source, and a second capacitor C2 is connected between each DC / DC converter and the bus side.

[0049] Normally, when all devices are powered on simultaneously, buffering occurs from the bus side, i.e., the first buffer contactor K1 of buffer unit 2 is engaged, simultaneously buffering the first capacitor C1 inside the topology of each device. At this time, if the first capacitor C1 inside the topology of some devices fails and cannot buffer, or if the performance of each device is inconsistent, resulting in inconsistent buffering speeds, one or more devices will fail to start and operate.

[0050] Figure 3 This is a flowchart illustrating the implementation of a soft-start control method for a parallel system according to an embodiment of the present invention, as shown below. Figure 3 As shown, it includes the following steps:

[0051] S301, obtain the DC source side voltage of each device; wherein, the DC source side voltage is the voltage value between the DC / DC converter and the corresponding DC source.

[0052] In this application, the execution subject of the embodiment is a controller that is independent of each device. It is used to communicate with each device, obtain the DC source side voltage of each device, and control the operation of the first buffer unit and the second buffer unit to complete the soft start control.

[0053] S302, select a device whose DC source side voltage is greater than the set start-up voltage as the target device.

[0054] This application embodiment applies to situations where there is no voltage on the bus side or the bus side voltage is lower than the set start-up voltage. That is, when there is no voltage on the bus side or the bus side voltage is lower than the set start-up voltage, and there is a device whose DC source side voltage is higher than the set start-up voltage, step S302 is executed.

[0055] In this application scenario, the inverter AC / DC does not have the ability to buffer from the grid, while the DC source side is energized and can be discharged. Therefore, the startup sequence is to start with the DC source side buffer. If all parallel machines start the DC source side black start at the same time to buffer the bus, the speed will not be completely consistent. This will cause the first capacitor inside the DC / DC topology of the machine that buffers more slowly to be clamped and unable to reach the expected value. Therefore, a device with a DC source side voltage greater than the set startup voltage should be selected to perform the black start.

[0056] In different embodiments, there are various ways to select a device whose DC source side voltage is greater than the set power-on voltage as the target device.

[0057] In one possible implementation, a device with a DC source-side voltage greater than a set power-on voltage is selected as the target device, including:

[0058] Select the device corresponding to the maximum DC source voltage as the target device.

[0059] In this implementation, a device corresponding to the maximum voltage on the DC source side is selected as the target device to ensure that the DC source has sufficient power to meet the buffering requirements of the second capacitor.

[0060] In another possible implementation, a device with a DC source voltage greater than a set power-on voltage is selected as the target device, including:

[0061] Select one device from among those whose DC source voltage is greater than the set start-up voltage as the target device.

[0062] This implementation avoids repeatedly starting the same DC source during multiple slow-start control operations, which could lead to the DC source repeatedly switching on and off, affecting operational safety.

[0063] In another possible implementation, a device with a DC source voltage greater than a set power-on voltage is selected as the target device, including:

[0064] Among the devices whose DC source voltage is greater than the set start-up voltage, select the device whose most recent start-up time is the longest since the current time as the target device.

[0065] In this implementation, when slow-start control is executed multiple times, devices with DC source voltage greater than the set start-up voltage can be controlled to start and execute slow-start control sequentially, balancing the number of times each device is turned on and off, and avoiding frequent power-on and power-off of a certain device.

[0066] S303, control the target equipment to buffer the bus side through the first buffer unit to complete the bus side startup.

[0067] In one possible implementation, the target device is controlled to provide buffering to the bus side via a first buffer unit to complete bus-side startup, including:

[0068] The first buffer contactor and the second main contactor corresponding to the target device are engaged to buffer the DC source and the DC / DC converter corresponding to the target device.

[0069] When the voltage of the first capacitor and the second capacitor reaches the preset voltage, the bus-side startup is confirmed to be complete.

[0070] S304 controls the remaining devices to start up from the bus side through the second buffer unit.

[0071] In this embodiment, by acquiring the voltage value between the DC / DC converter of each device and its corresponding DC source (i.e., the DC source side voltage), and selecting a device whose DC source side voltage is greater than the set start-up voltage as the target device, priority is given to completing the slow start-up of the bus side, ensuring that the DC source side power meets the bus slow start-up requirements. After controlling the target device to buffer the bus side through the first buffer unit and complete the bus side start-up, the remaining devices are controlled to buffer from the bus side through the second buffer unit and complete the start-up. This avoids the situation where some devices cannot start up smoothly due to inconsistent buffering speeds between devices or the lack of buffering capacity among some devices when they start up simultaneously.

[0072] In different embodiments, the solutions provided by the above embodiments can adapt to the needs of different scenarios. Optionally, the following three scenarios are included.

[0073] In one possible implementation, the bus side is connected to the power grid via an inverter, and the DC source side is connected to a battery.

[0074] In another possible implementation, both the bus side and the DC source side are connected to a DC source.

[0075] In another possible implementation, the bus side is connected to the battery and the DC source side is connected to the photovoltaic panel.

[0076] In one possible implementation, when a DC source is connected to both the bus side and the DC source side, the method further includes:

[0077] When the DC power source connected to the bus side is turned on first, the control of each device is completed from the bus side through the second buffer unit.

[0078] In other possible implementations, when DC sources are connected to both the bus side and the DC source side, if both DC sources are already powered on, the control unit can be used to start each device from the bus side through the second buffer unit.

[0079] In this embodiment, the DC source connected to the bus side is the high-voltage side. When the DC source connected to the high-voltage side is turned on first, or when the DC sources on the high-voltage side and the low-voltage side are turned on at the same time, the DC source on the high-voltage side is controlled to turn on, so as to ensure that the buffering requirements of the first capacitor corresponding to each device can be met, so as to smoothly complete the smooth start-up of each device.

[0080] In one possible implementation, the bus side is connected to the power grid via an inverter, and the DC source side is connected to a battery; alternatively, when both the bus side and the DC source side are connected to a DC source, after controlling the remaining devices to buffer and complete startup from the bus side, the following is also included:

[0081] Control the first capacitor corresponding to the DC / DC converter of each device to step down the voltage;

[0082] When the voltage across the first capacitor equals the voltage across the corresponding DC source, the corresponding first main contactor is closed.

[0083] In practical implementation, the bus side is connected to the power grid via an inverter, and the DC source side is connected to a battery; alternatively, when both the bus side and the DC source side are connected to a DC source, the bus side is the high-voltage side. Figure 2 Taking the example shown, the remaining devices are buffered and start up from the bus side, specifically including:

[0084] The first buffer contactor K1 of buffer unit 2 is energized, simultaneously buffering the first capacitor C1 inside the topology of each device. After buffering is completed, the voltage of the first capacitor C1 will be buffered to be consistent with the voltage on the bus side, which is higher than the DC source voltage. Therefore, after the loop starts to run, the voltage of the first capacitor C1 is reduced to be consistent with the DC source voltage before the first main contactor K3 of buffer unit 1 is energized.

[0085] In this embodiment, when the bus side is the high-voltage side, during the buffering process, the voltage across the first capacitor inside the equipment topology is increased to be greater than the DC source voltage. After each device completes startup, the voltage of the first capacitor is first reduced, and when the voltage across the first capacitor equals the voltage across the corresponding DC source, the corresponding first main contactor is controlled to close. This avoids problems such as overcharging of the DC source and improves the operational stability of the equipment.

[0086] In one possible implementation, when the battery is connected to the bus side and the photovoltaic panel is connected to the DC source side, after controlling the remaining devices to buffer and complete the startup from the bus side, the following is also included:

[0087] Control the second capacitor corresponding to the DC / DC converter of each device to boost the voltage;

[0088] When the voltage across the second capacitor equals the bus voltage, the corresponding second main contactor is closed.

[0089] In the specific implementation process, when the battery is connected to the bus side and the photovoltaic panel is connected to the DC source side, the bus side is the high voltage side. After the buffering is completed, the second capacitor C2 will be buffered to be consistent with the voltage of the photovoltaic panel, which is lower than the battery voltage on the bus side. Therefore, after the loop starts to run, the voltage of the second capacitor C2 is first increased to be consistent with the battery voltage on the bus side before the second main contactor K4 is closed.

[0090] In this embodiment, when the bus side is a battery, during the buffering process, the voltage across the second capacitor inside the device topology is increased to match the voltage of the photovoltaic panel on the DC source side, and is less than the battery voltage on the bus side. After each device completes startup, the second capacitor is first boosted, and when the voltage across the second capacitor equals the voltage across the corresponding battery, the corresponding second main contactor is controlled to close. This avoids voltage fluctuations and improves the operational stability of the device.

[0091] It should be understood that the sequence number of each step in the above embodiments does not imply the order of execution. The execution order of each process should be determined by its function and internal logic, and should not constitute any limitation on the implementation process of the embodiments of the present invention.

[0092] The following are device embodiments of the present invention. For details not described in detail, please refer to the corresponding method embodiments described above.

[0093] Figure 4 A schematic diagram of the soft-start control device for a parallel system provided in an embodiment of the present invention is shown. For ease of explanation, only the parts related to the embodiment of the present invention are shown, and are described in detail below:

[0094] like Figure 4As shown, the soft start control device 4 of the parallel system includes: an acquisition unit 401, a selection unit 402, and a control unit 403.

[0095] The acquisition unit 401 is used to acquire the DC source side voltage of each device; wherein, the DC source side voltage is the voltage value between the DC / DC converter and the corresponding DC source;

[0096] The selection unit 402 is used to select a device whose DC source side voltage is greater than the set start-up voltage as the target device;

[0097] The control unit 403 is used to control the target equipment to be buffered on the bus side through the first buffer unit to complete the bus side startup, and to control the remaining equipment to be buffered on the bus side through the second buffer unit to complete the startup.

[0098] In one possible implementation, the bus side is connected to the grid via an inverter, and the DC source side is connected to a battery; or...

[0099] Both the bus side and the DC source side are connected to a DC source; or,

[0100] The busbar side is connected to the battery, and the DC source side is connected to the photovoltaic panel.

[0101] In one possible implementation, when the control unit 403 is connected to a DC source on both the bus side and the DC source side, the method further includes:

[0102] When the DC power source connected to the bus side is turned on first, the control of each device is completed from the bus side through the second buffer unit.

[0103] In one possible implementation, the first buffer unit includes a first buffer contactor; the second buffer unit includes a second buffer contactor; the first buffer contactor is connected in parallel to the first main contactor; the second buffer contactor is connected in parallel to the second main contactor; a first capacitor is connected between each DC / DC converter and the DC source; and a second capacitor is connected between each DC / DC converter and the bus side.

[0104] Correspondingly, the control unit 403 is specifically used to control the first buffer contactor and the second main contactor corresponding to the target device to engage, so as to buffer the first capacitor and the second capacitor corresponding to the DC source and the DC / DC converter of the target device.

[0105] When the voltage of the first capacitor and the second capacitor reaches the preset voltage, the bus-side startup is confirmed to be complete.

[0106] In one possible implementation, the inverter connects to the grid on the bus side and the battery connects to the DC source side; or, when both the bus side and the DC source side are connected to a DC source, the control unit 403 is also used to control the first capacitor corresponding to the DC / DC converter of each device to step down the voltage after controlling the remaining devices to buffer from the bus side and complete the startup.

[0107] When the voltage across the first capacitor equals the voltage across the corresponding DC source, the corresponding first main contactor is closed.

[0108] In one possible implementation, when the battery is connected to the bus side and the photovoltaic panel is connected to the DC source side, the control unit 403 is also used to control the second capacitor corresponding to the DC / DC converter of each device to boost the voltage after controlling the remaining devices to buffer from the bus side and complete the startup.

[0109] When the voltage across the second capacitor equals the bus voltage, the corresponding second main contactor is closed.

[0110] In one possible implementation, selection unit 402 is specifically used to select a device corresponding to the maximum value of the DC source-side voltage as the target device; or...

[0111] From among devices whose DC source voltage is greater than the set start-up voltage, randomly select one device as the target device; or...

[0112] Among the devices whose DC source voltage is greater than the set start-up voltage, select the device whose most recent start-up time is the longest since the current time as the target device.

[0113] In this embodiment, by acquiring the voltage value between the DC / DC converter of each device and its corresponding DC source (i.e., the DC source side voltage), and selecting a device whose DC source side voltage is greater than the set start-up voltage as the target device, priority is given to completing the slow start-up of the bus side, ensuring that the DC source side power meets the bus slow start-up requirements. After controlling the target device to buffer the bus side through the first buffer unit and complete the bus side start-up, the remaining devices are controlled to buffer from the bus side through the second buffer unit and complete the start-up. This avoids the situation where some devices cannot start up smoothly due to inconsistent buffering speeds between devices or the lack of buffering capacity among some devices when they start up simultaneously.

[0114] This application also discloses a parallel system, including multiple devices connected in parallel and a control device connected to each device. Each device includes a DC source and a DC / DC converter connected in a corresponding manner. One side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected in parallel to the bus side through a second buffer unit.

[0115] Figure 5This is a schematic diagram of the control device provided in an embodiment of the present invention. Figure 5 As shown, the control device 5 in this embodiment includes: a processor 50, a memory 51, and a computer program 52 stored in the memory 51 and executable on the processor 50. When the processor 50 executes the computer program 52, it implements the steps in the above-described embodiments of the soft-start control method for parallel systems, for example... Figure 3 The steps shown. Alternatively, when the processor 50 executes the computer program 52, it implements the functions of each module / unit in the above-described device embodiments, for example... Figure 4 The functions of each module are shown.

[0116] For example, the computer program 52 can be divided into one or more modules / units, which are stored in the memory 51 and executed by the processor 50 to complete the present invention. The one or more modules / units can be a series of computer program instruction segments capable of performing a specific function, which describe the execution process of the computer program 52 in the control device 5. For example, the computer program 52 can be divided into... Figure 4 The modules shown.

[0117] The control device 5 can be a desktop computer, laptop, handheld computer, or cloud server, etc. The control device 5 may include, but is not limited to, a processor 50 and a memory 51. Those skilled in the art will understand that... Figure 5 This is merely an example of control device 5 and does not constitute a limitation on control device 5. It may include more or fewer components than shown, or combine certain components, or different components. For example, the control device may also include input / output devices, network access devices, buses, etc.

[0118] The processor 50 may be a Central Processing Unit (CPU), or other general-purpose processors, digital signal processors (DSPs), application-specific integrated circuits (ASICs), field-programmable gate arrays (FPGAs), or other programmable logic devices, discrete gate or transistor logic devices, discrete hardware components, etc. A general-purpose processor may be a microprocessor or any conventional processor.

[0119] The memory 51 can be an internal storage unit of the control device 5, such as a hard disk or memory of the control device 5. The memory 51 can also be an external storage device of the control device 5, such as a plug-in hard disk, Smart Media Card (SMC), Secure Digital (SD) card, or Flash Card equipped on the control device 5. Furthermore, the memory 51 can include both internal and external storage units of the control device 5. The memory 51 is used to store the computer program and other programs and data required by the control device. The memory 51 can also be used to temporarily store data that has been output or will be output.

[0120] Those skilled in the art will clearly understand that, for the sake of convenience and brevity, the above-described division of functional units and modules is merely an example. In practical applications, the above functions can be assigned to different functional units and modules as needed, that is, the internal structure of the device can be divided into different functional units or modules to complete all or part of the functions described above. The functional units and modules in the embodiments can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit. Furthermore, the specific names of the functional units and modules are only for easy differentiation and are not intended to limit the scope of protection of this application. The specific working process of the units and modules in the above system can be referred to the corresponding process in the foregoing method embodiments, and will not be repeated here.

[0121] In the above embodiments, the descriptions of each embodiment have different focuses. For parts that are not described in detail or recorded in a certain embodiment, please refer to the relevant descriptions of other embodiments.

[0122] Those skilled in the art will recognize that the units and algorithm steps of the various examples described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are implemented in hardware or software depends on the specific application and design constraints of the technical solution. Those skilled in the art can use different methods to implement the described functions for each specific application, but such implementations should not be considered beyond the scope of this invention.

[0123] In the embodiments provided by this invention, it should be understood that the disclosed apparatus / control devices and methods can be implemented in other ways. For example, the apparatus / control device embodiments described above are merely illustrative. For instance, the division of modules or units is only a logical functional division, and in actual implementation, there may be other division methods. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not executed. Furthermore, the coupling or direct coupling or communication connection shown or discussed may be through some interfaces; the indirect coupling or communication connection between apparatuses or units may be electrical, mechanical, or other forms.

[0124] The units described as separate components may or may not be physically separate. The components shown as units may or may not be physical units; that is, they may be located in one place or distributed across multiple network units. Some or all of the units can be selected to achieve the purpose of this embodiment according to actual needs.

[0125] Furthermore, the functional units in the various embodiments of the present invention can be integrated into one processing unit, or each unit can exist physically separately, or two or more units can be integrated into one unit. The integrated unit can be implemented in hardware or as a software functional unit.

[0126] If the integrated module / unit is implemented as a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, all or part of the processes in the above embodiments of the present invention can also be implemented by a computer program instructing related hardware. The computer program can be stored in a computer-readable storage medium, and when executed by a processor, it can implement the steps of the soft-start control method embodiments of the various parallel systems described above. The computer program includes computer program code, which can be in the form of source code, object code, executable files, or certain intermediate forms. The computer-readable medium can include: any entity or device capable of carrying the computer program code, recording media, USB flash drives, portable hard drives, magnetic disks, optical disks, computer memory, read-only memory (ROM), random access memory (RAM), electrical carrier signals, telecommunication signals, and software distribution media, etc. It should be noted that the content contained in the computer-readable medium may be appropriately added to or subtracted from the content as required by the legislation and patent practice in the jurisdiction. For example, in some jurisdictions, according to legislation and patent practice, the computer-readable medium may not include mains carrier signals and telecommunication signals.

[0127] The above-described embodiments are only used to illustrate the technical solutions of the present invention, and are not intended to limit it. Although the present invention has been described in detail with reference to the foregoing embodiments, those skilled in the art should understand that modifications can still be made to the technical solutions described in the foregoing embodiments, or equivalent substitutions can be made to some of the technical features. Such modifications or substitutions do not cause the essence of the corresponding technical solutions to deviate from the spirit and scope of the technical solutions of the embodiments of the present invention, and should all be included within the protection scope of the present invention.

Claims

1. A method of soft start control of a parallel system, characterized by, The plurality of devices are connected in parallel in the parallel system, and each device comprises a corresponding DC source and a DC / DC converter connected thereto; One side of each DC / DC converter is connected to the corresponding DC source through a first buffer unit, and the other side is connected to the bus side in parallel through a second buffer unit; the method comprises: obtaining the DC source side voltage of each device; wherein the DC source side voltage is the voltage value between the DC / DC converter and the corresponding DC source; selecting a device with a DC source side voltage greater than a set startup voltage as a target device; controlling the target device to buffer the bus side through the first buffer unit to complete the bus side startup; controlling the remaining devices to buffer from the bus side through the second buffer unit and complete the startup; wherein the first buffer unit comprises a first buffer contactor; the second buffer unit comprises a second buffer contactor; the first buffer contactor is connected in parallel with the first main contactor; the second buffer contactor is connected in parallel with the second main contactor; each DC / DC converter is connected with a first capacitor between the DC / DC converter and the DC source; each DC / DC converter is connected with a second capacitor between the DC / DC converter and the bus side; correspondingly, the control of the target device to buffer the bus side through the first buffer unit to complete the bus side startup comprises: controlling the target device to attract the corresponding first buffer contactor and the second main contactor to buffer the corresponding first capacitor and the second capacitor of the DC source and the DC / DC converter of the target device; when the voltage of the first capacitor and the second capacitor reaches a preset voltage, it is determined that the bus side startup is completed.

2. The soft start control method of a parallel system according to claim 1, wherein The bus side is connected to the grid through an inverter, and the DC source side is connected to a battery; or, the bus side and the DC source side are both connected to a DC source; or, the bus side is connected to a battery, and the DC source side is connected to a photovoltaic panel.

3. The soft start control method of a parallel system according to claim 2, wherein When the bus side and the DC source side are both connected to a DC source, the method further comprises: when the DC source connected to the bus side is started first, controlling each device to buffer from the bus side through the second buffer unit to complete the startup.

4. The method of claim 1, wherein the method is performed by the parallel system. When the bus side is connected to the grid through an inverter, and the DC source side is connected to a battery; or, when the bus side and the DC source side are both connected to a DC source, after the control of the remaining devices to buffer from the bus side and complete the startup, the method further comprises: controlling the first capacitor corresponding to the DC / DC converter of each device to step down; when the voltage value across the first capacitor is equal to the voltage across the corresponding DC source, controlling the corresponding first main contactor to close.

5. The method of claim 1, wherein the method further comprises: When the bus side is connected to a battery, and the DC source side is connected to a photovoltaic panel, after the control of the remaining devices to buffer from the bus side and complete the startup, the method further comprises: controlling the second capacitor corresponding to the DC / DC converter of each device to step up; when the voltage value across the second capacitor is equal to the bus side voltage, controlling the corresponding second main contactor to close.

6. The method of claim 1, wherein the method further comprises: The selection of a device with a DC source side voltage greater than the set startup voltage as a target device comprises: selecting a device corresponding to the maximum DC source side voltage as a target device; or, randomly selecting a device from the devices with a DC source side voltage greater than the set startup voltage as a target device; or, From the device whose direct current source side voltage is greater than the set starting voltage, take the device with the longest time distance from the current time as the target device.

7. A soft start control device for a parallel connection system for executing the soft start control method of any one of claims 1 to 6, characterized by The plurality of devices are connected in parallel in the parallel system, and each device comprises a corresponding direct current source and a DC / DC converter; One side of each DC / DC converter is connected to the corresponding direct current source through a first buffer unit, and the other side is connected to the bus side in parallel through a second buffer unit; the device comprises: An acquisition unit is configured to acquire the direct current source side voltage of each device; wherein the direct current source side voltage is the voltage value between the DC / DC converter and the corresponding direct current source; A selection unit is configured to select one device whose direct current source side voltage is greater than the set starting voltage as the target device; A control unit is configured to control the target device to buffer the bus side through the first buffer unit to complete the bus side starting, and control the remaining devices to buffer from the bus side through the second buffer unit and complete the starting.

8. A parallel system comprising a plurality of devices connected in parallel and a control device connected to each device, and each device comprising a corresponding direct current source and a DC / DC converter; one side of each DC / DC converter is connected to the corresponding direct current source through a first buffer unit, and the other side is connected to the bus side in parallel through a second buffer unit; wherein, The control device comprises a memory, a processor, and a computer program stored in the memory and running on the processor, and when the processor executes the computer program, the steps of the method of any one of claims 1 to 6 are implemented.

9. A computer-readable storage medium storing a computer program, the computer program comprising instructions that, when executed by a computer, cause the computer to perform the method of any one of claims 1 to 8. The computer program is executed by the processor to implement the steps of the method of any one of claims 1 to 6.

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