Asymmetric multiply-accumulators, multiply-accumulator methods and electronic devices

Abstract

This application relates to a multiply-accumulate method, apparatus, processor, and computer program product. The method includes: when the logic operation unit performs single-precision floating-point multiply-accumulate operations, two half-precision multiply-accumulate units in each single-precision multiply-accumulate unit combine to perform multiply-accumulate operations on the single-precision floating-point number to be processed, obtaining the corresponding single-precision multiply-accumulate result, for a total of N multiply-accumulate results; when the logic operation unit performs half-precision floating-point multiply-accumulate operations, each half-precision multiply-accumulate unit performs multiply-accumulate operations on the half-precision floating-point number to be processed, obtaining the corresponding half-precision multiply-accumulate result, for a total of 2N multiply-accumulate results. This improves the utilization rate of the multiply-accumulate units.

Description

Technical Field

[0001] This application relates to the field of chip technology, and in particular to an asymmetric multiply-accumulator, multiply-accumulator method, and electronic device. Background Technology

[0002] In the arithmetic logic unit (ALU) of a microprocessor, multiply-accumulate units are typically used to perform floating-point multiplication and addition operations. A typical design for the multiply-accumulate units in an ALU is as follows: n single-precision multiply-accumulate units and 2n half-precision multiply-accumulate units. When the ALU performs single-precision floating-point multiplication and addition operations, the n single-precision multiply-accumulate units work simultaneously, resulting in n single-precision multiplication and addition results; when the ALU performs half-precision floating-point multiplication and addition operations, the 2n half-precision multiply-accumulate units work simultaneously, resulting in 2n half-precision multiplication and addition results.

[0003] However, when the logic unit performs single-precision floating-point multiplication and addition operations, the 2n half-precision multipliers and adders are idle, and when the logic unit performs half-precision floating-point multiplication and addition operations, the n single-precision multipliers and adders are idle. The utilization rate of the multipliers and adders is not high, and the design of a large number of multipliers and adders also increases the hardware overhead. Summary of the Invention

[0004] Therefore, it is necessary to provide an asymmetric multiplier-accumulator, multiplier-accumulator method, and electronic device that can improve the utilization rate of the multiplier-accumulator in response to the above-mentioned technical problems.

[0005] In a first aspect, this application provides a high-performance multiply-accumulator, which includes: N single-precision multiply-accumulator units, each single-precision multiply-accumulator unit including: two half-precision multiply-accumulators;

[0006] When the high-performance multiply-accumulator performs single-precision floating-point multiply-accumulator operations, the two half-precision multiply-accumulators in each single-precision multiply-accumulator unit are combined to perform multiply-accumulator operations on the single-precision floating-point number to be processed, and the corresponding single-precision multiply-accumulator results are obtained. A total of N multiply-accumulator results are obtained.

[0007] When the high-performance multiply-accumulator performs half-precision floating-point multiplication and addition operations, each half-precision multiply-accumulator is used to perform multiplication and addition operations on the half-precision floating-point number to be processed, and the corresponding half-precision multiplication and addition results are obtained, resulting in a total of 2N multiplication and addition results.

[0008] Secondly, this application also provides a multiplication-addition method, which includes:

[0009] When the high-performance multiply-accumulator performs single-precision floating-point multiply-accumulator operations, the two half-precision multiply-accumulators in each single-precision multiply-accumulator unit combine to perform multiply-accumulator operations on the single-precision floating-point number to be processed, and obtain the corresponding single-precision multiply-accumulator result, resulting in a total of N multiply-accumulator results.

[0010] When the high-performance multiply-accumulator performs half-precision floating-point multiplication and addition operations, each half-precision multiply-accumulator performs multiplication and addition operations on the half-precision floating-point number to be processed, and obtains the corresponding half-precision multiplication and addition result, resulting in a total of 2N multiplication and addition results.

[0011] Thirdly, this application also provides an asymmetric multiply-accumulator, which includes N multiply-accumulator units, each of which includes a single-precision multiply-accumulator and a half-precision multiply-accumulator.

[0012] When the asymmetric multiply-accumulator performs half-precision floating-point multiply-accumulator operations, the single-precision multiply-accumulator and the half-precision multiply-accumulator each perform multiply-accumulator operations on the half-precision floating-point numbers to be processed, and obtain the corresponding half-precision multiply-accumulator results, resulting in a total of 2N half-precision multiply-accumulator results.

[0013] When the asymmetric multiply-accumulator performs single-precision floating-point multiplication and addition operations, the single-precision multiply-accumulator performs multiplication and addition operations on the single-precision floating-point number to be processed, and obtains the corresponding single-precision multiplication and addition results, resulting in a total of N single-precision multiplication and addition results.

[0014] Fourthly, this application also provides a multiply-add method, which includes:

[0015] When the asymmetric multiply-accumulator performs half-precision floating-point multiply-accumulator operations, the single-precision multiply-accumulator and the half-precision multiply-accumulator each perform multiply-accumulator operations on the half-precision floating-point numbers to be processed, and obtain the corresponding half-precision multiply-accumulator results, resulting in a total of 2N half-precision multiply-accumulator results.

[0016] When the asymmetric multiply-accumulator performs single-precision floating-point multiplication and addition operations, the single-precision multiply-accumulator performs multiplication and addition operations on the single-precision floating-point number to be processed, and obtains the corresponding single-precision multiplication and addition results, resulting in a total of N single-precision multiplication and addition results.

[0017] Fifthly, this application also provides an electronic device. The electronic device includes a memory and a processor, the memory storing a computer program, and the processor executing the computer program to implement the method provided in the second aspect or the method provided in the fourth aspect.

[0018] Sixthly, this application also provides a computer-readable storage medium. The computer-readable storage medium stores a computer program thereon, which, when executed by a processor, implements the method provided in the second aspect or the method provided in the fourth aspect.

[0019] In a seventh aspect, this application also provides a computer program product. The computer program product includes a computer program that, when executed by a processor, implements the method provided in the second aspect or the method provided in the fourth aspect.

[0020] The aforementioned multiply-accumulate method, apparatus, processor, and computer program products offer two design approaches. One approach involves setting up 2n half-precision multiply-accumulators in the logic unit. These 2n half-precision multiply-accumulators are grouped in pairs, resulting in n groups. During single-precision floating-point multiply-accumulate operations, the half-precision multiply-accumulators also participate in the operation, preventing idle operation and improving their utilization. Furthermore, this approach saves n single-precision multiply-accumulators, reducing hardware overhead. The other approach involves setting up n half-precision multiply-accumulators and n single-precision multiply-accumulators in the logic unit. Each group consists of one half-precision multiply-accumulator and one single-precision multiply-accumulator, resulting in n groups. During half-precision floating-point multiply-accumulate operations, the single-precision multiply-accumulators also participate in the operation, preventing idle operation and improving their utilization. This approach also saves n half-precision multiply-accumulators, reducing hardware overhead. Attached Figure Description

[0021] Figure 1 This is a schematic diagram of the data format of a single-precision floating-point number in one embodiment;

[0022] Figure 2 This is a schematic diagram of the data format for half-precision floating-point numbers in one embodiment;

[0023] Figure 3 This is a schematic diagram of the design structure of the logic operation unit in one embodiment;

[0024] Figure 4 This is a schematic diagram of the design structure of the logic operation unit in another embodiment;

[0025] Figure 5 This is a schematic diagram of the design structure of the logic operation unit in another embodiment;

[0026] Figure 6 This is a flowchart illustrating the multiply-accumulate method in one embodiment;

[0027] Figure 7 This is a schematic diagram of the internal structure of a multiply-accumulator in one embodiment;

[0028] Figure 8 This is a flowchart illustrating a single-precision floating-point multiplication and addition operation in one embodiment;

[0029] Figure 9 This is a schematic diagram of the internal structure of the multiply-accumulator in another embodiment;

[0030] Figure 10 This is a flowchart illustrating a half-precision floating-point multiplication and addition operation in one embodiment;

[0031] Figure 11 This is a flowchart illustrating the multiply-accumulate method in another embodiment;

[0032] Figure 12 This is a schematic diagram of the internal structure of the multiply-accumulator in another embodiment;

[0033] Figure 13 This is a flowchart illustrating half-precision floating-point multiplication and addition operations in another embodiment;

[0034] Figure 14 This is a schematic diagram of the internal structure of the multiply-accumulator in another embodiment;

[0035] Figure 15 This is a flowchart illustrating a single-precision floating-point multiplication and addition operation in another embodiment. Detailed Implementation

[0036] To make the objectives, technical solutions, and advantages of this application clearer, the following detailed description is provided in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the scope of this application.

[0037] For ease of understanding, the terms used in the embodiments of this application are explained below:

[0038] Single-precision floating-point numbers: The binary floating-point arithmetic standard (IEEE 754) specifies that single-precision floating-point numbers consist of 32 bits of binary data. The data format of single-precision floating-point numbers is as follows: Figure 1 As shown, where,

[0039] S: Sign bit, S=0 indicates that the value of the single-precision floating-point number is positive, S=1 indicates that the value of the single-precision floating-point number is negative.

[0040] Exponent: The exponent part, 8 bits of binary data.

[0041] Mantissa: The part after the decimal point, consisting of 23 bits of binary data.

[0042] Normalization: The exponent is not all 1s and not all 0s, with the digit 1 before the decimal point omitted.

[0043] Denormalization: refers to a condition where the exponent is all 0s and the mantissa is not all 0s, with the leading zeros omitted.

[0044] Exponent bias: The bias of a normal single-precision floating-point number is 0x7F, and the bias of a denormal single-precision floating-point number is 0x7E.

[0045] The value represented by a Normal single-precision floating-point number is:

[0046] data = (-1) S *2exponent-0x7F *(1.mantissa)

[0047] The value represented by a Denormal single-precision floating-point number is:

[0048] data = (-1) S *2 exponent-0x7E *(0.mantissa)

[0049] Half-precision floating-point numbers: Half-precision floating-point numbers consist of 16 bits of binary data. The data format of half-precision floating-point numbers is as follows: Figure 2 As shown, where,

[0050] S: Sign bit, S=0 indicates that the half-precision floating-point number represents a positive value, S=1 indicates that the half-precision floating-point number represents a negative value.

[0051] Exponent: The exponent part, consisting of 5 bits of binary data;

[0052] Mantissa: The part after the decimal point, consisting of 10 bits of binary data;

[0053] Normal: This means that the exponent is not all 1s and not all 0s, and the digit 1 before the decimal point is omitted.

[0054] Denormal: This means the exponent is all 0s, but the mantissa is not all 0s, with the leading zeros omitted.

[0055] Exponent bias: The bias of a normal half-precision floating-point number is 0xF, and the bias of a denormal half-precision floating-point number is 0xE.

[0056] The value represented by a Normal half-precision floating-point number is:

[0057] data = (-1) S *2 exponent-0xF *(1.mantissa)

[0058] The value represented by a Denormal half-precision floating-point number is:

[0059] data = (-1) S *2 exponent-0xE *(0.mantissa)

[0060] In the arithmetic logic unit of a microprocessor, multiply-accumulate units are typically used to implement floating-point multiplication and addition operations. See also: [link to relevant documentation] Figure 3As shown, the design scheme of the multiply-accumulator in the logic unit is as follows: n single-precision multiply-accumulators and 2n half-precision multiply-accumulators. When the logic unit performs single-precision floating-point multiplication and addition operations, the n single-precision multiply-accumulators work simultaneously, resulting in n single-precision multiplication and addition results; when the logic unit performs half-precision floating-point multiplication and addition operations, the 2n half-precision multiply-accumulators work simultaneously, resulting in 2n half-precision multiplication and addition results. The problem with this approach is that when the logic unit performs single-precision floating-point multiplication and addition operations, the 2n half-precision multiply-accumulators are idle, and when the logic unit performs half-precision floating-point multiplication and addition operations, the n single-precision multiply-accumulators are idle. The utilization rate of the multiply-accumulators is low, and the design of a large number of multiply-accumulators also increases hardware overhead.

[0061] Therefore, this application proposes two other design ideas. One design idea is as follows: (See...) Figure 4 As shown, a high-performance multiply-accumulator is provided, which still includes 2n half-precision multiply-accumulators. These 2n half-precision multiply-accumulators are grouped in pairs, resulting in n groups. When the high-performance multiply-accumulator performs single-precision floating-point multiplication and addition operations, the two half-precision multiply-accumulators in each group combine to perform multiplication and addition operations on the single-precision floating-point number to be processed, obtaining the corresponding single-precision multiplication and addition result. A total of n single-precision multiplication and addition results can be obtained. For ease of explanation, in this embodiment, each group is referred to as a single-precision multiplication and addition unit. When the high-performance multiply-accumulator performs half-precision floating-point multiplication and addition operations, the 2n half-precision multiply-accumulators work independently, that is, each half-precision multiply-accumulator performs multiplication and addition operations on the half-precision floating-point number to be processed, obtaining the corresponding half-precision multiplication and addition result, resulting in a total of 2n half-precision multiplication and addition results. In this embodiment, the half-precision multiply-accumulators also participate in the operation during single-precision floating-point multiplication and addition operations, without being idle, thus improving the utilization rate of the half-precision multiply-accumulators. Moreover, and... Figure 3 Compared to the design scheme shown, the scheme in this application embodiment saves n single-precision multiply-accumulators, reducing hardware overhead.

[0062] Another design approach is, see Figure 5As shown, an asymmetric multiply-accumulator is provided, comprising n half-precision multiply-accumulators and n single-precision multiply-accumulators. Each half-precision multiply-accumulator and each single-precision multiply-accumulator form a group, resulting in n groups. For ease of explanation, each group is referred to as a multiply-accumulator unit in this embodiment. When the asymmetric multiply-accumulator performs single-precision floating-point multiplication and addition operations, the n single-precision multiply-accumulators operate independently, each performing the multiplication and addition operation on the single-precision floating-point number to be processed, obtaining the corresponding single-precision multiplication and addition result, resulting in a total of n single-precision multiplication and addition results. When the asymmetric multiply-accumulator performs half-precision floating-point multiplication and addition operations, the n half-precision multiply-accumulators operate independently, obtaining n half-precision multiplication and addition results. Each single-precision multiply-accumulator converts the half-precision floating-point number to be processed into a single-precision floating-point number, performs the multiplication and addition operation, and finally converts the result back to half-precision, also obtaining n half-precision multiplication and addition results, resulting in a total of 2n half-precision multiplication and addition results. In the solution of this application embodiment, when performing half-precision floating-point multiplication and addition operations, the single-precision multiplier-accumulator also participates in the operation, without being idle, thus improving the utilization rate of the single-precision multiplier-accumulator. Furthermore, and... Figure 3 Compared to the design scheme shown, the scheme in this application embodiment saves n half-precision multiply-accumulators, reducing hardware overhead.

[0063] It should be noted that: Figure 4 The high-performance multiply-accumulator shown can be applied to any type of processor that requires floating-point multiply-accumulate operations. Figure 5 The asymmetric multiply-accumulator shown can also be applied to any type of processor that needs to perform floating-point multiply-accumulate operations. This application does not limit the type of processor.

[0064] The following sections respectively address... Figure 4 The high-performance multiply-accumulator shown Figure 5 The asymmetric multiply-accumulator shown is described in detail.

[0065] First of all, Figure 4 The high-performance multiply-accumulator shown is described in detail.

[0066] In one embodiment, the high-performance multiply-accumulator includes: N single-precision multiply-accumulator units, each single-precision multiply-accumulator unit including: two half-precision multiply-accumulators; when the high-performance multiply-accumulator performs single-precision floating-point multiply-accumulator operations, the two half-precision multiply-accumulators in each single-precision multiply-accumulator unit are used together to perform multiply-accumulator operations on the single-precision floating-point number to be processed, to obtain the corresponding single-precision multiply-accumulator result, for a total of N multiply-accumulator results; when the high-performance multiply-accumulator performs half-precision floating-point multiply-accumulator operations, each half-precision multiply-accumulator is used to perform multiply-accumulator operations on the half-precision floating-point number to be processed, to obtain the corresponding half-precision multiply-accumulator result, for a total of 2N multiply-accumulator results.

[0067] The two half-precision multiply-accumulators include a first half-precision multiply-accumulator and a second half-precision multiply-accumulator, and the single-precision floating-point numbers to be processed include a first single-precision multiplier, a second single-precision multiplier, and a single-precision addend.

[0068] When the high-performance multiply-accumulator performs single-precision floating-point multiplication and addition operations, the first half-precision multiply-accumulator is specifically used to perform the first part of the multiplication operation, obtain the first multiplication result, and pass the first multiplication result to the second half-precision multiply-accumulator; the second half-precision multiply-accumulator is specifically used to perform the second part of the multiplication operation, obtain the second multiplication result. The first part of the multiplication operation and the second part of the multiplication operation are divided according to preset rules based on the decimal of the first single-precision multiplier and the decimal of the second single-precision multiplier; the second half-precision multiply-accumulator is also used to determine the decimal of the multiplication result based on the first multiplication result and the second multiplication result; and to determine the single-precision multiplication and addition result based on the decimal of the multiplication result, the exponent of the first single-precision multiplier, the exponent of the second single-precision multiplier, the sign of the first single-precision multiplier, the sign of the second single-precision multiplier, the decimal of the single-precision addend, the exponent of the single-precision addend, and the sign of the single-precision addend.

[0069] The second half-precision multiplier-adder includes: an exponent addition module, a decimal addition module, and a determination module. The exponent addition module determines the exponent of the multiplication result based on the exponents of the first and second single-precision multipliers. The decimal addition module determines the sign of the multiplication result based on the signs of the first and second single-precision multipliers. The determination module determines the decimal, sign, and exponent of the multiplication-addition result based on the exponent of the multiplication result, the exponent of the single-precision addend, the sign of the multiplication result, the decimal of the multiplication result, and the decimal of the single-precision addend. Finally, it determines the single-precision multiplication-addition result based on the decimal, sign, and exponent of the multiplication-addition result.

[0070] The determining module includes: a first exponent subtraction operation module, a first shift operation module, a first addition operation module, and a first multiplication-addition result exponent determining module; the first exponent subtraction operation module is used to determine the absolute value of the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend; the first shift operation module is used to perform a shift operation on the decimal of the multiplication result or the decimal of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the absolute value of the exponent difference, to obtain the decimal of the multiplication result and the decimal of the single-precision addend after the shift operation; the first addition operation module is used to determine the decimal of the multiplication-addition result and the sign of the multiplication-addition result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal of the multiplication result after the shift operation, and the decimal of the single-precision addend after the shift operation; the first multiplication-addition result exponent determining module is used to determine the exponent of the multiplication-addition result based on the exponent of the multiplication result and the exponent of the single-precision addend.

[0071] Specifically, the exponent addition module is used for:

[0072] The exponent of the multiplication result is determined using the following formula:

[0073] op01.exp=op0.exp+op1.exp-bias

[0074] Where op01.exp is the exponent of the multiplication result, op0.exp is the exponent of the first single-precision multiplier, op1.exp is the exponent of the second single-precision multiplier, and bias is the exponent bias.

[0075] Specifically, the decimal addition module is used for:

[0076] The sign of the multiplication result is obtained by performing an XOR operation on the signs of the first single-precision multiplier and the second single-precision multiplier.

[0077] Specifically, the first shift operation module is used for:

[0078] Compare the exponent of the multiplication result with the exponent of the single-precision addend; if the exponent of the multiplication result is greater than or equal to the exponent of the single-precision addend, shift the decimal of the single-precision addend to the right by the number of bits corresponding to the absolute value; if the exponent of the multiplication result is less than the exponent of the single-precision addend, shift the decimal of the multiplication result to the right by the number of bits corresponding to the absolute value.

[0079] Specifically, the first addition operation module is used for:

[0080] If the sign of the multiplication result is different from the sign of the single-precision addend, then the decimal of the single-precision addend after the shift operation is inverted and incremented by one to obtain the decimal of the single-precision addend after inversion and increment. Then, the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after inversion and increment are summed, and the sum is used as the decimal of the multiplication-addend result. If the sign of the multiplication result is the same as the sign of the single-precision addend, then the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation are summed, and the sum is used as the decimal of the multiplication-addend result.

[0081] Specifically, the first multiplication-addition result exponent determination module is used for:

[0082] If the exponent of the multiplication result is greater than or equal to the exponent of the single-precision addend, then the exponent of the multiplication result is used as the exponent of the multiplication-addend result; if the exponent of the multiplication result is less than the exponent of the single-precision addend, then the exponent of the single-precision addend is used as the exponent of the multiplication-addend result.

[0083] In one embodiment, the half-precision floating-point number to be processed includes: a first half-precision multiplier, a second half-precision multiplier, and a half-precision addend.

[0084] When a high-performance multiply-accumulate unit performs half-precision floating-point multiplication and addition operations, the half-precision multiply-accumulate unit is specifically used to determine the decimal of the multiplication result based on the decimal of the first half-precision multiplier and the decimal of the second half-precision multiplier; to determine the exponent of the multiplication result based on the exponents of the first and second half-precision multipliers; to determine the sign of the multiplication result based on the sign of the first and second half-precision multipliers; to determine the decimal, sign, and exponent of the multiplication and addition result based on the decimal of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the half-precision addend, the sign of the half-precision addend, and the decimal of the half-precision addend; and to determine the half-precision multiplication and addition result based on the decimal, sign, and exponent of the multiplication and addition result.

[0085] The half-precision multiply-adder includes a second exponent subtraction module, a second shift operation module, a second addition operation module, and a second multiply-add result exponent determination module. The second exponent subtraction module determines the absolute value of the exponent difference based on the exponent of the multiplication result and the exponent of the half-precision addend. The second shift operation module performs a shift operation on the decimal of the multiplication result or the decimal of the half-precision addend based on the exponent of the multiplication result, the exponent of the half-precision addend, and the absolute value of the exponent difference, obtaining the decimal of the multiplication result and the decimal of the half-precision addend after the shift operation. The second addition operation module determines the decimal of the multiply-add result and the sign of the multiply-add result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal of the multiplication result after the shift operation, and the decimal of the half-precision addend after the shift operation. The second multiply-add result exponent determination module determines the exponent of the multiply-add result based on the exponent of the multiplication result and the exponent of the single-precision addend.

[0086] In one embodiment, such as Figure 6 As shown, a multiply-accumulate method is provided, which is applied to Figure 4 The high-performance multiply-accumulator shown includes the following steps in its multiply-accumulate method:

[0087] S602. When the high-performance multiply-accumulator performs single-precision floating-point multiplication and addition operations, the two half-precision multiply-accumulators in each single-precision multiply-accumulator unit are combined to perform multiplication and addition operations on the single-precision floating-point number to be processed, and the corresponding single-precision multiplication and addition results are obtained. A total of N multiplication and addition results are obtained.

[0088] For ease of explanation, each single-precision multiply-accumulate unit can be referred to as the first half-precision multiply-accumulate unit and the second half-precision multiply-accumulate unit. Multiply-accumulate operations, as the name suggests, include both multiplication and addition. Therefore, the single-precision floating-point number to be processed includes two single-precision multipliers and one single-precision addend. For ease of explanation, the two single-precision multipliers will be referred to as the first single-precision multiplier and the second single-precision multiplier.

[0089] The expression for multiplication and addition is:

[0090] dst = op0 * op1 + op2

[0091] Where op0 is the first single-precision multiplier, op1 is the second single-precision multiplier, op2 is the single-precision adder, and dst is the result of multiplication and addition.

[0092] The variables used in the multiplication and addition process are explained below:

[0093] op0.mant: The decimal part of op0. When op0 is a normalized single-precision floating-point number, op0.mant = 1.mantissa; when op0 is a denormalized single-precision floating-point number, op0.mant = 0.mantissa.

[0094] op1.mant: The decimal part of op1. When op1 is a normalized single-precision floating-point number, op1.mant = 1.mantissa; when op1 is a denormalized single-precision floating-point number, op1.mant = 0.mantissa.

[0095] op2.mant: The decimal part of op2. When op2 is a normalized single-precision floating-point number, op2.mant = 1.mantissa; when op2 is a denormalized single-precision floating-point number, op2.mant = 0.mantissa.

[0096] op01.mant: The decimal result of the multiplication operation op0 * op1;

[0097] dst.mant: The decimal of dst;

[0098] op0.exp: the exponent of op0;

[0099] op1.exp: the exponent of op1;

[0100] op2.exp: the exponent of op2;

[0101] op01.exp: The exponent of the result of the multiplication operation op0*op1, op01.exp = op0.exp + op1.exp - bias;

[0102] dst.exp: The exponent of dst;

[0103] op0.S: The symbol for op0;

[0104] op1.S: The symbol for op1;

[0105] op2.S: The symbol for op2;

[0106] op01.S: The sign of the result of the multiplication operation op0*op1.Op01.S is obtained by XORing op0.S and op1.S.

[0107] dst.S: The symbol for dst.

[0108] Optionally, when performing multiplication and addition operations on the single-precision floating-point numbers to be processed, op0.mant and op1.mant can be divided into two parts according to preset rules. For ease of explanation, the two parts of multiplication operations obtained by the division are referred to as the first part of multiplication operation and the second part of multiplication operation.

[0109] For example: because,

[0110] op0.mant[23:0]*op1.mant[23:0]=op0.mant[23:0]*op1.mant[11:0]+op0.mant[23:0]*op1.mant[23:12]

[0111] Therefore, `op0.mant[23:0]*op1.mant[23:0]` can be divided into two multiplication operations: the first multiplication operation is `op0.mant[23:0]*op1.mant[11:0]`, and the second multiplication operation is `op0.mant[23:0]*op1.mant[23:12]`. Alternatively, the first multiplication operation is `op0.mant[23:0]*op1.mant[23:12]`, and the second multiplication operation is `op0.mant[23:0]*op1.mant[11:0]`.

[0112] It should be noted that the above method of dividing multiplication operations is only an example. The embodiments of this application are not limited to this and other methods of division are also possible, such as dividing op0.mant[23:0]*op1.mant[23:0] into op0.mant[23:0]*op1.mant[12:0] and op0.mant[23:0]*op1.mant[23:13], etc.

[0113] Optionally, the first half-precision multiply-accumulator can perform a first part of the multiplication operation to obtain a first multiplication result, and then pass the first multiplication result to the second half-precision multiply-accumulator. The second half-precision multiply-accumulator performs a second part of the multiplication operation to obtain a second multiplication result. The second half-precision multiply-accumulator determines op01.mant based on the first and second multiplication results. Specifically, the second half-precision multiply-accumulator can add the first and second multiplication results to obtain op01.mant. In this embodiment, when performing single-precision floating-point multiplication and addition operations, the multiplication operation is divided into two parts, with each of the two half-precision multiply-accumulators performing one part, and then the parts are added together. This allows two half-precision multiply-accumulators to perform single-precision floating-point multiplication and addition operations, improving the utilization rate of the half-precision multiply-accumulators. At the same time, it reduces hardware overhead because no additional single-precision multiply-accumulator is required.

[0114] Optionally, after the two half-precision multiply-accumulators work together to obtain op01.mant, the second half-precision multiply-accumulator can determine the corresponding single-precision multiply-accumulator result based on op01.mant, op0.exp, op1.exp, op0.S, op1.S, op2.mant, op2.exp, and op2.S. Specifically, the second half-precision multiply-accumulator can determine op01.exp based on op0.exp and op1.exp; it can determine op01.S based on op0.S and op1.S; and it can determine dst.mant, dst.S, and dst.exp based on op01.exp, op2.exp, op01.S, op2.S, op01.mant, and op2.mant. Then, based on dst.mant, dst.S, and dst.exp, it is standardized into a single-precision floating-point data format to obtain the single-precision multiply-accumulator result.

[0115] Optionally, the two operands of the addition operation are op01 and op2. To make the exponents of these two numbers the same, the fractional part needs to be shifted. The second half-precision multiply-accumulator can determine the absolute value of the exponent difference based on op01.exp and op2.exp; and perform a shift operation on op01.mant or op2.mant based on op01.exp, op2.exp, and the absolute value of the exponent difference to obtain the shifted op01.mant and the shifted op2.mant. The second half-precision multiply-accumulator can determine dst.mant and dst.S based on op01.S, op2.S, the shifted op01.mant, and the shifted op2.mant; and determine dst.exp based on op01.exp and op2.exp.

[0116] The structures of the first half-precision multiplier-accumulator and the second half-precision multiplier-accumulator are described below:

[0117] In one possible implementation, the first half-precision multiply-accumulator and the second half-precision multiply-accumulator can be designed as follows: Figure 7 The schematic structure, such as Figure 7As shown, the first half-precision multiply-adder includes: a fractional multiplication module 10, an exponent addition module 11, an exponent subtraction module 12, a shift operation module 13, an addition module 14, a normalization module 15, and a multiplication-addition result exponent determination module 16. Similarly, the second half-precision multiply-adder includes: a fractional multiplication module 20, an exponent addition module 21, an exponent subtraction module 22, a shift operation module 23, an addition module 24, a normalization module 25, and a multiplication-addition result exponent determination module 26. It should be noted that, compared with the first half-precision multiplier-accumulator, the second half-precision multiplier-accumulator also includes a decimal addition module 27. This decimal addition module 27 is connected to the decimal multiplication operation module 10 in the first half-precision multiplier-accumulator. After the decimal multiplication operation module 10 in the first half-precision multiplier-accumulator obtains the multiplication operation result, it transmits the multiplication operation result to the decimal addition module 27. The decimal addition module 27 is used to add the multiplication operation result obtained by the first single-precision multiplier-accumulator and the multiplication operation result obtained by the second single-precision multiplier-accumulator to obtain op01.mant.

[0118] It should be noted that: such as Figure 7 The dashed box in the middle illustrates that when the high-performance multiply-accumulate unit performs single-precision floating-point multiplication and addition operations, only the decimal multiplication module 10 participates in the operation in the first half-precision multiply-accumulate unit, while the other operations are performed in the second half-precision multiply-accumulate unit.

[0119] The following is combined Figure 7 The structure shown explains the process of single-precision floating-point multiplication and addition operations in detail. (See also...) Figure 8 As shown, the process specifically includes:

[0120] S801, the decimal multiplication module 10 performs the first part of the multiplication operation, obtains the first multiplication result, and passes the first multiplication result to the decimal addition module 27. The decimal multiplication module 20 performs the second part of the multiplication operation, obtains the second multiplication result, and passes the second multiplication result to the decimal addition module 27. The decimal addition module 27 adds the first multiplication result and the second multiplication result to obtain op01.mant.

[0121] Specifically, the division method of multiplication operations is described above, and will not be repeated here in the embodiments of this application.

[0122] S802, the exponent addition module 21 calculates op01.exp using the following formula:

[0123] op01.exp=op0.exp+op1.exp-bias

[0124] Where, bias is the bias of a Normal single-precision floating-point number, i.e., bias = 0x7F.

[0125] S803. The decimal addition module 27 performs an exclusive OR operation on op0.S and op1.S to obtain op01.S.

[0126] Optionally, op0.S and op1.S can be input into the decimal addition module 27, enabling the decimal addition module 27 to perform an exclusive OR operation.

[0127] S804. The exponent subtraction operation module 22 calculates the absolute value of the exponent difference between op01.exp and op2.exp.

[0128] Optionally, after the exponent subtraction operation module 22 calculates the absolute value of the exponent difference, it can pass op01.exp, op2.exp, and this absolute value to the shift operation module 23.

[0129] S805. The shift operation module 23 compares op01.exp and op2.exp and performs a shift operation according to the comparison result.

[0130] Specifically, if op01.exp is greater than or equal to op2.exp, then shift op2.mant to the right by the number of bits corresponding to the above absolute value; if op01.exp is less than op2.exp, then shift op01.mant to the right by the number of bits corresponding to the above absolute value to obtain the shifted op01.mant and op2.mant.

[0131] Specifically, if op01.exp >= op2.exp, then shift op2.mant to the right by |op01.exp - op2.exp|;

[0132] If op01.exp < op2.exp, then shift op01.mant to the right by |op01.exp - op2.exp|.

[0133] Optionally, two selectors a and b can be set between the decimal addition module 27 and the shift operation module 23. If the shift operation module 23 determines that op01.exp >= op2.exp, it selects op2.mant from selector b for the shift operation, and at this time selector a passes op01.mant to the addition operation module 24; if the shift operation module 23 determines that op01.exp < op2.exp, it selects op01.mant from selector b for the shift operation, and at this time selector a passes op2.mant to the addition operation module 24.

[0134] S806. The addition operation module 24 compares op01.S and op2.S and performs a summation operation according to the comparison result.

[0135] If op01.S and op2.S are different, then take the one's complement of and add 1 to op2.mant after the shift operation of S805 to obtain the one's complement plus one of op2.mant; and sum the one's complement plus one of op2.mant and op01.mant after the shift operation of S806, and use the sum result as dst.mant. Moreover, set dst.S equal to op01.S;

[0136] If op01.S and op2.S are the same, then directly sum op2.mant and op01.mant after the shift operation of S805, and use the sum result as dst.mant. Moreover, set dst.S equal to op01.S.

[0137] Optionally, the fractional addition module 27 can pass op01.S to the addition operation module 24 through the shift operation module 23, and input op2.S to the addition operation module 24, so that the addition operation module 24 can determine whether op01.S and op2.S are the same. Alternatively, directly input op0.S, op1.S, and op2.S into the addition operation module 24, so that the addition operation module 24 performs an exclusive OR operation to obtain op01.S, and makes the above judgment based on op01.S and op2.S.

[0138] S807, the multiply-add result exponent determination module 26 determines dst.exp according to op01.exp and op2.exp.

[0139] Specifically, if op01.exp >= op2.exp, then dst.exp = op01.exp;

[0140] If op01.exp < op2.exp, then dst.exp = op02.exp.

[0141] Optionally, after obtaining dst.exp, it can be normalized to obtain the 8-bit binary exponent of the normalized single-precision floating point number.

[0142] S808, the normalization module 25 normalizes the dst.mant obtained by S806 to obtain the 23-bit binary mantissa of the normalized single-precision floating point number.

[0143] Optionally, the addition operation module 24 can pass dst.S to the normalization module 25. In this case, in addition to outputting the 23-bit binary mantissa, the normalization module 25 also outputs the sign bit. The sign bit, the 8-bit binary exponent obtained by S807, and the 23-bit binary mantissa obtained by S808 constitute the single-precision multiply-add result.

[0144] The above multiply-accumulate method divides the multiplication operation into two parts, with each of the two half-precision multiply-accumulate units executing one part. This allows the two half-precision multiply-accumulate units to combine and complete the multiplication-accumulation operation of single-precision floating-point numbers, improving the utilization rate of the half-precision multiply-accumulate units. Moreover, it eliminates the need for additional single-precision multiply-accumulate units, thus reducing hardware overhead.

[0145] S604. When the high-performance multiply-accumulator performs half-precision floating-point multiplication and addition operations, each half-precision multiply-accumulator performs multiplication and addition operations on the half-precision floating-point number to be processed, and obtains the corresponding half-precision multiplication and addition result, resulting in a total of 2N multiplication and addition results.

[0146] The half-precision floating-point number to be processed includes two half-precision multipliers and one half-precision addend. For ease of explanation, the two half-precision multipliers are referred to as the first half-precision multiplier and the second half-precision multiplier, respectively.

[0147] The expression for multiplication and addition is:

[0148] dst = op0 * op1 + op2

[0149] Where op0 is the first half-precision multiplier, op1 is the second half-precision multiplier, op2 is the half-precision adder, and dst is the result of the multiplication and addition.

[0150] It should be noted that, unlike the single-precision floating-point multiplication and addition process, since a single half-precision multiplier-adder supports half-precision floating-point multiplication and addition operations, there is no need to divide the multiplication operation.

[0151] Optionally, the half-precision multiply-accumulator can determine op01.mant based on op1.mant and op2.mant; determine op01.exp based on op0.exp and op1.exp; determine op01.S based on op0.S and op1.S; and determine dst.mant, dst.exp, and dst.S based on op01.mant, op01.exp, op01.S, op2.mant, op2.exp, and op2.S. Then, based on dst.mant, dst.exp, and dst.S, they are normalized to a half-precision floating-point data format to obtain the half-precision multiply-accumulator result.

[0152] Similarly, in addition, the two operands are op01 and op2. To ensure that the exponents of these two numbers are the same, the fractional part needs to be shifted. The half-precision multiply-accumulator can determine the absolute value of the exponent difference based on op01.exp and op2.exp; based on op01.exp, op2.exp and the absolute value of the exponent difference, it can perform a shift operation on either op01.mant or op2.mant to obtain the shifted op01.mant and the shifted op2.mant; based on op01.S, op2.S, the shifted op01.mant and the shifted op2.mant, it can determine dst.mant and dst.S; based on op01.exp and op2.exp, it can determine dst.exp.

[0153] The following is combined Figure 9 The structure shown details the process of half-precision floating-point multiplication and addition operations, using the second half-precision multiplier-accumulator as an example. (See [link to documentation]). Figure 10 As shown, the process specifically includes:

[0154] S1001, Decimal Multiplication Module 20 calculates the product of op0.mant and op1.mant.

[0155] Specifically, op1.mant and op2.mant are both 11-bit binary data, and the calculated op01.mant is 22-bit binary data. Since the fractional multiplication module 10 and the fractional addition module 27 are connected, and each half-precision multiplier-adder is performing half-precision floating-point multiplication and addition operations, that is, the first half-precision multiplier-adder is also performing half-precision floating-point multiplication and addition operations, in order to avoid the influence of the data transmitted from the fractional multiplication module 10, the fractional addition module 27 can set the data transmitted from the fractional multiplication module 10 to zero. In this way, the output result of the fractional addition module 27 is the calculation result of the fractional multiplication module 20.

[0156] S1002, Exponent addition module 21 calculates op01.exp.

[0157] S1003, Decimal addition module 27 performs an XOR operation on op0.S and op1.S to obtain op01.S.

[0158] S1004, Exponent Subtraction Module 22 calculates the absolute value of the exponent difference between op01.exp and op2.exp.

[0159] S1005, the shift operation module 23 compares op01.exp and op2.exp, and performs a shift operation based on the comparison result.

[0160] S1006, the addition module 24 compares op01.S and op2.S, and performs a summation operation based on the comparison result. This yields dst.mant.

[0161] S1007, The exponent determination module 26 of the multiplication and addition result determines dst.exp based on op01.exp and op2.exp.

[0162] Once you have dst.exp, you can normalize it to get the 5-bit binary exponent of the normalized single-precision floating-point number.

[0163] S1008 and standardization module 25 standardize the dst.mant obtained from S1006 to obtain the 10-bit binary mantissa of the standardized single-precision floating-point number.

[0164] The implementation process of S1001-S1008 is similar to that of S801-S808, and will not be described again in this embodiment. The sign bit, the 5-bit binary exponent obtained in S1007, and the 10-bit binary mantissa obtained in S1008 constitute the half-precision multiplication and addition result.

[0165] In the multiply-accumulate method of this application embodiment, when the high-performance multiply-accumulate unit performs single-precision floating-point multiply-accumulate operations, the two half-precision multiply-accumulate units in each single-precision multiply-accumulate unit combine to perform multiply-accumulate operations on the single-precision floating-point number to be processed, obtaining the corresponding single-precision multiply-accumulate result, for a total of N multiply-accumulate results. When the high-performance multiply-accumulate unit performs half-precision floating-point multiply-accumulate operations, each half-precision multiply-accumulate unit performs multiply-accumulate operations on the half-precision floating-point number to be processed, obtaining the corresponding half-precision multiply-accumulate result, for a total of 2N multiply-accumulate results. The solution of this application embodiment, when performing single-precision floating-point multiply-accumulate operations, also involves the half-precision multiply-accumulate units in the operation, preventing them from being idle and improving the utilization rate of the half-precision multiply-accumulate units. Moreover, it is compatible with... Figure 3 Compared to the design scheme shown, the scheme in this application embodiment saves n single-precision multiply-accumulators, reducing hardware overhead.

[0166] Below, on Figure 5 The asymmetric multiply-accumulator shown is described in detail.

[0167] In one embodiment, the asymmetric multiply-accumulator includes N multiply-accumulator units, each of which includes a single-precision multiply-accumulator and a half-precision multiply-accumulator. When the asymmetric multiply-accumulator performs a half-precision floating-point multiply-accumulator operation, the single-precision multiply-accumulator and the half-precision multiply-accumulator each perform multiply-accumulator operations on the half-precision floating-point number to be processed, obtaining the corresponding half-precision multiply-accumulator result, resulting in a total of 2N half-precision multiply-accumulator results. When the asymmetric multiply-accumulator performs a single-precision floating-point multiply-accumulator operation, the single-precision multiply-accumulator performs multiply-accumulator operations on the single-precision floating-point number to be processed, obtaining the corresponding single-precision multiply-accumulator result, resulting in a total of N single-precision multiply-accumulator results.

[0168] The half-precision floating-point numbers to be processed include: a first half-precision multiplier, a second half-precision multiplier, and a half-precision addend. The single-precision multiply-adder includes: a first conversion unit, a determining module, and a second conversion unit. The first conversion unit is used to convert the first half-precision multiplier, the second half-precision multiplier, and the half-precision addend into single precision, obtaining a first single-precision multiplier, a second single-precision multiplier, and a single-precision addend. The determining module is used to determine the single-precision multiplication-addition result based on the decimal number of the first single-precision multiplier, the exponent of the first single-precision multiplier, the sign of the first single-precision multiplier, the decimal number of the second single-precision multiplier, the exponent of the second single-precision multiplier, the sign of the second single-precision multiplier, the decimal number of the single-precision addend, the exponent of the single-precision addend, and the sign of the single-precision addend. The second conversion unit is used to convert the single-precision multiplication-addition result to obtain a half-precision multiplication-addition result.

[0169] The determining module includes: a decimal multiplication module, an exponent addition module, an addition module, and a determining unit. The decimal multiplication module determines the decimal of the multiplication result based on the decimals of the first and second single-precision multipliers. The exponent addition module determines the exponent of the multiplication result based on the exponents of the first and second single-precision multipliers. The addition module determines the sign of the multiplication result based on the signs of the first and second single-precision multipliers. The determining unit determines the decimal, sign, and exponent of the multiplication-addition result based on the decimal of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal of the single-precision addend. It also determines the single-precision multiplication-addition result based on the decimal, sign, and exponent of the multiplication-addition result.

[0170] The determining unit includes: a first exponent subtraction operation module, a first shift operation module, a first addition operation module, and a first multiplication-addition result exponent determination module; the first exponent subtraction operation module is used to determine the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend; the first shift operation module is used to perform a shift operation on the decimal of the multiplication result or the decimal of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the exponent difference, to obtain the decimal of the multiplication result and the decimal of the single-precision addend after the shift operation; the first addition operation module is used to determine the decimal of the multiplication-addition result and the sign of the multiplication-addition result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal of the multiplication result after the shift operation, and the decimal of the single-precision addend after the shift operation; the first multiplication-addition result exponent determination module is used to determine the exponent of the multiplication-addition result based on the exponent of the multiplication result and the exponent of the single-precision addend.

[0171] Specifically, the exponent addition module is used for:

[0172] The exponent of the multiplication result is determined using the following formula:

[0173] op01.exp=op0.exp+op1.exp-bias

[0174] Where op01.exp is the exponent of the multiplication result, op0.exp is the exponent of the first single-precision multiplier, op1.exp is the exponent of the second single-precision multiplier, and bias is the exponent bias.

[0175] Specifically, the addition module is used for:

[0176] The sign of the multiplication result is obtained by performing an XOR operation on the signs of the first single-precision multiplier and the second single-precision multiplier.

[0177] Specifically, the first shift operation module is used for:

[0178] Compare the exponent of the multiplication result with the exponent of the single-precision addend; if the exponent of the multiplication result is greater than or equal to the exponent of the single-precision addend, shift the decimal of the single-precision addend to the right by the number of bits corresponding to the exponent difference; if the exponent of the multiplication result is less than the exponent of the single-precision addend, shift the decimal of the multiplication result to the right by the number of bits corresponding to the exponent difference.

[0179] Specifically, the first addition module is used for: if the sign of the multiplication result is different from the sign of the single-precision addend, then inverting and adding one to the decimal of the single-precision addend after the shift operation, and summing the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation, and using the sum as the decimal of the multiplication-addition result; if the sign of the multiplication result is the same as the sign of the single-precision addend, then summing the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation, and using the sum as the decimal of the multiplication-addition result.

[0180] Specifically, the first multiplication-addition result exponent determination module is used for:

[0181] If the exponent of the multiplication result is greater than or equal to the exponent of the single-precision addend, then the exponent of the multiplication result is used as the exponent of the multiplication-addend result; if the exponent of the multiplication result is less than the exponent of the single-precision addend, then the exponent of the single-precision addend is used as the exponent of the multiplication-addend result.

[0182] In one embodiment, the single-precision floating-point number to be processed includes: a first single-precision multiplier, a second single-precision multiplier, and a single-precision addend; the single-precision multiply-adder is specifically used to determine the decimal of the multiplication result based on the decimal of the first single-precision multiplier and the decimal of the second single-precision multiplier; determine the exponent of the multiplication result based on the exponent of the first single-precision multiplier and the exponent of the second single-precision multiplier; determine the sign of the multiplication result based on the sign of the first single-precision multiplier and the sign of the second single-precision multiplier; determine the decimal, sign, and exponent of the multiply-add result based on the decimal of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal of the single-precision addend; and determine the single-precision multiply-add result based on the decimal, sign, and exponent of the multiply-add result.

[0183] The single-precision multiply-adder includes a second exponent subtraction module, a second shift operation module, a second addition operation module, and a second multiply-add result exponent determination module. The second exponent subtraction module determines the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend. The second shift operation module performs a shift operation on the decimal portion of the multiplication result or the decimal portion of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the exponent difference, obtaining the decimal portion of the multiplication result and the decimal portion of the single-precision addend after the shift operation. The second addition operation module determines the decimal portion and sign of the multiply-add result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal portion of the multiplication result after the shift operation, and the decimal portion of the single-precision addend after the shift operation. The second multiply-add result exponent determination module determines the exponent of the multiply-add result based on the exponent of the multiplication result and the exponent of the single-precision addend.

[0184] In one embodiment, such as Figure 11 As shown, a multiply-accumulate method is provided, which is applied to Figure 5 The asymmetric multiply-accumulator shown includes the following steps:

[0185] S1102. When the asymmetric multiply-accumulate unit performs half-precision floating-point multiplication and addition operations, the single-precision multiply-accumulate unit and the half-precision multiply-accumulate unit each perform multiplication and addition operations on the half-precision floating-point number to be processed, and obtain the corresponding half-precision multiplication and addition results, resulting in a total of 2N half-precision multiplication and addition results.

[0186] It should be noted that the process of a half-precision multiply-accumulate unit performing half-precision floating-point multiplication and addition operations can be found in existing technologies, and will not be repeated here in the embodiments of this application. The following focuses on the process of a single-precision multiply-accumulate unit performing half-precision floating-point multiplication and addition operations.

[0187] The half-precision floating-point number to be processed includes two half-precision multipliers and one half-precision addend. For ease of explanation, the two half-precision multipliers are referred to as the first half-precision multiplier and the second half-precision multiplier, respectively.

[0188] Optionally, the single-precision multiplier-adder can convert the first half-precision multiplier, the second half-precision multiplier, and the half-precision addend into single precision to obtain the first single-precision multiplier, the second single-precision multiplier, and the single-precision addend, and then perform multiplication and addition operations on the first single-precision multiplier, the second single-precision multiplier, and the single-precision addend.

[0189] The expression for multiplication and addition is:

[0190] dst = op0 * op1 + op2

[0191] Where op0 is the first single-precision multiplier after conversion, op1 is the second single-precision multiplier after conversion, op2 is the single-precision addend after conversion, and dst is the single-precision multiplication and addition result.

[0192] Optionally, after the above conversion, the single-precision multiply-accumulate unit can determine the single-precision multiply-accumulate result based on op0.mant, op1.mant, op2.mant, op0.exp, op1.exp, op2.exp, op0.S, op1.S, and op2.S; and convert the single-precision multiply-accumulate result to obtain the half-precision multiply-accumulate result. In this way, the single-precision multiply-accumulate unit can also perform half-precision floating-point multiply-accumulate operations, improving the utilization rate of the single-precision multiply-accumulate unit. The solution of this embodiment can reduce the number of half-precision multiply-accumulate units by n, thus reducing hardware overhead.

[0193] Optionally, the process of converting a half-precision floating-point number to a single-precision floating-point number can be found in the prior art, and will not be described in detail in the embodiments of this application.

[0194] Optionally, the single-precision multiply-accumulator can determine op01.mant based on op0.mant and op1.mant; determine op01.exp based on op0.exp and op2.exp; determine op01.S based on op0.S and op1.S; determine dst.mant, dst.S, and dst.exp based on op01.mant, op01.exp, op01.S, op2.exp, op2.S, and op2.mant; and normalize dst.mant, dst.S, and dst.exp to a single-precision floating-point data format to obtain the single-precision multiply-accumulator result.

[0195] Similarly, in addition, the two operands are op01 and op2. To ensure that the exponents of these two numbers are the same, the fractional part needs to be shifted. The half-precision multiply-accumulator can determine the absolute value of the exponent difference based on op01.exp and op2.exp; based on op01.exp, op2.exp and the absolute value of the exponent difference, it can perform a shift operation on either op01.mant or op2.mant to obtain the shifted op01.mant and the shifted op2.mant; based on op01.S, op2.S, the shifted op01.mant and the shifted op2.mant, it can determine dst.mant and dst.S; based on op01.exp and op2.exp, it can determine dst.exp.

[0196] The structure of single-precision multiplier-accumulator and half-precision multiplier-accumulator is explained below:

[0197] In one possible implementation, the single-precision multiply-accumulator and the half-precision multiply-accumulator can be designed as follows: Figure 12 The schematic structure, such as Figure 12 As shown, the half-precision multiplier-adder includes: a fractional multiplication module 30, an exponent addition module 31, an exponent subtraction module 32, a shift operation module 33, an addition module 34, a normalization module 35, and a multiplication-addition result exponent determination module 36. The single-precision multiplier-adder includes: a fractional multiplication module 40, an exponent addition module 41, an exponent subtraction module 42, a shift operation module 43, an addition module 44, a normalization module 45, and a multiplication-addition result exponent determination module 46. It should be noted that, compared to the half-precision multiplier-adder, the single-precision multiplier-adder also includes: a first conversion unit 47 and a second conversion unit 48. When the single-precision multiply-adder performs a multiplication-addition operation on a half-precision floating-point number, it first converts the first half-precision multiplier, the second half-precision multiplier, and the half-precision addend into single precision through the first conversion unit 47 to obtain op0, op1, and op2. Then, it calculates dst = op0 * op1 + op2 to obtain the single-precision multiplication-addition result. Finally, it converts the single-precision multiplication-addition result to obtain the half-precision multiplication-addition result.

[0198] The following is combined Figure 12 The structure shown details the process by which a single-precision multiply-accumulate unit performs half-precision floating-point multiplication and addition operations. (See also...) Figure 13 As shown, the process specifically includes:

[0199] S1301, the first conversion unit 47 converts the first half-precision multiplier, the second half-precision multiplier, and the half-precision addend into single precision, to obtain op0, op1, and op2.

[0200] Optionally, the process of converting half-precision floating-point numbers to single-precision floating-point numbers can be found in the prior art, and will not be described again in this embodiment. After the first conversion unit 47 converts op0, op1, and op2, it passes op0.mant and op1.mant to the decimal multiplication operation module 40.

[0201] S1302, Decimal multiplication module 40 calculates the product of op0.mant and op1.mant, op01.mant.

[0202] Specifically, op0.mant and op1.mant are both 24-bit binary data, and the calculated op01.mant is 48-bit binary data.

[0203] S1303, Exponent Addition Module 41 calculates op01.exp.

[0204] S1304, the addition module 44 performs an XOR operation on op0.S and op1.S to obtain op01.S.

[0205] Optionally, op0.S, op1.S and op2.S can be input into the addition module 44, so that the addition module 44 can perform an XOR operation to obtain op01.S.

[0206] S1305, the exponent subtraction operation module 42 calculates the absolute value of the exponent difference between op01.exp and op2.exp.

[0207] S1306, the shift operation module 43 compares op01.exp and op2.exp, and performs a shift operation based on the comparison result.

[0208] S1307, the addition module 44 compares op01.S and op2.S, performs a summation operation based on the comparison result, and obtains dst.mant.

[0209] S1308, The exponent determination module 26 of the multiplication and addition result determines dst.exp based on op01.exp and op2.exp.

[0210] Once you have dst.exp, you can normalize it to get the 8-bit binary exponent of the normalized single-precision floating-point number.

[0211] S1309 and standardization module 45 standardize the dst.mant obtained from S1307 to obtain the 23-bit binary mantissa of the standardized single-precision floating-point number.

[0212] S1310, the second conversion unit converts the 48-bit binary mantissa to a 10-bit binary mantissa and the 8-bit binary exponent to a 5-bit binary exponent.

[0213] Optionally, the addition module 44 can pass dst.S to the normalization module 45. In this case, the normalization module 45 outputs not only the 23-bit binary mantissa but also the sign bit. The sign bit, the 10-bit binary mantissa obtained by S1310, and the 5-bit binary exponent obtained by S1310 constitute the half-precision multiplication-addition result.

[0214] The above multiply-accumulate method converts half-precision floating-point numbers into single-precision numbers. In this way, single-precision multiply-accumulate units can also perform multiply-accumulate operations on half-precision floating-point numbers, improving the utilization rate of single-precision multiply-accumulate units. The solution in this application embodiment can reduce the number of half-precision multiply-accumulate units by n, thus reducing hardware overhead.

[0215] It should be noted that: Figure 12 The process of a medium-precision half-precision multiply-accumulator performing half-precision floating-point arithmetic, and Figure 13 Compared to the process shown, since no conversion is required, S1201 and S1210 are omitted. The other processes are similar, and will not be described again in this embodiment.

[0216] S1104. When the asymmetric multiply-accumulator performs single-precision floating-point multiplication and addition operations, each single-precision multiply-accumulator performs multiplication and addition operations on the single-precision floating-point number to be processed, and obtains the corresponding single-precision multiplication and addition result, resulting in a total of N single-precision multiplication and addition results.

[0217] The single-precision floating-point number to be processed includes two single-precision multipliers and one single-precision addend. For ease of explanation, the two single-precision multipliers are referred to as the first single-precision multiplier and the second single-precision multiplier, respectively.

[0218] The expression for multiplication and addition is:

[0219] dst = op0 * op1 + op2

[0220] Where op0 is the first single-precision multiplier, op1 is the second single-precision multiplier, op2 is the single-precision adder, and dst is the result of multiplication and addition.

[0221] It should be noted that, unlike the half-precision floating-point multiplication and addition process, since the single-precision multiplier-accumulator supports single-precision floating-point multiplication and addition operations, no conversion is required when the single-precision multiplier-accumulator performs single-precision floating-point multiplication and addition operations.

[0222] Optionally, the single-precision multiply-accumulator can determine op01.mant based on op1.mant and op2.mant; determine op01.exp based on op0.exp and op1.exp; determine op01.S based on op0.S and op1.S; and determine dst.mant, dst.exp, and dst.S based on op01.mant, op01.exp, op01.S, op2.mant, op2.exp, and op2.S. Then, based on dst.mant, dst.exp, and dst.S, they are normalized to a single-precision floating-point data format to obtain the single-precision multiply-accumulator result.

[0223] Similarly, in addition, the two operands are op01 and op2. To ensure that the exponents of these two numbers are the same, the fractional part needs to be shifted. The single-precision multiply-accumulator can determine the absolute value of the exponent difference based on op01.exp and op2.exp; based on op01.exp, op2.exp and the absolute value of the exponent difference, it can perform a shift operation on either op01.mant or op2.mant to obtain the shifted op01.mant and the shifted op2.mant; based on op01.S, op2.S, the shifted op01.mant and the shifted op2.mant, it can determine dst.mant and dst.S; based on op01.exp and op2.exp, it can determine dst.exp.

[0224] The following is combined Figure 14 The structure shown details the process by which a single-precision multiply-accumulate unit performs single-precision floating-point multiplication and addition operations. (See also...) Figure 15 As shown, the process specifically includes:

[0225] S1501, Decimal Multiplication Module 40 calculates the product of op0.mant and op1.mant.

[0226] Specifically, since no conversion is required when performing single-precision floating-point multiplication and addition operations, the first conversion unit 47 and the second conversion unit 48 are in an invalid state at this time, only transmitting the specific function. op1.mant and op2.mant are both 24-bit binary data, and the calculated op01.mant is 48-bit binary data.

[0227] S1502, Exponent Addition Module 41 calculates op01.exp.

[0228] S1503, the addition module 44 performs an XOR operation on op0.S and op1.S to obtain op01.S.

[0229] S1504, the exponent subtraction operation module 42 calculates the absolute value of the exponent difference between op01.exp and op2.exp.

[0230] S1505, the shift operation module 43 compares op01.exp and op2.exp, and performs a shift operation based on the comparison result.

[0231] S1506, the addition module 44 compares op01.S and op2.S, and performs a summation operation based on the comparison result. This yields dst.mant.

[0232] S1507, The exponent determination module 46 of the multiplication and addition result determines dst.exp based on op01.exp and op2.exp.

[0233] Once you have dst.exp, you can normalize it to get the 8-bit binary exponent of the normalized single-precision floating-point number.

[0234] S1508 and standardization module 25 standardize the dst.mant obtained from S1506 to obtain the 23-bit binary mantissa of the standardized single-precision floating-point number.

[0235] The implementation process of S1501-S1508 is similar to that of S1302-S1309, and will not be described again in this embodiment. The sign bit, the 8-bit binary exponent obtained in S1507, and the 23-bit binary mantissa obtained in S1508 constitute the single-precision multiplication and addition result.

[0236] In the multiplication-addition method of this application embodiment, when the asymmetric multiply-adder performs half-precision floating-point multiplication-addition operations, each single-precision multiply-adder and each half-precision multiply-adder performs multiplication-addition operations on the half-precision floating-point number to be processed, obtaining the corresponding half-precision multiplication-addition result, for a total of 2N half-precision multiplication-addition results; when the asymmetric multiply-adder performs single-precision floating-point multiplication-addition operations, each single-precision multiply-adder performs multiplication-addition operations on the single-precision floating-point number to be processed, obtaining the corresponding single-precision multiplication-addition result, for a total of N single-precision multiplication-addition results. The solution of this application embodiment, when performing half-precision floating-point multiplication-addition operations, also ensures that the single-precision multiply-adders participate in the operation, without being idle, thus improving the utilization rate of the single-precision multiply-adders. Moreover, and... Figure 3 Compared to the design scheme shown, the scheme in this application embodiment saves n half-precision multiply-accumulators, reducing hardware overhead.

[0237] It should be understood that although the steps in the flowcharts of the embodiments described above are shown sequentially according to the arrows, these steps are not necessarily executed in the order indicated by the arrows. Unless explicitly stated herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least some steps in the flowcharts of the embodiments described above may include multiple steps or multiple stages. These steps or stages are not necessarily completed at the same time, but can be executed at different times. The execution order of these steps or stages is not necessarily sequential, but can be performed alternately or in turn with other steps or at least a portion of steps or stages in other steps. The steps executed by each module in the above device embodiments can be found in the description of the method embodiments.

[0238] Each module in the aforementioned multiply-accumulate device can be implemented entirely or partially through software, hardware, or a combination thereof. These modules can be embedded in or independent of the processor in a computer device, or stored in the memory of a computer device as software, so that the processor can call and execute the operations corresponding to each module.

[0239] In one embodiment, a computer device is also provided, including a memory and a processor, wherein the memory stores a computer program, and the processor executes the computer program to implement the steps in the above method embodiments.

[0240] The technical features of the above embodiments can be combined in any way. For the sake of brevity, not all possible combinations of the technical features in the above embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0241] The above embodiments are merely illustrative of several implementation methods of this application, and their descriptions are relatively specific and detailed. However, they should not be construed as limiting the scope of this application. It should be noted that those skilled in the art can make various modifications and improvements without departing from the concept of this application, and these all fall within the protection scope of this application. Therefore, the protection scope of this application should be determined by the appended claims.

Claims

1. An asymmetric multiply-accumulator, characterized in that, The asymmetric multiply-accumulator includes: N multiply-accumulator units, each multiply-accumulator unit including: a single-precision multiply-accumulator and a half-precision multiply-accumulator; When the asymmetric multiply-accumulator performs half-precision floating-point multiply-accumulator operations, the single-precision multiply-accumulator and the half-precision multiply-accumulator each perform multiply-accumulator operations on the half-precision floating-point numbers to be processed, and obtain the corresponding half-precision multiply-accumulator results, resulting in a total of 2N half-precision multiply-accumulator results. When the asymmetric multiply-accumulator performs single-precision floating-point multiply-accumulator operations, the single-precision multiply-accumulator performs multiply-accumulator operations on the single-precision floating-point number to be processed, and obtains the corresponding single-precision multiply-accumulator results, resulting in a total of N single-precision multiply-accumulator results. The half-precision floating-point number to be processed includes: a first half-precision multiplier, a second half-precision multiplier, and a half-precision adder; the single-precision multiply-adder includes: a first conversion unit, a determination module, and a second conversion unit. The first conversion unit is used to convert the first half-precision multiplier, the second half-precision multiplier, and the half-precision addend into single precision, to obtain the first single-precision multiplier, the second single-precision multiplier, and the single-precision addend; The determining module is used to determine the single-precision multiplication-addition result based on the decimal of the first single-precision multiplier, the exponent of the first single-precision multiplier, the sign of the first single-precision multiplier, the decimal of the second single-precision multiplier, the exponent of the second single-precision multiplier, the sign of the second single-precision multiplier, the decimal of the single-precision addend, the exponent of the single-precision addend, and the sign of the single-precision addend. The second conversion unit is used to convert the single-precision multiply-accumulate result to obtain the half-precision multiply-accumulate result.

2. The asymmetric multiply-accumulator according to claim 1, characterized in that, The determining module includes: a decimal multiplication operation module, an exponent addition operation module, an addition operation module, and a determining unit; The decimal multiplication module is used to determine the decimal of the multiplication result based on the decimal of the first single-precision multiplier and the decimal of the second single-precision multiplier. The exponent addition module is used to determine the exponent of the multiplication result based on the exponent of the first single-precision multiplier and the exponent of the second single-precision multiplier. The addition module is used to determine the sign of the multiplication result based on the sign of the first single-precision multiplier and the sign of the second single-precision multiplier. The determining unit is used to determine the decimal, sign, and exponent of the multiplication-addition result based on the decimal of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal of the single-precision addend; and to determine the single-precision multiplication-addition result based on the decimal, sign, and exponent of the multiplication-addition result.

3. The asymmetric multiply-accumulator according to claim 2, characterized in that, The determining unit includes: a first exponent subtraction operation module, a first shift operation module, a first addition operation module, and a first multiplication-addition result exponent determining module; The first exponent subtraction operation module is used to determine the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend; The first shift operation module is used to perform a shift operation on the decimal of the multiplication result or the decimal of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the exponent difference, so as to obtain the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation. The first addition module is used to determine the decimal part of the multiplication-addition result and the sign of the multiplication-addition result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal part of the multiplication result after the shift operation, and the decimal part of the single-precision addend after the shift operation. The first multiplication-addition result exponent determination module is used to determine the exponent of the multiplication-addition result based on the exponent of the multiplication result and the exponent of the single-precision addend.

4. The asymmetric multiply-accumulator according to claim 2, characterized in that, The exponent addition module is specifically used to determine the exponent of the multiplication result using the following formula: ; in, The exponent of the multiplication result. The exponent of the first single-precision multiplier. For the exponent of the second single-precision multiplier, This represents the exponent bias.

5. The asymmetric multiply-accumulator according to claim 2, characterized in that, The addition module is specifically used for: The sign of the multiplication result is obtained by performing an XOR operation on the sign of the first single-precision multiplier and the sign of the second single-precision multiplier.

6. The asymmetric multiply-accumulator according to claim 3, characterized in that, The first shift operation module is specifically used for: Compare the exponent of the multiplication result with the exponent of the single-precision addend; If the exponent of the multiplication result is greater than or equal to the exponent of the single-precision addend, then the decimal part of the single-precision addend is shifted to the right by the number of bits corresponding to the exponent difference. If the exponent of the multiplication result is less than the exponent of the single-precision addend, then the decimal part of the multiplication result is shifted to the right by the number of bits corresponding to the exponent difference.

7. The asymmetric multiply-accumulator according to claim 3, characterized in that, The first addition module is specifically used for: If the sign of the multiplication result is different from the sign of the single-precision addend, then the decimal of the single-precision addend after the shift operation is inverted and incremented by one to obtain the decimal of the single-precision addend after inversion and increment; and the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after inversion and increment are summed, and the summation result is used as the decimal of the multiplication-addition result. If the sign of the multiplication result is the same as the sign of the single-precision addend, then the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation are summed, and the sum is used as the decimal of the multiplication-addition result.

8. The asymmetric multiply-accumulator according to claim 3, characterized in that, The first multiplication-addition result exponent determination module is specifically used for: If the exponent of the multiplication result is greater than or equal to the exponent of the single-precision addend, then the exponent of the multiplication result is used as the exponent of the multiplication-addition result. If the exponent of the multiplication result is less than the exponent of the single-precision addend, then the exponent of the single-precision addend is used as the exponent of the multiplication-addition result.

9. The asymmetric multiply-accumulator according to claim 1, characterized in that, The single-precision floating-point number to be processed includes: a first single-precision multiplier, a second single-precision multiplier, and a single-precision addend; The single-precision multiply-adder is specifically used to: determine the decimal of the multiplication result based on the decimal of the first single-precision multiplier and the decimal of the second single-precision multiplier; determine the exponent of the multiplication result based on the exponent of the first single-precision multiplier and the exponent of the second single-precision multiplier; determine the sign of the multiplication result based on the sign of the first single-precision multiplier and the sign of the second single-precision multiplier; determine the decimal, sign, and exponent of the multiplication-addition result based on the decimal of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal of the single-precision addend; and determine the single-precision multiplication-addition result based on the decimal of the multiplication-addition result, the sign of the multiplication-addition result, and the exponent of the multiplication-addition result.

10. The asymmetric multiply-accumulator according to claim 9, characterized in that, The single-precision multiply-adder includes a second exponent subtraction operation module, a second shift operation module, a second addition operation module, and a second multiply-add result exponent determination module: The second exponent subtraction module is used to determine the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend. The second shift operation module is used to perform a shift operation on the decimal of the multiplication result or the decimal of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the exponent difference, so as to obtain the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation. The second addition module is used to determine the decimal part of the multiplication-addition result and the sign of the multiplication-addition result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal part of the multiplication result after the shift operation, and the decimal part of the single-precision addend after the shift operation. The second multiplication-addition result exponent determination module is used to determine the exponent of the multiplication-addition result based on the exponent of the multiplication result and the exponent of the single-precision addend.

11. A multiplication-addition method, characterized in that, Applied to the asymmetric multiply-accumulator according to any one of claims 1-10, the method comprises: When the asymmetric multiply-accumulator performs half-precision floating-point multiply-accumulator operations, the single-precision multiply-accumulator and the half-precision multiply-accumulator each perform multiply-accumulator operations on the half-precision floating-point numbers to be processed, and obtain the corresponding half-precision multiply-accumulator results, resulting in a total of 2N half-precision multiply-accumulator results. When the asymmetric multiply-accumulator performs single-precision floating-point multiplication and addition operations, the single-precision multiply-accumulator performs multiplication and addition operations on the single-precision floating-point number to be processed, and obtains the corresponding single-precision multiplication and addition results, resulting in a total of N single-precision multiplication and addition results.

12. The method according to claim 11, characterized in that, The half-precision floating-point number to be processed includes: a first half-precision multiplier, a second half-precision multiplier, and a half-precision addend; The single-precision multiply-accumulate unit performs multiplication and addition operations on the half-precision floating-point number to be processed, obtaining the corresponding half-precision multiplication and addition result, including: The single-precision multiplier-adder converts the first half-precision multiplier, the second half-precision multiplier, and the half-precision addend into single precision, resulting in a first single-precision multiplier, a second single-precision multiplier, and a single-precision addend. The single-precision multiply-adder determines the single-precision multiplication-addition result based on the decimal number of the first single-precision multiplier, the exponent of the first single-precision multiplier, the sign of the first single-precision multiplier, the decimal number of the second single-precision multiplier, the exponent of the second single-precision multiplier, the sign of the second single-precision multiplier, the decimal number of the single-precision addend, the exponent of the single-precision addend, and the sign of the single-precision addend. The single-precision multiply-accumulate unit converts the single-precision multiply-accumulate result to obtain the half-precision multiply-accumulate result.

13. The method according to claim 12, characterized in that, The single-precision multiply-adder determines the single-precision multiplication-addition result based on the decimal number of the first single-precision multiplier, the exponent of the first single-precision multiplier, the sign of the first single-precision multiplier, the decimal number of the second single-precision multiplier, the exponent of the second single-precision multiplier, the sign of the second single-precision multiplier, the decimal number of the single-precision addend, the exponent of the single-precision addend, and the sign of the single-precision addend, including: The single-precision multiplier-accumulator determines the decimal of the multiplication result based on the decimal of the first single-precision multiplier and the decimal of the second single-precision multiplier. The single-precision multiplier-accumulator determines the exponent of the multiplication result based on the exponent of the first single-precision multiplier and the exponent of the second single-precision multiplier. The single-precision multiplier-accumulator determines the sign of the multiplication result based on the sign of the first single-precision multiplier and the sign of the second single-precision multiplier. The single-precision multiply-accumulate unit determines the decimal number, sign, and exponent of the multiplication-accumulation result based on the decimal number of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal number of the single-precision addend. The single-precision multiply-accumulate unit determines the single-precision multiply-accumulate result based on the decimal part of the multiply-accumulate result, the sign of the multiply-accumulate result, and the exponent of the multiply-accumulate result.

14. The method according to claim 13, characterized in that, The single-precision multiply-adder determines the decimal number, sign, and exponent of the multiplication-addition result based on the decimal number of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal number of the single-precision addend, including: The single-precision multiply-adder determines the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend. The single-precision multiply-adder performs a shift operation on the decimal of the multiplication result or the decimal of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the exponent difference, to obtain the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation. The single-precision multiply-adder determines the decimal number and sign of the multiplication-addition result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal number of the multiplication result after the shift operation, and the decimal number of the single-precision addend after the shift operation. The single-precision multiply-adder determines the exponent of the multiplication-addition result based on the exponent of the multiplication result and the exponent of the single-precision addend.

15. The method according to claim 11, characterized in that, The single-precision floating-point number to be processed includes: a first single-precision multiplier, a second single-precision multiplier, and a single-precision addend; The single-precision multiply-accumulate unit performs multiplication and addition operations on the single-precision floating-point number to be processed, and obtains the corresponding single-precision multiplication and addition result, including: The single-precision multiplier-accumulator determines the decimal of the multiplication result based on the decimal of the first single-precision multiplier and the decimal of the second single-precision multiplier. The single-precision multiplier-accumulator determines the exponent of the multiplication result based on the exponent of the first single-precision multiplier and the exponent of the second single-precision multiplier. The single-precision multiplier-accumulator determines the sign of the multiplication result based on the sign of the first single-precision multiplier and the sign of the second single-precision multiplier. The single-precision multiply-accumulate unit determines the decimal number, sign, and exponent of the multiplication-accumulation result based on the decimal number of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal number of the single-precision addend. The single-precision multiply-accumulate unit determines the single-precision multiply-accumulate result based on the decimal part of the multiply-accumulate result, the sign of the multiply-accumulate result, and the exponent of the multiply-accumulate result.

16. The method according to claim 15, characterized in that, The single-precision multiply-adder determines the decimal number, sign, and exponent of the multiplication-addition result based on the decimal number of the multiplication result, the exponent of the multiplication result, the sign of the multiplication result, the exponent of the single-precision addend, the sign of the single-precision addend, and the decimal number of the single-precision addend, including: The single-precision multiply-adder determines the exponent difference based on the exponent of the multiplication result and the exponent of the single-precision addend. The single-precision multiply-adder performs a shift operation on the decimal of the multiplication result or the decimal of the single-precision addend based on the exponent of the multiplication result, the exponent of the single-precision addend, and the exponent difference, to obtain the decimal of the multiplication result after the shift operation and the decimal of the single-precision addend after the shift operation. The single-precision multiply-adder determines the decimal number and sign of the multiplication-addition result based on the sign of the multiplication result, the sign of the single-precision addend, the decimal number of the multiplication result after the shift operation, and the decimal number of the single-precision addend after the shift operation. The single-precision multiply-adder determines the exponent of the multiplication-addition result based on the exponent of the multiplication result and the exponent of the single-precision addend.

17. An electronic device comprising a memory and a processor, wherein the memory stores a computer program, characterized in that, When the processor executes the computer program, it implements the steps of the method according to any one of claims 11 to 16.

18. A computer-readable storage medium having a computer program stored thereon, characterized in that, When the computer program is executed by a processor, it implements the steps of the method according to any one of claims 11 to 16.

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