Display panel

Abstract

The application discloses a display panel, which comprises a plurality of pixels, a plurality of data lines, a plurality of source drivers and an XOR circuit. Signals of different potentials are transmitted through a first potential line and a second potential line to perform XOR operation on source drive signals output by two adjacent source drivers, so that a first quantity of positive polarity data signals belonging to a high gray scale part transmitted in a data line electrically connected with one of the two adjacent source drivers is equal to a second quantity of negative polarity data signals belonging to the high gray scale part transmitted in a data line electrically connected with the other of the two adjacent source drivers, the high gray scale part data signals of the positive polarity and the negative polarity are balanced and offset each other, and horizontal crosstalk is improved or avoided.

Description

TECHNICAL FIELD

[0001] The present application relates to the technical field of display, in particular to a display panel. BACKGROUND

[0002] A display panel usually includes data lines for transmitting data signals of corresponding polarities. However, the unbalanced distribution of the polarities may couple the potentials of other signals, resulting in unstable potentials of the coupled signals and thus undesired horizontal crosstalk in the display panel. SUMMARY

[0003] The present application provides a display panel to alleviate the technical problem of unbalanced distribution of polarities of data signals.

[0004] The present application provides a display panel including a plurality of pixels, a plurality of data lines, a plurality of source drivers and an exclusive-OR circuit, the plurality of pixels being arranged in a plurality of columns; each data line is connected to each column of pixels one by one, and the plurality of data lines are arranged along a first direction; the plurality of source drivers are arranged along the first direction; the exclusive-OR circuit includes a plurality of exclusive-OR units, each first input end of each two exclusive-OR units is connected to each output end of two source drivers adjacent in the first direction one by one, each output end of each exclusive-OR unit is connected to a corresponding data line, and each second input end of each two exclusive-OR units is connected to a first potential line and a second potential line respectively.

[0005] In some embodiments, the plurality of source drivers includes a first source driver and a second source driver arranged along the first direction; the plurality of exclusive-OR units includes a first exclusive-OR unit and a second exclusive-OR unit, each first input end of the first exclusive-OR unit is connected to each output end of the first source driver one by one, each output end of the first exclusive-OR unit is connected to a corresponding data line, and each second input end of the first exclusive-OR unit is connected to the first potential line; each first input end of the second exclusive-OR unit is connected to each output end of the second source driver one by one, each output end of the second exclusive-OR unit is connected to a corresponding data line, and each second input end of the second exclusive-OR unit is connected to the second potential line.

[0006] In some embodiments, each exclusive-OR unit includes a plurality of exclusive-OR gates, a first input end of each exclusive-OR gate is connected to an output end of a source driver, a second input end of each exclusive-OR gate is connected to the first potential line or the second potential line, and an output end of each exclusive-OR gate is connected to a data line.

[0007] In some embodiments, the first potential line is used to transmit one of a high potential signal and a low potential signal, and the second potential line is used to transmit the other of the high potential signal and the low potential signal.

[0008] In some embodiments, the output end of the source driver is configured to output a corresponding source driving signal, the data line is configured to transmit a corresponding data signal, the first potential line is configured to transmit a first potential signal, and the second potential line is configured to transmit a second potential signal; the XOR circuit is configured to determine the polarity of the data signal as the XOR operation result of the polarity of the source driving signal and the polarity of the first potential signal or the polarity of the second potential signal.

[0009] In some embodiments, the polarities of the source driving signals output by the plurality of source drivers are sequentially and continuously arranged in the first direction as n positive polarities and n negative polarities; each source driver includes a plurality of output pin groups with the same number, and each output pin group includes m output pins that are continuously distributed in the first direction, where m is an odd multiple of n, and n is an integer greater than or equal to 1.

[0010] In some embodiments, every m source driving signals that are continuous in the first direction are either high gray scales or low gray scales, and the high gray scales and the low gray scales are alternately arranged in sequence.

[0011] In some embodiments, the plurality of source drivers includes an even number of source drivers.

[0012] In some embodiments, each XOR unit is integrated in a corresponding source driver, and the source driver is a source driving chip.

[0013] In some embodiments, the display panel further includes a substrate and a common electrode line, the common electrode line is disposed on one side of the substrate, and the common electrode line has a parasitic capacitance with the data line.

[0014] The display panel provided in the present application can perform XOR operation on the source driving signals output by two adjacent source drivers by transmitting signals with different potentials through the first potential line and the second potential line, so that the first number of positive polarities of the data signals belonging to the high gray scale part transmitted in the data line electrically connected to one of the two adjacent source drivers is equal to the second number of negative polarities of the data signals belonging to the high gray scale part transmitted in the data line electrically connected to the other of the two adjacent source drivers, the positive polarity and the negative polarity of the data signals belonging to the high gray scale part are balanced and offset each other, and the horizontal crosstalk is improved or avoided. BRIEF DESCRIPTION OF DRAWINGS

[0015] The technical solutions and other beneficial effects of the present application will become apparent from the following detailed description of specific embodiments of the present application, combined with the accompanying drawings.

[0016] Figure 1 FIG. 1 is a structural schematic diagram of a display panel in the related art.

[0017] Figure 2For Figure 1 a schematic diagram of the horizontal crosstalk shown in FIG.

[0018] Figure 3 a first structure schematic diagram of a display panel provided by an embodiment of the present application.

[0019] Figure 4 a process schematic diagram of an exclusive-OR operation provided by an embodiment of the present application.

[0020] Figure 5 a second structure schematic diagram of a display panel provided by an embodiment of the present application.

[0021] Figure 6 a third structure schematic diagram of a display panel provided by an embodiment of the present application. DETAILED DESCRIPTION

[0022] The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all the embodiments. Based on the embodiments in the present application, all other embodiments obtained by a person skilled in the art without creative labor fall within the scope of protection of the present application.

[0023] In addition, the terms "first" and "second" are only used for description purposes, and cannot be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features, so that the features with "first" and "second" can explicitly or implicitly include one or more of the features, and in the description of the present application, the meaning of "multiple" is two or more, unless otherwise explicitly and specifically limited.

[0024] Figure 1 A structure schematic diagram of a display panel in the related art is shown, which includes a first chip on film (COF1), a second chip on film (COF2), a third chip on film (COF3), and a fourth chip on film (COF4) arranged in sequence along a certain direction, and each output end of the chip on films is connected with a data line to transmit a data signal of a corresponding polarity and gray scale.

[0025] The polarity distribution of the data lines is cyclically periodic with two positive (+) and two negative (-), and the white area represents a high gray scale (H) part, and the black area represents a low gray scale (L) part. Since there is a parasitic capacitance between the data line and the common electrode line, in the case that the voltage of the data signal transmitted in the data line changes, the potential (Vcom) of the common voltage signal transmitted in the common electrode line can be changed by the coupling effect of the parasitic capacitance, which can produce Figure 2 horizontal crosstalk shown in the dashed box in FIG.

[0026] Especially in Figure 1 Under the picture shown in the high and low gray scale transversely staggered arrangement, the picture pixel width just matches the flipping mode, the high gray scale part which has a greater impact on Vcom keeps the same polarity distribution, which makes the number of positive and negative polarities of the high gray scale part in the data signals output by the adjacent two chip-on-film not equal or unbalanced, so that the coupling amount received by Vcom cannot be offset, thereby causing horizontal crosstalk.

[0027] It can be understood that each chip-on-film can have one or more source drivers.

[0028] In view of the technical problem of the unbalanced polarity distribution of the data signal mentioned above, the embodiment provides a display panel, please refer to Figures 3 to 6 As Figure 3 shown, the display panel includes a plurality of pixels 400, a plurality of data lines DL, a plurality of source drivers, and an XOR circuit 200, the plurality of pixels 400 are distributed in multiple columns; each data line DL is connected with each column of pixels 400 one by one, and the plurality of data lines DL are arranged along a first direction DR1; the plurality of source drivers are arranged along the first direction DR1; the XOR circuit 200 includes a plurality of XOR units, each first input end of each two XOR units is connected with the output end of each source driver adjacent in the first direction DR1 one by one, each output end of each XOR unit is connected with a corresponding data line DL, and the second input end of each two XOR units is connected with the first potential line 310 and the second potential line 320 respectively.

[0029] It can be understood that the display panel provided by the embodiment can make the first number of positive polarities of the data signals belonging to the high gray scale part transmitted in the data line DL electrically connected with one of the adjacent two source drivers equal to the second number of negative polarities of the data signals belonging to the high gray scale part transmitted in the data line DL electrically connected with the other of the adjacent two source drivers by transmitting signals of different potentials through the first potential line 310 and the second potential line 320 to perform XOR operation on the source drive signals output by the adjacent two source drivers, which can balance and offset the positive polarity and the negative polarity of the data signals belonging to the high gray scale part, and further improve or avoid horizontal crosstalk.

[0030] It should be noted that in some other embodiments, the display panel described above can also use only one source driver, as long as the polarity distribution of the output of the one or more source drivers meets the subsequent description of the present application.

[0031] The plurality of source drivers can include a first source driver 110 and a second source driver 120. The plurality of source drivers can also include an X-1th source driver and an Xth source driver, and X can be an integer greater than or equal to 4.

[0032] In one embodiment, as shown in Figure 3 the plurality of source drivers includes a first source driver 110 and a second source driver 120 arranged along a first direction DR1, and the plurality of XOR units includes a first XOR unit 210 and a second XOR unit 220, each first input terminal of the first XOR unit 210 is connected to a corresponding output terminal of the first source driver 110, each output terminal of the first XOR unit 210 is connected to a corresponding data line DL, and each second input terminal of the first XOR unit 210 is connected to the first potential line 310; each first input terminal of the second XOR unit 220 is connected to a corresponding output terminal of the second source driver 120, each output terminal of the second XOR unit 220 is connected to a corresponding data line DL, and each second input terminal of the second XOR unit 220 is connected to the second potential line 320.

[0033] It should be noted that the first potential line 310 is used to transmit one of a high potential signal or a low potential signal, and the second potential line 320 is used to transmit the other of the high potential signal or the low potential signal. That is, by performing XOR operation on two signals with opposite polarities of the source driving signals output by the adjacent two source drivers, the embodiment can make the polarity of the source driving signal output by one of the source drivers flip, and the polarity of the source driving signal output by the other of the source drivers remain unchanged, so that the number of data signals of the high gray scale part with different polarities output by the adjacent two source drivers is equal, the coupling amount of Vcom can be offset, and the normal potential of Vcom can be recovered more quickly, thereby improving or avoiding horizontal crosstalk.

[0034] Compared with the compensation technology for stabilizing Vcom (reducing the ripple of Vcom), the compensation technology also needs to obtain the feedback voltage of Vcom in the display panel, and based on the feedback voltage, the corresponding compensation amount is calculated and then transmitted to the display panel, which has a large delay and the compensation is not timely. The embodiment can achieve better improvement effect in horizontal crosstalk.

[0035] In one embodiment, as shown in Figure 3 each XOR unit includes a plurality of XOR gates 211, a first input terminal of each XOR gate 211 is connected to an output terminal of a source driver, a second input terminal of each XOR gate 211 is connected to the first potential line 310 or the second potential line 320, and an output terminal of each XOR gate 211 is connected to a data line DL.

[0036] It should be noted that the second input end of each XOR gate 211 in the first XOR unit 210 can be connected with the first potential line 310, and the second input end of each XOR gate 211 in the second XOR unit 220 can be connected with the second potential line 320; or the second input end of each XOR gate 211 in the first XOR unit 210 can be connected with the second potential line 320, and the second input end of each XOR gate 211 in the second XOR unit 220 can be connected with the first potential line 310.

[0037] In one of the embodiments, the output end of the source driver is configured to output a corresponding source driving signal, the data line DL is configured to transmit a corresponding data signal, the first potential line 310 is configured to transmit a first potential signal, and the second potential line 320 is configured to transmit a second potential signal; and the XOR circuit 200 is configured to determine the polarity of the data signal as the XOR operation result of the polarity of the source driving signal and the polarity of the first potential signal or the polarity of the second potential signal.

[0038] It should be noted that when the first potential signal is a high potential signal, the polarity of the source driving signal is opposite to the polarity of the data signal, and the gray scale of the source driving signal is the same as the gray scale of the data signal; or when the first potential signal is a low potential signal, the polarity of the source driving signal is the same as the polarity of the data signal, and the gray scale of the source driving signal is the same as the gray scale of the data signal. Similarly, in the XOR operation process involving the second potential signal, the XOR operation result consistent with the first potential signal can be obtained.

[0039] The specific XOR operation process is shown in FIG. 7. Figure 4 D represents the source driving signal. D’ represents the data signal after the XOR operation of D. The high potential of CFLAG can represent one of the first potential signal or the second potential signal, and the low potential of CFLAG can represent the other one of the first potential signal or the second potential signal. H represents the high gray scale part, and L represents the low gray scale part. + represents the positive polarity, and - represents the negative polarity.

[0040] The left half and the right half of the third vertical dotted line from left to right represent the outputs of two adjacent source drivers. As can be seen, each high gray scale part of D in the left half has two positive polarities, and each high gray scale part of D in the right half has one negative polarity; or each high gray scale part of D in the left half has one negative polarity, and each high gray scale part of D in the right half has two positive polarities. This leads to the imbalance of the polarity distribution.

[0041] After the corresponding XOR operation, it can be seen that each high gray scale part in the left half has one positive polarity and each high gray scale part in the right half has one negative polarity; or, each high gray scale part in the left half has two negative polarities and each high gray scale part in the right half has two positive polarities. This makes the number of positive polarities of the high gray scale part equal to the number of negative polarities, balancing the polarity distribution.

[0042] In one embodiment, the polarities of the plurality of source driving signals output by the plurality of source drivers are sequentially and continuously arranged in the first direction DR1 as n positive polarities and n negative polarities; each source driver includes a plurality of output pin groups of the same number, and each output pin group includes m output pins that are continuously distributed in the first direction DR1, where m is an odd multiple of n, and n is an integer greater than or equal to 1.

[0043] It should be noted that, as shown in Figure 5 , Figure 6 , COF1, COF2...COFx-1, and COFx can be used to represent a source driver respectively. The white area and the black area corresponding to each source driver represent the display area where the high gray scale part is located and the display area where the low gray scale part is located respectively. Each area where each high gray scale part or low gray scale part is located has m columns of pixels 400 or m data lines DL, that is, the data signal received by each area where each high gray scale part or low gray scale part is located is sourced from the m output pins of the source driver that are continuously distributed in the first direction DR1.

[0044] In this case, each high gray scale part has data lines DL of "+" that are not offset by corresponding data lines DL of "-", where is the ceiling operator, is the floor operator. If the XOR operation processing as in the present application is not performed, horizontal crosstalk will occur.

[0045] As shown in Figure 5 , by disassembling the m columns of pixels 400 into combinations of (n+n-n+) and (n-n+n-), the relationship between m and n that will cause crosstalk can be calculated. Through the calculation, it can be known that each high gray scale part contains (n+n-n+) and (n-n+n-), and each low gray scale part contains (n-n+n-) and (n+n-n+).

[0046] Unlike Figure 5 , the number of positive polarities of the high gray scale part is equal to the number of negative polarities, balancing the polarity distribution. Figure 6The polarity arrangement of the even-numbered source drivers arranged in the first direction DR1 is changed, for example, in COF2 and COFx, each high gray scale part contains (n-n+n-) and (n+n-n+), while each low gray scale part contains (n+n-n+) and (n-n+n-).

[0047] It can be understood that the means for balancing the polarity distribution by means of XOR operation provided in the present application can be applied to the same or similar cases as Figure 5 , Figure 6 .

[0048] In one embodiment, as shown in Figure 5 or Figure 6 , every m source drive signals arranged in the first direction DR1 are high gray scale or low gray scale, and the high gray scale and low gray scale are alternately arranged.

[0049] In one embodiment, the plurality of source drivers includes an even number of source drivers.

[0050] It should be noted that the same display panel with an even number of source drivers is more conducive to achieving the balance of the polarity distribution, and thus can achieve a better improvement effect on the horizontal crosstalk.

[0051] In one embodiment, each XOR unit is integrated in a corresponding source driver, and the source driver is a source drive chip.

[0052] It should be noted that the present embodiment can reduce the occupied space of the XOR unit and improve the integration of the source driver, which is conducive to reducing the occupied space of the frame.

[0053] In one embodiment, the display panel further includes a substrate and a common electrode line, the common electrode line is arranged on one side of the substrate, and the common electrode line has a parasitic capacitance with the data line DL.

[0054] It should be noted that the display panel in the present embodiment can be a liquid crystal display panel, and in a self-luminous display panel, the common electrode line can also be other electrodes or wires.

[0055] In the above embodiments, the description of each embodiment has its own emphasis, and the parts not described in detail in a certain embodiment can be referred to the related description of other embodiments.

[0056] The display panel provided by the embodiments of the present application is described in detail above, and the principles and implementation manners of the present application are described by applying specific examples. The above description of the embodiments is only used to help understand the technical solutions of the present application and the core ideas thereof. It should be understood by those skilled in the art that the technical solutions recorded in the foregoing embodiments can be modified, or some technical features thereof can be replaced equivalently, and the modification or replacement does not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present application.

Claims

1. A display panel, characterized in that, The display panel includes: Multiple pixels, wherein the multiple pixels are distributed in multiple columns; Multiple data lines, each of which is connected to each of the columns of pixels, and the multiple data lines are arranged along a first direction; Multiple source drivers, the multiple source drivers being arranged along the first direction; The XOR circuit includes multiple XOR units. The first input terminal of each pair of XOR units is connected to the output terminals of two adjacent source drivers in the first direction. The output terminal of each XOR unit is connected to a corresponding data line. The second input terminal of each pair of XOR units is connected to a first potential line and a second potential line.

2. The display panel according to claim 1, characterized in that, The plurality of source drivers includes a first source driver and a second source driver arranged along the first direction; The plurality of XOR units include a first XOR unit and a second XOR unit. Each first input terminal of the first XOR unit is connected to each output terminal of the first source driver. Each output terminal of the first XOR unit is connected to a corresponding data line. Each second input terminal of the first XOR unit is connected to the first potential line. Each first input terminal of the second XOR unit is connected to each output terminal of the second source driver, each output terminal of the second XOR unit is connected to a corresponding data line, and each second input terminal of the second XOR unit is connected to the second potential line.

3. The display panel according to claim 1, characterized in that, Each XOR unit includes multiple XOR gates, the first input of each XOR gate is connected to an output of the source driver, the second input of each XOR gate is connected to either the first potential line or the second potential line, and the output of each XOR gate is connected to a data line.

4. The display panel according to claim 1, characterized in that, The first potential line is used to transmit either a high-potential signal or a low-potential signal, and the second potential line is used to transmit the other of the high-potential signal or the low-potential signal.

5. The display panel according to any one of claims 1-4, characterized in that, The output terminal of the source driver is used to output the corresponding source drive signal, the data line is used to transmit the corresponding data signal, the first potential line is used to transmit the first potential signal, and the second potential line is used to transmit the second potential signal. The XOR circuit is used to determine the polarity of the corresponding data signal by performing an XOR operation between the polarity of the source driving signal and the polarity of the first potential signal or the polarity of the second potential signal.

6. The display panel according to claim 1, characterized in that, The polarity arrangement of the multiple source drive signals output by the multiple source drivers has n consecutive positive polarities and n negative polarities in the first direction. Each of the source drivers includes a plurality of equal number of output pin groups, each of the output pin groups including m output pins continuously distributed in the first direction, wherein m is an odd multiple of n, and n is an integer greater than or equal to 1.

7. The display panel according to claim 6, characterized in that, In the first direction, every m consecutive source driving signals are either high grayscale or low grayscale, and the high grayscale and the low grayscale are distributed alternately in sequence.

8. The display panel according to claim 1, characterized in that, The plurality of source drivers includes an even number of the source drivers.

9. The display panel according to claim 1, characterized in that, Each XOR unit is integrated into a corresponding source driver, which is a source driver chip.

10. The display panel according to claim 1, characterized in that, The display panel also includes: Substrate; and A common electrode line is disposed on one side of the substrate, and there is a parasitic capacitance between the common electrode line and the data line.

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