RC oscillator without starting circuit

Abstract

The present application belongs to the field of analog integrated circuit, and particularly relates to an RC oscillator without starting circuit. The present application uses Schmitt trigger as the comparator in the RC oscillator, and uses the hysteresis effect and positive feedback characteristics of the Schmitt trigger to reduce the influence of kickback noise. Meanwhile, a reset port is added to the Schmitt trigger, so that the working state of the input end of the RS flip-flop is simultaneously low when the circuit starts; and the two output signals of the RS flip-flop are respectively applied to the reset ends of the two Schmitt triggers through the delay control module, so that the reset signal of the Schmitt trigger cannot control the output result in advance before the input signal changes, and the timing error is avoided. The present application effectively solves the problems of the existing RC oscillator, such as the need of starting circuit and high noise.

Description

Technical Field

[0001] This invention belongs to the field of analog integrated circuits, specifically an RC oscillator that does not require a startup circuit. Background Technology

[0002] As smart devices become increasingly mainstream and the market demand for wearable devices grows, RC oscillators, including relaxation oscillators, are gradually evolving into low-power, on-chip oscillators implemented using standard CMOS processes to address the issues of high cost and large circuit board area associated with external crystal oscillators. Compared to ring oscillators, RC oscillators offer better frequency stability, control linearity, and a wider adjustment range; therefore, fully integrated relaxation oscillators are widely used as on-chip reference clocks.

[0003] However, traditional relaxation oscillators still have some problems that urgently need improvement. On the one hand, the quality factor of relaxation oscillators has not yet reached its theoretical limit, so optimization methods such as noise reduction are needed. Switched capacitor swing enhancement circuits can improve frequency stability and phase noise characteristics, but due to the use of passive components, they occupy a large chip area. To reduce the noise impact of the comparator, differential swing enhancement can be used; however, this method requires a high-speed comparator to achieve a stable output frequency. There is also an RC oscillator structure based on an inverter chain, which obtains a high voltage swing at the oscillation node. However, since this single-ended method is easily affected by circuit delay fluctuations, it requires a PTAT reference to obtain the modulation power supply voltage, which leads to a lower operating frequency. On the other hand, traditional relaxation oscillators contain RS flip-flops composed of NAND gates. When both input signals are low simultaneously, the RS flip-flops lock up, meaning both output signals become high, causing the relaxation oscillator to malfunction. This situation may occur when the circuit is first powered on, posing a risk of failure to start oscillation. Therefore, RC oscillators often have a startup circuit connected at critical nodes to force the circuit to oscillate even when the RS flip-flops are locked. Summary of the Invention

[0004] To address the aforementioned problems and shortcomings, and to solve the issues of existing RC oscillators requiring a startup circuit and exhibiting high noise levels, this invention provides an RC oscillator that eliminates the need for a startup circuit, simplifying the circuit structure while reducing noise.

[0005] An RC oscillator that does not require a startup circuit includes: a capacitor alternating charge / discharge module, a Schmitt trigger module, an RS trigger module, and a delay control module.

[0006] The alternating capacitor charging and discharging module includes a first capacitor charging and discharging branch and a second capacitor charging and discharging branch. The first capacitor charging and discharging branch consists of a first MOSFET M1, a second MOSFET M2, and a first capacitor C1. The first capacitor C1 can be charged to the power supply voltage through the first MOSFET M1, and can be discharged through the second MOSFET M2. The second capacitor charging and discharging branch consists of a third MOSFET M3, a fourth MOSFET M4, and a second capacitor C2. The second capacitor C2 can be charged to the power supply voltage through the third MOSFET M3, and can be discharged through the fourth MOSFET M4.

[0007] The Schmitt trigger module includes a first Schmitt trigger COMP1 and a second Schmitt trigger COMP2, which have the same structure and function to compare the discharge voltage of the capacitor in the previous stage with the switching voltage of the Schmitt trigger.

[0008] The RS flip-flop module includes a first NAND gate NAND1 and a second NAND gate NAND2, which are used to flip the output signal when the input signal changes.

[0009] The delay control module includes a first inverter chain and a second inverter chain. Its function is to avoid timing errors and prevent the Schmitt trigger from resetting before the capacitor has started charging. The first inverter chain consists of a first inverter INV1 and a second inverter INV2, and the second inverter chain consists of a third inverter INV3 and a fourth inverter INV4.

[0010] The gate of the first MOS transistor M1 in the capacitor alternating charge and discharge module is connected to the output terminal S2 of the second NAND gate NAND2 in the RS flip-flop module; the drain of the first MOS transistor M1 in the capacitor alternating charge and discharge module is connected to the drain of the second MOS transistor M2, the positive terminal of the first capacitor C1, and the input terminal of the first Schmitt trigger COMP1 in the Schmitt trigger module.

[0011] The gate of the third MOS transistor M3 in the capacitor alternating charge and discharge module is connected to the output terminal S1 of the first NAND gate NAND1 in the RS flip-flop module; the drain of the third MOS transistor M3 in the capacitor alternating charge and discharge module is connected to the drain of the fourth MOS transistor M4, the positive terminal of the second capacitor C2, and the input terminal of the second Schmitt trigger COMP2 in the Schmitt trigger module.

[0012] In the alternating capacitor charge / discharge module, the source and substrate of the first MOSFET M1 and the source and substrate of the third MOSFET M3 are both connected to the power supply; the source and substrate of the second MOSFET M2 and the fourth MOSFET M4, the negative terminal of the first capacitor C1, and the negative terminal of the second capacitor C2 are all grounded; the gates of the second MOSFET M2 and the fourth MOSFET M4 are both connected to the reference potential V.REF ;

[0013] The reset terminal of the first Schmitt trigger COMP1 in the Schmitt trigger module is connected to the output terminal S of the second inverter INV2 in the delay control module. 1d Connected; the reset terminal of the second Schmitt trigger COMP2 in the Schmitt trigger module is connected to the output terminal S of the fourth inverter INV4 in the delay control module. 2d The first input terminal (R) of the first NAND gate NAND1 in the RS flip-flop module is connected to the output terminal of the first Schmitt trigger COMP1 in the Schmitt trigger module; the second input terminal of the first NAND gate NAND1 in the RS flip-flop module is connected to the output terminal of the second NAND gate NAND2; the first input terminal (S) of the second NAND gate NAND2 in the RS flip-flop module is connected to the output terminal of the second Schmitt trigger COMP2 in the Schmitt trigger module; the second input terminal of the second NAND gate NAND2 in the RS flip-flop module is connected to the output terminal of the first NAND gate NAND1.

[0014] The input of the first inverter INV1 in the delay control module is connected to the output of the first NAND gate NAND1 in the RS flip-flop module; the output of the first inverter INV1 in the delay control module is connected to the input of the second inverter INV2; the input of the third inverter INV3 in the delay control module is connected to the output of the second NAND gate NAND2 in the RS flip-flop module; and the output of the third inverter INV3 in the delay control module is connected to the input of the fourth inverter INV4.

[0015] Furthermore, the Schmitt trigger is composed of a fifth MOS transistor M5, a sixth MOS transistor M6, a seventh MOS transistor M7, an eighth MOS transistor M8, a ninth MOS transistor M9, a tenth MOS transistor M10, and an eleventh MOS transistor M11.

[0016] Inside the Schmitt trigger, the drain of the fifth MOSFET M5 is connected to the drain of the sixth MOSFET M6 and the drain of the seventh MOSFET M7; the gate of the sixth MOSFET M6 is connected to the gate of the eighth MOSFET M8; the substrate of the sixth MOSFET M6 is connected to the source of the ninth MOSFET M9; the source of the seventh MOSFET M7 is connected to the drain of the eighth MOSFET M8; the gate of the tenth MOSFET M10 is connected to the gate of the eleventh MOSFET M11 and to the drain of the seventh MOSFET M7; the tenth M... The drain of MOSFET M10 is connected to the drain of MOSFET M11, and also to the drain of MOSFET M9 and the gate of MOSFET M7. The source and substrate of MOSFET M6, the substrate of MOSFET M9, and the source and substrate of MOSFET M10 are all connected to the power supply. The source and substrate of MOSFET M5, the substrate of MOSFET M7, the source and substrate of MOSFET M8, the gate of MOSFET M9, and the source and substrate of MOSFET M11 are all grounded. The input of the Schmitt trigger is connected to the gate of MOSFET M6; the reset terminal of the Schmitt trigger is connected to the gate of MOSFET M5; and the output of the Schmitt trigger is connected to the drain of MOSFET M10.

[0017] The specific working process of the above-mentioned RC oscillator without a startup circuit is as follows:

[0018] When S2 is high and S1 is low, the upper plate of the first capacitor C1 begins to discharge from the power supply voltage, and the upper plate of the second capacitor C2 begins to discharge from the switching voltage V of the second Schmitt trigger COMP2. lh Charging begins. At this time, both inputs of the RS flip-flop are at a high level, and its outputs S1 and S2 maintain the state of the previous stage. When the voltage on the upper plate of the first capacitor C1 drops to the switching voltage V of the first Schmitt trigger COMP1... lh When the R terminal of the RS flip-flop flips from high to low, the output S1 becomes high and S2 becomes low, thus initiating the next cycle.

[0019] The delay control module's function is to apply the delayed output signals S1 and S2 of the RS flip-flop to the reset terminal of the Schmitt trigger. This ensures that the reset signal of the Schmitt trigger does not prematurely control the output before the input signal changes, thus avoiding timing errors.

[0020] When the RC oscillator is in an abnormal operating state, all inputs of the RS flip-flop are low, and the circuit is locked. At this time, the reset terminal of the Schmitt trigger plays a crucial role in starting the circuit. Since the outputs S1 and S2 of the RS flip-flop are both high, S1d and S2d are also high. The high-level reset signal causes the input signals of the RS flip-flop to also become high, thereby releasing the RS flip-flop from its locked state, and the circuit gradually begins to oscillate.

[0021] In summary, this invention utilizes a Schmitt trigger as a comparator in an RC oscillator to reduce the impact of kickback noise. Simultaneously, a reset port is added to the Schmitt trigger to deactivate the simultaneous low-level operation of the RS flip-flop input during circuit startup. This effectively solves the problems of existing RC oscillators requiring a startup circuit and exhibiting high noise levels. Attached Figure Description

[0022] Figure 1 This is a schematic diagram of the overall circuit structure of the present invention.

[0023] Figure 2 This is a schematic diagram of the circuit structure of the Schmitt trigger part of the present invention. Detailed Implementation

[0024] The present invention will now be described in further detail with reference to the accompanying drawings and embodiments.

[0025] The RC oscillator without a startup circuit provided in this embodiment includes four parts: a capacitor alternating charge / discharge module, a Schmitt trigger module, an RS trigger module, and a delay control module. Figure 1 As shown.

[0026] The circuit structure of the Schmitt trigger section is as follows: Figure 2 As shown, it is composed of the fifth MOSFET M5, the sixth MOSFET M6, the seventh MOSFET M7, the eighth MOSFET M8, the ninth MOSFET M9, the tenth MOSFET M10, and the eleventh MOSFET M11.

[0027] The drain of the fifth MOSFET M5 is connected to the drain of the sixth MOSFET M6 and the drain of the seventh MOSFET M7; the gate of the sixth MOSFET M6 is connected to the gate of the eighth MOSFET M8; the substrate of the sixth MOSFET M6 is connected to the source of the ninth MOSFET M9; the source of the seventh MOSFET M7 is connected to the drain of the eighth MOSFET M8; the gate of the tenth MOSFET M10 is connected to the gate of the eleventh MOSFET M11 and to the drain of the seventh MOSFET M7; the drain of the tenth MOSFET M10 is connected to the drain of the eleventh MOSFET M11 and to the drain of the ninth MOSFET M9 and the gate of the seventh MOSFET M7; the source and substrate of the sixth MOSFET M6, the substrate of the ninth MOSFET M9, and the source and substrate of the tenth MOSFET M10 are all connected to a power supply; the source and substrate of the fifth MOSFET M5, the substrate of the seventh MOSFET M7, the source and substrate of the eighth MOSFET M8, the gate of the ninth MOSFET M9, and the source and substrate of the eleventh MOSFET M11 are all grounded.

[0028] The working principles of the capacitor alternating charge / discharge module, Schmitt trigger module, RS trigger module, and delay control module are analyzed below.

[0029] When S2 is high and S1 is low, the first capacitor C1 is discharging, while the second capacitor C2 is charging. The discharge voltage of the first capacitor C1 is higher than the switching voltage V of the Schmitt trigger. lh During this process, S 1d It is low level, while S 2d The reset signal is high, meaning the input of the first Schmitt trigger (COMP1) changes from high to low while the reset signal remains low. Conversely, the input of the second Schmitt trigger (COMP2) changes from low to high while the reset signal remains high. Therefore, the operating states of these two Schmitt triggers require further analysis.

[0030] When the reset signal of the Schmitt trigger remains low, the fifth MOSFET M5 is disconnected from the circuit and will not affect the circuit. When the input signal is high, its output signal is also high. Since the gate of the ninth MOSFET M9 is grounded and its source is connected to the high level of the output terminal, |V GS,M9 |=V DD The ninth MOSFET M9 is in the linear region, transmitting the high-level voltage from its source to its drain, which is the substrate of the sixth MOSFET M6. Therefore, the substrate-source voltage of the sixth MOSFET M6 at this time is |V BS,M6 |=0. Compared to the reverse bias of the substrate and source, the threshold voltage |V is now 0. TH0,M6 The voltage is relatively large, therefore the Schmitt trigger has a lower switching voltage V as the input signal changes from high to low. lh This demonstrates the hysteresis effect of the Schmitt trigger.

[0031] Furthermore, the positive feedback characteristic of the Schmitt trigger is also crucial, as it significantly reduces the impact of kickback noise. Taking the input signal transitioning from high to low as an example, the output signal also transitions from high to low, passing through the ninth MOSFET M9 (located in the linear region) to the substrate of the sixth MOSFET M6. Therefore, the substrate-source voltage |V| of the sixth MOSFET M6... BS,M6 |Gradually increases, its threshold voltage|V TH,M6 The charging current I at the drain node of the sixth MOSFET M6 gradually decreases, thus reducing the current I. DS,M6 The gradual increase in voltage causes the drain voltage of the sixth MOSFET M6 to increase, while the output voltage of the Schmitt trigger decreases further. Since the output terminal is also connected to the gate of the seventh MOSFET M7, the decrease in output voltage also causes a decrease in the discharge current at the drain node of the sixth MOSFET M6, further reducing the output voltage of the Schmitt trigger. Therefore, this process constitutes positive current feedback, making it difficult for noise at the output terminal to affect the input terminal.

[0032] In this RC oscillator, another operating state of the Schmitt trigger is as follows: the input changes from low to high, while the reset signal remains high. In this state, the fifth MOSFET M5, controlled by the reset signal, is turned on, pulling the drain potential of the sixth MOSFET M6 low, thus making the output signal high. The output signal then acts on the gate of the seventh MOSFET M7, gradually turning it on. Conversely, as the input signal gradually becomes high, the sixth MOSFET M6 gradually turns off, and the eighth MOSFET M8 gradually turns on, similarly pulling the drain potential of the sixth MOSFET M6 low. Therefore, in this operating state, the input signal and the reset signal produce the same result; that is, the presence of the reset signal does not change the output result.

[0033] Therefore, the overall operation of the RC oscillator can be summarized. When S2 is high and S1 is low, the upper plate of the first capacitor C1 begins to discharge from the power supply voltage, and the upper plate of the second capacitor C2 discharges from the switching voltage V of the second Schmitt trigger COMP2. lh Charging begins. At this time, both inputs of the RS flip-flop are at a high level, and its outputs S1 and S2 maintain the state of the previous stage. When the voltage on the upper plate of the first capacitor C1 drops to the switching voltage V of the first Schmitt trigger COMP1... lh When the RS flip-flop's R terminal toggles from high to low, triggering outputs S1 to high and S2 to low, thus initiating the next cycle. The delay control module applies the delayed output signals S1 and S2 to the reset terminal of the Schmitt trigger. This ensures the reset signal doesn't prematurely control the output before the input signal changes, preventing timing errors.

[0034] When the RC oscillator is in an abnormal operating state, all inputs of the RS flip-flop are low, and the circuit is locked. At this time, the reset terminal of the Schmitt trigger plays a crucial role in starting the circuit. Since the outputs S1 and S2 of the RS flip-flop are both high, S1d and S2d are also high. As mentioned above, the high-level reset signal causes the input signals of the RS flip-flop to also become high, thus releasing the RS flip-flop from its locked state, and the circuit gradually begins to oscillate.

[0035] As can be seen from the above embodiments, this invention utilizes a Schmitt trigger as a comparator in an RC oscillator, leveraging the hysteresis effect and positive feedback characteristics of the Schmitt trigger to reduce the impact of kickback noise. Simultaneously, a reset port is added to the Schmitt trigger, thereby releasing the simultaneous low-level operation of the RS trigger inputs during circuit startup. Furthermore, a delay control module applies the two output signals of the RS trigger, after a delay, to the reset terminals of the two Schmitt triggers, ensuring that the reset signals of the Schmitt triggers do not prematurely control the output results before the input signals change, thus avoiding timing errors. This invention effectively solves the problems of existing RC oscillators requiring a startup circuit and exhibiting high noise levels.

Claims

1. An RC oscillator that requires no startup circuit, characterized in that: It includes a capacitor alternating charge / discharge module, a Schmitt trigger module, an RS trigger module, and a delay control module; The alternating capacitor charging and discharging module includes a first capacitor charging and discharging branch and a second capacitor charging and discharging branch. The first capacitor charging and discharging branch consists of a first MOSFET M1, a second MOSFET M2, and a first capacitor C1. The first capacitor C1 can be charged to the power supply voltage through the first MOSFET M1, and can be discharged through the second MOSFET M2. The second capacitor charging and discharging branch consists of a third MOSFET M3, a fourth MOSFET M4, and a second capacitor C2. The second capacitor C2 can be charged to the power supply voltage through the third MOSFET M3, and can be discharged through the fourth MOSFET M4. The Schmitt trigger module includes a first Schmitt trigger COMP1 and a second Schmitt trigger COMP2, which have the same structure and function to compare the discharge voltage of the capacitor in the previous stage with the switching voltage of the Schmitt trigger. The RS flip-flop module includes a first NAND gate NAND1 and a second NAND gate NAND2, which are used to flip the output signal when the input signal changes. The delay control module includes a first inverter chain and a second inverter chain, which is used to avoid timing errors and prevent the Schmitt trigger from resetting before the capacitor starts charging. The first inverter chain consists of a first inverter INV1 and a second inverter INV2, and the second inverter chain consists of a third inverter INV3 and a fourth inverter INV4. The gate of the first MOS transistor M1 in the capacitor alternating charge and discharge module is connected to the output terminal S2 of the second NAND gate NAND2 in the RS flip-flop module; the drain of the first MOS transistor M1 in the capacitor alternating charge and discharge module is connected to the drain of the second MOS transistor M2, the positive terminal of the first capacitor C1, and the input terminal of the first Schmitt trigger COMP1 in the Schmitt trigger module. The gate of the third MOS transistor M3 in the capacitor alternating charge and discharge module is connected to the output terminal S1 of the first NAND gate NAND1 in the RS flip-flop module; the drain of the third MOS transistor M3 in the capacitor alternating charge and discharge module is connected to the drain of the fourth MOS transistor M4, the positive terminal of the second capacitor C2, and the input terminal of the second Schmitt trigger COMP2 in the Schmitt trigger module. In the alternating capacitor charge / discharge module, the source and substrate of the first MOSFET M1 and the source and substrate of the third MOSFET M3 are both connected to the power supply; the source and substrate of the second MOSFET M2 and the fourth MOSFET M4, the negative terminal of the first capacitor C1, and the negative terminal of the second capacitor C2 are all grounded; the gates of the second MOSFET M2 and the fourth MOSFET M4 are both connected to the reference potential V. REF ; The reset terminal of the first Schmitt trigger COMP1 in the Schmitt trigger module is connected to the output terminal S of the second inverter INV2 in the delay control module. 1d Connected; the reset terminal of the second Schmitt trigger COMP2 in the Schmitt trigger module is connected to the output terminal S of the fourth inverter INV4 in the delay control module. 2d The first input terminal (R) of the first NAND gate NAND1 in the RS flip-flop module is connected to the output terminal of the first Schmitt trigger COMP1 in the Schmitt trigger module; the second input terminal of the first NAND gate NAND1 in the RS flip-flop module is connected to the output terminal of the second NAND gate NAND2; the first input terminal (S) of the second NAND gate NAND2 in the RS flip-flop module is connected to the output terminal of the second Schmitt trigger COMP2 in the Schmitt trigger module; the second input terminal of the second NAND gate NAND2 in the RS flip-flop module is connected to the output terminal of the first NAND gate NAND1. The input of the first inverter INV1 in the delay control module is connected to the output of the first NAND gate NAND1 in the RS flip-flop module; the output of the first inverter INV1 in the delay control module is connected to the input of the second inverter INV2; the input of the third inverter INV3 in the delay control module is connected to the output of the second NAND gate NAND2 in the RS flip-flop module; and the output of the third inverter INV3 in the delay control module is connected to the input of the fourth inverter INV4.

2. The RC oscillator without a startup circuit as described in claim 1, characterized in that: The Schmitt trigger is composed of the fifth MOSFET M5, the sixth MOSFET M6, the seventh MOSFET M7, the eighth MOSFET M8, the ninth MOSFET M9, the tenth MOSFET M10, and the eleventh MOSFET M11. The drain of the fifth MOSFET M5 is connected to the drain of the sixth MOSFET M6 and the drain of the seventh MOSFET M7; the gate of the sixth MOSFET M6 is connected to the gate of the eighth MOSFET M8; the substrate of the sixth MOSFET M6 is connected to the source of the ninth MOSFET M9; the source of the seventh MOSFET M7 is connected to the drain of the eighth MOSFET M8; the gate of the tenth MOSFET M10 is connected to the gate of the eleventh MOSFET M11 and to the drain of the seventh MOSFET M7; the drain of the tenth MOSFET M10 is connected to the drain of the eleventh MOSFET M11 and to the drain of the ninth MOSFET M9 and the gate of the seventh MOSFET M7; the source and substrate of the sixth MOSFET M6, the substrate of the ninth MOSFET M9, and the source and substrate of the tenth MOSFET M10 are all connected to a power supply; the source and substrate of the fifth MOSFET M5, the substrate of the seventh MOSFET M7, the source and substrate of the eighth MOSFET M8, the gate of the ninth MOSFET M9, and the source and substrate of the eleventh MOSFET M11 are all grounded. The input terminal of the Schmitt trigger is connected to the gate of the sixth MOSFET M6; the reset terminal of the Schmitt trigger is connected to the gate of the fifth MOSFET M5; and the output terminal of the Schmitt trigger is connected to the drain of the tenth MOSFET M10.

3. The RC oscillator without a startup circuit as described in claim 1, characterized in that, The specific workflow includes: When S2 is high and S1 is low, the upper plate of the first capacitor C1 begins to discharge from the power supply voltage, and the upper plate of the second capacitor C2 begins to discharge from the switching voltage V of the second Schmitt trigger COMP2. lh Charging begins; at this time, both inputs of the RS flip-flop are at a high level, and its outputs S1 and S2 maintain the state of the previous stage; when the voltage on the upper plate of the first capacitor C1 drops to the switching voltage V of the first Schmitt trigger COMP1... lh When the R terminal of the RS flip-flop flips from high to low, the output terminal S1 becomes high and S2 becomes low, thus starting the next cycle. The function of the delay control module is to apply the RS flip-flop output signals S1 and S2 to the reset terminal of the Schmitt trigger after a delay, so as to ensure that the reset signal of the Schmitt trigger will not control the output result prematurely before the input signal changes, thus avoiding timing errors. When the RC oscillator is in an abnormal operating state, the input terminals of the RS flip-flop are all at low level, and the circuit is locked. At this time, the reset terminal of the Schmitt trigger plays a key role in starting the circuit. Since the output terminals S1 and S2 of the RS flip-flop are both at high level, S1d and S2d are also at high level. The high-level reset signal makes the input signal of the RS flip-flop also become high level, thereby releasing the locked state of the RS flip-flop and the circuit gradually starts to oscillate.

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