Data integrity verification method and system

Abstract

The invention discloses a data integrity verification method and system. A client uploads a plurality of data blocks and numbers corresponding to the data blocks to a server for storage; the client allocates a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server; the client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified; the server calls the data block to be verified based on the number of the data block to be verified, performs a hash operation on the data block to be verified and the random number, and outputs verification evidence; performs consistency comparison on the verification evidence and the verification tag, and outputs a verification result; the hash operation is implemented by using an SM3 algorithm, and during the implementation of the hash operation, the input message is expanded and iteratively compressed, and a hash value is output.

Description

Technical Field

[0001] The present invention relates to the technical field of data integrity verification, and in particular to a data integrity verification method and system. Background Art

[0002] The statements in this section merely mention background art related to the present invention and do not necessarily constitute prior art.

[0003] With the development of society, the Internet of Things and mobile Internet generate more and more data; however, due to physical reasons of the Internet of Things and mobile Internet, external attacks, and unreliable cloud service providers, the integrity of user stored data cannot be effectively guaranteed, and data loss and data tampering occur frequently. Therefore, users need to regularly verify the integrity of the Internet of Things and mobile Internet data to protect their own rights and interests.

[0004] The existing data integrity verification scheme uses hash algorithm to generate verification tags. Hash algorithm is generally implemented by national secret algorithm. SM3 algorithm, as a hash algorithm, has been widely used in data integrity verification. However, the existing SM3 algorithm is generally implemented based on high-level languages ​​such as C language. Although the universality of the algorithm is guaranteed, the 32-bit low-cost ARM Cortex-M3 and Cortex-M4 series processors are widely used in the Internet of Things and mobile Internet. The execution of SM3 algorithm has problems such as large memory usage and slow speed. In the process of data integrity verification, the national secret algorithm wastes a lot of computing resources inside the processor, and the data integrity verification speed is slow, which affects the user experience. Summary of the invention

[0005] In order to solve the deficiencies of the prior art, the present invention provides a data integrity verification method and system;

[0006] On the one hand, a data integrity verification method is provided;

[0007] Data integrity verification methods, including:

[0008] The client uploads several data blocks and the numbers corresponding to the data blocks to the server for storage;

[0009] The client assigns a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server;

[0010] The client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified;

[0011] The server calls the data block to be verified based on the number of the data block to be verified, performs a hash operation on the data block to be verified and a random number, and then outputs the verification evidence; performs a consistency comparison between the verification evidence and the verification tag, and outputs the verification result;

[0012] The hash operation is implemented by the SM3 algorithm. During the hash operation, the input message is expanded and iteratively compressed to output a hash value. The input message refers to a data block and a random number. The hash value is a verification tag or verification evidence.

[0013] On the other hand, a data integrity verification system is provided;

[0014] Data integrity verification system, including: client and server;

[0015] The client uploads several data blocks and the numbers corresponding to the data blocks to the server for storage;

[0016] The client assigns a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server;

[0017] The client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified;

[0018] The server calls the data block to be verified based on the number of the data block to be verified, performs a hash operation on the data block to be verified and a random number, and then outputs the verification evidence; performs a consistency comparison between the verification evidence and the verification tag, and outputs the verification result;

[0019] The hash operation is implemented by the SM3 algorithm. During the hash operation, the input message is expanded and iteratively compressed to output a hash value. The input message refers to a data block and a random number. The hash value is a verification tag or verification evidence.

[0020] One of the above technical solutions has the following advantages or beneficial effects:

[0021] By optimizing the hash process encountered in the data integrity verification process, the time complexity of the data integrity verification process is greatly reduced. When the data integrity verification process runs on the chip, the power consumption is small, the computing speed of the data integrity verification process is improved, the overall performance of the system is improved, and the user experience is improved.

[0022] The present invention redesigns the compression function of the national secret algorithm in the hashing process, and uses the reuse of registers and stack space, recombining instructions, circular shift constant Tj to obtain constants for each round, synchronous message expansion and other methods combined with the ARMCortex-M3 / M4 series processor rotation shifter characteristics to greatly reduce the number of instructions, improve the execution speed of the SM3 algorithm in the Cortex-M architecture processor, and use internal temporary loop variables and control logic to greatly reduce storage space while basically not affecting the algorithm speed, which is of great value for promoting the application of the SM3 algorithm in resource-constrained scenarios such as the Internet of Things. Compared with the prior art, the present invention has the advantages of fast speed, less memory and storage occupation, etc. BRIEF DESCRIPTION OF THE DRAWINGS

[0023] The accompanying drawings in the specification, which constitute a part of the present invention, are used to provide a further understanding of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute improper limitations on the present invention.

[0024] Figure 1 This is a flow chart of the method of embodiment 1. DETAILED DESCRIPTION

[0025] It should be noted that the following detailed descriptions are exemplary and are intended to provide further explanation of the present invention. Unless otherwise specified, all technical and scientific terms used herein have the same meanings as those commonly understood by those skilled in the art to which the present invention belongs.

[0026] In this embodiment, all data is obtained in compliance with laws and regulations and based on the user's consent, and is used legally.

[0027] Embodiment 1

[0028] like Figure 1 As shown, this embodiment provides a data integrity verification method;

[0029] Data integrity verification methods, including:

[0030] The client uploads several data blocks and the numbers corresponding to the data blocks to the server for storage;

[0031] The client assigns a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server;

[0032] The client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified;

[0033] The server calls the data block to be verified based on the number of the data block to be verified, performs a hash operation on the data block to be verified and a random number, and then outputs the verification evidence; performs a consistency comparison between the verification evidence and the verification tag, and outputs the verification result;

[0034] The hash operation is implemented by the SM3 algorithm. During the hash operation, the input message is expanded and iteratively compressed to output a hash value. The input message refers to a data block and a random number. The hash value is a verification tag or verification evidence.

[0035] Further, the step of expanding and iteratively compressing the input message and outputting a hash value includes:

[0036] S101: Push registers into the stack, apply for stack space, read 8 output hash value words into registers a, b, c, d, e, f, g and h; push the input message memory address and the message tail memory address into the stack;

[0037] S102: T1=2, save T1 to the 4 bytes starting from the 108th byte of the stack; read 16 message words from the input message address, perform byte reverse order and save to the stack, Tj=0x79cc4519; perform 16 rounds of iterative compression; Tj=0x7a879d8a;

[0038] S103: perform several rounds of iterative compression, and read 4 bytes from the 108th byte of the stack to T1;

[0039] S104: Determine whether T1 is 0, if not, proceed to S105; if yes, proceed to S106;

[0040] S105: perform several rounds of iterative compression, Tj is cyclically shifted right by 16 bits, 4 bytes are read from the 108th byte of the stack to T1; T1=T1-1; T1 is stored in the 4 bytes starting from the 108th byte of the stack; return to S103;

[0041] S106: Execute 12 rounds of iterative compression, update the values ​​of registers a, b, c, d, e, f, g and h; read the input message address from the stack to FF; FF = FF + 64, save back to the stack;

[0042] S107: Determine whether FF reaches the end of the message. If not, return to S102; if yes, output the values ​​of registers a, b, c, d, e, f, g and h to the output hash value address; pop the values ​​of registers R4~R11 and LR.

[0043] Further, the S101: pushing registers into a stack, applying for stack space, reading 8 output hash value words into registers a, b, c, d, e, f, g and h; pushing the input message memory address and the message tail memory address into a stack, specifically includes:

[0044] Define the message extension function format: function name (output hash value memory address, input message memory address, input message length);

[0045] Initialize and push the R4-R11 registers and the LR register onto the stack;

[0046] Apply for 112 bytes of stack space to store temporary data;

[0047] Read 8 message words from the output hash value memory address to registers a, b, c, d, e, f, g, h in sequence (for ease of description, we use letters to represent registers R0-R12, LR, which can be set to any register as needed), and store these 8 message words to the first 32 bytes of the stack;

[0048] Bytes 32 to 96 are used to store 16 message words: W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15;

[0049] Bytes 96 to 100 are used to store the output memory address of the hash value;

[0050] The 100th to 104th bytes are used to store the input message memory address, and the 104th to 108th bytes are used to store the message end memory address, where the message end memory address represents the sum of the input message memory address and the message length;

[0051] Bytes 108 to 112 are used to store temporary variables for the internal loop.

[0052] The message word refers to dividing the input message bit string into 32-bit blocks, each block being a message word.

[0053] Further, the S102: T1=2, save T1 to the 4 bytes starting from the 108th byte of the stack; read 16 message words from the input message address, perform byte reverse order and save them to the stack, the 32-bit general register Tj is used to store the SM3 round constant, Tj=0x79cc4519; perform 16 rounds of iterative compression; Tj=0x7a879d8a, specifically including:

[0054] S102-1: Read 16 message words from the input message memory address of the stack in sequence;

[0055] Perform byte reverse operation on 16 message words and save them to the stack addresses corresponding to message words W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15;

[0056] Move the immediate value 2 to the 32-bit general register T1, and save the 32-bit general register T1 to the 108th byte of the stack; the 32-bit general register T1 is used to calculate and store intermediate variables;

[0057] Copy the 32-bit unsigned integer 0x79cc4519 to the Tj register;

[0058] S102-2: Read message word W0 to GG register, read message word W4 to FF register;

[0059] Execute the following sequence of instructions:

[0060] Execute the first type of message expansion and iterative compression round function. The first 8 parameters are 8 iterative compression word registers, the 9th to 14th parameters are the stack message expansion word addresses, the 15th parameter is FF, FF is a 32-bit general register, and the 16th parameter T2 is a 32-bit general register used to perform operations and save intermediate values:

[0061] _SM3_RF_Aa,b,c,d,e,f,g,h,0,48,60,84,44,72,FF,T2;

[0062] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers. The 9th to 15th parameters are the stack message expansion word addresses. The 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values; a, b, c, d, e, d, g, h are 32-bit general registers used to store iterative compression words:

[0063] _SM3_RF_Ad,a,b,c,h,e,f,g,31,36,52,64,88,48,76,T2,FF;

[0064] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0065] _SM3_RF_Ac,d,a,b,g,h,e,f,30,40,56,68,92,52,80,FF,T2;

[0066] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0067] _SM3_RF_Ab,c,d,a,f,g,h,e,29,44,60,72,32,56,84,T2,FF;

[0068] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0069] _SM3_RF_Aa,b,c,d,e,f,g,h,28,48,64,76,36,60,88,FF,T2;

[0070] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0071] _SM3_RF_Ad,a,b,c,h,e,f,g,27,52,68,80,40,64,92,T2,FF;

[0072] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0073] _SM3_RF_A c,d,a,b,g,h,e,f,26,56,72,84,44,68,32,FF,T2;

[0074] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0075] _SM3_RF_Ab,c,d,a,f,g,h,e,25,60,76,88,48,72,36,T2,FF;

[0076] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0077] _SM3_RF_Aa,b,c,d,e,f,g,h,24,64,80,92,52,76,40,FF,T2;

[0078] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0079] _SM3_RF_Ad,a,b,c,h,e,f,g,23,68,84,32,56,80,44,T2,FF;

[0080] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0081] _SM3_RF_Ac,d,a,b,g,h,e,f,22,72,88,36,60,84,48,FF,T2;

[0082] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0083] _SM3_RF_Ab,c,d,a,f,g,h,e,21,76,92,40,64,88,52,T2,FF;

[0084] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0085] _SM3_RF_A a,b,c,d,e,f,g,h,20,80,32,44,68,92,56,FF,T2;

[0086] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0087] _SM3_RF_Ad,a,b,c,h,e,f,g,19,84,36,48,72,32,60,T2,FF;

[0088] Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0089] _SM3_RF_A c,d,a,b,g,h,e,f,18,88,40,52,76,36,64,FF,T2;

[0090] Execute the first type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers. The 9th to 15th parameters are the stack message expansion word addresses. The 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values:

[0091] _SM3_RF_Ab,c,d,a,f,g,h,e,17,92,44,56,80,40,68,T2,FF;

[0092] Read the 32-bit unsigned integer 0x7a879d8a into the Tj register.

[0093] Furthermore, the S103: performing several rounds of iterative compression, reading 4 bytes from the 108th byte of the stack to T1, specifically includes:

[0094] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0095] _SM3_RF_B a,b,c,d,e,f,g,h,16,32,48,60,84,44,72,FF,T2;

[0096] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0097] _SM3_RF_B d,a,b,c,h,e,f,g,15,36,52,64,88,48,76,T2,FF;

[0098] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0099] _SM3_RF_B c,d,a,b,g,h,e,f,14,40,56,68,92,52,80,FF,T2;

[0100] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0101] _SM3_RF_B b,c,d,a,f,g,h,e,13,44,60,72,32,56,84,T2,FF.

[0102] Read a 32-bit unsigned number from byte 108 of the stack into T1.

[0103] Further, the S105: performing several rounds of iterative compression, cyclically shifting Tj right by 16 bits, reading 4 bytes from the 108th byte of the stack to T1; T1=T1-1; storing T1 to the 4 bytes starting from the 108th byte of the stack; returning to S103, specifically includes:

[0104] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0105] _SM3_RF_B a,b,c,d,e,f,g,h,12,48,64,76,36,60,88,FF,T2;

[0106] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0107] _SM3_RF_B d,a,b,c,h,e,f,g,11,52,68,80,40,64,92,T2,FF;

[0108] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0109] _SM3_RF_B c,d,a,b,g,h,e,f,10,56,72,84,44,68,32,FF,T2;

[0110] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0111] _SM3_RF_B b,c,d,a,f,g,h,e,9,60,76,88,48,72,36,T2,FF;

[0112] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0113] _SM3_RF_B a,b,c,d,e,f,g,h,8,64,80,92,52,76,40,FF,T2;

[0114] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0115] _SM3_RF_B d,a,b,c,h,e,f,g,7,68,84,32,56,80,44,T2,FF;

[0116] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0117] _SM3_RF_B c,d,a,b,g,h,e,f,6,72,88,36,60,84,48,FF,T2;

[0118] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0119] _SM3_RF_B b,c,d,a,f,g,h,e,5,76,92,40,64,88,52,T2,FF;

[0120] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0121] _SM3_RF_B a,b,c,d,e,f,g,h,4,80,32,44,68,92,56,FF,T2;

[0122] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0123] _SM3_RF_B d,a,b,c,h,e,f,g,3,84,36,48,72,32,60,T2,FF;

[0124] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values:

[0125] _SM3_RF_B c,d,a,b,g,h,e,f,2,88,40,52,76,36,64,FF,T2;

[0126] Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values:

[0127] _SM3_RF_B b,c,d,a,f,g,h,e,1,92,44,56,80,40,68,T2,FF;

[0128] Tj=Tj circularly shifted left by 16 bits;

[0129] Read a 32-bit unsigned integer from stack 108 bytes to T1;

[0130] T1 = T1-1;

[0131] Save T1 to the 4 bytes starting at byte 108 of the stack.

[0132] Further, the S106: performing 12 rounds of iterative compression, updating the values ​​of registers a, b, c, d, e, f, g and h; reading the input message address from the stack to FF; FF=FF+64, saving back to the stack, specifically includes:

[0133] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0134] _SM3_RF_C a,b,c,d,e,f,g,h,12,48,64;

[0135] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0136] _SM3_RF_C d,a,b,c,h,e,f,g,11,52,68;

[0137] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0138] _SM3_RF_C c,d,a,b,g,h,e,f,10,56,72;

[0139] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0140] _SM3_RF_C b,c,d,a,f,g,h,e,9,60,76;

[0141] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0142] _SM3_RF_C a,b,c,d,e,f,g,h,8,64,80;

[0143] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0144] _SM3_RF_C d,a,b,c,h,e,f,g,7,68,84;

[0145] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0146] _SM3_RF_C c,d,a,b,g,h,e,f,6,72,88;

[0147] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0148] _SM3_RF_C b,c,d,a,f,g,h,e,5,76,92;

[0149] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0150] _SM3_RF_C a,b,c,d,e,f,g,h,4,80,32;

[0151] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0152] _SM3_RF_C d,a,b,c,h,e,f,g,3,84,36;

[0153] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0154] _SM3_RF_C c,d,a,b,g,h,e,f,2,88,40;

[0155] Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses:

[0156] _SM3_RF_C b,c,d,a,f,g,h,e,1,92,44;

[0157] Read a 32-bit unsigned integer from the stack byte 0 to the 32-bit general register T0, a=a XOR FF, and save the value of register a to the stack byte 0;

[0158] Read a 32-bit unsigned integer from the stack 4th byte to T1, b = b XOR T1, and save b to the stack 4th byte;

[0159] Read a 32-bit unsigned integer from the 8th byte of the stack to T0, c = c XOR T0, and save c to the 8th byte of the stack;

[0160] Read a 32-bit unsigned integer from the 12th byte of the stack to T1, d = d XOR T1, and save d to the 12th byte of the stack;

[0161] Read a 32-bit unsigned integer from the 16th byte of the stack to T0, e=e XOR T0, and save e to the 16th byte of the stack;

[0162] Read a 32-bit unsigned integer from the 20th byte of the stack to T1, f = f XOR T1, and save f to the 20th byte of the stack;

[0163] Read a 32-bit unsigned integer from the 24th byte of the stack to T0, g = g XOR T0, and save g to the 24th byte of the stack;

[0164] Read a 32-bit unsigned integer from the 28th byte of the stack to T1, h = h XOR T1, and save h to the 28th byte of the stack;

[0165] Read a 32-bit unsigned integer from the stack at byte 100 to FF;

[0166] Read a 32-bit unsigned integer from the stack at byte 104 to T1;

[0167] FF = FF plus 64;

[0168] Save FF to the 100th byte of the stack.

[0169] Further, the S107: determines whether FF reaches the end of the message, if not, returns to S102; if yes, outputs the values ​​of registers a, b, c, d, e, f, g and h to the output hash value address; and pops the values ​​of registers R4 to R11 and register LR, specifically including:

[0170] Read the output hash value target memory address from the stack 96th byte to FF;

[0171] Store the value of register a to the address corresponding to the FF value;

[0172] Store register b to the address corresponding to the value of FF plus 4;

[0173] The storage register c to FF value plus 8 corresponding address;

[0174] The storage register d to FF value plus 12 corresponds to the address;

[0175] The storage register e to FF value plus 16 corresponding address;

[0176] The storage register f to FF value plus 20 corresponds to the address;

[0177] The storage register g to the address corresponding to the value of FF plus 24;

[0178] The storage register h to FF value plus 28 corresponding address;

[0179] The stack pointer register SP value + 112;

[0180] R4-R11, register PC is popped from the stack and restored to the register.

[0181] Furthermore, the parameters of the first type message expansion and iterative compression round function of _SM3_RF_A are defined as:

[0182] A,B,C,D,E,F,G,H,n,pw0,pw4,pw7,pw13,pw3,pw10,FF,T2;

[0183] Parameters A, B, C, D, E, F, G, H represent 32-bit general registers for storing iterative compressed words, n is an unsigned integer, pw0, pw4, pw7, pw13, pw3, pw10 are unsigned integers corresponding to the addresses of extended message words in the stack; FF, T2 are 32-bit general registers used to perform operations and save intermediate values;

[0184] Replace macro parameters with actual instruction sequence parameters;

[0185] Read 32-bit word from stack position pw0 into GG;

[0186] Read 32-bit word from stack position pw4 to FF;

[0187] Read a 32-bit word from stack pw13 to T0 register; T1 = FF XOR GG; H = H plus GG; D = D plus T1; T0, T1, GG are 32-bit general registers used to perform operations and save intermediate values;

[0188] GG=T0 cyclically shifted left by 17 bits and then XORed with GG;

[0189] Read 32-bit word from stack position pw7 into T1;

[0190] Read 32-bit word from stack position pw10 to T0;

[0191] GG=GG XOR T1; T1=T2 cyclically shifted 25 bits to the left and XORed with T0;

[0192] T0=GG XOR T1; T0=GG XOR T0 after 17 bits of circular left shift;

[0193] GG=GG cyclically shifted left by 9 bits and then XORed with T0;

[0194] Store GG to the 4 bytes starting at position pw0 on the stack;

[0195] T0=A is shifted left 20 bits and then E is added; T0=Tj is shifted left n bits;

[0196] T1=A is shifted left 27 bits and then XORed with T0;

[0197] D = T1 is shifted 25 bits to the left and then added with D; H = T0 is shifted 25 bits to the left and then added with H;

[0198] T0=A XOR B; T0=T0 XOR C; D=D plus T0; T0=E XOR F;

[0199] T0=T0 XOR G; H=H plus T0; T0=H cyclically shifted 23 bits to the left and XORed with H;

[0200] H=H is circularly shifted left by 15 bits and then XORed with T0; B=B is circularly shifted left by 23 bits; F=F is circularly shifted left by 13 bits.

[0201] Furthermore, define _SM3_RF_B, the second type of message expansion and iterative compression round function parameters are:

[0202] A,B,C,D,E,F,G,H,n,pw0,pw4,pw7,pw13,pw3,pw10,FF,T2;

[0203] Parameters A, B, C, D, E, F, G, H represent 32-bit general registers storing iterative compressed words, n is an unsigned integer, pw0, pw4, pw7, pw13, pw3, pw10 are unsigned integers corresponding to the addresses of the extended message words in the stack;

[0204] FF, T2 is a 32-bit general register used to perform operations and store intermediate values;

[0205] Read 32-bit word from stack position pw0 into GG;

[0206] Read 32-bit word from stack position pw4 to FF;

[0207] Read a 32-bit word from stack position pw13 into T0 register;

[0208] T1 = FF XOR GG; H = H plus GG; D = D plus T1; T0, T1, GG are 32-bit general registers used to perform operations and save intermediate values;

[0209] GG=T0 cyclically shifted left by 17 bits and then XORed with GG;

[0210] Read a 32-bit word from stack position pw7 to T1; read a 32-bit word from stack position pw10 to T0;

[0211] GG=GG XOR T1; T1=T2 cyclically shifted 25 bits to the left and XORed with T0;

[0212] T0=GG XOR T1; T0=GG XOR T0 after 17 bits of circular left shift;

[0213] GG=GG is shifted 9 bits to the left and then XORed with T0; GG is stored in the 4 bytes starting from the stack pw0 position;

[0214] T0=A is shifted left 20 bits and then E is added; T0=Tj is shifted left n bits;

[0215] T1 = A cyclically shifted left by 27 bits or XORed with T0; D = T1 cyclically shifted left by 25 bits and then added with D;

[0216] H=T0 is shifted left 25 bits and then H is added;

[0217] T1=A or B; T0=A and C; T1=T1 and C; T0=T0 or T1;

[0218] D=D plus T0; T1=G inverted and added to E; T0=E and F; T0=T0 or T1; H=H plus T0;

[0219] T0=H cyclically shifted to the left by 23 bits and then XORed with H; H=H cyclically shifted to the left by 15 bits and then XORed with T0;

[0220] B=B is circularly shifted left by 23 bits; F=F is circularly shifted left by 13 bits.

[0221] Furthermore, the parameters of the third type of iterative compression round function _SM3_RF_C are defined as:

[0222] A,B,C,D,E,F,G,H,n,pw0,pw4,FF,T2;

[0223] The first 8 parameters A, B, C, D, E, F, G, H represent 32-bit general registers storing iterative compressed words, n is an unsigned integer, pw0 and pw4 are unsigned integers corresponding to the addresses of the extended message words in the stack;

[0224] FF, T2 is a 32-bit general register used to perform operations and store intermediate values;

[0225] T1=FF XOR GG; H=H plus GG; D=D plus T1;

[0226] T0=A is shifted left 20 bits and then E is added; T0=Tj is shifted left n bits;

[0227] T1 = A is shifted 27 bits to the left and then XORed with T0; D = T1 is shifted 25 bits to the left and then added with D;

[0228] H=T0 is shifted left 25 bits and then H is added;

[0229] T1=A or B; T0=A and C; T1=T1 and C; T0=T0 or T1;

[0230] D = D plus T0; T1 = G inverted and added to E; T0 = E and F; T0 = T0 or T1;

[0231] H=H plus T0; T0=H cyclically shifted to the left by 23 bits and then XORed with H; H=H cyclically shifted to the left by 15 bits and then XORed with T0;

[0232] B=B circularly shifted left by 23 bits; F=F circularly shifted left by 13 bits;

[0233] T0=T0 or T1; h=h plus T0; T0=h cyclically shifted 23 bits to the left and then XORed with h;

[0234] h=h is circularly shifted left by 15 bits and then XORed with T0; b=b is circularly shifted left by 23 bits; f=f is circularly shifted left by 13 bits.

[0235] Embodiment 2

[0236] This embodiment provides a cloud storage data integrity verification system;

[0237] Data integrity verification system, including: client and server;

[0238] The client uploads several data blocks and the numbers corresponding to the data blocks to the server for storage;

[0239] The client assigns a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server;

[0240] The client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified;

[0241] The server calls the data block to be verified based on the number of the data block to be verified, performs a hash operation on the data block to be verified and a random number, and then outputs the verification evidence; performs a consistency comparison between the verification evidence and the verification tag, and outputs the verification result;

[0242] The hash operation is implemented by the SM3 algorithm. During the hash operation, the input message is expanded and iteratively compressed to output a hash value. The input message refers to a data block and a random number. The hash value is a verification tag or verification evidence.

[0243] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

Claims

1. A data integrity verification method, characterized in that: include: The client uploads several data blocks and the numbers corresponding to the data blocks to the server for storage; The client assigns a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server; The client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified; The server calls the data block to be verified based on the number of the data block to be verified, and after performing a hash operation on the data block to be verified and the random number, the server outputs the verification evidence; Perform consistency comparison on verification evidence and verification labels, and output verification results; The hash operation is implemented by using the SM3 algorithm. During the implementation of the hash operation, the input message is expanded and iteratively compressed to output a hash value. The input message refers to a data block and a random number. The hash value is a verification tag or verification evidence. The input message is expanded and iteratively compressed to output a hash value, including: S101: Push registers into the stack, apply for stack space, read 8 output hash value words into registers a, b, c, d, e, f, g and h; push the input message memory address and the message tail memory address into the stack; S102: T1=2, save T1 to the 4 bytes starting from the 108th byte of the stack; read 16 message words from the input message address, perform byte reverse order and save to the stack, Tj=0x79cc4519; perform 16 rounds of iterative compression; Tj=0x7a879d8a; S103: perform several rounds of iterative compression, and read 4 bytes from the 108th byte of the stack to T1; S104: Determine whether T1 is 0, if not, proceed to S105; if yes, proceed to S106; S105: perform several rounds of iterative compression, shift Tj right 16 bits in a loop, read 4 bytes from the 108th byte of the stack to T1; T1=T1-1; store T1 to the 4 bytes starting from the 108th byte of the stack; return to S103; S106: Execute 12 rounds of iterative compression, update the values ​​of registers a, b, c, d, e, f, g and h; read the input message address from the stack to FF; FF=FF+64, save back to the stack; S107: Determine whether FF reaches the end of the message. If not, return to S102; if yes, output the values ​​of register a, register b, register c, register d, register e, register f, register g and register h to the output hash value address; pop the values ​​of registers R4~R11 and register LR; S102: T1=2, save T1 to the 4 bytes starting from the 108th byte of the stack; read 16 message words from the input message address, save them to the stack in byte reverse order, and the 32-bit general register Tj is used to store the SM3 round constant, Tj=0x79cc4519; perform 16 rounds of iterative compression; Tj=0x7a879d8a, specifically including: S102-1: Read 16 message words from the input message memory address of the stack in sequence; Perform byte reverse operation on 16 message words and save them to the stack addresses corresponding to message words W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15; Move the immediate value 2 to the 32-bit general register T1, and save the 32-bit general register T1 to the 108th byte of the stack; the 32-bit general register T1 is used to calculate and store intermediate variables; Copy the 32-bit unsigned integer 0x79cc4519 to the Tj register; S102-2: Read message word W0 to GG register, read message word W4 to FF register; Execute the following sequence of instructions: Execute the first type of message expansion and iterative compression round function. The first 8 parameters are 8 iterative compression word registers, the 9th to 14th parameters are the stack message expansion word addresses, the 15th parameter is FF, FF is a 32-bit general register, and the 16th parameter T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A a,b,c,d, e,f,g,h, 0, 48, 60,84, 44, 72, FF, T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers. The 9th to 15th parameters are the stack message expansion word addresses. The 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values; a, b, c, d, e, d, g, h are 32-bit general registers used to store iterative compression words: _SM3_RF_A d,a,b,c,h,e,f,g, 31,36,52,64,88,48,76,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A c,d,a,b, g,h,e,f, 30,40,56,68,92,52,80,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A b,c,d,a, f,g,h,e, 29,44,60,72, 32,56,84,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A a,b,c,d, e,f,g,h, 28,48,64,76,36,60,88,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A d,a,b,c,h,e,f,g, 27,52,68,80,40,64,92,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A c,d,a,b, g,h,e,f, 26,56,72,84,44,68,32,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A b,c,d,a, f,g,h,e, 25,60,76,88,48,72,36,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A a,b,c,d, e,f,g,h, 24,64,80,92,52,76,40,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A d,a,b,c, h,e,f,g, 23,68,84, 32,56,80,44,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A c,d,a,b, g,h,e,f, 22,72,88,36,60,84,48,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A b,c,d,a, f,g,h,e, 21,76,92,40,64,88,52,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A a,b,c,d, e,f,g,h, 20,80,32,44,68,92,56,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A d,a,b,c,h,e,f,g, 19,84,36,48,72, 32,60,T2,FF; Execute the first type of message expansion and iterative compression round function _SM3_RF_A. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_A c,d,a,b, g,h,e,f, 18,88,40,52,76,36,64,FF,T2; Execute the first type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2, FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_A b,c,d,a, f,g,h,e, 17,92,44,56,80,40,68,T2,FF; Read the 32-bit unsigned integer 0x7a879d8a into the Tj register.

2. The data integrity verification method according to claim 1, characterized in that: S101: Pushing registers into a stack, applying for stack space, reading 8 output hash value words into registers a, b, c, d, e, f, g, and h; and pushing the input message memory address and the message tail memory address into a stack, specifically includes: Define the message extension function format: function name (output hash value memory address, input message memory address, input message length); Initialize and push the R4-R11 registers and the LR register onto the stack; Apply for 112 bytes of stack space to store temporary data; Read 8 message words from the output hash value memory address to registers a, b, c, d, e, f, g, h in sequence, and store these 8 message words in the first 32 bytes of the stack; Bytes 32 to 96 are used to store 16 message words: W0, W1, W2, W3, W4, W5, W6, W7, W8, W9, W10, W11, W12, W13, W14, W15; Bytes 96 to 100 are used to store the output memory address of the hash value; The 100th to 104th bytes are used to store the input message memory address, and the 104th to 108th bytes are used to store the message end memory address, where the message end memory address represents the sum of the input message memory address and the message length; Bytes 108 to 112 are used to store temporary variables for internal loops; The message word refers to dividing the input message bit string into 32-bit blocks, each block being a message word.

3. The data integrity verification method according to claim 1, characterized in that: S103: performing several rounds of iterative compression, reading 4 bytes from the 108th byte of the stack to T1, specifically includes: Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B a,b,c,d, e,f,g,h, 16, 32,48,60,84,44,72,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B d,a,b,c, h,e,f,g, 15,36,52,64,88,48,76,T2,FF; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B c,d,a,b, g,h,e,f, 14,40,56,68,92,52,80,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B b,c,d,a, f,g,h,e, 13,44,60,72, 32,56,84,T2,FF; Read a 32-bit unsigned number from byte 108 of the stack into T1.

4. The data integrity verification method according to claim 3, characterized in that: S105: perform several rounds of iterative compression, circularly shift Tj right by 16 bits, read 4 bytes from the 108th byte of the stack to T1; T1=T1-1; store T1 to the 4 bytes starting from the 108th byte of the stack; Return to S103, which specifically includes: Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B a,b,c,d, e,f,g,h, 12,48,64,76,36,60,88,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B d,a,b,c, h,e,f,g, 11,52,68,80,40,64,92,T2,FF; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B c,d,a,b, g,h,e,f, 10,56,72,84,44,68,32,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B b,c,d,a, f,g,h,e, 9,60,76,88,48,72,36,T2,FF; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B a,b,c,d, e,f,g,h, 8,64,80,92,52,76,40,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B d,a,b,c, h,e,f,g, 7,68,84, 32,56,80,44,T2,FF; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B c,d,a,b, g,h,e,f, 6,72,88,36,60,84,48,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B b,c,d,a, f,g,h,e, 5,76,92,40,64,88,52,T2,FF; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B a,b,c,d, e,f,g,h, 4,80, 32,44,68,92,56,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B d,a,b,c, h,e,f,g, 3,84,36,48,72, 32,60,T2,FF; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, the 16th and 17th parameters are FF, and T2 is a 32-bit general register used to perform operations and save intermediate values: _SM3_RF_B c,d,a,b, g,h,e,f, 2,88,40,52,76,36,64,FF,T2; Execute the second type of message expansion and iterative compression round function _SM3_RF_B. The first 8 parameters are 8 iterative compression word registers, the 9th to 15th parameters are the stack message expansion word addresses, and the 16th and 17th parameters T2 and FF are 32-bit general registers used to perform operations and save intermediate values: _SM3_RF_B b,c,d,a, f,g,h,e, 1,92,44,56,80,40,68,T2,FF; Tj=Tj circularly shifted left by 16 bits; Read a 32-bit unsigned integer from stack 108 bytes to T1; T1=T1-1; Save T1 to the 4 bytes starting at byte 108 of the stack.

5. The data integrity verification method according to claim 4, characterized in that: S106: Execute 12 rounds of iterative compression, update the values ​​of register a, register b, register c, register d, register e, register f, register g and register h; read the input message address from the stack to FF; FF=FF+64, save back to the stack, specifically including: Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C a,b,c,d, e,f,g,h, 12,48,64; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C d,a,b,c, h,e,f,g, 11,52,68; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C c,d,a,b, g,h,e,f, 10,56,72; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C b,c,d,a, f,g,h,e, 9,60,76; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C a,b,c,d, e,f,g,h, 8,64,80; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C d,a,b,c, h,e,f,g, 7,68,84; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C c,d,a,b, g,h,e,f, 6,72,88; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C b,c,d,a, f,g,h,e, 5,76,92; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C a,b,c,d, e,f,g,h, 4,80, 32; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C d,a,b,c, h,e,f,g, 3,84,36; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C c,d,a,b, g,h,e,f, 2,88,40; Execute the third type of iterative compression round function _SM3_RF_C. The first 8 parameters are 8 iterative compression word registers, and the 9th to 11th parameters are the stack message extension word addresses: _SM3_RF_C b,c,d,a, f,g,h,e, 1,92,44; Read a 32-bit unsigned integer from the stack byte 0 to the 32-bit general register T0, a = a XOR FF, and save the value of register a to the stack byte 0; Read a 32-bit unsigned integer from the 4th byte of the stack to T1, b = b XOR T1, and save b to the 4th byte of the stack; Read a 32-bit unsigned integer from the 8th byte of the stack to T0, c=c XOR T0, and save c to the 8th byte of the stack; Read a 32-bit unsigned integer from the 12th byte of the stack to T1, d=d XOR T1, and save d to the 12th byte of the stack; Read a 32-bit unsigned integer from the 16th byte of the stack to T0, e=e XOR T0, and save e to the 16th byte of the stack; Read a 32-bit unsigned integer from the 20th byte of the stack to T1, f=f XOR T1, and save f to the 20th byte of the stack; Read a 32-bit unsigned integer from the 24th byte of the stack to T0, g=g XOR T0, and save g to the 24th byte of the stack; Read a 32-bit unsigned integer from the 28th byte of the stack to T1, h=h XOR T1, and save h to the 28th byte of the stack; Read a 32-bit unsigned integer from the stack at byte 100 to FF; Read a 32-bit unsigned integer from the stack at byte 104 to T1; FF=FF plus 64; Save FF to the 100th byte of the stack.

6. The data integrity verification method according to claim 1, characterized in that: Define the parameters of the first type message expansion and iterative compression round functions of _SM3_RF_A as: A,B,C,D,E,F,G,H,n,pw0,pw4,pw7,pw13, pw3,pw10, FF,T2; Parameters A, B, C, D, E, F, G, H represent 32-bit general registers for storing iterative compressed words, n is an unsigned integer, pw0, pw4, pw7, pw13, pw3, pw10 are unsigned integers corresponding to the addresses of extended message words in the stack; FF, T2 are 32-bit general registers used to perform operations and save intermediate values; Replace macro parameters with actual instruction sequence parameters; Read 32-bit word from stack position pw0 into GG; Read 32-bit word from stack position pw4 to FF; Read a 32-bit word from stack pw13 to T0 register; T1 = FF XOR GG; H = H plus GG; D = D plus T1; T0, T1, GG are 32-bit general registers used to perform operations and save intermediate values; GG=T0 cyclically shifted left by 17 bits and then XORed with GG; Read 32-bit word from stack position pw7 into T1; Read 32-bit word from stack position pw10 to T0; GG=GG XOR T1; T1=T2 cyclically shifted 25 bits to the left and XORed with T0; T0=GG XOR T1; T0=GG cyclically shifted 17 bits to the left and XORed with T0; GG=GG cyclically shifted left by 9 bits and then XORed with T0; Store GG to the 4 bytes starting at position pw0 on the stack; T0=A is shifted left 20 bits and then E is added; T0= Tj is shifted left n bits; T1=A is shifted left 27 bits and then XORed with T0; D = T1 is shifted left 25 bits and then added D; H = T0 is shifted left 25 bits and then added H; T0= A XOR B; T0=T0 XOR C; D=D plus T0; T0=E XOR F; T0=T0 XOR G; H=H plus T0; T0=H cyclically shifted 23 bits left and XORed with H; H=H is circularly shifted left by 15 bits and then XORed with T0; B=B is circularly shifted left by 23 bits; F=F is circularly shifted left by 13 bits.

7. The data integrity verification method according to claim 5, characterized in that: Define _SM3_RF_B, the second type of message expansion and iterative compression round function parameters are: A,B,C,D,E,F,G,H,n,pw0,pw4,pw7,pw13, pw3,pw10, FF,T2; Parameters A, B, C, D, E, F, G, H represent 32-bit general registers for storing iterative compressed words, n is an unsigned integer, pw0, pw4, pw7, pw13, pw3, pw10 are unsigned integers corresponding to the addresses of the extended message words in the stack; FF,T2 is a 32-bit general register used to perform operations and store intermediate values; Read 32-bit word from stack position pw0 into GG; Read 32-bit word from stack position pw4 to FF; Read a 32-bit word from stack position pw13 into T0 register; T1 = FF XOR GG; H = H plus GG; D = D plus T1; T0, T1, GG are 32-bit general registers used to perform operations and save intermediate values; GG=T0 cyclically shifted left by 17 bits and then XORed with GG; Read 32-bit word from stack position pw7 into T1; Read 32-bit word from stack position pw10 to T0; GG=GG XOR T1; T1=T2 cyclically shifted 25 bits to the left and XORed with T0; T0=GG XOR T1; T0=GG cyclically shifted 17 bits to the left and XORed with T0; GG=GG is shifted left 9 bits in a loop and then XORed with T0; GG is stored in the 4 bytes starting from the stack pw0 position; T0=A is shifted left 20 bits and then E is added; T0= Tj is shifted left n bits; T1=A is shifted left 27 bits circularly or XORed with T0; D=T1 is shifted left 25 bits circularly and then added with D; H=T0 is shifted left 25 bits and then H is added; T1= A or B; T0= A and C; T1= T1 and C; T0= T0 or T1; D=D plus T0; T1=G inverted and added to E; T0=E and F; T0=T0 or T1; H=H plus T0; T0=H is shifted 23 bits to the left and then XORed with H; H=H is shifted 15 bits to the left and then XORed with T0; B=B is circularly shifted left by 23 bits; F=F is circularly shifted left by 13 bits; or, Define_SM3_RF_C The parameters of the third type of iterative compression round function are: A,B,C,D,E,F,G,H,n,pw0,pw4, FF,T2; The first 8 parameters A, B, C, D, E, F, G, H represent 32-bit general registers storing iterative compressed words, n is an unsigned integer, pw0 and pw4 are unsigned integers corresponding to the addresses of the extended message words in the stack; FF,T2 is a 32-bit general register used to perform operations and store intermediate values; T1= FF XOR GG; H=H plus GG; D=D plus T1; T0=A is shifted left 20 bits and then E is added; T0= Tj is shifted left n bits; T1=A is shifted left 27 bits and then XORed with T0; D=T1 is shifted left 25 bits and then added to D; H=T0 is shifted left 25 bits and then H is added; T1= A or B; T0= A and C; T1= T1 and C; T0= T0 or T1; D=D plus T0; T1=G inverted and added to E; T0=E and F; T0=T0 or T1; H=H plus T0; T0=H cyclically shifted to the left by 23 bits and then XORed with H; H=H cyclically shifted to the left by 15 bits and then XORed with T0; B=B is circularly shifted left by 23 bits; F=F is circularly shifted left by 13 bits; T0=T0 or T1; h=h plus T0; T0=h cyclically shifted 23 bits to the left and then XORed with h; h=h is circularly shifted left by 15 bits and then XORed with T0; b=b is circularly shifted left by 23 bits; f=f is circularly shifted left by 13 bits.

8. A system for executing a data integrity verification method according to any one of claims 1 to 7, characterized in that: include: Client and server; The client uploads several data blocks and the numbers corresponding to the data blocks to the server for storage; The client assigns a random number to each data block, performs a hash operation on each data block and the random number, obtains a verification tag corresponding to each data block, and transmits the data block number and the corresponding verification tag to the server; The client sends a data integrity verification request to the server, wherein the request includes the number of the data block to be verified and the random number corresponding to the data block to be verified; The server calls the data block to be verified based on the number of the data block to be verified, and after performing a hash operation on the data block to be verified and the random number, the server outputs the verification evidence; Perform consistency comparison on verification evidence and verification labels, and output verification results; The hash operation is implemented by the SM3 algorithm. During the hash operation, the input message is expanded and iteratively compressed to output a hash value. The input message refers to a data block and a random number. The hash value is a verification tag or verification evidence.

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