System, method and processor sandwich plate

Abstract

The present disclosure relates to intelligent cable topology detection. One aspect of the present application describes a system including a plurality of stacked mezzanine boards communicatively coupled to a motherboard and a metal enclosure enclosing the motherboard and the mezzanine boards. A respective mezzanine board can include a number of pads, and the metal enclosure can include a plurality of metal strips that are in contact with the pads of the corresponding mezzanine board. The system can also include a logic module on the respective mezzanine board to determine a position of the respective mezzanine board based on a pattern of contact between the metal strips and the pads of the corresponding mezzanine board.

Description

Technical Field

[0001] The present disclosure relates to multi-processor servers. Background Art

[0002] The present disclosure generally relates to a multi-processor server having multiple mezzanine boards. More particularly, the present disclosure relates to automatic detection of the connection topology of the mezzanine boards. Summary of the Invention

[0003] According to one aspect of the present disclosure, a system for detecting the topology of multiple stacked mezzanine boards includes: multiple stacked mezzanine boards, each mezzanine board is communicatively coupled to a motherboard; a metal shell enclosing the motherboard and the mezzanine boards, wherein the corresponding mezzanine board includes several pads, and wherein the metal shell includes multiple metal strips, and the corresponding metal strips are electrically contacted with the pads of the corresponding mezzanine board to ground the pads; and a logic module located on the corresponding mezzanine board to determine the stacking order of the corresponding mezzanine boards in the stacked mezzanine boards based on a contact pattern between the metal strips and the pads of the corresponding mezzanine board, the logic module assigning a unique board identifier to the corresponding mezzanine board based on the determined stacking order, wherein the pads on the corresponding mezzanine board are electrically coupled to corresponding pins of the logic module.

[0004] According to one aspect of the present disclosure, a method for detecting the topology of multiple interconnected and stacked circuit boards, the method comprising: determining, by a logic module on a corresponding circuit board, a stacking order of the circuit boards among the multiple circuit boards, each circuit board comprising several solder pads, the corresponding solder pads being grounded via a metal strip attached to a metal housing enclosing the circuit board, and determining the stacking order comprising determining a grounding pattern of the solder pads on the circuit board; assigning a unique board identifier to the corresponding circuit board based on the determined stacking order; sending information associated with the unique board identifier to a downstream circuit board; receiving information associated with the unique board identifier of the upstream circuit board from an upstream circuit board; and sending information associated with the unique board identifier of the corresponding circuit board and information associated with the unique board identifier of the upstream circuit board to a logic module on a motherboard communicatively coupled to the multiple circuit boards, thereby facilitating the logic module on the motherboard to detect the topology of the interconnected and stacked circuit boards, wherein the solder pads are electrically coupled to several predetermined pins on the logic module.

[0005] According to another aspect of the present disclosure, a processor mezzanine board for a multi-processor server comprises: one or more processors; a plurality of solder pads; and a logic module that determines a stacking order of the processor mezzanine boards in a plurality of stacked processor mezzanine boards based on a contact pattern between a plurality of metal strips and the solder pads, wherein the metal strips are attached to different positions on the side walls of a metal housing that encloses the plurality of stacked processor mezzanine boards, and wherein the logic module assigns a unique board identifier to the processor mezzanine boards based on the determined stacking order, wherein the solder pads are coupled to pins of the logic module. BRIEF DESCRIPTION OF THE DRAWINGS

[0006] Figure 1 An exemplary multi-socket server according to one aspect is shown.

[0007] Figure 2 An exemplary mezzanine board for use in a multi-socket server is shown according to one aspect.

[0008] Figure 3 Illustrated are exemplary electrical connections between pads on a processor mezzanine board and a server chassis according to one aspect.

[0009] Figure 4A An exemplary arrangement of multiple metal bars attached to a server rack is shown, without a mezzanine plate, according to one aspect.

[0010] Figure 4B An exemplary coupling between metal contact fingers and pads on a mezzanine board is shown according to one aspect.

[0011] Figures 5A-5B An exemplary arrangement of pads and metal strips according to one aspect is shown.

[0012] Figure 6 Exemplary communication between a mezzanine board and a motherboard according to one aspect is shown.

[0013] Figure 7 A flow chart illustrating an exemplary process for detecting connection errors in a multi-socket server according to one aspect is presented.

[0014] Figure 8 A flow chart illustrating an exemplary process for detecting the topology of a plurality of interconnected and stacked circuit boards according to one aspect is presented.

[0015] In the drawings, like reference numerals refer to like drawing elements. DETAILED DESCRIPTION

[0016] The following description is presented to enable anyone skilled in the art to make and use the examples, and is provided in the context of a specific application and its requirements. Various modifications to the disclosed examples will be readily apparent to those skilled in the art, and the general principles defined herein may be applied to other examples and applications without departing from the spirit and scope of the invention. Therefore, the scope of the present disclosure is not limited to the examples shown, but is to be accorded the widest scope consistent with the principles and features disclosed herein.

[0017] The growing demand for high-performance servers in data centers may require servers to include multiple processors that work together to complete computing tasks. Multi-processor servers may also be called multi-socket servers because each processor can have its own socket. As the number of processors / sockets in a server increases, they can no longer fit on a single printed circuit board (PCB). Mezzanine boards may be required to accommodate multiple processors / sockets. When there are more than four sockets in a server, multiple (for example, two or three) mezzanine boards can be used to accommodate these sockets. In addition, to fit into a server rack (for example, a 1U or 2U rack), the mezzanine boards can be stacked vertically, one on top of the other.

[0018] Interconnections between processors on different mezzanine boards are typically implemented via cables because cascading mezzanine boards together using directly paired connectors is prohibited due to connector size limitations and signal integrity challenges. During manufacturing testing or field upgrades, it is desirable to have a mechanism to verify cable connections between mezzanine boards (i.e., which cable connects to which board). Otherwise, the system may have an invalid topology, leading to interoperability issues. Existing approaches to this problem rely on cables and boards with different connector types to prevent incorrect connections between boards. After cable installation, the system BIOS (Basic Input / Output System) can use the coherent bus (i.e., the cable) as an in-band detection mechanism during the power-on self-test (POST) process to verify the topology. For example, one board may be equipped with one type of connector, while different boards may be equipped with different types of connectors. Only cables with these two different types of connectors can connect the two boards. By specifying the connector type on each board and providing special cables with specific connector types, incorrect connections between boards can be prevented. When installers test or upgrade servers, they will not mistakenly connect two boards that should not be connected because the mismatched connector types will prevent this. However, these approaches have drawbacks because different types of boards and cables can increase the complexity and cost of the supply chain for manufacturing servers. It is desirable to use the same printed circuit board assembly (PCBA) to manufacture the processor mezzanine board in the server and use the same cable for the interconnection between these boards to reduce non-recurring engineering (NRE) costs and stock keeping units (SKUs) for cables and PCBAs.

[0019] The present disclosure describes a solution for automatically detecting the positioning order of multiple stacked mezzanine boards within a server. Each mezzanine board may include multiple (e.g., two or more) solder pads near the front edge. The metal rack that encloses the mezzanine boards and the motherboard may include several metal strips attached to the side walls of the rack. Each metal strip can contact a corresponding solder pad on the mezzanine board, thereby grounding the corresponding solder pad. In addition, each solder pad can be coupled to a specific pin of a complex programmable logic device (CPLD) on the mezzanine board. Therefore, grounding the solder pad can lower the voltage level of the specific pin. By arranging the metal strips in a special pattern so that each mezzanine board can have a unique combination of grounded and ungrounded solder pads, the stacking order of the mezzanine boards can be automatically detected.

[0020] According to some aspects, a multi-socket or multi-processor server can have multiple mezzanine boards, each of which includes one or more slots. The mezzanine boards have the same type of cable connectors and the same firmware package, which facilitates interconnection between the mezzanine boards.

[0021] Figure 1 An exemplary multi-socket server according to one aspect is shown. The multi-socket server 100 may include a rack 102, a motherboard 104, and several mezzanine boards (e.g., boards 106 and 108) coupled to each other and to the motherboard 104. The multi-socket server 100 may also include other components (e.g., component 110). These other components may include power supplies, cooling fans, etc. Each mezzanine board may include the same type of cable connector, thereby allowing any mezzanine board to be connected to any other mezzanine board. More specifically, during installation, the installer may randomly connect the mezzanine boards to each other without regard to a particular connection order. For example, the cable connection order may be top-down, bottom-up, or random. This allows for simple installation, but may result in invalid processor topologies. In addition, during testing or upgrades, if a mezzanine board needs to be replaced, it is necessary to know which board in the server rack should be replaced. Therefore, it is desirable to detect the connection sequence and topology between the mezzanine boards and the motherboard after installation (i.e., after the cables are connected) so that the firmware on each mezzanine board can be correctly configured and, in the event that a mezzanine board needs to be replaced, the motherboard can inform the user which mezzanine board (e.g., Figure 1 The top, middle, or bottom mezzanine board in the example shown needs to be replaced. Although the installer can connect the cables according to a certain order and topology (e.g., top-down or bottom-up topology) so that the cable connection order is determined for the motherboard, this requirement can make the installation process cumbersome and increase installation time and cost. It would be better to have an automatic method to detect the connection topology of the mezzanine board, even if the mezzanine boards are connected in a random order.

[0022] In order to facilitate automatic detection of the connection order and topology of multiple mezzanine boards and motherboards, the server rack and each mezzanine board can be modified. More specifically, each mezzanine board can include a plurality of predetermined pads (which can be collectively referred to as a topology detection pad array), and the rack (usually including a metal housing) can include a plurality of metal strips placed at predetermined positions to ground the pads when they touch. The positions of the metal strips can be designed so that different positions (e.g., Figure 1 The topology detection pad arrays on the mezzanine board (at the top, middle, or bottom position in the motherboard) can have different ground patterns. The ground patterns of the topology detection pad arrays can be detected by a logic unit (e.g., a CPLD or a field programmable gate array (FPGA)) on the mezzanine board, which in turn can send a signal to a corresponding logic unit on the motherboard to allow the motherboard to determine a cable connection topology indicating interconnections between the mezzanine boards and between the mezzanine board and the motherboard.

[0023] Figure 2 An exemplary mezzanine board for use in a multi-socket server according to one aspect is shown. Mezzanine board 200 may include several components, such as sockets 202 and 204, a complex programmable logic device (CPLD) 206, several memory sockets (e.g., memory socket 208), several external input / output (I / O) ports (e.g., external I / O port 210), several internal I / O ports (e.g., internal I / O port 212), and several storage ports (e.g., storage port 214). Note that the external I / O ports allow mezzanine board 200 to connect to external peripheral devices, and the internal I / O ports allow mezzanine board 200 to connect to a motherboard and other mezzanine boards.

[0024] In addition to these components, the mezzanine board 200 may also include several pads that can be used for automatic detection of the cable connection topology. These pads (e.g., pads 216 and 218) can form a topology detection pad array that facilitates automatic detection of the connection topology of the mezzanine board. Figure 2 In the example shown, the pads 216 and 218 are located near or adjacent to the front edge of the mezzanine board 200. Note that the front edge of the mezzanine board 200 refers to the edge facing the front side of the server rack (or the user-facing side). Figure 2Also shown are pads 216 and 218 located near the left and right edges, respectively, when viewed from the front side of the board. This arrangement can allow easy access to the pads via metal strips attached to the side walls of the server rack. Both pads 216 and 218 are coupled (e.g., via metal traces or transmission lines) to CPLD 206. In some aspects, pads 216 and 218 can each be coupled to a pin of CPLD 206 such that when the pads are grounded, the voltage level of the corresponding pin can be pulled down from its default high level to a ground level. Specific pads can be grounded via a metal strip attached to the server rack, which includes metal and is typically grounded. Multiple metal strips attached to the server rack can be arranged according to a predetermined pattern such that, depending on the location of the mezzanine board (e.g., Figure 1 ), pads 216 and 218 can have a predetermined, unique grounding pattern. For example, both pads can be grounded or ungrounded, or one pad can be grounded while the other is ungrounded. In one example, the top mezzanine board in the server rack can have its left pad (e.g., pad 216) ungrounded and its right pad (e.g., pad 218) grounded; the middle mezzanine board in the server rack can have its left pad (e.g., pad 216) grounded and its right pad (e.g., pad 218) ungrounded; and the bottom mezzanine board in the server rack can have both pads (e.g., pads 216 and 218) grounded. If the grounding state of the pads can be represented using a single bit (e.g., a bit value of "1" indicates an ungrounded state and a bit value of "0" indicates a grounded state), the grounding patterns of the pads on the top, middle, and bottom mezzanine boards can be represented as "10," "01," and "00," respectively. These grounding patterns can be used to identify the locations of the mezzanine boards. In other words, using two pads can form a two-bit identifier that the system can use to determine four unique locations. Note that in the above example, the bit pattern "11" is not used. A larger number of pads can extend the range of this identifier and accommodate more unique locations of the mezzanine board. CPLD 206 can detect the ground pattern to determine the location of mezzanine board 200.

[0025] Because the rack of the server is typically grounded for safety, grounding the pads may be achieved by establishing a direct electrical connection or path between the pads and the rack. Figure 3 Figure 2 shows an exemplary electrical connection between pads on a processor mezzanine board and a server rack according to one aspect. Figure 3 Only a partial view of the rack and mezzanine board is shown, and not all components within the server rack or on the mezzanine board are shown. Figure 3In FIG, a rack 300 includes a processor mezzanine board 302, which may include a CPLD 304 and pads 306 and 308 electrically coupled to the CPLD 304. Two metal strips (or fingers) 310 and 312 are attached to opposite sidewalls of the rack 300 and are in direct contact with the pads 306 and 308, respectively. Because the metal strips 310 and 312 have low resistivity, a conductive path can be established between each pad and the server rack, connecting the pads 306 and 308 to ground. The grounded pads 306 and 308 can, in turn, pull down the voltage level of the corresponding pins on the CPLD 304, allowing the CPLD 304 to detect the presence of the metal strips 306 and 308 by detecting the voltage level of their corresponding pins.

[0026] Figure 4A An exemplary arrangement of multiple metal bars attached to a server rack is shown without mezzanine plates according to one aspect. In this example, the server rack 400 can accommodate three vertically stacked mezzanine plates. Figure 4A The left side of FIG. 4 shows an isometric rear view of the rack 400 , illustrating one side wall of the rack 400 , while the right side shows an isometric rear view of the rack 400 , illustrating the other side wall.

[0027] Figure 4A The left side of the figure shows a support bracket 404 attached to the side wall 402 of the rack 400. When viewed from the front of the rack 400, the side wall 402 is on the right hand side. The support bracket 404 can be an L-shaped metal piece with two connecting sections. One section can be mounted on the side wall 402, while the other section extends into the interior space of the rack 400. Figure 4A In the example shown, two metal strips 406 and 408 are attached to the support bracket 404. Each metal strip may include an attachment base for attaching the metal strip to the support bracket 404 and a pad for connecting to a processor mezzanine board (e.g., Figure 2 216) shown in FIG. 21. For example, the metal strip 406 may include an attachment base 442 and an L-shaped contact finger 444. According to one aspect, the metal strip 406 may have a single-piece structure. Alternatively, the attachment base 442 and the L-shaped contact finger 444 may be welded together. The attachment base 442 may be attached to the support bracket 404 using a suitable attachment mechanism (e.g., using screws or welding). The L-shaped contact finger 444 may be attached to a processor mezzanine board (e.g., Figure 2400 ). The metal strips 406 can be arranged in such a way that the L-shaped contact fingers 444 can be pressed against the surface of the sandwich board when the corresponding sandwich board is installed in the rack 400. This can be achieved by aligning the L-shaped contact fingers 444 with the surface of the sandwich board. During installation, when the sandwich board is pushed into the rack 410, the slender shape of the contact fingers 444 can allow the contact fingers 444 to move vertically within a certain range. According to one aspect, the L-shaped contact fingers 444 can also include recesses 446, which can ensure good contact between the metal strips 406 and the pads on the sandwich board. According to some aspects, each pad on the sandwich board can have a corresponding groove to accommodate the recess 446, thereby allowing the metal strips 406 to snap into place.

[0028] exist Figure 4A In the example shown, each support bracket can include three segments (i.e., a top segment 452, a middle segment 454, and a bottom segment 456 of the support bracket 404), to which metal strips can be attached. The location of each segment corresponds to the location of a mezzanine board within the rack 400. For example, the top segment 452 corresponds to the top mezzanine board, the middle segment 454 corresponds to the middle mezzanine board, and the bottom segment 456 corresponds to the bottom mezzanine board. On the other hand, the motherboard is typically located below the bottom mezzanine board. Figure 4A In the left figure of , metal strips 406 and 408 are attached to the top and bottom sections 452 and 456, respectively, of the support bracket 404. This means that the metal strips 406 and 408 will make contact with pads on the top and bottom mezzanine boards, respectively.

[0029] Figure 4A The right side of the figure shows support bracket 412 attached to side wall 410 of rack 400. When viewed from the front of rack 400, side wall 410 is on the left. The right side shows metal strips 414 and 416 attached to support bracket 412. More specifically, metal strips 414 and 416 can be attached to the middle and bottom sections of support bracket 412, respectively. Thus, metal strips 414 and 416 can contact pads on the middle and bottom mezzanine boards, respectively.

[0030] Figure 4B An exemplary coupling between metal contact fingers and pads on a mezzanine board is shown according to one aspect. Figure 4B , viewing the server rack from the front. Figure 4B The right side corresponds to Figure 4A On the left side, Figure 4B The left side corresponds to Figure 4A on the right side. Figure 4B 4. A portion of a server rack is shown that includes mezzanine boards 418, 420, and 422 stacked on top of each other. More specifically, mezzanine board 418 is located in a server rack (e.g., Figure 4A4) at the top of the server rack 400 shown in FIG, with mezzanine board 420 in the middle and mezzanine board 422 at the bottom. Note that the motherboard included in the server rack is not in FIG. Figure 4B , and is typically located below the bottom sandwich panel 422.

[0031] Figure 4B The right side of FIG. 4 shows a support bracket 404 coupled to a rack sidewall 410. Metal bars 406 and 408 are attached to the top and bottom sections of the support bracket 404, respectively. Figure 4B It is also shown that the mounting positions of support bracket 404 and metal strips 406 and 408 can be selected so that the L-shaped contact fingers of metal strips 406 and 408 are substantially aligned with the top surfaces of top and bottom sandwich panels 418 and 422, respectively. More specifically, the contact fingers of metal strip 406 directly contact pads 424 on top sandwich panel 418, and the contact fingers of metal strip 408 directly contact pads 428 on bottom sandwich panel 422. On the other hand, pads 426 on middle sandwich panel 420 do not contact any contact fingers. As a result, pads 424 and 428 are grounded, while pad 426 remains ungrounded.

[0032] Figure 4B The left side of FIG. 4 shows support bracket 412 coupled to rack sidewall 402. Metal strips 414 and 416 are attached to the middle and bottom sections of support bracket 412, respectively. Support bracket 412 and metal strips 414 and 416 are positioned so as to ensure that the L-shaped contact fingers of metal strips 414 and 416 are substantially aligned with the top surfaces of middle and bottom sandwich panels 420 and 422, respectively. More specifically, the contact fingers of metal strip 414 directly contact solder pads 432 on middle sandwich panel 420, while the contact fingers of metal strip 416 directly contact solder pads 434 on bottom sandwich panel 422. On the other hand, solder pads 430 of top sandwich panel 418 do not contact any of the contact fingers. As a result, solder pads 432 and 434 are grounded, while solder pad 430 remains ungrounded.

[0033] By combining Figure 4B The left and right sides of Figure 4A As can be seen from the corresponding right and left sides of the diagram, metal strips 414 and 416 are attached to the middle and bottom sections of support bracket 412, respectively, and metal strips 406 and 408 are attached to the top and bottom sections 452 and 456, respectively, of support bracket 404. Thus, the left pad 430 of the top mezzanine board 418 is not grounded, and the right pad 424 is grounded. The left pad 432 of the middle mezzanine board 420 is grounded, and the right pad 426 is not grounded. Both the left pad 434 and the right pad 428 of the bottom mezzanine board 422 are grounded. As previously described, these pads can be coupled to the CPLDs (e.g., Figure 2206 shown in FIG). Each pair of pads (e.g., pads 430 and 424, pads 432 and 426, and pads 434 and 428) can be coupled to a pair of dedicated CPLD pins on each corresponding mezzanine board (e.g., mezzanine board 418, mezzanine board 420, and mezzanine board 422). Each CPLD pin can have a default high voltage value. When the pad is grounded, the voltage level on the connected CPLD pin is pulled low or reduced. If we represent the high voltage state of the CPLD pin as "1" and the low voltage state as "0", the state of the CPLD pin on the top mezzanine board 418 can be represented as "10", where "1" corresponds to the ungrounded pad 430 and "0" corresponds to the grounded pad 424. Similarly, the state of the CPLD pin on the middle mezzanine board 420 can be represented as "01", while the state of the CPLD pin on the bottom mezzanine board 422 can be represented as "00". In this way, the position of each mezzanine board can be uniquely encoded based on the voltage level of the CPLD pin. Thus, by examining the state of its pins, each CPLD can determine its current position in the stack (e.g., Figures 4A-4B In one aspect, each CPLD can also report its pin status to the motherboard (e.g., to the CPLD on the motherboard), thereby informing the motherboard of its current position. Note that in the current example, there are three mezzanine boards in total, and the bit value "11" is not used.

[0034] exist Figures 4A-4B In the example shown, each mezzanine board has two pads located near opposing sidewalls of the server rack, allowing two separate metal strips to be attached to those opposing sidewalls, thereby contacting the pads. Generally speaking, there are different ways to arrange the pads and metal strips. For example, the pads could all be located near one sidewall of the rack, and a metal strip attached to the same sidewall could be used to ground these pads.

[0035] Figures 5A-5B An exemplary arrangement of pads and metal strips according to one aspect is shown. Figure 5A A mezzanine board 502 is shown located inside the chassis 500. The mezzanine board 502 includes a CPLD 504 and solder pads 506 and 508 coupled to the CPLD 504. The solder pads 506 and 508 may be located near the left side wall of the chassis 500. Figure 5A Also shown is a metal strip 510 comprising two finger contacts, each of which is in direct contact with a pad. In other words, both pads 506 and 508 are grounded via the metal strip 510. Figure 5BA mezzanine board 512 is shown located inside the chassis 500. The mezzanine board 512 may be identical to the mezzanine board 502 and may include a CPLD 514 and solder pads 516 and 518 located near the left side wall of the chassis 500. Figure 5B It is shown that metal strip 520 includes only one finger contact, and this finger contact is in direct contact with pad 518. Pad 516 is not coupled to any finger contact. As a result, pad 518 is grounded through metal strip 520, while pad 516 remains ungrounded.

[0036] from Figures 5A-5B It can be seen that the grounding pattern of the pads on each mezzanine board can be determined by the shape of the corresponding metal strip (or the number of contact fingers). Therefore, by arranging the metal strips attached to the server rack into a predetermined pattern, the grounding pattern of the pads on the mezzanine board at each position (for example, the top, middle, or bottom position) can be predetermined. Therefore, the position of the mezzanine board can be determined based on the grounding pattern.

[0037] Other variations are possible. For example, two pads (i.e., two bits) can be used to encode up to four different board positions. Increasing the number of pads (e.g., to three or four) can increase the number of possible board positions. For example, three pads can be used to encode eight board positions. On the other hand, as the number of mezzanine boards included in a server rack decreases, the number of pads on each mezzanine board also decreases. For example, if there are only two mezzanine boards in a server rack, only one pad is required on each board. Furthermore, in addition to attaching the metal strips to the side walls of the server rack, the metal strips can also be attached to other parts of the server rack (e.g., the top or bottom cover), as long as the position of the metal strips can correspond to the position of the mezzanine boards to allow the metal strips to contact the pads on the surface of the mezzanine boards. Note that the size and position of the pads depend on the board design. Each pad should be large enough to allow easy contact between the pad and the contact fingers of the metal strip. The metal strips and support brackets can be made of a variety of metal materials, including but not limited to: aluminum, steel, stainless steel, brass, copper, zinc, alloys, and combinations thereof.

[0038] Once the CPLD on each mezzanine board detects the ground pattern of the pads, it can determine the mezzanine board's position in the stack of mezzanine boards. The CPLD can then assign a slot number or identifier (ID) to each processor on the mezzanine board according to a predetermined numbering scheme. For example, it can be determined that the slot numbers are represented using binary bits, and that they increment from the top of the stack to the bottom. In this case, the two processors on the top mezzanine board can be assigned slot numbers 001 and 010, while the processors on the next mezzanine board in the stack can be assigned slot numbers 011 and 100, and so on. Other numbering schemes are also possible. For example, three bits can be used to number eight processors, and more bits are required for more processors. Slot numbers can also increment from the bottom to the top, or they can be unordered, as long as the mapping between slot numbers and mezzanine board positions is known. The determined slot numbers can be communicated to the motherboard and other connected mezzanine boards via cables. The CPLD can also assign a unique board number or ID to each mezzanine board position. For example, the top board can be numbered board 1, the next board can be numbered board 2, and so on.

[0039] Figure 6 An exemplary communication between a mezzanine board and a motherboard is shown according to one aspect. Figure 6 In the embodiment, motherboard 600 is coupled to processor mezzanine boards 602, 604 and 606. Motherboard 600 may include logic units for performing several logic functions, which may be used to detect invalid topologies or connections between mezzanine boards. According to one aspect, the logic unit may be a CPLD, such as CPLD 608. Other types of programmable logic, such as FPGA, may also be used. Each mezzanine board may also include logic units for detecting the position of the mezzanine board and setting the slot number of the processor. In addition, each mezzanine board may include an inter-board connector for communicating with other mezzanine boards. The connector may include a transmitter for sending signals and a receiver for receiving signals. For example, mezzanine board 602 may include CPLD 610 (which may be connected to Figure 2 ), a transmitter 612 and a receiver 614. The transmitter of one board can be coupled (e.g., using a cable) to a receiver on a different board. Note that the board that sends information can be referred to as an upstream board, and the board that receives information can be referred to as a downstream board.

[0040] exist Figure 6In the example shown, the transmitter 612 of board 602 is coupled to the receiver of board 604 (i.e., board 604 is downstream relative to board 602), the transmitter of board 604 is coupled to the receiver of board 606 (i.e., board 606 is downstream relative to board 604), and the transmitter of board 606 is coupled to the receiver of board 602 (i.e., board 602 is downstream relative to board 606). After the cables are installed and the server is powered on, the CPLD of each mezzanine board can automatically detect the position of the board in the board stack and assign a slot number to each processor on the board. The CPLD can optionally set the board number. In addition to the slot number, the CPLD can also determine the port number of the connector. Note that the port number is fixed and depends on the connection between the connector and other components on the board. In some aspects, the port number of the connector can include two bits.

[0041] Slot and port information (which may include the processor's slot number and the corresponding port number of the connector on the mezzanine board) can be communicated by the CPLD on one mezzanine board to the CPLD on the connected downstream mezzanine board. Furthermore, the CPLD on the mezzanine board can also receive slot and port information from the connected upstream mezzanine board. For example, CPLD 610 on mezzanine board 602 can send its own slot and port information to mezzanine board 604 via transmitter 612 and receive slot and port information from mezzanine board 606 via receiver 614. CPLD 610 can compare the received slot and port information with a predetermined topology to detect whether a connection is invalid. For example, a particular design may require different mezzanine boards to be connected in a certain order (e.g., mezzanine board 602 connected to mezzanine board 604, mezzanine board 604 connected to mezzanine board 606, and so on). By comparing the slot and port information received from mezzanine board 606, CPLD 610 can determine whether the connection between mezzanine boards 602 and 606 is a valid connection.

[0042] In addition, each mezzanine board's CPLD can send its own slot and port information, as well as the slot and port information received from the connected upstream mezzanine board, to CPLD 608 of motherboard 600. For example, CPLD 610 can send slot and port information associated with the local mezzanine board (i.e., board 602) and slot and port information associated with the remotely coupled mezzanine board (i.e., board 606) to CPLD 608 of motherboard 600. According to an alternative aspect, each mezzanine board's CPLD can send its own board ID and the remote board's ID to CPLD 608, and CPLD 608 can assign a slot number to the processor on each board based on the corresponding board ID. Note that an exemplary board ID can include a manufacturer's serial number that is a user-defined identifier. In one example, the board ID can be a two-bit identifier that indicates the board's position in the stack, where "10," "01," and "00" indicate the top, middle, and bottom positions, respectively. Once CPLD 608 receives the slot and port information from all mezzanine boards, it can determine the connection topology of these mezzanine boards and their position in the stack. For example, based on the slot and port information received from mezzanine board 602, CPLD 608 can determine that board 602 is at the top of the stack and its receiver is coupled to the transmitter of board 606. Similarly, based on the slot and port information received from mezzanine boards 604 and 606, CPLD 608 can determine that board 604 is in the middle of the stack and its receiver is coupled to the transmitter of board 602, and that board 606 is at the bottom of the stack and its receiver is coupled to the transmitter of board 604. In addition to determining inter-mezzanine board cable connections, CPLD 608 of motherboard 600 can also determine the cable connections between each mezzanine board and motherboard 608 based on the slot and port information received from each mezzanine board. CPLD 608 can further determine whether the mezzanine board connection topology is invalid and log an error message for any invalid connections detected. In some aspects, CPLD 608 can also send a notification to the system BIOS to halt the boot process and display an error message indicating the invalid connection.

[0043] Figure 7 A flow chart illustrating an exemplary process for detecting connection errors in a multi-socket server according to one aspect is presented. During operation, a motherboard (e.g., Figure 1 ) and mezzanine boards (e.g., Figure 1 The mezzanine boards 106 and 108 shown in FIG are placed in a server rack (e.g., Figure 1 The server rack may include a plurality of pre-installed metal bars / fingers (e.g., Figure 4A), which are mechanically attached and electrically coupled to one or more side walls of the server rack. The mounting locations of the metal strips / fingers have been arranged in such a way that each metal strip / fingers can be connected to a corresponding sandwich panel (e.g., Figure 2 ) on the sandwich board 200 shown in FIG. Figure 2 The pads are electrically coupled to the logic modules (e.g., Figure 2 206) and grounding the pads can cause the voltage level of the pins to be pulled down from the default high level. The metal strips can be arranged so that the contact pattern between the metal strips and the pads on each mezzanine board can be unique. The mezzanine boards can then be interconnected using cables (operation 704). Note that the mezzanine boards can be identical in terms of having the same type of cable connectors and firmware packages.

[0044] After the motherboard and mezzanine boards are installed and connected, the server is powered on (operation 706). Once powered on, the logic modules on each mezzanine board (e.g., Figure 6 602) can determine the position of the mezzanine board within the stack (operation 708). More specifically, the logic module can detect the contact pattern between the metal strips and the pads and then determine the position of the board based on the detected contact pattern. The logic module can also assign a number of processors on the same mezzanine board (e.g., Figure 2 202 and 204 shown in FIG) sets a slot number (operation 710). Optionally, the logic module may assign a unique board identifier (ID) to the mezzanine board based on its location information, and the processor's slot number or ID may be calculated based on the board ID according to a predetermined algorithm. According to some aspects, each mezzanine board may include two processors, and the slot number corresponding to each processor may be represented using multiple binary bits.

[0045] The logic module on each mezzanine board can send the slot and port information of the local board to the remote downstream board via the cable interconnecting the mezzanine boards, and receive the slot and port information of the remote board from the remote upstream board (operation 712). Note that the inter-board connector on each mezzanine board can have a transmitter for sending information to the downstream board and a receiver for receiving information from the upstream board. The logic module on each mezzanine board can also send its own slot and port information and the slot and port information from the upstream board to the logic module on the motherboard (e.g., Figure 6 CPLD 608 on motherboard 600 shown in (operation 714).

[0046] The logic module (e.g., CPLD or FPGA module) on the motherboard can then determine the connection topology of all mezzanine boards based on the slot and port information received from each mezzanine board (operation 716), and determine whether the topology is invalid or whether the connection between the two boards is invalid (operation 718). Determining whether the topology is invalid may include comparing the detected topology with a predefined known topology. According to one aspect, the system can define and store a limited number of valid topologies. During booting, the detected topology can be compared with the known valid topologies. By controlling the number of valid topologies, verification work can be saved. Verifying the cable connection topology of the mezzanine board during system boot can ensure system performance. If there are no invalid cable connections, the server continues the boot process (operation 720). If the topology is invalid or an invalid cable connection is detected, the system stops the boot process and displays and logs an error message to indicate the invalid connection (operation 722).

[0047] Figure 8 A flow chart illustrating an exemplary process for detecting the topology of a plurality of interconnected and stacked circuit boards according to one aspect is presented. During operation, logic modules (e.g., Figure 6 602) can determine the location of the circuit board (operation 802). Note that the circuit board may include several pads (e.g., Figure 2 ), and the pads may be attached to a metal housing (e.g., Figure 4A 400) of the rack shown in FIG. Figure 4A To determine the location of the circuit board, the logic module can determine the grounding pattern of the pads on the circuit board.

[0048] The logic module may then assign a unique identifier to the circuit board based on its determined position (operation 804). For example, the identifier of the circuit board may be incremented or decremented along the stacking direction of the circuit boards (e.g., from top to bottom or from bottom to top). The logic module may further send information associated with the unique identifier of the current circuit board to the downstream circuit board (operation 806) and receive information associated with the identifier of the upstream circuit board from the upstream circuit board (operation 808). The logic module on the circuit board may also send information associated with the unique identifier of the current circuit board to the logic module on the motherboard (e.g., a motherboard) that is communicatively coupled to the plurality of circuit boards. Figure 6 6) sends information associated with the identifier of the corresponding circuit board and information associated with the identifier of the upstream circuit board (operation 810). The logic module on the motherboard can then detect the topology of the interconnected and stacked circuit boards (operation 812).

[0049] In general, the present disclosure describes a multi-slot server with the ability to automatically detect the cable connection topology of multiple stacked mezzanine boards. In order to facilitate automatic detection of the position of each mezzanine board in the stack, each mezzanine board may include an array of topology detection pads, which includes several pads, and the server rack may include several metal strips attached to its sidewalls or frame. The positions of the pads and the metal strips can be arranged to allow each metal strip to be in direct contact with the pads, which causes the pads to be grounded. The distribution of the metal strips can be configured to ensure that the topology detection pad array on each mezzanine board can have a unique grounding pattern corresponding to the position of the board in the stack. Each mezzanine board can have a logic module (e.g., a CPLD device or an FPGA device) that can detect the grounding pattern of the topology detection pad array to detect the board position. The logic module on each board can also assign a slot ID to the processor on the board and communicate this information to the connected downstream board. The logic module can then report the slot ID of the local board and the upstream board to the motherboard to allow the logic module on the motherboard to determine the connection topology of all mezzanine boards in the server to detect whether there is an invalid cable connection. Automatic detection of the cabling topology may occur during the server boot process, and the boot process may be stopped when an invalid cable connection is detected.

[0050] Compared to existing solutions that require a different type of cable connector on each mezzanine board, the described solution allows all mezzanine boards to be manufactured based on a common PCBA design. The mezzanine boards can be identical in terms of cable connectors and firmware packaging, which can reduce NRE costs. In addition, the described solution does not rely on a specific type of cable or PCBA with a specific type of cable connector, thus providing flexibility in selecting cables or PCBAs. As a result, the number of cable and printed circuit board SKUs can be reduced, reducing inventory costs. Other benefits include reducing verification work by limiting the number of valid topologies, and simplifying debugging and inspection during equipment manufacturing or repair by providing complete and detailed cable connection information about the mezzanine board.

[0051] In the disclosed example, there are three mezzanine boards, each including two processors. A server may include more or less than three mezzanine boards, and the number of processors on each mezzanine board may be more or less than two. The number of bits used to represent the slot number may vary depending on the total number of processors in the server. In the disclosed example, the solder pads are shown near the front edge of each board to allow the metal strips to be easily accessed from the front. Other configurations are possible depending on the space constraints in the server rack and the layout of each mezzanine board. For example, the solder pads may also be arranged near the rear edge of each mezzanine board, or aligned along the side edges.

[0052] One aspect of the present application describes a system that includes a plurality of stacked mezzanine boards, each mezzanine board communicatively coupled to a motherboard, and a metal housing enclosing the motherboard and the mezzanine boards. Each mezzanine board may include a plurality of solder pads, and the metal housing may include a plurality of metal strips, each metal strip contacting the solder pads of the corresponding mezzanine board. The system may also include a logic module located on each mezzanine board to determine a position of the corresponding mezzanine board based on a contact pattern between the metal strips and the solder pads of the corresponding mezzanine board.

[0053] In a variation on this aspect, the pads on the respective mezzanine boards may be electrically coupled to corresponding pins of the logic module.

[0054] In a variation of this aspect, the metal housing is grounded, and respective metal strips may be attached to sidewalls of the metal housing, thereby grounding the pads in contact with the respective metal strips.

[0055] In another variation, the respective metal strip may include an attachment base attached to the side wall via a support bracket and L-shaped contact fingers that contact the pad.

[0056] In another variation, the metal strips may be arranged according to a predetermined pattern to create a unique grounding pattern for each pad on the mezzanine board.

[0057] In a variation of this aspect, the logic module assigns a unique identifier to the processor on the corresponding mezzanine board based on the determined location.

[0058] In another variation, the mezzanine boards are communicatively coupled to each other via cables, and respective mezzanine boards may include a transmitter that transmits an identifier of a processor on the respective mezzanine board to a downstream mezzanine board and a receiver that receives the identifier of the processor on the upstream mezzanine board from the upstream mezzanine board.

[0059] In another variation, the respective mezzanine board sends the identifier of the processor on the respective mezzanine board and the identifier of the received processor on the upstream mezzanine board to the motherboard, thereby facilitating the logic module on the motherboard to detect the connection topology of the mezzanine board.

[0060] In another variation, a logic module on the motherboard will determine if the detected connection topology is invalid.

[0061] In a variation of this aspect, the solder pads are positioned near an edge of the respective sandwich panel, facing the front side of the metal housing.

[0062] One aspect of the present application describes a method for detecting the topology of a plurality of interconnected and stacked circuit boards. The method may include determining, by a logic module on a respective circuit board, a position of the circuit board; assigning a unique identifier to the respective circuit board based on the determined position; sending information associated with the unique identifier to a downstream circuit board; receiving information associated with the identifier of the upstream circuit board from an upstream circuit board; and sending the information associated with the identifier of the respective circuit board and information associated with the identifier of the upstream circuit board to a logic module on a motherboard communicatively coupled to the plurality of circuit boards, thereby facilitating the logic module on the motherboard to detect the topology of the interconnected and stacked circuit boards.

[0063] In a variation of this aspect, the circuit board may include several solder pads, and each solder pad may be grounded via a metal strip attached to a metal housing enclosing the circuit board.Determining the position of the circuit board may include determining a grounding pattern of the solder pads on the circuit board.

[0064] In another variation, the pad is electrically coupled to a plurality of predetermined pins on the logic module.Determining the grounding pattern of the pad may include determining a voltage level at each pin.

[0065] In a variation on this aspect, the circuit board is a processor mezzanine board included in a multi-processor server, and the method may further include assigning a unique socket number to each processor on the circuit board.

[0066] In another variation, the information associated with the unique identifier includes a unique socket number for each processor.

[0067] In a variation of this aspect, the method may further include determining, by a logic module on the motherboard, whether the detected topology is invalid.

[0068] In another variation, determining whether the detected topology is invalid may include comparing the detected topology to a plurality of known valid topologies.

[0069] In another variation, the method may further include, in response to determining that the detected topology is invalid, stopping the boot process and displaying an error message.

[0070] One aspect of the present application describes a processor mezzanine board for a multi-processor server. The processor mezzanine board may include one or more processors, a plurality of solder pads, and a logic module that determines the position of the processor mezzanine board within a plurality of stacked processor mezzanine boards based on contact patterns between a plurality of metal strips and the solder pads. The metal strips are attached to a metal housing that encloses the plurality of stacked processor mezzanine boards.

[0071] In a variation on this aspect, the pads are coupled to pins of the logic module, and the pads that contact the corresponding metal strips are grounded, thereby allowing the logic module to determine the contact pattern based on the state of the pins.

[0072] The methods and processes described in the detailed description section may be embodied as code and / or data, which may be stored in a computer-readable storage medium as described above. When a computer system reads and executes the code and / or data stored on the computer-readable storage medium, the computer system executes the methods and processes embodied as data structures and code and stored in the computer-readable storage medium.

[0073] Furthermore, the above methods and processes may be included in hardware modules or devices. Hardware modules or devices may include, but are not limited to, application-specific integrated circuit (ASIC) chips, field-programmable gate arrays (FPGAs), dedicated or shared processors that execute a specific software module or piece of code at a specific time, and other programmable logic devices now known or later developed. When the hardware modules or devices are activated, they execute the methods and processes included therein.

[0074] The foregoing description is for illustration and description purposes only. They are not intended to be exhaustive or to limit the scope of the present disclosure to the disclosed forms. Therefore, many modifications and variations will be apparent to those skilled in the art.

Claims

1. A system for detecting the topology of a plurality of stacked sandwich panels, comprising: a plurality of stacked mezzanine boards, each mezzanine board communicatively coupled to the motherboard; a metal housing enclosing the motherboard and the sandwich board, wherein the respective sandwich board includes a plurality of pads, and wherein the metal housing includes a plurality of metal strips, the respective metal strips being in electrical contact with the pads of the corresponding sandwich board to ground the pads; as well as a logic module located on the corresponding mezzanine board to determine a stacking order of the corresponding mezzanine board in the stack of mezzanine boards based on a contact pattern between the metal strips and the pads of the corresponding mezzanine board, the logic module assigning a unique board identifier to the corresponding mezzanine board based on the determined stacking order, The pads on the corresponding interlayer board are electrically coupled to corresponding pins of the logic module.

2. The system according to claim 1, wherein: The metal housing is grounded, and wherein the plurality of metal strips are attached to a sidewall of the metal housing at different locations.

3. The system according to claim 2, wherein: The respective metal strips include attachment bases attached to the sidewalls via support brackets and L-shaped contact fingers in contact with the pads.

4. The system according to claim 2, wherein: The plurality of metal strips are attached to the sidewalls according to a predetermined pattern to create a unique grounding pattern for each pad on the mezzanine board.

5. The system according to claim 1, wherein: The logic module calculates a unique slot identifier for the processor on the corresponding mezzanine board based on the unique board identifier and a predetermined algorithm.

6. The system according to claim 5, wherein: The mezzanine boards are communicatively coupled to each other via cables, and wherein the respective mezzanine boards include a transmitter that transmits the unique slot identifier of the processor on the respective mezzanine board to a downstream mezzanine board and a receiver that receives the slot identifier of the processor on the upstream mezzanine board from an upstream mezzanine board.

7. The system according to claim 6, wherein: The corresponding mezzanine board sends the unique slot identifier of the processor on the corresponding mezzanine board and the received slot identifier of the processor on the upstream mezzanine board to the motherboard, thereby facilitating the logic module on the motherboard to detect the connection topology of the mezzanine board.

8. The system according to claim 7, wherein: The logic module on the motherboard determines whether the detected connection topology is invalid.

9. The system according to claim 1, wherein: The soldering pads are located near the edges of the corresponding sandwich panels and face the front side of the metal housing.

10. A method for detecting a topology of a plurality of interconnected and stacked circuit boards, the method comprising: determining, by a logic module on a corresponding circuit board, a stacking order of the circuit boards among the plurality of circuit boards, each circuit board comprising a plurality of solder pads, the corresponding solder pads being grounded via a metal strip attached to a metal housing enclosing the circuit board, and determining the stacking order comprises determining a grounding pattern of the solder pads on the circuit board; assigning a unique board identifier to the respective circuit boards based on the determined stacking order; sending information associated with the unique board identifier to a downstream circuit board; receiving, from an upstream circuit board, information associated with a unique board identifier of the upstream circuit board; as well as sending information associated with the unique board identifier of the corresponding circuit board and information associated with the unique board identifier of the upstream circuit board to a logic module on a motherboard communicatively coupled to the plurality of circuit boards, thereby facilitating the logic module on the motherboard to detect the topology of the interconnected and stacked circuit boards, The pads are electrically coupled to a plurality of predetermined pins on the logic module.

11. The method according to claim 10, wherein: Determining the ground pattern of the pad includes determining a voltage level for each pin.

12. The method according to claim 10, wherein: The plurality of circuit boards are processor mezzanine boards included in a multi-processor server, and wherein the method further comprises calculating a unique socket number for each processor on the circuit board based on the unique board identifier and a predetermined algorithm.

13. The method according to claim 12, wherein: Information associated with the unique board identifier includes the unique socket number of each processor.

14. The method of claim 10, further comprising determining, by the logic module on the motherboard, whether the detected topology is invalid.

15. The method according to claim 14, wherein Determining whether the detected topology is invalid includes comparing the detected topology to a plurality of known valid topologies.

16. The method according to claim 14, further comprising: In response to determining that the detected topology is invalid, the boot process is stopped and an error message is displayed.

17. A processor mezzanine board for a multi-processor server, the processor mezzanine board comprising: one or more processors; Several pads; as well as a logic module that determines a stacking order of the processor mezzanine boards among a plurality of stacked processor mezzanine boards based on contact patterns between a plurality of metal strips and the pads, wherein the metal strips are attached to different locations on a sidewall of a metal housing enclosing the plurality of stacked processor mezzanine boards, and wherein the logic module assigns unique board identifiers to the processor mezzanine boards based on the determined stacking order, The pad is coupled to a pin of the logic module.

18. The processor mezzanine board of claim 17, wherein: The pads that contact the corresponding metal strips are grounded, allowing the logic module to determine the contact pattern based on the state of the pins.

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