A short-range wireless communication protocol compatible passive node chip

Abstract

The application discloses a passive node chip compatible with a short-distance wireless communication protocol, which is applied to a backscatter communication system. The passive node chip comprises an antenna, a radio frequency or analog front-end module, a digital baseband module, a storage module and / or a sensing module. The antenna is used for converting a carrier signal into an electric signal. The radio frequency or analog front-end module comprises a clock demodulation submodule and a modulation submodule. The clock demodulation submodule is used for obtaining a part corresponding to clock information in the electric signal to provide a clock for the digital baseband module. The modulation submodule is used for backscatter modulation of an internal signal corresponding to internal data by using a control signal and transmitting the internal signal to a preset short-distance wireless communication protocol channel. The digital baseband module is used for protocol control and internal data acquisition, and adopts a processor-free digital baseband circuit structure. The storage module is used for storing node identity data. The sensing module is used for obtaining sensing data from an environment. The application can reduce power consumption and cost, and improve a network scale of data access and a data acquisition amount.

Description

Technical Field

[0001] This invention belongs to the field of wireless communication, specifically relating to a passive node chip compatible with short-range wireless communication protocols. Background Technology

[0002] Currently, wireless sensor networks (WSNs) and the Internet of Things (IoT) they form are limited by the efficiency of communication links, the power consumption of sensor nodes, access efficiency, the number of accesses, and the cost of infrastructure deployment and maintenance, which restricts their commercial deployment and application upgrades.

[0003] The primary communication method for the Internet of Things (IoT) is currently short-range wireless communication technology. Its commercial terminals consist of a wireless communication module, a processor, and other modules. The wireless communication module, responsible for data exchange with other devices, is an essential module for commercial terminals, typically consuming milliwatts of power. This necessitates that many IoT sensor nodes operate in an active, battery-powered mode, limiting the large-scale deployment of IoT nodes.

[0004] As is well known, backscatter technology, derived from radar technology, can significantly reduce the energy required for communication modulation, enabling passive communication links. Traditional backscatter communication systems are mainly used in RFID (Radio Frequency Identification) technology, which includes readers, electronic tags, and computer networks, and has been implemented in logistics, warehousing, and other fields. However, due to the high cost of dedicated readers, electronic tags are difficult to deploy on a large scale as IoT sensing nodes.

[0005] It is evident that existing passive UHF RFID requires dedicated and expensive readers as access points, which imposes cost and power consumption limitations on achieving the Internet of Things (IoT). Meanwhile, next-generation short-range wireless communication protocols employ active communication modes, further hindering the large-scale deployment of IoT nodes. However, due to the extremely low cost and ubiquitous nature of smart devices and other portable devices, they can serve as readily available reading and writing facilities for electronic tags. But commercial wireless communication technologies, employing active communication modes with transmitters, result in enormous power consumption for IoT nodes, leading to maintenance and battery costs, thus preventing large-scale deployment. Backscattering technology transfers the generation of the UHF carrier to more energy-efficient auxiliary devices, such as radio frequency sources and routers, reducing the power consumption of the communication link by two orders of magnitude, thus meeting the requirements of passive communication links. Therefore, backscattering technology can be combined with short-range wireless communication technology, employing a three-point communication system to achieve passive communication links. This approach not only achieves passive IoT nodes but also overcomes the limitations of dedicated readers on large-scale IoT node deployment, while facilitating low-cost widespread adoption.

[0006] It is known that the large-scale deployment of IoT nodes is significantly limited by power consumption, which mainly consists of wireless transmission power consumption and processor power consumption. Analysis of existing solutions combining backscattering technology with short-range wireless communication technology reveals certain shortcomings, with the passive transformation of IoT nodes remaining a major problem to be solved. For example, patent CN108141646A provides a backscattering device and a network system incorporating it, using backscattering technology to generate signals that satisfy wireless communication protocols. However, the node uses a crystal oscillator and a phase-locked loop as its clock source, increasing the difficulty of achieving passive transformation. Patent CN108496094A provides a backscattering device including an example of single-sideband operation, proposing a backscattering signal device with single-sideband operation, providing a backscattering transformation for converting Bluetooth single-tone signals to Wi-Fi signals. However, it uses a processor to generate baseband data, resulting in high power consumption, and a battery must be retained.

[0007] Furthermore, as data collection and information identification points, the specific implementation schemes for IoT nodes require in-depth research into the coordination between precise clock generation and energy consumption. Specifically, passive UHF RFID protocols have a high tolerance for chip clock deviations, while short-range wireless communication protocols have high requirements for both clock deviation and clock jitter. Existing solutions often only focus on researching and improving the aforementioned single aspects of the technology, while lacking implementation methods for passive nodes compatible with short-range wireless communication protocols.

[0008] Furthermore, integrated single-chip solutions represent the development trend of IoT node chip architectures, but common solutions compatible with short-range wireless communication technologies often employ dual-chip or even triple-chip implementations. Multi-chip solutions can be compatible with more protocols, but they have significant limitations for large-scale, low-cost IoT applications.

[0009] Meanwhile, for passive IoT application scenarios, only basic information such as sensor data and identity data needs to be processed. Therefore, a complex digital baseband processor architecture is unnecessary. If the current digital baseband architecture can be simplified based on short-range wireless communication protocols, it may be possible to further reduce the power consumption of passive nodes and increase the wireless communication distance. Summary of the Invention

[0010] To address the aforementioned problems in the prior art, this invention provides a passive node chip compatible with short-range wireless communication protocols. The specific technical solution is as follows:

[0011] A passive node chip compatible with a short-range wireless communication protocol is applied in a pre-defined backscatter communication system; the backscatter communication system further includes an auxiliary device for transmitting carrier signals and an intelligent device for receiving the backscattered signals from the passive node chip; the passive node chip includes:

[0012] Antenna, radio frequency or analog front-end module, digital baseband module, and storage module and / or sensing module;

[0013] The antenna is used to convert a carrier signal in the form of an electromagnetic radiation signal into an electrical signal;

[0014] The radio frequency or analog front-end module includes a clock demodulation submodule and a modulation submodule. The clock demodulation submodule is used to acquire the portion of the clock information in the electrical signal converted from the carrier signal, providing a clock for the digital baseband module. The modulation submodule is used to perform backscatter modulation on the internal signal provided by the digital baseband module, which carries the internal data of the passive node chip, using the control signal provided by the digital baseband module, and transmits the backscatter modulated signal to a preset short-range wireless communication protocol channel. The internal data of the passive node chip includes node identity data and / or sensor data.

[0015] The digital baseband module is used for protocol control and acquisition of the internal data; the digital baseband module adopts a processorless digital baseband circuit structure; the protocol control includes 6C protocol control and short-range wireless communication protocol control;

[0016] The storage module is used to store node identity data; the sensing module is used to acquire sensing data from the environment.

[0017] In one embodiment of the present invention, the radio frequency or analog front-end module further includes:

[0018] The system comprises a rectifier submodule, a power management submodule, and a data demodulation submodule.

[0019] The rectifier submodule is used to convert the electrical signal corresponding to the carrier signal into a DC signal and store the energy in a capacitor; the power consumption management submodule is used to process the energy of the capacitor to generate a stable voltage source VDD; and the data demodulation submodule is used to demodulate the data corresponding to the carrier signal and provide the downlink command rd_data to the digital baseband module.

[0020] In one embodiment of the present invention, the power management submodule includes:

[0021] Limiting unit, energy switching unit, reference circuit and linear regulator unit;

[0022] The limiting unit is used to control the voltage amplitude of the capacitor; the energy switching unit is used to start the digital baseband module when the capacitor energy reaches a sufficient state; the reference circuit and the linear voltage regulator unit are used to generate a stable voltage source VDD.

[0023] In one embodiment of the present invention, the short-range wireless communication protocol includes Bluetooth Low Energy (BLE).

[0024] In one embodiment of the present invention, when the short-range wireless communication protocol is BLE and the auxiliary device is a 6C reader, the processorless digital baseband circuit structure includes:

[0025] The system includes a 6C protocol controller, a frequency division submodule, and a BLE wireless communication protocol controller; wherein the BLE wireless communication protocol controller includes a process management submodule and a BLE data generation submodule; the BLE data generation submodule includes an encoding unit, a CRC check unit, a whitening unit, and a framing unit.

[0026] The 6C protocol controller is used to complete the interaction between the passive node chip and the 6C reader, and to configure the BLE wireless communication protocol controller; the frequency division submodule is used to divide the highest global clock obtained by the digital baseband module to obtain the BLE wireless communication protocol data generation clock and the subcarrier offset clock; the BLE wireless communication protocol controller operates within the clock domain of the BLE wireless communication protocol data generation clock; the process management submodule is used for process management of the BLE data generation submodule and performs module-level clock gating; the encoding unit is used to encode the transmitted internal data; the CRC check unit is used to calculate the CRC check value of the encoded internal data; the whitening unit is used to perform scrambling operation according to the BLE protocol requirements; the framing unit is used to construct a complete data frame structure based on the whitened data and the CRC check value, using a preamble and access address, and serially outputs the data to obtain a BLE data packet; the BLE data packet selects the subcarrier offset clock and generates a control signal for the modulation submodule.

[0027] In one embodiment of the present invention, the 6C protocol controller completes the interaction process between the passive node chip and the 6C reader, including:

[0028] The 6C protocol controller operates in the clk_6c clock domain, receives downlink command rd_data, which represents the 6C reader command, demodulated by the data demodulation submodule, converts the passive node chip state represented by tag state and completes the command response; and communicates with the 6C reader via uplink tag data tag_data.

[0029] The process by which the 6C protocol controller completes the configuration of the BLE wireless communication protocol controller includes:

[0030] The 6C protocol controller receives a preset command and decodes it, storing the configuration data of the BLE wireless channel in the storage module through the built-in IE submodule. During the startup of the BLE wireless communication protocol controller, it reads the configured user area data in the storage module to complete the initialization. The preset command is obtained through customization and implemented using PIE encoding.

[0031] In one embodiment of the present invention, the operation process of each sub-module in the digital baseband module includes:

[0032] When the capacitor energy reaches a sufficient state, the digital baseband module is controlled by the energy switch unit to complete the power-on start-up;

[0033] The main state machine of the process management submodule enters the initial state and controls the 6C protocol controller to complete the data initialization.

[0034] The process management submodule acquires the level value of the capacitor energy status signal. When the level value is high, the main state machine enters the 6C protocol controller state; when the level value is low, the main state machine enters the encoding unit state. When the main state machine is in the 6C protocol controller state, the passive node chip enters the interactive mode to enable the passive node chip to have the function of interactive communication with the 6C reader, and after a preset time period, the main state machine enters the encoding unit state. When the main state machine is in the encoding unit state, the passive node chip enters the talk-only mode to enable the passive node chip to uplink BLE data packets.

[0035] In one embodiment of the present invention, the module-level clock gating is implemented using coarse-grained clock gating and fine-grained clock gating;

[0036] The coarse-grained clock gating is implemented by using D flip-flops and AND gates to control the clock source ports of the encoding unit, the CRC check unit, the whitening unit, and the framing unit, thereby switching the state of the main state machine of the process management submodule. The fine-grained clock gating is implemented by automatically inserting an integrated gating clock unit using a synthesis tool.

[0037] In one embodiment of the present invention, the modulation submodule utilizes the control signal provided by the digital baseband module to perform backscatter modulation on the internal signal provided by the digital baseband module, which carries data from the passive node chip, including:

[0038] The modulation submodule changes the reflection coefficient of the antenna's matching impedance through the control signal, thereby multiplying the carrier signal and the internal signal to obtain the backscattered modulated signal.

[0039] In one embodiment of the present invention, the passive node chip adopts a dual-antenna structure.

[0040] The beneficial effects of this invention are:

[0041] Compared to the requirement for dedicated readers in UHF RFID communication systems, this invention allows smart devices compatible with short-range wireless communication protocols to receive the backscattered signals from passive node chips, avoiding the high additional costs and dedicated readers required by traditional electronic tags. In the backscattered communication system of this invention, passive nodes can upload internal data to the channel specified by the short-range wireless communication protocol. Leveraging the ubiquitous availability of numerous receiving devices compatible with short-range wireless communication protocols, the number of access nodes in the tag network is significantly increased, greatly expanding the access volume and sensing data volume of passive IoT nodes. Simultaneously, this invention employs external clock extraction, reducing the power consumption of the clock circuit within the passive node chip or the external crystal oscillator. Furthermore, compared to traditional processor-centric control logic, this invention uses a processorless digital baseband circuit structure, simplifying signal processing and reducing chip power consumption and cost. Therefore, compared with existing solutions such as active Bluetooth chips and UHF RFID chips, the passive node chip of this invention can significantly increase the network scale and data collection volume of data access, greatly enhance its value and application breadth as an IoT node, and has advantages in cost, power consumption, access scale and compatibility, and has high application value and market prospects. Attached Figure Description

[0042] Figure 1 This is a schematic diagram of the structure of a preset backscatter communication system provided in an embodiment of the present invention;

[0043] Figure 2 This is a schematic diagram of the structure of a passive node chip compatible with a short-range wireless communication protocol, provided in an embodiment of the present invention.

[0044] Figure 3 This is a schematic diagram illustrating the collaborative operation of a passive node and a backscatter modulation system according to an embodiment of the present invention.

[0045] Figure 4 This is a schematic diagram of an overall architecture of a passive node chip according to an embodiment of the present invention;

[0046] Figure 5 This is a schematic diagram illustrating a processorless digital baseband circuit structure example of a passive node chip according to an embodiment of the present invention.

[0047] Figure 6 is a schematic diagram of the structure of the clock gating implementation unit in an embodiment of the present invention;

[0048] Figure 7 This is a schematic diagram of the workflow of each sub-module in the digital baseband module of this invention. Detailed Implementation

[0049] The technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of the present invention, and not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative effort are within the scope of protection of the present invention.

[0050] This invention provides a passive node chip compatible with short-range wireless communication protocols, applied in a pre-defined backscatter communication system. The backscatter communication system further includes an auxiliary device for transmitting carrier signals and a smart device for receiving the backscattered signals from the passive node chip. This backscatter communication system is applied in Internet of Things (IoT) scenarios; for its structure, please refer to [link to relevant documentation]. Figure 1 As shown.

[0051] Figure 1 In this backscatter communication system, the auxiliary device, the passive node chip compatible with the short-range wireless communication protocol of this invention (hereinafter referred to as the passive node chip), and the smart device together constitute the backscatter communication system, and the passive node chip represents a passive node. The following describes... Figure 1 Each part will be explained separately.

[0052] (1) Regarding auxiliary devices:

[0053] During operation of this backscatter communication system, an auxiliary device generates a carrier signal and transmits it using its antenna. This carrier signal serves as an external power source, clock source, and carrier source for the passive node chip. The auxiliary device may include radio frequency sources, routers, and gateways, etc.

[0054] (2) For passive node chips

[0055] For the composition of passive node chips, please refer to [link / reference]. Figure 2 It may include the following components:

[0056] Antenna, radio frequency or analog front-end module, digital baseband module, and storage module and / or sensing module.

[0057] The antenna is used to convert a carrier signal in the form of an electromagnetic radiation signal into an electrical signal;

[0058] The radio frequency or analog front-end module includes a clock demodulation submodule and a modulation submodule. The clock demodulation submodule is used to acquire the portion of the clock information in the electrical signal converted from the carrier signal, providing a clock for the digital baseband module. The modulation submodule is used to perform backscatter modulation on the internal signal provided by the digital baseband module, which carries the internal data of the passive node chip, using the control signal provided by the digital baseband module, and transmits the backscatter modulated signal to a preset short-range wireless communication protocol channel. The internal data of the passive node chip includes node identity data and / or sensor data.

[0059] The digital baseband module is used for protocol control and acquisition of the internal data; the digital baseband module adopts a processorless digital baseband circuit structure; the protocol control includes 6C protocol control and short-range wireless communication protocol control; where 6C is the abbreviation of ISO18000-6C, which means Radio Frequency Identification for Individual Item Management - Part 6C, and the 6C protocol is the mainstream RFID protocol.

[0060] The storage module is used to store node identity data; the sensing module is used to acquire sensing data from the environment.

[0061] Specifically, the passive node chip can functionally include passive tagging and passive sensor functions. That is, it can function as a passive tag, similar to an electronic tag, used in scenarios such as warehousing and logistics; or it can function as a passive sensing node for environmental data collection in a WSN network. If the internal data is node identity data, it is provided to the digital baseband module by the storage module; if the internal data is sensor data, it is collected from the environment by the sensing module and provided to the digital baseband module. The storage module and the sensing module can exist independently or simultaneously, depending on the application scenario of the passive node. The node identity data represents the identity information of the passive node, such as node name, node number, node address, etc.; the sensor data can have different content depending on the scenario requirements, such as temperature data, pressure data, etc.

[0062] The main function of this passive node chip is to acquire internal data from at least one of the storage module and the sensing module, perform backscatter modulation, and then transmit it to a preset short-range wireless communication protocol channel. The short-range wireless communication protocol includes BLE (Bluetooth Low Energy), Wi-Fi (Wireless Fidelity), and ZigBee, among others.

[0063] In the operation of this passive node chip, the carrier signal is first converted from an electromagnetic radiation signal to an electrical signal using an antenna. The radio frequency or analog front-end module then harvests energy from this electrical signal, using the carrier signal as an external energy source. When sufficient energy is harvested, the clock information portion of the converted electrical signal is used to provide the clock signal required for the operation of the digital baseband module, thus realizing the function of the carrier signal as a clock source. The digital baseband module uses the acquired clock signal to perform digital baseband correlation processing on the acquired internal data through protocol control to obtain an internal signal and generate a modulation signal, which is then provided to the modulation submodule along with the internal signal. The modulation submodule uses a control signal, with the carrier signal as the carrier source, to perform backscatter modulation on the internal signal using the passive node, and then transmits the backscatter modulated signal to a preset short-range wireless communication protocol channel. For the process of the passive node and backscatter modulation system working together in this embodiment of the invention, please refer to [link to relevant documentation]. Figure 3 understand.

[0064] The radio frequency or analog front-end module of this embodiment of the invention determines the clock signal of the passive node chip from the clock information of the carrier signal, thus realizing the extraction of the external clock. This reduces the power consumption generated by the clock circuit within the passive node chip or the external crystal oscillator, improving the feasibility of passive communication links and passive terminal nodes. Furthermore, compared to traditional processor-centric control logic, the digital baseband module adopts a processorless digital baseband circuit structure, simplifying the signal processing and reducing chip power consumption and cost.

[0065] The specific structure of the passive node chip will be explained in detail later.

[0066] (3) Targeting smart devices

[0067] Smart devices serve as receivers for the backscattered signals of passive node chips. They can be used in devices such as mobile phones and tablets with wireless communication capabilities and are compatible with short-range wireless communication protocols.

[0068] As can be seen, the backscatter communication system of this invention is a passive backscatter communication system compatible with short-range wireless communication protocols.

[0069] Compared to the requirement for dedicated readers in UHF RFID communication systems, this invention allows smart devices compatible with short-range wireless communication protocols to receive the backscattered signals from passive node chips, avoiding the high additional costs and dedicated readers required by traditional electronic tags. In the backscattered communication system of this invention, passive nodes can upload internal data to the channel specified by the short-range wireless communication protocol. Leveraging the ubiquitous availability of numerous receiving devices compatible with short-range wireless communication protocols, the number of access nodes in the tag network is significantly increased, greatly expanding the access volume and sensing data volume of passive IoT nodes. Simultaneously, this invention employs external clock extraction, reducing the power consumption of the clock circuit within the passive node chip or the external crystal oscillator. Furthermore, compared to traditional processor-centric control logic, this invention uses a processorless digital baseband circuit structure, simplifying signal processing and reducing chip power consumption and cost. Therefore, compared with existing solutions such as active Bluetooth chips and UHF RFID chips, the passive node chip of this invention can significantly increase the network scale and data collection volume of data access, greatly enhance its value and application breadth as an IoT node, and has advantages in cost, power consumption, access scale and compatibility, and has high application value and market prospects.

[0070] In one optional implementation, the passive node chip employs a dual-antenna structure.

[0071] Specifically, to prevent uplink and downlink interference, this embodiment of the invention employs a dual-antenna structure. Figure 4 The antenna located at the top is used only as a downlink antenna to convert the carrier signal from an electromagnetic radiation signal into an electrical signal for use in the clock demodulation submodule. Figure 4 The antenna located at the bottom in the middle has both uplink and downlink functions. In other words, in addition to converting the carrier signal into an electrical signal, it is also used to transmit the backscattered modulated signal output by the uplink modulation submodule.

[0072] In one optional implementation, the radio frequency or analog front-end module further includes:

[0073] The system comprises a rectifier submodule, a power management submodule, and a data demodulation submodule.

[0074] The rectifier submodule is used to convert the electrical signal corresponding to the carrier signal into a DC signal and store the energy in a capacitor; the power consumption management submodule is used to process the energy of the capacitor to generate a stable voltage source VDD; and the data demodulation submodule is used to demodulate the data corresponding to the carrier signal and provide the downlink command rd_data to the digital baseband module.

[0075] Please see Figure 4The diagram shows the overall architecture of the passive node chip, illustrating the function and operation of each part in the radio frequency or analog front-end module.

[0076] As an external energy source, the rectifier module converts the AC signal provided by the antenna into a DC signal and stores the energy in capacitor C. store The capacitor C is used to power subsequent circuits such as the digital baseband module; store It can be an on-chip capacitor or an off-chip capacitor, capacitor C store The energy stored in it is represented by capacitor energy.

[0077] The power management submodule is responsible for processing capacitor energy to generate a stable voltage source VDD that meets the requirements of subsequent circuits. The power management submodule includes:

[0078] Limiting unit, energy switching unit, reference circuit and linear regulator unit;

[0079] The limiting unit is used to control the voltage amplitude of the capacitor; the energy switching unit is used to start the digital baseband module when the capacitor energy reaches a sufficient state; the reference circuit and the linear voltage regulator unit are used to generate a stable voltage source VDD.

[0080] Specifically, the limiting unit limits the capacitance C. store Voltage amplitude control is implemented to prevent excessive voltage from damaging subsequent circuits. The energy switch unit judges the amount of capacitor energy. When the capacitor energy is greater than a preset value, it indicates that the energy is sufficient, and the digital baseband module is activated. When the capacitor energy is insufficient, it switches to capacitor charging mode to continue RF energy acquisition, while the digital baseband module remains off. The reference circuit and linear voltage regulator unit ensure the generation of a stable voltage source VDD to power the digital baseband module and other modules.

[0081] The process by which the data demodulation submodule demodulates the data corresponding to the carrier signal and provides the downlink command rd_data to the digital baseband module is existing technology and will not be described in detail here.

[0082] As an external clock source, the clock demodulation submodule provides the digital baseband module with the electrical signal corresponding to the clock information in the carrier signal, which is called the global maximum clock, denoted by CLK_MAX. CLK_MAX is the highest operating frequency of the digital baseband module and is positively correlated with the power consumption of the passive node chip.

[0083] Because an external carrier source is used, the modulation submodule performs backscatter modulation on the internal data of the passive node chip before uplink transmission.

[0084] The modulation submodule utilizes the control signal provided by the digital baseband module to perform backscatter modulation on the internal signal provided by the digital baseband module, which carries data from the passive node chip. This process includes:

[0085] The modulation submodule changes the reflection coefficient of the antenna's matching impedance through the control signal, thereby multiplying the carrier signal and the internal signal to obtain the backscattered modulated signal.

[0086] Specifically, the backscatter modulation of passive nodes exhibits characteristics similar to a mixer. It uses a control signal to change the reflection coefficient of the antenna's matching impedance, multiplying the external carrier with the internal signal to obtain the backscattered modulated signal. This backscattered modulated signal is then reflected into the air by the antenna. The control signal is a frame-format data control signal. By using different control signals to change the antenna's matching impedance, various modulation schemes can be generated, including ASK (Amplitude Shift Keying), PSK (Phase Shift Keying), FSK (Frequency Shift Keying), QAM (Quadrature Amplitude Modulation), or a combination of both. In this embodiment of the invention, the specific modulation implementation method must be compatible with the short-range wireless communication protocol of the passive node target.

[0087] The digital baseband module mainly performs protocol control processing for passive nodes, including 6C protocol and short-range wireless communication protocol control, as well as operations such as configuring the storage module and acquiring sensor data from the sensing module. It is implemented using a processorless digital baseband circuit structure.

[0088] The following text will use BLE (Browser-Based Electrical) as the short-range wireless communication protocol and a 6C reader as the auxiliary device as a specific scenario example to illustrate the processorless digital baseband circuit structure and its specific operation. Please refer to [link / reference]. Figure 5 As shown, Figure 5 This is a schematic diagram illustrating an example of a processorless digital baseband circuit structure for a passive node chip according to an embodiment of the present invention.

[0089] In one optional implementation, when the short-range wireless communication protocol is BLE and the auxiliary device is a 6C reader, the processorless digital baseband circuit structure includes:

[0090] 6C protocol controller, frequency division submodule, BLE wireless communication protocol controller.

[0091] The BLE wireless communication protocol controller includes a process management submodule and a BLE data generation submodule; the BLE data generation submodule includes an encoding unit, a CRC check unit, a whitening unit, and a framing unit. Figure 5In this code, the 6C protocol controller is represented by 6C_CORE; the frequency division submodule is represented by DIV; the process management submodule is represented by PMU; the encoding unit is represented by ENCODE; the CRC check unit is represented by CRC; the whitening unit is represented by WHITEN; and the framing unit is represented by PACKET.

[0092] Specifically, the 6C protocol controller is used to complete the interaction between the passive node chip and the 6C reader, and to complete the configuration of the BLE wireless communication protocol controller.

[0093] The process by which the 6C protocol controller completes the interaction between the passive node chip and the 6C reader includes:

[0094] The 6C protocol controller operates in the clk_6c clock domain, receives downlink commands rd_data demodulated by the data demodulation submodule, which represent commands from the 6C reader, converts the passive node chip state represented by tag state, and completes command response; and communicates with the 6C reader via uplink tag data tag_data; it can be understood that the tag data tag_data, as internal data, contains node identity data.

[0095] The process by which the 6C protocol controller completes the configuration of the BLE wireless communication protocol controller includes:

[0096] The 6C protocol controller receives and decodes a preset command, storing the BLE wireless channel configuration data in the storage module via a built-in IE submodule. During startup, the BLE wireless communication protocol controller reads the configured user area data from the storage module to complete initialization. This initialization is necessary because BLE operation requires determining the target channel and the data packet time interval. Therefore, it first reads the user area configuration data previously stored in the storage module and loads it into the configuration register of the digital baseband module. The preset command is custom-designed and implemented using PIE (Pulse Interval Encoding).

[0097] The frequency division submodule is used to divide the global highest clock CLK_MAX obtained by the digital baseband module to obtain the generation clock and subcarrier offset clock for BLE wireless communication protocol data. Different subcarrier frequencies should be set for different wireless communication channels, and the frequency division configuration can be performed through the 6C protocol controller. Figure 5 In the middle, F sc,1 and F sc,0 This indicates the subcarrier offset clock.

[0098] The BLE wireless communication protocol controller operates within the clock domain of the BLE wireless communication protocol data generation clock. The BLE wireless communication protocol data generation clock is denoted as clk_1M.

[0099] The process management submodule is used for process management of the BLE data generation submodule and also performs module-level clock gating to reduce power consumption.

[0100] The encoding unit is used to encode the transmitted internal data; the CRC check unit is used to calculate the CRC check value of the encoded internal data; the whitening unit is used to perform scrambling operations according to the requirements of the BLE protocol. It is a unique module specified by the BLE protocol. The BLE protocol specifies that the scrambling order is different for different communication channels. Figure 5 The baseband circuit shown can use whitening codes for broadcast channels 37, 38, and 39; the framing unit is used to combine the whitened data from the whitening unit with the CRC check value based on the preamble and access address to form a complete data frame structure, and the data is serially output to obtain BLE data packets, i.e. Figure 5 The BLE data packet selects the subcarrier offset clock, i.e., F. sc,1 and F sc,0 Generate control signals (i.e.) Figure 5 The modulator (dout) is given to the modulation submodule so that the modulation submodule can complete the uplink backscatter modulation and transmission of BLE data packets.

[0101] In one optional implementation, the process management submodule also includes a built-in TEM module for quantifying the internal data provided by the sensing module, i.e., the sensing data.

[0102] In one optional implementation, the module-level clock gating is implemented using coarse-grained and fine-grained clock gating to achieve low baseband power consumption. Specifically, the coarse-grained clock gating is achieved through state switching of the process management submodule. Specifically, the coarse-grained clock gating uses D flip-flops and AND gates to control the clock source ports of the encoding unit, the CRC check unit, the whitening unit, and the framing unit, thereby switching the state of the main state machine of the process management submodule, as shown in Figure 6(a). The fine-grained clock gating is achieved by automatically inserting an integrated gated clock unit using a synthesis tool, thus achieving clock gating, as shown in Figure 6(b). In Figures 6(a) and 6(b), EN represents the enable control terminal; CP represents the clock terminal; Q represents the data output terminal; Register represents a register; and Latch represents a latch.

[0103] Please see below. Figure 7The working process of each submodule in the digital baseband module includes:

[0104] When the capacitor energy reaches a sufficient level, the digital baseband module is controlled by the energy switch unit to complete the power-on startup. Figure 7 The symbol "Power-on complete" indicates that the digital baseband module starts working once the capacitor energy of the passive node chip is sufficient. The process management submodule within the digital baseband module acts as its controller, and the transitions of its main state machine represent the workflow of the digital baseband module.

[0105] The main state machine of the process management submodule ( Figure 7 (represented as pmu_state) enters the initial state ( Figure 7 The 6C protocol controller (represented as INITIAl) is used to initialize the data. For details on the initialization, please refer to the previous description.

[0106] The process management submodule acquires the level value of the capacitor energy status signal. Figure 7 The term "Energy" is used to indicate that when the voltage level is high (i.e., Energy = 1'b1), the main state machine enters the 6C protocol controller state. Figure 7 The value is represented as 6C_STATE; when the level is low (i.e., Energy = 1'b0), the main state machine enters the encoding unit state. Figure 7 (represented as ENCODE); when the master state machine is in the 6C protocol controller state (i.e., pmu_state = 6C_STATE), the passive node chip enters the interactive mode ( Figure 7 The passive node chip is represented as RTF (reader talk first) to enable it to communicate with the 6C reader. After a preset time period, the main state machine enters the encoding unit state. When the main state machine is in the encoding unit state (i.e., pmu_state = ENCODE), the passive node chip enters the talk-only mode. Figure 7 The term TTO (Tag Talk Only) is used to enable the passive node chip to upload BLE data packets, i.e., internal data compatible with the BLE protocol.

[0107] In the short-range wireless communication protocol, data packets are generated sequentially. For example, in the BLE protocol processing described above, pmu_state enters the CRC state, WHITEN state, and PACKET state respectively, and finally the data is serially output as BLE data packets, completing the data output.

[0108] The above is a specific example of a processorless digital baseband circuit structure. For other short-range wireless communication protocols besides BLE, the processorless digital baseband circuit structure is similar. The difference lies in the fact that the frequency division submodule and modulation submodule need to be modified to be compatible with the corresponding protocols. For example, for the WIFI protocol, the modulation module should be configured to PSK modulation mode according to the modulation method required by the protocol; for the protocol data rate of 2-11Mbps, and considering the application scenario of low power consumption, the output clock of the frequency division module should be 2MHz, and so on. Specific details are not described in detail.

[0109] In summary:

[0110] This invention provides a highly integrated passive backscatter communication node chip architecture, a single-chip implementation. Compared to the dual-chip structure commonly used in commercial devices, this invention offers significant improvements in cost and integration. Compared to active Bluetooth chips, the passive node chip proposed in this invention has the advantage of being more than two orders of magnitude lower in cost and power consumption, comparable to UHF RFID chips. Compared to UHF RFID chips, the passive node chip proposed in this invention is compatible with short-range wireless communication protocols, does not require a dedicated reader, and can interconnect with smartphones, tablets, and other smart devices, significantly increasing the network scale and data collection volume.

[0111] In this embodiment of the invention, after the passive node chip receives an external carrier signal, it adopts a clock coordination scheme to obtain and generate the global highest clock through an external clock, and divides the frequency to generate a data processing synchronization clock, i.e., the clock for generating wireless communication protocol data, and a reflection modulation clock signal, i.e., the subcarrier offset clock. It does not use batteries or crystal oscillators, reducing the power consumption generated by the internal clock circuit or external crystal oscillator. Therefore, it can realize the uplink function of short-range wireless communication with ultra-low power consumption.

[0112] Because the data processing of passive chips compatible with short-range wireless communication protocols is limited by power consumption, this invention adopts a processorless, bus-less digital baseband control architecture. It utilizes four basic units—encoding, CRC check, whitening, and framing—to generate broadcast data packets for physical layer protocols such as BLE, and performs frequency shifting and reflection at the physical layer through modulation circuitry. Compared to traditional processor-centric control logic, this invention simplifies the signal processing, resulting in lower chip power consumption and cost. Furthermore, the asynchronous logic used in its implementation eliminates the need for a crystal oscillator, resolving the issue of balancing clock accuracy and energy efficiency.

[0113] Furthermore, a passive backscatter communication system compatible with short-range wireless communication protocols, based on carrier signals, uses smart devices as receivers for passive nodes, significantly increasing the number of access nodes in passive IoT. When dealing with a large number of passive IoT access nodes, the external carrier source system method ensures the passive characteristics of large-scale IoT data nodes. By modulating the carrier to generate clock signals, the system systematically solves the problem of maintaining high accuracy and robustness while simultaneously meeting the requirements of low power consumption, low cost, and high integration for passive tags.

[0114] The above description is merely a preferred embodiment of the present invention and is not intended to limit the scope of protection of the present invention. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of the present invention are included within the scope of protection of the present invention.

Claims

1. A passive node chip compatible with short-range wireless communication protocols, characterized in that, The application is in a pre-defined backscatter communication system; the backscatter communication system further includes an auxiliary device for transmitting carrier signals, and an intelligent device for receiving the backscattered signals from the passive node chip; the passive node chip includes: Antenna, radio frequency or analog front-end module, digital baseband module, and storage module and / or sensing module; The antenna is used to convert a carrier signal in the form of an electromagnetic radiation signal into an electrical signal; The radio frequency or analog front-end module includes a clock demodulation submodule and a modulation submodule. The clock demodulation submodule is used to acquire the portion of the clock information in the electrical signal converted from the carrier signal, providing a clock for the digital baseband module. The modulation submodule is used to perform backscatter modulation on the internal signal provided by the digital baseband module, which carries the internal data of the passive node chip, using the control signal provided by the digital baseband module, and transmits the backscatter modulated signal to a preset short-range wireless communication protocol channel. The internal data of the passive node chip includes node identity data and / or sensor data. The digital baseband module is used for protocol control and acquisition of the internal data; the digital baseband module adopts a processorless digital baseband circuit structure; the protocol control includes 6C protocol control and short-range wireless communication protocol control; The storage module is used to store node identity data; the sensing module is used to acquire sensing data from the environment. Wherein, the short-range wireless communication protocol is BLE, and the auxiliary device is a 6C reader, the processorless digital baseband circuit structure includes: The system includes a 6C protocol controller, a frequency division submodule, and a BLE wireless communication protocol controller; wherein the BLE wireless communication protocol controller includes a process management submodule and a BLE data generation submodule; the BLE data generation submodule includes an encoding unit, a CRC check unit, a whitening unit, and a framing unit. The 6C protocol controller is used to complete the interaction between the passive node chip and the 6C reader, and to configure the BLE wireless communication protocol controller; the frequency division submodule is used to divide the highest global clock obtained by the digital baseband module to obtain the BLE wireless communication protocol data generation clock and the subcarrier offset clock; the BLE wireless communication protocol controller operates within the clock domain of the BLE wireless communication protocol data generation clock; the process management submodule is used for process management of the BLE data generation submodule and performs module-level clock gating; the encoding unit is used to encode the transmitted internal data; the CRC check unit is used to calculate the CRC check value of the encoded internal data; the whitening unit is used to perform scrambling operation according to the BLE protocol requirements; the framing unit is used to construct a complete data frame structure based on the whitened data and the CRC check value, using a preamble and access address, and serially outputs the data to obtain a BLE data packet; the BLE data packet selects the subcarrier offset clock and generates a control signal for the modulation submodule.

2. The short-range wireless communication protocol compatible passive node chip of claim 1, wherein, The radio frequency or analog front-end module further includes: The system comprises a rectifier submodule, a power management submodule, and a data demodulation submodule. The rectifier submodule is used to convert the electrical signal corresponding to the carrier signal into a DC signal and store the energy in a capacitor; the power consumption management submodule is used to process the energy of the capacitor to generate a stable voltage source VDD; and the data demodulation submodule is used to demodulate the data corresponding to the carrier signal and provide the downlink command rd_data to the digital baseband module.

3. The short-range wireless communication protocol compatible passive node chip of claim 2, wherein, The power management submodule includes: Limiting unit, energy switching unit, reference circuit and linear regulator unit; The limiting unit is used to control the voltage amplitude of the capacitor; the energy switching unit is used to start the digital baseband module when the capacitor energy reaches a sufficient state; the reference circuit and the linear voltage regulator unit are used to generate a stable voltage source VDD.

4. The short-range wireless communication protocol compatible passive node chip of claim 3, wherein, The 6C protocol controller completes the interaction process between the passive node chip and the 6C reader, including: The 6C protocol controller operates in the clk_6c clock domain, receives downlink command rd_data, which represents the 6C reader command, demodulated by the data demodulation submodule, converts the passive node chip state represented by tag state and completes the command response; and communicates with the 6C reader via uplink tag data tag_data. The process by which the 6C protocol controller completes the configuration of the BLE wireless communication protocol controller includes: The 6C protocol controller receives a preset command and decodes it, storing the configuration data of the BLE wireless channel in the storage module through the built-in IE submodule. During the startup of the BLE wireless communication protocol controller, it reads the configured user area data in the storage module to complete the initialization. The preset command is obtained through customization and implemented using PIE encoding.

5. The short-range wireless communication protocol compatible passive node chip of claim 4, wherein, The working process of each sub-module in the digital baseband module includes: When the capacitor energy reaches a sufficient state, the digital baseband module is controlled by the energy switch unit to complete the power-on start-up; The main state machine of the process management submodule enters the initial state and controls the 6C protocol controller to complete the data initialization. The process management submodule acquires the level value of the capacitor energy status signal. When the level value is high, the main state machine enters the 6C protocol controller state; when the level value is low, the main state machine enters the encoding unit state. When the main state machine is in the 6C protocol controller state, the passive node chip enters the interactive mode to enable the passive node chip to have the function of interactive communication with the 6C reader, and after a preset time period, the main state machine enters the encoding unit state. When the main state machine is in the encoding unit state, the passive node chip enters the talk-only mode to enable the passive node chip to uplink BLE data packets.

6. The short-range wireless communication protocol compatible passive node chip of claim 5, wherein, The module-level clock gating is implemented using coarse-grained clock gating and fine-grained clock gating. The coarse-grained clock gating is implemented by using D flip-flops and AND gates to control the clock source ports of the encoding unit, the CRC check unit, the whitening unit, and the framing unit, thereby switching the state of the main state machine of the process management submodule. The fine-grained clock gating is implemented by automatically inserting an integrated gating clock unit using a synthesis tool.

7. The short-range wireless communication protocol compatible passive node chip of claim 1, wherein, The modulation submodule utilizes the control signal provided by the digital baseband module to perform backscatter modulation on the internal signal provided by the digital baseband module, which carries data from the passive node chip. This process includes: The modulation submodule changes the reflection coefficient of the antenna's matching impedance through the control signal, thereby multiplying the carrier signal and the internal signal to obtain the backscattered modulated signal.

8. The short-range wireless communication protocol compatible passive node chip of claim 1, wherein, The passive node chip adopts a dual-antenna structure.

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