A test system and method for N-type MOSFET linear region SOA impact resistance

Abstract

The application provides a kind of N-type MOSFET linear region SOA impact resistance ability test system, it includes: first power module is used to provide operating voltage for control module and constant current module;Control module is used to provide analog control signal, and output analog control signal to constant current module;Constant current module is used to process the analog control signal;Switching module is used to control the opening or closing of itself according to voltage signal;Test module is used to connect the N-type MOSFET to be tested, and test the linear region SOA impact resistance ability of the MOSFET to be tested;Sampling module is used to collect voltage signal itself;Second power module is used to control the opening or closing of itself according to switching control signal, and receive parameter signal, and output data signal to the test module according to parameter signal;Second power module is also used to transmit data signal to control module in real time.The application also provides a kind of N-type MOSFET linear region SOA impact resistance ability test method.

Description

Technical Field

[0001] This application relates to the field of MOSFET testing, specifically to a testing system and a testing method for the impact resistance of the SOA in the linear region of an N-type MOSFET. Background Technology

[0002] In systems such as 28V airborne power supplies, 270V airborne power supplies, and -48V communication power supplies, certain application scenarios require Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) to operate in their linear region. For example, using MOSFETs in reverse connection protection and soft-start circuits can prevent inrush currents when the large capacitor on the downstream power supply bus is charged during the power-on process of the DC power supply system. Another reason is to meet the overvoltage protection requirements of the circuit. Taking an airborne 28V power supply circuit as an example, according to the GJB181B-2012 standard, there is an overvoltage protection requirement of 80V / 50ms. Applying MOSFETs to this overvoltage protection circuit can clamp the surge voltage within 28-36V. Therefore, in different application scenarios, it is necessary to select MOSFETs that are suitable for the circuit requirements based on the surge resistance of the MOSFET's linear region.

[0003] Currently, MOSFETs are typically selected by consulting their datasheets. However, the datasheets provided by both foreign and domestic manufacturers are often inaccurate and lack high and low temperature test data, frequently leading to selection failures.

[0004] Therefore, how to solve the problem of not being able to select a suitable MOSFET for circuit requirements due to the inability to accurately assess the shock resistance of N-MOSFETs in the linear region has become an urgent problem for engineers. Summary of the Invention

[0005] In view of the shortcomings of the above-mentioned related technologies, this application provides a test system and a test method for the shock resistance capability of the linear region SOA of an N-type MOSFET, which aims to solve the problem that the existing technology cannot accurately evaluate the shock resistance capability of the linear region of an N-MOSFET, resulting in the inability to select a MOSFET suitable for circuit requirements.

[0006] This application provides a test system for the SOA (Self-Avoidance of Angle of Occurrence) withstand capability of an N-type MOSFET in the linear region. The system includes a first power supply module, a control module, a constant current module, a switching module, a test module, a sampling module, and a second power supply module. The first power supply module is electrically connected to the control module and the constant current module, providing operating voltage to them. The control module is electrically connected to the constant current module and the switching module, and interacts with the second power supply module to provide analog control signals and output these signals to the constant current module. The control module also provides voltage signals and outputs them to the switching module. Furthermore, the control module provides control signals and outputs these signals to the second power supply module. These control signals include at least one of parameter signals and / or switching control signals. The constant current module is connected to the switching module, the constant current module, the switching ... and the switching module. The first power supply module is electrically connected to the control module and the switching module, and interacts with the second power supply module to provide analog control signals and output them to the constant current module. The control module provides analog control signals and outputs them to the switching module. The control signals include at least one of parameter signals and / or switching control signals. The constant current module is connected to the control module and the switching module. The test module, the sampling module, and the second power supply module are electrically connected to process the analog control signal and transmit the processed analog control signal to the test module. The switch module is electrically connected to the test module, the sampling module, and the second power supply module to control its own on / off state according to the voltage signal. The test module is electrically connected to the sampling module and the second power supply module to connect to the N-type MOSFET under test and test the SOA (Self-Alignment Aspect) surge resistance of the MOSFET under test in the linear region. The sampling module is electrically connected to the second power supply module to acquire its own voltage signal. The second power supply module controls its own on / off state according to the switch control signal, receives the parameter signal, and outputs a data signal to the test module according to the parameter signal. The second power supply module also transmits the data signal to the control module in real time.

[0007] In one embodiment of this application, the parameter signal includes at least one of test voltage, test current, and test time, and the data signal includes at least one of output voltage signal and / or output current signal.

[0008] In one embodiment of this application, the first power module includes a switching power supply unit, a first voltage regulator unit, and a second voltage regulator unit. The switching power supply unit is electrically connected to both the first and second voltage regulator units, and is used to output a first voltage signal and / or a second voltage signal, transmitting the first voltage signal to the first voltage regulator unit and the second voltage signal to the second voltage regulator unit. The first voltage regulator unit is electrically connected to the constant current module, and is used to regulate the first voltage signal and transmit the regulated first voltage signal to the constant current module. The second voltage regulator unit is electrically connected to the control module, and is used to regulate the second voltage signal and transmit the regulated second voltage signal to the control module.

[0009] In one embodiment of this application, the control module includes a control unit, a display unit, a signal conversion unit, and a data input unit. The control unit is electrically connected to the second voltage regulator unit and the switching module, and interacts with the display unit, the signal conversion unit, the data input unit, and the second power module. It outputs an indication signal and transmits the indication signal to the display unit. The control unit also outputs a digital control signal and transmits the digital control signal to the signal conversion unit. Furthermore, the control unit provides a control signal and outputs the control signal to the second power module. It also provides a voltage signal and outputs the voltage signal to the switching module. The display unit displays the indication signal. The signal conversion unit is electrically connected to the constant current module and converts the digital control signal into an analog control signal, outputting the analog control signal to the constant current module. The data input unit inputs the parameter signal and transmits the parameter signal to the control unit. The data input unit also inputs an indication signal to start or stop the test and transmits the indication signal to the control unit.

[0010] In one embodiment of this application, the control unit is a microcontroller unit, the display unit is a liquid crystal display, the signal conversion unit is a digital-to-analog converter chip, and the data input unit is a 4*4 matrix keyboard.

[0011] In one embodiment of this application, the constant current module includes an operational amplifier, a first capacitor, a first resistor, a second resistor, and a third resistor. The non-inverting input of the operational amplifier is electrically connected to the signal conversion unit; the inverting input of the operational amplifier is electrically connected to one end of the first capacitor, one end of the first resistor, and one end of the third resistor; the positive power supply interface of the operational amplifier is electrically connected to the first voltage regulator unit; the negative power supply interface of the operational amplifier is electrically connected to the switching module, the sampling module, and the second power supply module; the output of the operational amplifier is electrically connected to the other end of the first capacitor, the other end of the first resistor, and one end of the second resistor, for comparing the analog control signal, outputting a comparison result, and transmitting the comparison result to the second resistor. The first capacitor is connected in parallel with the first resistor; one end of the first capacitor is electrically connected to one end of the third resistor; and the other end of the first capacitor is electrically connected to one end of the second resistor. One end of the first resistor is electrically connected to one end of the third resistor, and the other end of the first resistor is electrically connected to one end of the second resistor; the other end of the second resistor is electrically connected to the switch module and the test module; the other end of the third resistor is electrically connected to the test module and the sampling module.

[0012] In one embodiment of this application, the switching module includes a MOS transistor, wherein the gate of the MOS transistor is electrically connected to the control unit, the source of the MOS transistor is electrically connected to the negative power supply interface of the operational amplifier, the sampling module and the second power supply module and is grounded, and the drain of the MOS transistor is electrically connected to the other end of the second resistor and the test module, for controlling its own conduction or shutdown according to the voltage signal.

[0013] In one embodiment of this application, the sampling module includes a sampling resistor, wherein one end of the sampling resistor is electrically connected to the other end of the third resistor, and the other end of the sampling resistor is electrically connected to the source of the MOS transistor and the second power module, and is grounded, for acquiring its own voltage signal.

[0014] In one embodiment of this application, the second power module includes a control power unit, wherein the positive terminal of the control power unit is electrically connected to the test module, and the negative terminal of the control power unit is electrically connected to the negative power supply interface of the operational amplifier, the source of the MOS transistor, and the other end of the sampling resistor, for controlling its own on or off according to the switch control signal, receiving the parameter signal, and outputting a data signal to the test module according to the parameter signal.

[0015] Based on the same inventive concept, this application also provides a test method for the shock resistance capability of the linear region SOA of an N-type MOSFET, used to test an N-type MOSFET. The test method for the shock resistance capability of the linear region SOA of an N-type MOSFET includes: placing the N-type MOSFET under test into the test module and outputting a first preset voltage to the MOSFET; inputting the parameter signal, determining the digital control signal and the parameter signal according to the parameter signal, and writing the test time in the parameter signal into a timer in the control unit; inputting an indication signal to start the test; outputting a third preset voltage to the MOSFET and controlling the timer to start timing; processing the digital control signal and outputting the analog control signal to the operational amplifier; when the test time is reached, outputting a fourth preset voltage to the signal conversion unit; controlling the MOSFET to turn on; and outputting the control signal to the control power supply unit to turn off the control power supply unit.

[0016] In summary, the test system and method for assessing the shock resistance of the linear region SOA of an N-type MOSFET provided in this application utilize the second power module, which controls its own on / off state according to the switch control signal, receives the parameter signal, and outputs a data signal to the test module based on the parameter signal. Simultaneously, the data signal is transmitted to the control module in real time to determine the operating state of the N-type MOSFET, thereby evaluating the shock resistance of the linear region of the N-type MOSFET and significantly improving the efficiency of selecting a MOSFET suitable for circuit requirements. It should be understood that the above general description and the following detailed description are merely exemplary and explanatory and do not limit this application. Attached Figure Description

[0017] Figure 1 This is a schematic diagram of the structure of a test system for the impact resistance of an N-type MOSFET linear region SOA disclosed in an embodiment of this application;

[0018] Figure 2 This is a circuit diagram of a test system for the impact resistance of an N-type MOSFET linear region SOA disclosed in an embodiment of this application;

[0019] Figure 3 This is a schematic flowchart of a test method for the impact resistance of an N-type MOSFET linear region SOA disclosed in an embodiment of this application. Detailed Implementation

[0020] The following specific examples illustrate the implementation of this application. Those skilled in the art can easily understand other advantages and effects of this application from the content disclosed in this specification. This application can also be implemented or applied through other different specific embodiments, and various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of this application. It should be noted that, unless otherwise specified, the following embodiments and features in the embodiments can be combined with each other.

[0021] It should be noted that the illustrations provided in the following embodiments are only schematic representations of the basic concept of this application. Therefore, the drawings only show the components related to this application and are not drawn according to the actual number, shape and size of the components in the actual implementation. In the actual implementation, the form, quantity and proportion of each component can be arbitrarily changed, and the layout of the components may also be more complex.

[0022] It should be noted that in this application, terms such as "first" and "second" are merely for distinguishing similar objects, and do not limit the order or sequence of similar objects. The variations of "including" and "having" indicate that the scope covered by the subject of the word is not exclusive, except for the examples shown by the word.

[0023] It is understood that the various numerical designations, step numbers, and other identifiers recorded in this application are for descriptive convenience and are not intended to limit the scope of this application. The size of the identifiers in this application does not imply the order of execution; the execution order of each process should be determined by its function and internal logic.

[0024] In the following description, numerous details are explored to provide a more thorough explanation of embodiments of the present application. However, it will be apparent to those skilled in the art that embodiments of the present application may be practiced without these specific details. In other embodiments, well-known structures and devices are shown in block diagram form rather than in detail to avoid obscuring embodiments of the present application.

[0025] In systems with 28V airborne power supplies, 270V airborne power supplies, and -48V communication power supplies, certain application scenarios require Metal-Oxide-Semiconductor Field-Effect Transistors (MOSFETs) to operate in their linear region. For example, using MOSFETs in reverse connection protection and soft-start circuits can prevent inrush currents when the large capacitor on the downstream power bus is charged during the power-on of the DC power supply system. Another reason is to meet overvoltage protection requirements. Taking an airborne 28V power supply circuit as an example, according to the GJB181B-2012 standard, there is an 80V / 50ms overvoltage protection requirement. Applying MOSFETs to this overvoltage protection circuit can clamp the surge voltage within 28-36V. Therefore, in different application scenarios, it is necessary to select a MOSFET suitable for the circuit requirements based on the surge resistance of the MOSFET's linear region. Currently, MOSFETs are usually selected by consulting the device's datasheet. However, the datasheets provided by both foreign and domestic manufacturers for MOSFETs are often inaccurate, and high and low temperature test data are lacking, frequently leading to selection failures. Therefore, this application aims to provide a solution to the problem of being unable to select a suitable MOSFET for circuit requirements due to the inability to accurately assess the shock resistance of N-MOSFETs in the linear region. This solution enables the assessment of the shock resistance of MOSFETs in the linear region, thereby selecting a suitable MOSFET for the circuit requirements. Details will be elaborated in subsequent embodiments.

[0026] The embodiments of this application respectively propose a test system for the shock resistance capability of the linear region SOA of an N-type MOSFET and a test method for the shock resistance capability of the linear region SOA of an N-type MOSFET. These embodiments will be described in detail below.

[0027] Please see Figure 1 This is a schematic diagram of the structure of a test system for the impact resistance of an N-type MOSFET linear region SOA, as disclosed in an embodiment of this application. Figure 1 As shown, this application provides a test system 100 for the shock resistance capability of the linear region SOA of an N-type MOSFET, which may include at least a first power supply module 110, a control module 120, a constant current module 130, a switching module 150, a test module 160, a sampling module 170, and a second power supply module 190.

[0028] The first power module 110 is electrically connected to the control module 120 and the constant current module 130, and is used to provide operating voltage to the control module 120 and the constant current module 130.

[0029] The control module 120 is electrically connected to the constant current module 130 and the switching module 150, and interacts with the second power supply module 190 to provide analog control signals and output the analog control signals to the constant current module 130. The control module 120 is also used to provide voltage signals and output the voltage signals to the switching module 150. The control module 120 is further used to provide control signals and output the control signals to the second power supply module 190. In this embodiment, the control signals include at least one of parameter signals and / or switching control signals.

[0030] The constant current module 130 is electrically connected to the switch module 150, the test module 160, the sampling module 170, and the second power supply module 190, and is used to process the analog control signal and transmit the processed analog control signal to the test module 160.

[0031] The switch module 150 is electrically connected to the test module 160, the sampling module 170 and the second power module 190, and is used to control its own opening or closing according to the voltage signal.

[0032] The test module 160 is electrically connected to the sampling module 170 and the second power module 190, and is used to connect the N-type MOSFET under test and test the SOA resistance of the linear region of the MOSFET under test.

[0033] The sampling module 170 is electrically connected to the second power module 190 and is used to collect its own voltage signal.

[0034] The second power module 190 is used to control its own on / off state according to the switch control signal, receive the parameter signal, and output a data signal to the test module 160 according to the parameter signal. The second power module 190 is also used to transmit the data signal to the control module 120 in real time.

[0035] In one embodiment of this application, the second power module 190 can be a programmable power supply, the parameter signal includes at least one of test voltage, test current and test time, and the data signal includes at least one of output voltage signal and / or output current signal.

[0036] Please see Figure 2 This is a circuit diagram of a test system for the impact resistance of an N-type MOSFET linear region SOA, as disclosed in an embodiment of this application. Figure 2As shown, the first power module 110 provided in this application may include at least a switching power supply unit 111, a first voltage regulator unit 113, and a second voltage regulator unit 115. The switching power supply unit 111 is electrically connected to both the first voltage regulator unit 113 and the second voltage regulator unit 115, and is used to output a first voltage signal and / or a second voltage signal, transmitting the first voltage signal to the first voltage regulator unit 113 and the second voltage signal to the second voltage regulator unit 115.

[0037] The first voltage regulator unit 113 is electrically connected to the constant current module 130, and is used to regulate the first voltage signal and transmit the regulated first voltage signal to the constant current module 130. The second voltage regulator unit 115 is electrically connected to the control module 120, and is used to regulate the second voltage signal and transmit the regulated second voltage signal to the control module 120.

[0038] In one embodiment of this application, the switching power supply unit 111 can be a 220V / 110V / 15V switching power supply, the first voltage regulator unit 113 can be a 12V voltage regulator, and the second voltage regulator unit 115 can be a 5V voltage regulator.

[0039] The control module 120 may include at least a control unit 121, a display unit 123, a signal conversion unit 124, and a data input unit 126. The control unit 121 is electrically connected to the second voltage regulator unit 115 and the switching module 150, and interacts with the display unit 123, the signal conversion unit 124, the data input unit 126, and the second power module 190. It outputs an indication signal and transmits the indication signal to the display unit 123. The control unit 121 also outputs a digital control signal and transmits the digital control signal to the signal conversion unit 124. The control unit 121 also provides a control signal and outputs the control signal to the second power module 190. The control unit 121 also provides a voltage signal and outputs the voltage signal to the switching module 150.

[0040] The display unit 123 is used to display according to the indication signal. The signal conversion unit 124 is electrically connected to the constant current module 130, and is used to convert the digital control signal into the analog control signal, and output the analog control signal to the constant current module 130. The data input unit 126 is used to input the parameter signal and transmit the parameter signal to the control unit 121. The data input unit 126 is also used to input an indication signal to start or stop the test, and transmit the indication signal to the control unit 121.

[0041] In one embodiment of this application, the control unit 121 can be a microcontroller unit (MCU), the display unit 123 can be a liquid crystal display, the signal conversion unit 124 can be a digital-to-analog converter chip, and the data input unit 126 can be a 4*4 matrix keyboard.

[0042] The constant current module 130 may include at least an operational amplifier U1, a first capacitor C1, a first resistor R1, a second resistor R2, and a third resistor R3. The non-inverting input of the operational amplifier U1 is electrically connected to the signal conversion unit 124; the inverting input of the operational amplifier U1 is electrically connected to one end of the first capacitor C1, one end of the first resistor R1, and one end of the third resistor R3; the positive power supply interface of the operational amplifier U1 is electrically connected to the first voltage regulator unit 113; the negative power supply interface of the operational amplifier U1 is electrically connected to the switching module 150, the sampling module 170, and the second power supply module 190; and the output of the operational amplifier U1 is electrically connected to the other end of the first capacitor C1, the other end of the first resistor R1, and one end of the second resistor R2, for comparing the analog control signal, outputting a comparison result, and transmitting the comparison result to the second resistor R2.

[0043] The first capacitor C1 is connected in parallel with the first resistor R1. One end of the first capacitor C1 is electrically connected to one end of the third resistor R3, and the other end of the first capacitor C1 is electrically connected to one end of the second resistor R2. One end of the first resistor R1 is electrically connected to one end of the third resistor R3, and the other end of the first resistor R1 is electrically connected to one end of the second resistor R2.

[0044] The other end of the second resistor R2 is electrically connected to the switch module 150 and the test module 160. The other end of the third resistor R3 is electrically connected to the test module 160 and the sampling module 170.

[0045] The switching module 150 may include at least a MOSFET Q1, wherein the gate of the MOSFET Q1 is electrically connected to the control unit 121, the source of the MOSFET Q1 is electrically connected to the negative power supply interface of the operational amplifier U1, the sampling module 170 and the second power supply module 190 and is grounded, and the drain of the MOSFET Q1 is electrically connected to the other end of the second resistor R2 and the test module 160, for controlling its own conduction or turn-off according to the voltage signal.

[0046] The sampling module 170 may include at least a sampling resistor R6, wherein one end of the sampling resistor R6 is electrically connected to the other end of the third resistor R3, and the other end of the sampling resistor R6 is electrically connected to the source of the MOS transistor Q1 and the second power supply module 190, and is grounded, for acquiring its own voltage signal.

[0047] The second power module 190 may include at least a control power unit 191, wherein the positive terminal of the control power unit 191 is electrically connected to the test module 160, and the negative terminal of the control power unit 191 is electrically connected to the negative power supply interface of the operational amplifier U1, the source of the MOS transistor Q1, and the other end of the sampling resistor R6. It is used to control its own on or off according to the switch control signal, receive the parameter signal, and output a data signal to the test module 160 according to the parameter signal.

[0048] In summary, the N-type MOSFET linear region SOA shock resistance test system provided in this application uses the second power module 190 to control its own on / off state according to the switch control signal, receives the parameter signal, and outputs a data signal to the test module 160 according to the parameter signal. At the same time, the data signal is transmitted to the control module 120 in real time to determine the operating state of the N-type MOSFET, thereby evaluating the shock resistance of the linear region of the N-type MOSFET and greatly improving the efficiency of selecting a MOSFET suitable for circuit requirements.

[0049] Please see Figure 3 This is a flowchart illustrating a test method for the shock resistance of an N-type MOSFET's linear region SOA (Self-Surround Air) according to an embodiment of this application. This method is used to test the shock resistance of an N-type MOSFET in its linear region SOA, thereby effectively improving the efficiency of selecting a MOSFET suitable for circuit requirements. Figure 3 As shown, the test method for the shock resistance capability of the linear region SOA of the N-type MOSFET includes at least the following steps.

[0050] S10. Place the N-type MOSFET under test into the test module 160 and output a first preset voltage to the MOSFET Q1.

[0051] Specifically, the N-type MOSFET under test is inserted into the fixture of the test module 160, and the control power supply unit 191 is set to communication mode to achieve information interaction with the control unit 121. The control unit 121 outputs a first preset voltage to the MOSFET Q1, so that the MOSFET Q1 is turned on and the gate voltage of the N-type MOSFET under test is turned off, thereby avoiding false triggering. At the same time, the output voltage of the signal conversion unit 124 is adjusted to a second preset voltage.

[0052] In this embodiment of the application, the first preset voltage can be 5V, and the second preset voltage can be 0V.

[0053] S20. Input the parameter signal, determine the digital control signal and the parameter signal according to the parameter signal, and write the test time in the parameter signal into the timer in the control unit 121.

[0054] Specifically, the parameter signal is input through the data input unit 126 and transmitted to the control unit 121. The control unit 121 calculates the digital control signal and the parameter signal based on the relationship formula between the output voltage value, the output current limit value, the test voltage, and the test current, as well as the parameter signal. Simultaneously, the test time from the parameter signal is written into the timer in the control unit 121 using an algorithm.

[0055] S30, Input the indicator signal to start the test.

[0056] Specifically, the data input unit 126 inputs an instruction signal to start the test. The control unit 121 receives the instruction signal to start the test, transmits the parameter signal to the control power supply unit 191, and sends the control signal to the control power supply unit 191. The control power supply unit 191 receives the control signal and turns on the power output.

[0057] S40. Output a third preset voltage to the MOS transistor Q1 and control the timer to start counting.

[0058] Specifically, the control unit 121 outputs a third preset voltage to the MOSFET Q1 to pull down the gate voltage of the MOSFET Q1, thereby putting the gate of the N-type MOSFET under test into a controllable state. Simultaneously, the control unit 121 controls the timer to start operating.

[0059] S50. Process the digital control signal and output the analog control signal to the operational amplifier.

[0060] Specifically, the control unit 121 controls the signal conversion unit 124 to output the analog control signal at a first preset rate. The operational amplifier U1 receives the analog control signal, compares the analog control signal, outputs a comparison result, and transmits the comparison result to the gate of the N-type MOSFET under test through the second resistor R2.

[0061] S60. When the test time is reached, output the fourth preset voltage to the signal conversion unit 124.

[0062] Specifically, when the test time is reached, the control unit 121 outputs a fourth preset voltage to the signal conversion unit 124 at a second preset rate.

[0063] In this embodiment of the application, the fourth preset voltage is 0V.

[0064] S70, Control the MOS transistor Q1 to turn on.

[0065] Specifically, the control unit 121 controls the MOS transistor Q1 to turn on in order to turn off the N-type MOSFET under test.

[0066] S80, Output the control signal to the control power supply unit 191 to turn off the control power supply unit 191.

[0067] Specifically, the control unit 121 outputs the control signal to the control power supply unit 191 to turn off the control power supply unit 191.

[0068] In summary, the test method for the SOA resistance of the linear region of an N-type MOSFET provided in this application involves the second power module 190 controlling its own on / off state according to the switch control signal, receiving the parameter signal, and outputting a data signal to the test module 160 based on the parameter signal. Simultaneously, the data signal is transmitted in real-time to the control module 120 to determine the operating state of the N-type MOSFET, thereby evaluating the SOA resistance of the linear region of the N-type MOSFET and significantly improving the efficiency of selecting a MOSFET suitable for circuit requirements.

[0069] The above embodiments are merely illustrative of the principles and effects of this application and are not intended to limit this application. Any person skilled in the art can modify or alter the above embodiments without departing from the spirit and scope of this application. Therefore, all equivalent modifications or alterations made by those skilled in the art without departing from the spirit and technical concept disclosed in this application should still be covered by the claims of this application.

Claims

1. A test system for the shock resistance of an N-type MOSFET in the linear region of its SOA (Self-Supporting Aspect Ratio), characterized in that, The first power module, the control module, the constant current module, the switch module, the test module, the sampling module and the second power module are included, wherein, The first power module is electrically connected with the control module and the constant current module, and is used for providing working voltage for the control module and the constant current module; The control module is electrically connected with the constant current module and the switch module, and exchanges information with the second power module, and is used for providing an analog control signal and outputting the analog control signal to the constant current module; the control module is also used for providing a voltage signal and outputting the voltage signal to the switch module; the control module is also used for providing a control signal and outputting the control signal to the second power module, and the control signal includes at least one of a parameter signal and / or a switch control signal; The constant current module is electrically connected with the switch module, the test module, the sampling module and the second power module, and is used for processing the analog control signal and transmitting the processed analog control signal to the test module; The switch module is electrically connected with the test module, the sampling module and the second power module, and is used for controlling opening or closing of itself according to the voltage signal; The test module is electrically connected with the sampling module and the second power module, and is used for connecting an N-type MOSFET to be tested and testing linear region SOA impact resistance of the MOSFET to be tested; The sampling module is electrically connected with the second power module, and is used for collecting a voltage signal of itself; The second power module is used for controlling opening or closing of itself according to the switch control signal, receiving the parameter signal and outputting a data signal to the test module according to the parameter signal; the second power module is also used for transmitting the data signal to the control module in real time; The parameter signal is input through a data input unit in the control module and is transmitted to a control unit in the control module; the control unit calculates according to a relationship formula of an output voltage value, an output current limiting value, a test voltage and a test current and the parameter signal, respectively obtains a digital control signal and the parameter signal, writes a test time in the parameter signal into a timer in the control unit through an algorithm, and then outputs a preset voltage to control the MOS tube to open when the test time is reached, so as to control the MOSFET to be tested and obtain data of the impact resistance.

2. The system for testing the linear region SOA ruggedness of an N-type MOSFET according to claim 1, wherein, The parameter signal includes at least one of a test voltage, a test current and a test time, and the data signal includes at least one of an output voltage signal and / or an output current signal.

3. The system for testing N-type MOSFET linear region SOA immunity according to claim 2, wherein, The first power module includes a switching power supply unit, a first voltage stabilizing unit and a second voltage stabilizing unit, wherein, The switching power supply unit is electrically connected with the first voltage stabilizing unit and the second voltage stabilizing unit respectively, and is used for outputting a first voltage signal and / or a second voltage signal, transmitting the first voltage signal to the first voltage stabilizing unit and transmitting the second voltage signal to the second voltage stabilizing unit; The first voltage stabilizing unit is electrically connected with the constant current module, for stabilizing the first voltage signal, and transmitting the first voltage signal after the stabilizing to the constant current module; The second voltage stabilizing unit is electrically connected with the control module, for stabilizing the second voltage signal, and transmitting the second voltage signal after the stabilizing to the control module.

4. The system for testing N-type MOSFET linear region SOA immunity according to claim 3, wherein, The control module comprises a control unit, a display unit, a signal converting unit and a data input unit, wherein, The control unit is electrically connected with the second voltage stabilizing unit and the switch module, and is in information interaction with the display unit, the signal converting unit, the data input unit and the second power module, for outputting an indication signal and transmitting the indication signal to the display unit; the control unit is also for outputting a digital control signal and transmitting the digital control signal to the signal converting unit; the control unit is also for providing a control signal and outputting the control signal to the second power module; the control unit is also for providing a voltage signal and outputting the voltage signal to the switch module; The display unit is for displaying according to the indication signal; The signal converting unit is electrically connected with the constant current module, for converting the digital control signal into the analog control signal and outputting the analog control signal to the constant current module; The data input unit is for inputting the parameter signal and transmitting the parameter signal to the control unit; the data input unit is also for inputting an indication signal of starting or stopping the test and transmitting the indication signal to the control unit.

5. The system for testing N-type MOSFET linear region SOA immunity according to claim 4, wherein, The control unit is a micro control unit, the display unit is a liquid crystal display, the signal converting unit is a digital-analog conversion chip, and the data input unit is a 4*4 matrix keyboard.

6. The system for testing N-type MOSFET linear region SOA immunity according to claim 4, wherein, The constant current module comprises an operational amplifier, a first capacitor, a first resistor, a second resistor and a third resistor, wherein, The non-inverting input terminal of the operational amplifier is electrically connected with the signal converting unit, the inverting input terminal of the operational amplifier is electrically connected with one end of the first capacitor, one end of the first resistor and one end of the third resistor, the positive power supply interface of the operational amplifier is electrically connected with the first voltage stabilizing unit, the negative power supply interface of the operational amplifier is electrically connected with the switch module, the sampling module and the second power module, and the output terminal of the operational amplifier is electrically connected with the other end of the first capacitor, the other end of the first resistor and one end of the second resistor, for comparing the analog control signal and outputting a comparison result, and transmitting the comparison result to the second resistor; The first capacitor is connected in parallel with the first resistor, one end of the first capacitor is electrically connected with one end of the third resistor, the other end of the first capacitor is electrically connected with one end of the second resistor, one end of the first resistor is electrically connected with one end of the third resistor, and the other end of the first resistor is electrically connected with one end of the second resistor; Another end of the second resistor is electrically connected with the switch module and the test module; Another end of the third resistor is electrically connected with the test module and the sampling module.

7. The system for testing N-type MOSFET linear region SOA immunity according to claim 6, wherein, The switch module comprises a MOS tube, wherein a gate of the MOS tube is electrically connected with the control unit, a source of the MOS tube is electrically connected with a negative power supply interface of the operational amplifier, the sampling module and the second power supply module, and grounded, a drain of the MOS tube is electrically connected with another end of the second resistor and the test module, for controlling conduction or turn-off of itself according to the voltage signal.

8. The system for testing N-type MOSFET linear region SOA immunity according to claim 7, wherein, The sampling module comprises a sampling resistor, wherein one end of the sampling resistor is electrically connected with another end of the third resistor, another end of the sampling resistor is electrically connected with the source of the MOS tube and the second power supply module, and grounded, for collecting voltage signal of itself.

9. The system for testing N-type MOSFET linear region SOA immunity according to claim 8, wherein, The second power supply module comprises a control power supply unit, wherein a positive pole of the control power supply unit is electrically connected with the test module, a negative pole of the control power supply unit is electrically connected with the negative power supply interface of the operational amplifier, the source of the MOS tube and another end of the sampling resistor, for controlling opening or closing of itself according to the switch control signal, receiving the parameter signal, and outputting data signal to the test module according to the parameter signal.

10. A method for testing the linear region SOA ruggedness of an N-type MOSFET as claimed in any one of claims 1 to 9, for testing an N-type MOSFET, characterized in that, The method for testing SOA impact resistance of N-type MOSFET linear region comprises: Placing the N-type MOSFET to be tested into the test module, and outputting a first preset voltage to the MOS tube; Inputting a parameter signal, determining a digital control signal and the parameter signal according to the parameter signal, and writing test time in the parameter signal into a timer in the control unit; Inputting an indication signal for starting test; Outputting a third preset voltage to the MOS tube, and controlling the timer to start timing; Processing the digital control signal to output an analog control signal to the operational amplifier; When the test time is reached, outputting a fourth preset voltage to the signal conversion unit; Controlling the MOS tube to open; Outputting the control signal to the control power supply unit to close the control power supply unit.

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