Supply voltage selection circuit, method and DCDC chip with the circuit

Abstract

The present invention relates to the field of DC / DC technology, and more specifically to a power supply voltage selection circuit, method, and a DC / DC chip having the circuit. The circuit comprises a first voltage generation module, a second voltage generation module, and a high-voltage judgment and selection module. The first voltage generation module is configured to generate a first power supply voltage after the DC / DC chip is initially powered on; the second voltage generation module is configured to generate a second power supply voltage after the DC / DC chip is operational; and the high-voltage judgment and selection module is configured to compare the first and second power supply voltages in real time, select the higher of the two as the final internal power supply voltage, and power the internal circuits of the DC / DC chip. The present invention ensures that the power supply voltage of the internal structure of the DC / DC chip is not affected when the voltage is low, thereby achieving higher operating performance.

Description

Technical Field

[0001] The present invention relates to the field of DCDC technology, and more particularly to a power supply voltage selection circuit and method, and a DCDC chip having the circuit. Background Art

[0002] Traditional high-voltage DC-DC chips usually only generate one internal supply voltage to power the chip's internal circuits. When under low-voltage conditions, the internal supply voltage will also be affected and reduced, which will cause the performance of other modules within the DCDC chip to deteriorate, thereby reducing the overall working performance of the chip. Summary of the Invention

[0003] In view of this, the present invention provides a power supply voltage selection circuit, method and a DCDC chip having the circuit, which can ensure that the power supply voltage of the internal structure of the DCDC chip is not affected at low voltage, thereby achieving higher working performance.

[0004] In order to achieve the above object, the present invention adopts the following technical solutions:

[0005] In a first aspect, the present invention provides a power supply voltage selection circuit, comprising: a first voltage generation module, a second voltage generation module and a high voltage judgment and selection module;

[0006] The first voltage generating module is used to generate a first supply voltage after the DCDC chip is initially powered on;

[0007] The second voltage generating module is used to generate a second supply voltage after the DCDC chip is working;

[0008] The high-voltage judgment and selection module is used to compare the first supply voltage and the second supply voltage in real time, select the one with the higher value as the final internal supply voltage, and power the internal circuit of the DCDC chip.

[0009] Furthermore, the first voltage generating module includes: a first resistor, a second resistor, a first Zener diode and a first MOS transistor;

[0010] The drain of the first MOS transistor and one end of the first resistor are both connected to the voltage input pin Vin of the DCDC chip; the gate of the first MOS transistor is respectively connected to the cathode of the first Zener diode and the other end of the first resistor; the source of the first MOS transistor is connected to one end of the second resistor, and the source voltage of the first MOS transistor serves as the first supply voltage;

[0011] An anode of the first Zener diode and the other end of the second resistor are both grounded.

[0012] Furthermore, the second voltage generating module includes: a common diode, a first capacitor and a second Zener diode;

[0013] The anode of the common diode is connected to the bootstrap voltage pin BST of the DCDC chip, and the cathode is connected to one end of the first capacitor and the cathode of the second Zener diode respectively;

[0014] The other end of the first capacitor and the anode of the second Zener diode are both grounded;

[0015] The cathode voltage of the second Zener diode serves as the second power supply voltage.

[0016] Furthermore, the second voltage generating module includes: a second MOS tube, a control unit, a second capacitor and a third Zener diode;

[0017] One end of the control unit is connected to the gate of the second MOS transistor, and the other end is respectively connected to the source of the second MOS transistor and the first voltage output end of the first voltage generating module;

[0018] The source of the second MOS tube is connected to the bootstrap voltage pin BST of the DCDC chip;

[0019] The drain of the second MOS transistor is connected to one end of the second capacitor and the cathode of the third Zener diode respectively;

[0020] The other end of the second capacitor and the anode of the third Zener diode are both grounded;

[0021] The cathode voltage of the third Zener diode serves as the second power supply voltage.

[0022] Furthermore, the control unit includes: a fifth MOS transistor, a first inverter, a third resistor, and a fourth resistor; the gate of the fifth MOS transistor is connected to the first voltage output end of the first voltage generating module, the drain is connected to one end of the third resistor, and the source is respectively connected to the input end of the first inverter and one end of the fourth resistor; the other end of the third resistor is connected to the bootstrap voltage pin BST of the DCDC chip, and the other end of the fourth resistor is grounded; the output end of the first inverter is connected to the gate of the second MOS transistor.

[0023] Furthermore, the high-voltage judgment and selection module includes a high-voltage selector, a third MOS transistor and a fourth MOS transistor;

[0024] The high-voltage selector has a positive input terminal, a negative input terminal, a first output terminal, and a second output terminal; the positive input terminal of the high-voltage selector and the source of the third MOS transistor are both connected to the output terminal of the first voltage generating module; the negative input terminal of the high-voltage selector and the source of the fourth MOS transistor are both connected to the output terminal of the second voltage generating module; the first output terminal of the high-voltage selector is connected to the gate of the third MOS transistor; and the second output terminal of the high-voltage selector is connected to the gate of the fourth MOS transistor;

[0025] The drain of the third MOS transistor and the drain of the fourth MOS transistor are connected to each other, and the drain voltage of the third MOS transistor or the drain voltage of the fourth MOS transistor serves as the final internal power supply voltage.

[0026] Furthermore, the third MOS transistor and the fourth MOS transistor are both NMOS transistors or PMOS transistors; when the first supply voltage is higher than the second supply voltage, the third MOS transistor is turned on and the fourth MOS transistor is turned off; when the first supply voltage is lower than the second supply voltage, the third MOS transistor is turned off and the fourth MOS transistor is turned on.

[0027] Furthermore, the high voltage selector includes: a comparator, a second inverter and a third inverter;

[0028] The positive input terminal of the comparator is connected to the output terminal of the first voltage generating module, the negative input terminal of the comparator is connected to the output terminal of the second voltage generating module, and the output terminal of the comparator is connected to the input terminal of the second inverter;

[0029] The output end of the second inverter is connected to the gate of the third MOS tube and the input end of the third inverter respectively;

[0030] The output end of the third inverter is connected to the gate of the fourth MOS transistor.

[0031] In a second aspect, the present invention provides a method for increasing an internal voltage, comprising the following steps:

[0032] After the DCDC chip is initially powered on, a first supply voltage is generated;

[0033] After the DCDC chip works, a second power supply voltage is generated;

[0034] The first power supply voltage and the second power supply voltage are compared in real time, and the higher one of the two is selected as the final internal power supply voltage to power the internal circuit of the DCDC chip.

[0035] In a third aspect, the present invention provides a DCDC chip including the above-mentioned power supply voltage selection circuit.

[0036] Furthermore, in the peripheral circuit, the bootstrap voltage pin BST of the DCDC chip is connected to the switch pin SW via a bootstrap capacitor, and the switch pin SW is connected to an LC filter network to obtain an external output voltage.

[0037] It can be seen from the above technical solutions that compared with the prior art, the present invention has the following beneficial effects:

[0038] The present invention integrates an additional voltage generation module within a high-voltage DC / DC chip, in addition to the traditional voltage generation module. After the chip is initially powered on, the traditional voltage generation module generates a first supply voltage. Once the chip is operational, the additional voltage generation module generates a second supply voltage. A high-voltage judgment and selection module compares the first and second supply voltages in real time and selects the higher voltage as the final voltage to power the chip's internal circuits. This allows the chip's internal circuits to be powered by the newly introduced voltage even if the traditional supply voltage drops, ensuring the chip's overall operational performance. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are merely embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on the provided drawings without paying any creative work.

[0040] Figure 1 This is a structural block diagram of the power supply voltage selection circuit provided by the present invention.

[0041] Figure 2 This is a schematic diagram of the circuit structure of the first voltage generating module in Example 1 provided by the present invention.

[0042] Figure 3 This is a schematic diagram of the circuit structure of the second voltage generating module in Example 1 provided by the present invention.

[0043] Figure 4 This is a waveform diagram of the second voltage generated by the second voltage generating module in Example 1 provided by the present invention.

[0044] Figure 5 This is a schematic diagram of the overall structure of the power supply voltage selection circuit in Example 1 provided by the present invention.

[0045] Figure 6 This is a schematic diagram of the circuit structure of the high-voltage selector in Example 1 provided by the present invention.

[0046] Figure 7This is a schematic diagram of the circuit structure of the second voltage generating module in Example 2 provided by the present invention.

[0047] Figure 8 This is a schematic diagram of the circuit structure of the control unit in Example 2 provided by the present invention.

[0048] Figure 9 This is a waveform diagram of the second voltage generated by the second voltage generating module in embodiment 2 provided by the present invention.

[0049] Figure 10 This is a schematic diagram of the overall structure of the power supply voltage selection circuit in Example 2 provided by the present invention.

[0050] Figure 11 This is a flow chart of the power supply voltage selection method in Example 3 provided by the present invention.

[0051] Figure 12 This is the operating waveform diagram of the BST pin and SW pin of the traditional high-voltage DCDC chip provided by the present invention.

[0052] Figure 13 Schematic diagram of the internal structure of the DCDC chip in Example 4.

[0053] Figure 14 This is a schematic diagram of the peripheral circuit structure of the DCDC chip in Example 4 provided by the present invention. Implementation Method

[0054] The following will clearly and completely describe the technical solutions in the embodiments of the present invention in conjunction with the accompanying drawings. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without making creative efforts are within the scope of protection of the present invention. Example

[0055] like Figure 1 As shown, this embodiment discloses a power supply voltage selection circuit, including: a first voltage generation module, a second voltage generation module and a high voltage judgment and selection module;

[0056] The first voltage generating module is used to generate a first supply voltage Vdda after the DCDC chip is initially powered on;

[0057] The second voltage generating module is used to generate a second power supply voltage Vddplus after the DCDC chip is working;

[0058] The high voltage judgment and selection module is used to compare the first supply voltage Vdda and the second supply voltage Vddplus in real time, select the higher one as the final internal supply voltage Vdda2, and power the internal circuit of the DCDC chip.

[0059] When the input power is low, vdda will also decrease, and the internal power supply is too low, resulting in poor performance of the DCDC internal circuit. At this time, an additional voltage Vddplus is introduced to power the internal circuit, thereby increasing the internal power supply to maintain the performance of the internal circuit of the DCDC chip.

[0060] Specifically, if Figure 2 As shown, the first voltage generating module includes: a first resistor R1, a second resistor R2, a first Zener diode D1 and a first MOS transistor M1;

[0061] The drain of the first MOS transistor M1 and one end of the first resistor R1 are both connected to the voltage input pin Vin of the DCDC chip; the gate of the first MOS transistor M1 is respectively connected to the cathode of the first Zener diode D1 and the other end of the first resistor R1; the source of the first MOS transistor M1 is connected to one end of the second resistor R2, and the source voltage of the first MOS transistor M1 serves as the first power supply voltage Vdda;

[0062] An anode of the first Zener diode D1 and the other end of the second resistor R2 are both grounded.

[0063] In this embodiment, the first MOS transistor M1 is an NMOS transistor. A reference potential of about 5.8V is generated through a resistor R1 and a first Zener diode D1 to control the gate terminal of a high-voltage NMOS transistor. According to the characteristics of the NMOS transistor, the output vdda voltage is equal to 5.8V minus the threshold of an NMOS transistor, which is about 5V.

[0064] like Figure 3 As shown, the second voltage generating module includes: a common diode D0, a first capacitor C1 and a second Zener diode D2;

[0065] The anode of the common diode D0 is connected to the bootstrap voltage pin BST of the DCDC chip, and the cathode is connected to one end of the first capacitor C1 and the cathode of the second Zener diode D2 respectively;

[0066] The other end of the first capacitor C1 and the anode of the second Zener diode D2 are both grounded;

[0067] The cathode voltage of the second Zener diode D2 serves as the second power supply voltage Vddpluse.

[0068] The bootstrap voltage VBST waveform at the bootstrap voltage pin BST is rectified into a DC voltage (vddplus) primarily through a unidirectionally conducting diode D0 and the first capacitor C1. This voltage is then clamped to a suitable operating voltage range by the first Zener diode D1. When VBST exceeds the reverse breakdown voltage of the first Zener diode D1, the cathode voltage stabilizes at the reverse breakdown voltage, typically around 5.8V. When VBST is below the diode's reverse breakdown voltage, the cathode voltage equals VBST.

[0069] The second voltage generating module utilizes the principle that VBST high level conduction and low level cutoff, periodically transmits high level to achieve vddplus voltage increase until it reaches the reverse breakdown voltage of the first Zener diode D1, and the vddplus voltage will no longer increase. Figure 4 It can be seen that VBST is a square wave signal, which is converted into a DC voltage vddplus after rectification.

[0070] like Figure 5 As shown, this is one of the solutions for jointly applying the first voltage generating module, the second voltage generating module and the high voltage selecting module to output Vdda2. A judgment is made between vdda and vddplus, and the MOS switch corresponding to the high voltage is selected to be turned on, thereby generating the final output voltage vdda2.

[0071] Among them, the high-voltage judgment and selection module includes a high-voltage selector, a third MOS tube M3 and a fourth MOS tube M4;

[0072] The high-voltage selector has a positive input terminal Vp, a negative input terminal Vn, a first output terminal, and a second output terminal. The first output terminal outputs a level signal of Ca, and the second output terminal outputs a level signal of Cs. The positive input terminal Vp of the high-voltage selector and the source of the third MOS transistor M3 are both connected to the output terminal of the first voltage generating module; the negative input terminal Vn of the high-voltage selector and the source of the fourth MOS transistor M4 are both connected to the output terminal of the second voltage generating module; the first output terminal of the high-voltage selector is connected to the gate of the third MOS transistor M3; and the second output terminal of the high-voltage selector is connected to the gate of the fourth MOS transistor M4.

[0073] The drain of the third MOS transistor M3 and the drain of the fourth MOS transistor M4 are connected to each other, and the drain voltage of the third MOS transistor M3 or the drain voltage of the fourth MOS transistor M4 serves as the final internal power supply voltage Vdda2.

[0074] Specifically, if Figure 6 As shown, the high voltage selector includes: a comparator A1, a second inverter INV2 and a third inverter INV3;

[0075] The positive input terminal of comparator A1 is connected to the output terminal of the first voltage generation module, the negative input terminal of comparator A1 is connected to the output terminal of the second voltage generation module, and the output terminal of comparator A1 is connected to the input terminal of the second inverter INV2;

[0076] The output terminal of the second inverter INV2 is respectively connected to the gate of the third MOS transistor M3 and the input terminal of the third inverter INV3; the output terminal of the second inverter INV2 outputs a level control signal Ca;

[0077] The output terminal of the third inverter INV3 is connected to the gate of the fourth MOS transistor M4, and the output terminal of the third inverter INV3 outputs a level control signal Cs.

[0078] In this embodiment, the third MOS transistor M3 and the fourth MOS transistor M4 are both NMOS transistors or PMOS transistors; when the first supply voltage is higher than the second supply voltage, the third MOS transistor M3 is turned on and the fourth MOS transistor M4 is turned off; when the first supply voltage is lower than the second supply voltage, the third MOS transistor M3 is turned off and the fourth MOS transistor M4 is turned on.

[0079] Taking the third MOS transistor M3 and the fourth MOS transistor M4 being both PMOS transistors as an example:

[0080] When the DCDC chip is just started, vdda>vddplus, the output control signal Ca = 0, Cs = H. Since the switching transistor is controlled by a PMOS, the conduction switch M3 on the vdda side is turned on.

[0081] When the chip is started, vdda<vddpluse, the output control signal Ca = H, Cs = 0. Since the switching transistor is controlled by a PMOS, the conduction switch M4 on the vddplus side is turned on.

[0082] When the DCDC chip is just started, only the IN pin is powered on. Only when the chip is working, a square wave signal will appear at the SW pin. And VBST utilizes the principle that the voltage across the capacitor does not change suddenly, so VBST is also a square wave signal. VBST can only work after the SW pin starts working. Embodiment

[0083] In this embodiment, the specific circuit structures of the first voltage generation module and the high-voltage judgment and selection module are the same as those in Embodiment 1, and the difference lies in the circuit structure of the second voltage generation module.

[0084] Specifically, as Figure 7 shown, the second voltage generation module includes: a second MOS transistor M2, a control unit, a second capacitor C2, and a third Zener diode D3;

[0085] One end of the control unit is connected to the gate of the second MOS transistor M2, and the other end is respectively connected to the source of the second MOS transistor M2 and the first voltage vdda output end of the first voltage generating module;

[0086] The source of the second MOS transistor M2 is connected to the bootstrap voltage pin BST of the DCDC chip;

[0087] The drain of the second MOS transistor M2 is connected to one end of the second capacitor and the cathode of the third Zener diode D3 respectively;

[0088] The other end of the second capacitor C2 and the anode of the third Zener diode D3 are both grounded;

[0089] The cathode voltage of the third Zener diode D3 serves as the second power supply voltage Vddpluse.

[0090] Specifically, if Figure 8 As shown, the control unit includes: a fifth MOS transistor M5, a first inverter INV1, a third resistor R3 and a fourth resistor R4; the gate of the fifth MOS transistor M5 is connected to the first voltage output end of the first voltage generating module, the drain is connected to one end of the third resistor R3, and the source is respectively connected to the input end of the first inverter INV1 and one end of the fourth resistor R4; the other end of the third resistor R3 is connected to the bootstrap voltage pin BST of the DCDC chip, and the other end of the fourth resistor R4 is grounded; the output end of the first inverter INV1 is connected to the gate of the second MOS transistor M2.

[0091] This embodiment replaces the unidirectionally conducting diode D0 in Example 1 with a high-voltage PMOS transistor to generate a rectified DC voltage, VDDPLUSe, which is clamped to a suitable operating voltage range by a third Zener diode D3. Similarly, the VBST principle of high-level conduction and low-level cutoff is utilized, periodically transmitting a high level to gradually increase the VDDPLUS voltage until it reaches the reverse breakdown voltage of the first Zener diode D1, at which point the VDDPLUS voltage no longer increases.

[0092] like Figure 9 As shown, VBST is a square wave signal, which is converted into a DC voltage vddplus after rectification.

[0093] like Figure 10 As shown, the second solution of jointly applying the first voltage generating module, the second voltage generating module and the high voltage selecting module to output Vdda2 is shown. A judgment is made between vdda and vddplus, and the MOS switch corresponding to the high voltage is selected to be turned on, thereby generating the final output voltage vdda2. Example

[0094] This embodiment provides a method for selecting a power supply voltage. Figure 11As shown, the following steps are included:

[0095] After the DCDC chip is initially powered on, a first supply voltage is generated;

[0096] After the DCDC chip works, a second power supply voltage is generated;

[0097] The first power supply voltage and the second power supply voltage are compared in real time, and the higher one of the two is selected as the final internal power supply voltage to power the internal circuit of the DCDC chip. Example

[0098] This embodiment provides a DCDC chip, such as Figure 13 As shown, it includes the power supply voltage selection circuit disclosed in the above embodiment 1 or embodiment 2.

[0099] like Figure 12 As shown in FIG, the related waveforms of the bootstrap voltage pin and the switch pin voltage of a traditional high-voltage DCDC chip are shown. Generally, BST is about 5V higher than SW voltage. For this reason, the second voltage generating module is connected to the BST pin.

[0100] The DCDC chip is a high voltage chip, such as Figure 14 As shown in the figure, its peripheral circuit structure is as follows: the bootstrap voltage pin BST is connected to the switch pin SW via the bootstrap capacitor C3. The switch pin SW is connected to an LC filter network to generate the external output voltage Vout. The LC filter network includes an inductor L, a capacitor C4, and resistors R1 and R2. One end of the inductor L is connected to one end of the capacitor C3 and the SW pin, respectively, and the other end is connected to one end of the capacitor C4. The other end of the capacitor C4 is grounded. One end of the resistor R1 is connected to one end of the capacitor C4, and the other end is connected to the FB pin of the DCD chip. One end of the resistor R2 is grounded, and the other end is also connected to the FB pin of the DCD chip.

[0101] The various embodiments in this specification are described in a progressive manner, with each embodiment focusing on the differences from other embodiments. Reference can be made to the common and similar parts between the various embodiments. For the devices disclosed in the embodiments, since they correspond to the methods disclosed in the embodiments, the description is relatively simple, and the relevant parts can be referred to the method description.

[0102] The above description of the disclosed embodiments is intended to enable one skilled in the art to implement or use the present invention. Various modifications to these embodiments will be readily apparent to one skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention is not limited to the embodiments shown herein but is intended to conform to the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A power supply voltage selection circuit, characterized in that: include: A first voltage generating module, a second voltage generating module and a high voltage judgment and selection module; The first voltage generating module is used to generate a first supply voltage after the DCDC chip is initially powered on; The second voltage generating module is used to generate a second supply voltage after the DCDC chip is working; The high-voltage judgment and selection module is used to compare the first supply voltage and the second supply voltage in real time, select the higher of the two as the final internal supply voltage, and power the internal circuit of the DCDC chip; The second voltage generating module includes: a second MOS tube, a control unit, a second capacitor and a third Zener diode; One end of the control unit is connected to the gate of the second MOS transistor, and the other end is respectively connected to the source of the second MOS transistor and the first voltage output end of the first voltage generating module; The source of the second MOS tube is connected to the bootstrap voltage pin BST of the DCDC chip; The drain of the second MOS transistor is connected to one end of the second capacitor and the cathode of the third Zener diode respectively; the other end of the second capacitor and the anode of the third Zener diode are both grounded; The cathode voltage of the third Zener diode serves as the second supply voltage; The control unit includes: a fifth MOS transistor, a first inverter, a third resistor, and a fourth resistor; the gate of the fifth MOS transistor is connected to the first voltage output end of the first voltage generating module, the drain is connected to one end of the third resistor, and the source is respectively connected to the input end of the first inverter and one end of the fourth resistor; the other end of the third resistor is connected to the bootstrap voltage pin BST of the DCDC chip, and the other end of the fourth resistor is grounded; the output end of the first inverter is connected to the gate of the second MOS transistor.

2. The power supply voltage selection circuit according to claim 1, wherein: The first voltage generating module includes: a first resistor, a second resistor, a first Zener diode and a first MOS transistor; The drain of the first MOS transistor and one end of the first resistor are both connected to the voltage input pin Vin of the DCDC chip; the gate of the first MOS transistor is respectively connected to the cathode of the first Zener diode and the other end of the first resistor; the source of the first MOS transistor is connected to one end of the second resistor, and the source voltage of the first MOS transistor serves as the first supply voltage; An anode of the first Zener diode and the other end of the second resistor are both grounded.

3. A power supply voltage selection circuit according to claim 1 or 2, characterized in that: The high-voltage judgment and selection module includes a high-voltage selector, a third MOS tube and a fourth MOS tube; The high-voltage selector has a positive input terminal, a negative input terminal, a first output terminal, and a second output terminal; the positive input terminal of the high-voltage selector and the source of the third MOS transistor are both connected to the output terminal of the first voltage generating module; the negative input terminal of the high-voltage selector and the source of the fourth MOS transistor are both connected to the output terminal of the second voltage generating module; the first output terminal of the high-voltage selector is connected to the gate of the third MOS transistor; and the second output terminal of the high-voltage selector is connected to the gate of the fourth MOS transistor; The drain of the third MOS transistor and the drain of the fourth MOS transistor are connected to each other, and the drain voltage of the third MOS transistor or the drain voltage of the fourth MOS transistor serves as the final internal power supply voltage.

4. The power supply voltage selection circuit according to claim 3, characterized in that: The third MOS transistor and the fourth MOS transistor are both NMOS transistors or PMOS transistors; when the first supply voltage is higher than the second supply voltage, the third MOS transistor is turned on and the fourth MOS transistor is turned off; when the first supply voltage is lower than the second supply voltage, the third MOS transistor is turned off and the fourth MOS transistor is turned on.

5. The power supply voltage selection circuit according to claim 3, characterized in that: The high voltage selector includes: a comparator, a second inverter and a third inverter; The positive input terminal of the comparator is connected to the output terminal of the first voltage generating module, the negative input terminal of the comparator is connected to the output terminal of the second voltage generating module, and the output terminal of the comparator is connected to the input terminal of the second inverter; The output end of the second inverter is connected to the gate of the third MOS transistor and the input end of the third inverter respectively; the output end of the third inverter is connected to the gate of the fourth MOS transistor.

6. A DCDC chip, characterized in that: The DCDC chip internally includes the power supply voltage selection circuit according to any one of claims 1 to 5. In the peripheral circuit, the bootstrap voltage pin BST of the DCDC chip is connected to the switch pin SW through a bootstrap capacitor. The switch pin SW is connected to an LC filter network to obtain an external output voltage.

7. A method for selecting a power supply voltage, characterized in that: The method is performed using the DCDC chip as claimed in claim 6, comprising the following steps: After the DCDC chip is initially powered on, a first supply voltage is generated; After the DCDC chip works, a second power supply voltage is generated; The first power supply voltage and the second power supply voltage are compared in real time, and the higher one of the two is selected as the final internal power supply voltage to power the internal circuit of the DCDC chip.

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