A display driving circuit, a display panel and a display

Abstract

Embodiments of the present application provide a display driving circuit, a display panel and a display. The display driving circuit comprises a first conversion circuit and a second conversion circuit. The first conversion circuit comprises a first control module, a first output module and a second output module. The second conversion circuit comprises a second control module, a third output module and a fourth output module. In a first output period, the first control module controls the first output module to output a first voltage signal. The second control module controls the fourth output module to output a second voltage signal. In a second output period, the first control module controls the second output module to output the second voltage signal. The second control module controls the third output module to output the first voltage signal. In the same period, the first conversion circuit and the second conversion circuit output two groups of different VCOM voltage signals. In different periods, the different voltage signals are inverted in level, two groups of VCOM voltage AC outputs are realized, and the response time of the liquid crystal display panel can be shortened.

Description

Technical Field

[0001] This application relates to the field of liquid crystal display technology, and in particular to a display driving circuit, a display panel, and a display. Background Technology

[0002] With the continuous upgrading of LCD products and the increasing demands from users, competition in the display panel industry has intensified in recent years, especially in the pursuit of low cost, high transmittance, and high contrast. Among these factors, response time is paramount in this competitive landscape. On one hand, response time directly impacts image quality issues such as image retention; on the other hand, it significantly restricts the selection of product design solutions, such as high resolution (8K+), high refresh rate (120Hz+), and high contrast, preventing substantial performance improvements in high-end products. Therefore, shortening response time can enhance a product's overall competitiveness.

[0003] Currently, LCD products typically employ a fixed DC VCOM voltage driving method. This involves using a fixed DC VCOM common voltage and an AC Source voltage to create an electric field, driving the liquid crystals in the LCD panel to flip, thereby controlling the brightness changes to display an image. To prevent polarization of the liquid crystals under the same electric field, the Source voltage is divided into a positive voltage above VCOM and a negative voltage below VCOM, such as... Figure 1 As shown ( Figure 1 Vcom (VCOM) in this context refers to the symmetrical positive and negative voltages that are flipped every frame. For example, see [link to example]. Figure 1 The Nth frame (Frame N) has a negative voltage, the (N+1)th frame (Frame N+1) has a positive voltage, the (N+2)th frame (Frame N+2) has a negative voltage, and the (N+3)th frame (Frame N+3) has a positive voltage, thus ensuring that the brightness of the displayed image remains constant. In the fixed DC VCOM voltage driving method, the VCOM voltage remains constant, for example, the VCOM voltage is around 8.5V, and the Source voltage ranges from approximately 0.2V to 17.2V. The maximum value of the driving voltage Vop of the liquid crystal display substrate (the difference between the Source voltage and the VCOM voltage) can reach around 8.7V. Due to the mutual limitations between the various parameters of the liquid crystal display panel, the response time of the liquid crystal display panel cannot be further reduced. Summary of the Invention

[0004] The purpose of this application is to provide a display driving circuit, a display panel, and a display to output two sets of VCOM voltage AC outputs to drive a dual-VCOM panel, thereby shortening the response time of the liquid crystal display panel. The specific technical solution is as follows:

[0005] In a first aspect, embodiments of this application provide a display driving circuit, the display driving circuit comprising:

[0006] A first conversion circuit and a second conversion circuit, wherein the first conversion circuit includes a first control module, a first output module and a second output module, and the second conversion circuit includes a second control module, a third output module and a fourth output module;

[0007] In the first output cycle, the first control module controls the first output module to output a first voltage signal; the second control module controls the fourth output module to output a second voltage signal.

[0008] During the second output cycle, the first control module controls the second output module to output a second voltage signal; the second control module controls the third output module to output a first voltage signal.

[0009] In one possible implementation, the first control module includes a first control unit, a second control unit, and a first reference voltage unit;

[0010] The first reference voltage unit is used to provide a first reference voltage;

[0011] The first control unit is used to control the reception of the first reference voltage of the first output module, so as to control the first output module to output a first voltage signal in the first output cycle;

[0012] The second control unit is used to control the reception of the first reference voltage of the second output module, so as to control the second output module to output a second voltage signal in the second output cycle;

[0013] And / or,

[0014] The second control module includes a third control unit, a fourth control unit, and a second reference voltage unit;

[0015] The second reference voltage unit is used to provide a second reference voltage;

[0016] The third control unit is used to control the reception of the second reference voltage of the third output module, so as to control the third output module to output the first voltage signal in the second output cycle;

[0017] The fourth control unit is used to control the reception of the second reference voltage of the fourth output module, so as to control the fourth output module to output the second voltage signal in the first output cycle.

[0018] In one possible implementation, the first control unit includes a first resistor and a first switch, the second control unit includes a second resistor and a second switch, and the first reference voltage unit includes a third resistor, wherein the first switch and the second switch are of different types.

[0019] The first end of the first resistor is connected to the first control signal terminal, and the second end of the first resistor is connected to the base of the first switch;

[0020] The first end of the first switch is connected to the second end of the third resistor, and the second end of the first switch is connected to the control signal input terminal of the first output module.

[0021] The first end of the second resistor is connected to the first control signal terminal, and the second end of the second resistor is connected to the base of the second switch;

[0022] The first end of the second switch is connected to the second end of the third resistor, and the second end of the second switch is connected to the control signal input terminal of the second output module.

[0023] The first end of the third resistor is connected to the first reference voltage input terminal;

[0024] And / or,

[0025] The third control unit includes a fourth resistor and a third switch; the fourth control unit includes a fifth resistor and a fourth switch; the second reference voltage unit includes a sixth resistor; wherein the third switch and the fourth switch are of different types.

[0026] The first end of the fourth resistor is connected to the second control signal terminal, and the second end of the fourth resistor is connected to the base of the third switch;

[0027] The first end of the third switch is connected to the second end of the sixth resistor, and the second end of the third switch is connected to the control signal input end of the third output module.

[0028] The first end of the fifth resistor is connected to the second control signal terminal, and the second end of the fifth resistor is connected to the base of the fourth switch;

[0029] The first end of the fourth switch is connected to the second end of the sixth resistor, and the second end of the fourth switch is connected to the control signal input end of the fourth output module.

[0030] The first end of the sixth resistor is connected to the second reference voltage input terminal.

[0031] In one possible implementation, the first output module includes a seventh resistor and a fifth switch; the second output module includes an eighth resistor and a sixth switch.

[0032] The first end of the seventh resistor is connected to the first voltage signal input terminal of the first output module and the first end of the fifth switch, respectively; the second end of the seventh resistor is connected to the control signal input terminal of the first output module and the gate of the fifth switch, respectively; the second end of the fifth switch is connected to the first voltage signal output terminal of the first output module.

[0033] The second end of the eighth resistor is connected to the second voltage signal input terminal of the second output module and the second end of the sixth switch, respectively; the first end of the eighth resistor is connected to the control signal input terminal of the second output module and the gate of the sixth switch, respectively; the first end of the sixth switch is connected to the second voltage signal output terminal of the second output module.

[0034] The first voltage signal output terminal of the first output module is connected to the output terminal of the first conversion circuit;

[0035] The second voltage signal output terminal of the second output module is connected to the output terminal of the first conversion circuit;

[0036] And / or,

[0037] The third output module includes a ninth resistor and a seventh switch; the fourth output module includes a tenth resistor and an eighth switch.

[0038] The first end of the ninth resistor is connected to the first voltage signal input terminal of the third output module and the first end of the seventh switch, respectively; the second end of the ninth resistor is connected to the control signal input terminal of the third output module and the gate of the seventh switch, respectively; the second end of the seventh switch is connected to the first voltage signal output terminal of the third output module.

[0039] The second end of the tenth resistor is connected to the second voltage signal input terminal of the fourth output module and the second end of the eighth switch, respectively; the first end of the tenth resistor is connected to the control signal input terminal of the fourth output module and the gate of the eighth switch, respectively; the first end of the eighth switch is connected to the second voltage signal output terminal of the fourth output module.

[0040] The first voltage signal output terminal of the third output module is connected to the output terminal of the second conversion circuit.

[0041] The second voltage signal output terminal of the fourth output module is connected to the output terminal of the second conversion circuit.

[0042] In one possible implementation, the second output module further includes a first capacitor and a second capacitor, wherein the first capacitor and the second capacitor are connected in parallel between the second voltage signal output terminal of the second output module and ground;

[0043] And / or,

[0044] The fourth output module also includes a third capacitor and a fourth capacitor, which are connected in parallel between the second voltage signal output terminal of the fourth output module and ground.

[0045] In one possible implementation, the first switch is of the same type as the third switch, and the second switch is of the same type as the fourth switch;

[0046] During the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with opposite high and low levels.

[0047] In one possible implementation, the display driving circuit further includes a power management integrated circuit and a logic board;

[0048] The power management integrated circuit is used to provide a first voltage signal to the first output module and the third output module, a second voltage signal to the second output module and the fourth output module, a first reference voltage to the first reference voltage input terminal, and a second reference voltage to the second reference voltage input terminal;

[0049] The logic board is configured to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in the same output cycle; and to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in two adjacent output cycles.

[0050] In one possible implementation, the first switch is of a different type than the third switch, and the second switch is of a different type than the fourth switch;

[0051] During the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with the same high and low levels.

[0052] In one possible implementation, the display driving circuit further includes a power management integrated circuit and a logic board;

[0053] The power management integrated circuit is used to provide a first voltage signal to the first output module and the third output module, a second voltage signal to the second output module and the fourth output module, a first reference voltage to the first reference voltage input terminal, and a second reference voltage to the second reference voltage input terminal;

[0054] The logic board is configured to provide voltage signals with the same high and low levels to the first control signal terminal and the second control signal terminal in the same output cycle; and to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in two adjacent output cycles.

[0055] In one possible implementation, the first control unit includes an eleventh resistor and a ninth switch, the second control unit includes a twelfth resistor and a tenth switch, and the first reference voltage unit includes a thirteenth resistor, wherein the ninth switch and the tenth switch are of different types;

[0056] The first end of the eleventh resistor is connected to the third control signal terminal, and the second end of the eleventh resistor is connected to the base of the ninth switch.

[0057] The first end of the ninth switch is connected to the second end of the thirteenth resistor, and the second end of the ninth switch is connected to the control signal input end of the first output module.

[0058] The first end of the twelfth resistor is connected to the third control signal terminal, and the second end of the twelfth resistor is connected to the base of the tenth switch;

[0059] The first end of the tenth switch is connected to the second end of the thirteenth resistor, and the second end of the tenth switch is connected to the control signal input end of the second output module.

[0060] The first end of the thirteenth resistor is connected to the first reference voltage input terminal;

[0061] And / or,

[0062] The third control unit includes a fourteenth resistor and an eleventh switch; the fourth control unit includes a fifteenth resistor and a twelfth switch; and the second reference voltage unit includes a sixteenth resistor, wherein the eleventh switch and the twelfth switch are of the same type.

[0063] The first end of the fourteenth resistor is connected to the third control signal terminal, and the second end of the fourteenth resistor is connected to the base of the eleventh switch.

[0064] The first end of the eleventh switch is connected to the second end of the sixteenth resistor, and the second end of the eleventh switch is connected to the control signal input end of the third output module.

[0065] The first end of the fifteenth resistor is connected to the third control signal terminal, and the second end of the fifteenth resistor is connected to the first end of the twelfth switch.

[0066] The base of the twelfth switch is connected to the second terminal of the sixteenth resistor, and the second terminal of the twelfth switch is connected to the control signal input terminal of the fourth output module.

[0067] The first end of the sixteenth resistor is connected to the third reference voltage input terminal.

[0068] Secondly, embodiments of this application provide a display panel, the display panel including: gate lines, data lines, pixel array and any of the display driving circuits described in the first aspect, the pixel array including first type of pixels and second type of pixels, the first type of pixels and the second type of pixels are arranged alternately in the same pixel row;

[0069] The first conversion circuit provides a driving voltage for the second type of pixel, and the second conversion circuit provides a driving voltage for the first type of pixel.

[0070] In one possible implementation, the display panel further includes: a plurality of first-type voltage lines and a plurality of second-type voltage lines;

[0071] The output terminal of the first conversion circuit is connected to each of the second type of voltage lines respectively, and the second type of voltage lines provide driving voltage to the second type of pixels.

[0072] The output of the second conversion circuit is connected to each of the first type of voltage lines, and the first type of voltage lines provide driving voltage to the first type of pixels.

[0073] In one possible implementation, each first type voltage line corresponds to two adjacent rows of pixels, and each second type voltage line corresponds to two adjacent rows of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type voltage line is connected to the driving voltage input terminal of the first type pixel in its corresponding pixel row, and the second type voltage line is connected to the driving voltage input terminal of the second type pixel in its corresponding pixel row.

[0074] In one possible implementation, each first type of voltage line corresponds to a row of pixels, and each second type of voltage line corresponds to a row of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type pixel in its corresponding pixel row.

[0075] In one possible implementation, each first type of voltage line corresponds to a row of pixels, and each second type of voltage line corresponds to a row of pixels; in the same pixel column, the first type of pixels and the second type of pixels are arranged alternately, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type of pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type of pixel in its corresponding pixel row.

[0076] Thirdly, embodiments of this application provide a display, including any of the display panels described in the second aspect.

[0077] Beneficial effects of the embodiments in this application:

[0078] This application provides a display driving circuit, a display panel, and a display. The display driving circuit includes a first conversion circuit and a second conversion circuit. The first conversion circuit includes a first control module, a first output module, and a second output module. The second conversion circuit includes a second control module, a third output module, and a fourth output module. In a first output cycle, the first control module controls the first output module to output a first voltage signal; the second control module controls the fourth output module to output a second voltage signal. In a second output cycle, the first control module controls the second output module to output a second voltage signal; and the second control module controls the third output module to output a first voltage signal. Through the display driving circuit provided by this application, different voltage signals can be output by the first and second conversion circuits in the same output cycle, serving as two sets of VCOM voltages. In different output cycles, the first and second conversion circuits output different voltage signals to achieve voltage signal inversion, realizing the AC output of two sets of VCOM voltages to drive a dual-VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0079] Of course, implementing any product or method of this application does not necessarily require achieving all of the advantages described above at the same time. Attached Figure Description

[0080] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of this application. For those skilled in the art, other embodiments can be obtained based on these drawings.

[0081] Figure 1 This is a schematic diagram of a fixed DC VCOM voltage driving method in related technologies;

[0082] Figure 2This is a schematic diagram illustrating the calculation formulas for various parameters of a liquid crystal display panel in related technologies;

[0083] Figure 3 This is a schematic diagram of the AC VCOM voltage driving method according to an embodiment of this application;

[0084] Figure 4 This is a first schematic diagram of a display driving circuit according to an embodiment of this application;

[0085] Figure 5 This is a second schematic diagram of the display driving circuit according to an embodiment of this application;

[0086] Figure 6 This is a third schematic diagram of the display driving circuit according to an embodiment of this application;

[0087] Figure 7 This is a fourth schematic diagram of the display driving circuit according to an embodiment of this application;

[0088] Figure 8 This is a fifth schematic diagram of the display driving circuit according to an embodiment of this application;

[0089] Figure 9 This is a sixth schematic diagram of a display driving circuit according to an embodiment of this application;

[0090] Figure 10 This is a first timing diagram of the display driver circuit according to an embodiment of this application;

[0091] Figure 11 This is a schematic diagram of the switching timing of VCOMO, VCOME and STV1A in an embodiment of this application;

[0092] Figure 12 This is a second timing diagram of the display driver circuit according to an embodiment of this application;

[0093] Figure 13 This is a seventh schematic diagram of a display driving circuit according to an embodiment of this application;

[0094] Figure 14 This is a third timing diagram of the display driver circuit according to an embodiment of this application;

[0095] Figure 15 This is a first schematic diagram of a display panel according to an embodiment of this application;

[0096] Figure 16 This is a schematic diagram of a first architecture in the display panel of an embodiment of this application;

[0097] Figure 17 This is a schematic diagram of a second architecture in the display panel according to an embodiment of this application;

[0098] Figure 18This is a schematic diagram of a third architecture in the display panel according to an embodiment of this application;

[0099] Figure 19 This is a schematic diagram of a display according to an embodiment of this application. Detailed Implementation

[0100] The technical solutions of this application will be clearly and completely described below with reference to the accompanying drawings of the embodiments of the present invention. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments in this application, all other embodiments obtained by those of ordinary skill in the art based on this application are within the scope of protection of this application.

[0101] The calculation formulas for various parameters of the LCD display panel are as follows: Figure 2 As shown, based on the Figure 2 The analysis shows that to shorten the response time RT of a liquid crystal display panel, where ton is the start time, tooff is the end time, and K11 is the curvature coefficient, while keeping constants ε0 and E constant, it is necessary to decrease the liquid crystal viscosity γ1, the liquid crystal cell thickness d, and the liquid crystal elastic coefficient K22, or increase the liquid crystal dielectric constant Δε. However, from the formula for calculating the transmittance Tr of a liquid crystal display panel, it can be concluded that the following parameters are relevant: the azimuth angle between the polarizer absorption axis of the liquid crystal panel and the long axis of the liquid crystal molecules. With wavelength λ, pi π, and optical path difference Δn of the liquid crystal panel remaining constant, reducing the cell thickness d will decrease the transmittance of the liquid crystal display panel. To ensure the transmittance of the liquid crystal display panel, the cell thickness d must be above the required transmittance value; therefore, the cell thickness d cannot be arbitrarily reduced. To shorten the response time of the liquid crystal display panel, three dimensions can be considered: the liquid crystal elastic coefficient K22, the liquid crystal viscosity γ1, and the liquid crystal dielectric constant Δε. Furthermore, from the calculation formula of the driving voltage Vop of the liquid crystal substrate, it can be seen that with the following parameters—liquid crystal dielectric constant Δε, constant ε0, liquid crystal elastic coefficient K22, and pi π—remaining constant, increasing the liquid crystal elastic coefficient K22 will increase the driving voltage Vop. Through analysis of various parameters of the liquid crystal display panel, and by reverse reasoning, it can be seen that, with other parameters remaining constant, increasing the driving voltage will increase the liquid crystal elastic coefficient, thereby shortening the response time of the liquid crystal display panel. Therefore, increasing the driving voltage Vop of the liquid crystal substrate can release the design limitations of the liquid crystal, thereby shortening the response time of the liquid crystal display panel and improving the competitiveness of liquid crystal display products.

[0102] Based on the above regarding Figure 2Analysis of the parameters in the formula shows that increasing the driving voltage Vop of the liquid crystal display substrate can shorten the response time of the liquid crystal display panel. Since the driving voltage Vop of the liquid crystal display substrate is the difference between the Source voltage and the VCOM voltage, the VCOM voltage can be adjusted to increase the driving voltage Vop of the liquid crystal display substrate without changing the Source voltage.

[0103] Since the DC VCOM voltage driving method cannot further reduce the response time of the liquid crystal display panel, it is necessary to increase the driving voltage Vop of the liquid crystal display substrate in order to further reduce the response time of the liquid crystal display panel. Therefore, this application provides a circuit with two-way AC VCOM voltage output, and the AC VCOM driving method is as follows: Figure 3 As shown, the driving voltage Vop of the liquid crystal display substrate can be increased. Under this condition, the limitations in the liquid crystal design process will be reduced, and the limits of liquid crystal design can be released, thereby achieving the goal of shortening the response time of the liquid crystal display panel.

[0104] The circuit with two VCOM voltage AC outputs requires two sets of VCOM voltages (VCOMO, VCOME) with a high level of 16V or higher and a low level of 0V. Furthermore, the levels of VCOMO and VCOME are opposite during one frame, and the level switching is completed at the end of the current frame and before the start of the next frame.

[0105] To provide drive signals for two sets of VCOM voltage AC outputs, this application embodiment provides a display drive circuit, see [link to relevant documentation]. Figure 4 The display driving circuit includes: a first conversion circuit 11 and a second conversion circuit 12. The first conversion circuit 11 includes a first control module 111, a first output module 112 and a second output module 113. The second conversion circuit 12 includes a second control module 121, a third output module 122 and a fourth output module 123.

[0106] In the first output cycle, the first control module 111 controls the first output module 112 to output a first voltage signal; the second control module 121 controls the fourth output module 123 to output a second voltage signal.

[0107] In the second output cycle, the first control module 111 controls the second output module 113 to output a second voltage signal; the second control module 121 controls the third output module 122 to output a first voltage signal.

[0108] The first voltage signal and the second voltage signal are two signals with different levels. For example, if the first voltage signal is high, then the second voltage signal is low.

[0109] In the first output cycle, the first control module and the second control module control different output modules to output different voltage signals, which serve as two sets of VCOM voltages in the first output cycle, thus achieving the simultaneous output of two different sets of VCOM voltage signals in the first output cycle. In one example, in the first output cycle, the first control module controls the first output module to output a high-level signal, and the second control module controls the fourth output module to output a low-level signal.

[0110] In the second output cycle, the first and second control modules control output modules that output different voltage signals than those in the first output cycle, serving as two sets of VCOM voltages in the second output cycle. This achieves simultaneous output of two sets of VCOM voltage signals different from those in the first output cycle during the second output cycle. In one example, during the second output cycle, the first control module controls the second output module to output a low-level signal, and the second control module controls the third output module to output a high-level signal.

[0111] The first and second output cycles can be used to generate two sets of AC output drive signals for VCOM voltage.

[0112] In the embodiments of this application, different voltage signals can be output by the first conversion circuit and the second conversion circuit in the same output cycle, serving as two sets of VCOM voltages. In different output cycles, the first conversion circuit and the second conversion circuit output different voltage signals to achieve voltage signal inversion, thereby outputting two sets of VCOM voltage AC outputs to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0113] In one possible implementation, see Figure 5 The first control module 111 includes a first control unit 1111, a second control unit 1112, and a first reference voltage unit 1113;

[0114] The first reference voltage unit 1113 is used to provide a first reference voltage;

[0115] The first control unit 1111 is used to control the reception of the first reference voltage of the first output module 112, so as to control the first output module 112 to output the first voltage signal in the first output cycle;

[0116] The second control unit 1112 is used to control the reception of the first reference voltage of the second output module 113, so as to control the second output module 113 to output a second voltage signal in the second output cycle;

[0117] And / or,

[0118] The second control module 121 includes a third control unit 1211, a fourth control unit 1212, and a second reference voltage unit 1213;

[0119] The second reference voltage unit 1213 is used to provide a second reference voltage;

[0120] The third control unit 1211 is used to control the reception of the second reference voltage of the third output module 122, so as to control the third output module 122 to output the first voltage signal in the second output cycle;

[0121] The fourth control unit 1212 is used to control the reception of the second reference voltage of the fourth output module 123, so as to control the fourth output module 123 to output the second voltage signal in the first output cycle.

[0122] A reference voltage is provided by a reference voltage unit, and the control unit controls whether the output module can receive the reference voltage, thereby controlling the corresponding output module to output the corresponding voltage signal in different output cycles.

[0123] In this embodiment, two sets of VCOM voltage AC outputs are realized through the first conversion circuit and the second conversion circuit to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0124] In one possible implementation, see Figure 6 The first control unit 1111 includes a first resistor R421 and a first switch TR412, the second control unit 1112 includes a second resistor R422 and a second switch TR413, and the first reference voltage unit 1113 includes a third resistor R423. The first switch TR412 and the second switch TR413 are of different types.

[0125] The first end of the first resistor R421 is connected to the first control signal terminal VCOM_CS1, and the second end of the first resistor R421 is connected to the gate of the first switch TR412.

[0126] The first terminal of the first switch TR412 is connected to the second terminal of the third resistor R423, and the second terminal of the first switch TR412 is connected to the control signal input terminal of the first output module 112.

[0127] The first end of the second resistor R422 is connected to the first control signal terminal VCOM_CS1, and the second end of the second resistor R422 is connected to the gate of the second switch TR413;

[0128] The first terminal of the second switch TR413 is connected to the second terminal of the third resistor R423, and the second terminal of the second switch TR413 is connected to the control signal input terminal of the second output module 113.

[0129] The first end of the third resistor is connected to the first reference voltage input terminal VDD1_3V3;

[0130] And / or,

[0131] The third control unit 1211 includes a fourth resistor R430 and a third switch TR417; the fourth control unit 1212 includes a fifth resistor R431 and a fourth switch TR418; the second reference voltage unit 1213 includes a sixth resistor R429; wherein the third switch TR417 and the fourth switch TR418 are of different types.

[0132] The first end of the fourth resistor R430 is connected to the second control signal terminal VCOM_CS2, and the second end of the fourth resistor R430 is connected to the gate of the third switch TR417.

[0133] The first terminal of the third switch TR417 is connected to the second terminal of the sixth resistor R429, and the second terminal of the third switch TR417 is connected to the control signal input terminal of the third output module 122.

[0134] The first end of the fifth resistor R431 is connected to the second control signal terminal VCOM_CS2, and the second end of the fifth resistor R431 is connected to the gate of the fourth switch TR418.

[0135] The first terminal of the fourth switch TR418 is connected to the second terminal of the sixth resistor R429, and the second terminal of the fourth switch TR418 is connected to the control signal input terminal of the fourth output module 123.

[0136] The first terminal of the sixth resistor R429 is connected to the second reference voltage input terminal VDD2_3V3.

[0137] The first, second, third, and fourth switches can be transistors. These transistors can be N-type or P-type transistors, depending on the specific requirements. The first terminal of each transistor is either the emitter or collector, and the second terminal is either the collector or emitter corresponding to the first terminal. The first switch TR412 and the second switch TR413 are of different types, as are the third switch TR417 and the fourth switch TR418. In one example, the first switch TR412 is an NPN transistor, the second switch TR413 is a PNP transistor, the third switch TR417 is an NPN transistor, and the fourth switch TR418 is a PNP transistor.

[0138] By controlling the input signals of the first control signal terminal VCOM_CS1 and the second control signal terminal VCOM_CS2, the switching states of the first, second, third, and fourth switches are controlled, thereby controlling whether the signal at the reference voltage input terminal VDD_3V3 can be connected to the corresponding output module. In one example, TR412 is an NPN transistor and TR413 is a PNP transistor. When VCOM_CS1 is a high-level signal, TR412 is turned on and TR413 is turned off, allowing the first output module to receive the first reference voltage and thus output a voltage signal.

[0139] In this embodiment, by controlling the input signals of the first control signal terminal VCOM_CS1 and the second control signal terminal VCOM_CS2, the first conversion circuit and the second conversion circuit are controlled to realize two sets of VCOM voltage AC outputs to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0140] In one possible implementation, see Figure 7 The first output module 112 includes a seventh resistor R419 and a fifth switch M3; the second output module 113 includes an eighth resistor R420 and a sixth switch M4.

[0141] The first end of the seventh resistor R419 is connected to the first voltage signal input terminal VCOML of the first output module and the first end of the fifth switch M3, respectively; the second end of the seventh resistor R419 is connected to the control signal input terminal of the first output module and the gate of the fifth switch M3, respectively; the second end of the fifth switch M3 is connected to the first voltage signal output terminal of the first output module 112.

[0142] The second end of the eighth resistor R420 is connected to the second voltage signal input terminal VCOMH of the second output module and the second end of the sixth switch M4, respectively; the first end of the eighth resistor R420 is connected to the control signal input terminal of the second output module and the gate of the sixth switch M4, respectively; the first end of the sixth switch M4 is connected to the second voltage signal output terminal of the second output module 113;

[0143] The first voltage signal output terminal of the first output module is connected to the output terminal VCOMO of the first conversion circuit;

[0144] The second voltage signal output terminal of the second output module is connected to the output terminal VCOMO of the first conversion circuit;

[0145] And / or,

[0146] The third output module 122 includes a ninth resistor R432 and a seventh switch M7; the fourth output module 123 includes a tenth resistor R433 and an eighth switch M8.

[0147] The first terminal of the ninth resistor R432 is connected to the first voltage signal input terminal VCOML of the third output module and the first terminal of the seventh switch M7, respectively; the second terminal of the ninth resistor R432 is connected to the control signal input terminal of the third output module and the gate of the seventh switch M7, respectively; the second terminal of the seventh switch M7 is connected to the first voltage signal output terminal of the third output module.

[0148] The second terminal of the tenth resistor R433 is connected to the second voltage signal input terminal VCOMH of the fourth output module and the second terminal of the eighth switch M8, respectively; the first terminal of the tenth resistor R433 is connected to the control signal input terminal of the fourth output module and the gate of the eighth switch M8, respectively; the first terminal of the eighth switch M8 is connected to the second voltage signal output terminal of the fourth output module.

[0149] The first voltage signal output terminal of the third output module is connected to the output terminal VCOME of the second conversion circuit.

[0150] The second voltage signal output terminal of the fourth output module is connected to the output terminal VCOME of the second conversion circuit.

[0151] Switches M3 (fifth), M4 (sixth), M7 (seventh), and M8 (eighth) can all be MOSFETs. These MOSFETs can be either N-type or P-type, depending on the specific requirements. The first terminal of each MOSFET is either the source or the drain, and the second terminal is either the drain or the source corresponding to the first terminal. In one example, switch M3 is an N-type MOSFET, switch M4 is a P-type MOSFET, switch M7 is an N-type MOSFET, and switch M8 is a P-type MOSFET.

[0152] The first conversion circuit outputs one VCOM voltage signal, namely VCOMO, and the second conversion circuit outputs one VCOM voltage signal, namely VCOME. In the same output cycle, the first and second conversion circuits output two sets of VCOM signals with different voltages. In different output cycles, the two sets of VCOM signals output by the first and second conversion circuits invert the voltage signals, thereby achieving two sets of AC VCOM voltage outputs.

[0153] In this embodiment, the first output module, second output module, third output module, and fourth output module determine whether they can output a corresponding first voltage signal or second voltage signal from the first voltage signal input terminal VCOML or the second voltage signal input terminal VCOMH based on whether they can receive a reference voltage from their respective control signal input terminals, and further based on the switching state of the switches in the output modules. In one example, VCOML is 0V and VCOMH is 16V.

[0154] In one possible implementation, see Figure 8 The second output module 113 further includes a first capacitor C500 and a second capacitor C501, wherein the first capacitor C500 and the second capacitor C501 are connected in parallel between the second voltage signal output terminal of the second output module 113 and ground.

[0155] And / or,

[0156] The fourth output module 123 also includes a third capacitor C604 and a fourth capacitor C605, wherein the third capacitor C604 and the fourth capacitor C605 are connected in parallel between the second voltage signal output terminal of the fourth output module 123 and ground.

[0157] The voltage signal output from the second voltage signal output terminal of the second output module can be filtered using the first capacitor C500 and the second capacitor C501. Similarly, the voltage signal output from the second voltage signal output terminal of the fourth output module can be filtered using the third capacitor C604 and the fourth capacitor C605.

[0158] In this embodiment of the application, the voltage output at the output terminal can be filtered by connecting a capacitor in parallel at the output terminal.

[0159] In one possible implementation, the first switch is of the same type as the third switch, and the second switch is of the same type as the fourth switch;

[0160] During the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with opposite high and low levels.

[0161] The first and third switches are of the same type, and the second and fourth switches are of the same type. In one example, the first and third switches are both NPN transistors, and the second and fourth switches are both PNP transistors.

[0162] During the same output cycle, the first control signal terminal and the second control signal terminal receive voltage signals with opposite high and low levels. In one example, during the first output cycle, the first control signal terminal VCOM_CS1 receives a high-level signal, and the second control signal terminal VCOM_CS2 receives a low-level signal. During the second output cycle, the first control signal terminal VCOM_CS1 receives a low-level signal, and the second control signal terminal VCOM_CS2 receives a high-level signal. In one example, the high-level signal is 3.3V, and the low-level signal is 0V.

[0163] In this embodiment, the first switch and the third switch are of the same type, and the second switch and the fourth switch are of the same type. Furthermore, during the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with opposite high and low levels. This ensures that the first and second conversion circuits achieve two sets of VCOM voltage AC outputs to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0164] In one possible implementation, see Figure 9 The display driving circuit also includes a power management integrated circuit (PMIC) and a logic board (TCON-IC).

[0165] The power management integrated circuit 13 is used to provide a first voltage signal VCOML to the first output module and the third output module, a second voltage signal VCOMH to the second output module and the fourth output module, a first reference voltage VDD1_3V3 to the first reference voltage input terminal, and a second reference voltage VDD2_3V3 to the second reference voltage input terminal;

[0166] The logic board 14 is used to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in the same output cycle; and to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in two adjacent output cycles.

[0167] The first and second reference voltages provide the control voltages for turning the switches in the output module on or off. The specific values ​​of the first and second reference voltages are determined by the type of switch in the output module. In one example, both VDD1_3V3 and the second reference voltage VDD2_3V3 are 3.3V.

[0168] In one example, see Figure 8Among them, R421, R422, R423, R429, R430, and R431 are all 4.7K ohms, R419, R420, R432, and R433 are all 10K ohms, TR412 and TR417 are NPN transistors, TR413 and TR418 are PNP transistors, M3 and M7 are N-type MOSFETs, M4 and M8 are P-type MOSFETs, VDD1_3V3 and VDD2_3V3 are both 3.3V, C500 and C604 are both 10nF, C501 and C605 are both 100nF, VCOML is 0V, and VCOMH is 16V. The working principle of the display driver circuit is as follows: For the first conversion circuit, when VCOM_CS1 input is high (3.3V), TR412 is turned on and TR413 is turned off. The voltage at the second terminal of TR412 is VDD1_3V3 (3.3V). At this time, Vgs (the voltage difference between the gate and the source) of M3 is greater than 0V, so M3 is turned on. Vgs of M4 is equal to 0V, so M4 is turned off. The voltage output of VCOMO is VCOML, which is equal to 0V. When VCOM_CS1 input is low (0V), TR412 is turned off and TR413 is turned on. The voltage at the second terminal of TR413 is VDD1_3V3 (3.3V). At this time, Vgs of M3 is equal to 0V, so M3 is turned off. Vgs of M4 is less than 0V, so M4 is turned on. The voltage output of VCOMO is VCOMH, which is equal to 16V.

[0169] Similarly, for the second conversion circuit, when the input level of VCOM_CS2 is high (3.3V), the voltage output of VCOME is VCOML, which is equal to 0V; when the input level of VCOM_CS2 is low (0V), the voltage output of VCOME is VCOMH, which is equal to 16V.

[0170] In different output cycles, VCOM_CS1 and VCOM_CS2 are voltage signals with opposite high and low levels; therefore, VCOMO and VCOME are also voltage signals with opposite high and low levels. Furthermore, the frequency of the VCOMO and VCOME level transitions is the same as the frequency of the VCOM_CS1 and VCOM_CS2 level transitions. The frequency of the VCOM_CS1 and VCOM_CS2 level transitions is determined by the logic board TCON-IC and can be set according to user needs. For the timing diagrams of VCOM_CS1, VCOM_CS2, VCOMO, and VCOME, please refer to [link to relevant documentation]. Figure 10 The levels of VCOMO and VCOME need to be switched once in each frame, and this switching must be completed before the start signal STV1A of a frame arrives. See [link / reference needed]. Figure 11 .

[0171] In this embodiment, a first reference voltage, a second reference voltage, a first voltage signal, and a second voltage signal are provided to the display driver circuit via a power management integrated circuit (PMIC). Control signals VCOM_CS1 and VCOM_CS2 are provided to the display driver circuit via a logic board (TCON-IC). This enables the first and second conversion circuits to output two sets of AC VCOM voltages to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0172] In one possible implementation, the first switch is of a different type than the third switch, and the second switch is of a different type than the fourth switch;

[0173] During the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with the same high and low levels.

[0174] The first and third switches are of different types, as are the second and fourth switches. In one example, the first and fourth switches are both NPN transistors, while the second and third switches are both PNP transistors.

[0175] During the same output cycle, the first control signal terminal and the second control signal terminal receive voltage signals with the same high and low levels. In one example, during the first output cycle, both the first control signal terminal VCOM_CS1 and the second control signal terminal VCOM_CS2 receive a high-level signal. During the second output cycle, both the first control signal terminal VCOM_CS1 and the second control signal terminal VCOM_CS2 receive a low-level signal. In one example, the high-level signal is 3.3V and the low-level signal is 0V.

[0176] In this embodiment, the first switch and the third switch are of different types, and the second switch and the fourth switch are of different types. Furthermore, during the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with the same high and low levels. This ensures that the first conversion circuit and the second conversion circuit achieve two sets of VCOM voltage AC outputs to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0177] In one possible implementation, the display driving circuit further includes a power management integrated circuit and a logic board;

[0178] The power management integrated circuit is used to provide a first voltage signal to the first output module and the third output module, a second voltage signal to the second output module and the fourth output module, a first reference voltage to the first reference voltage input terminal, and a second reference voltage to the second reference voltage input terminal;

[0179] The logic board is configured to provide voltage signals with the same high and low levels to the first control signal terminal and the second control signal terminal in the same output cycle; and to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in two adjacent output cycles.

[0180] In one example, see Figure 8 Among them, R421, R422, R423, R429, R430, and R431 are all 4.7K ohms, R419, R420, R432, and R433 are all 10K ohms, TR412 and TR418 are NPN transistors, TR413 and TR417 are PNP transistors, M3 and M7 are N-type MOSFETs, M4 and M8 are P-type MOSFETs, VDD1_3V3 and VDD2_3V3 are both 3.3V, C500 and C604 are both 10nF, C501 and C605 are both 100nF, VCOML is 0V, and VCOMH is 16V. The working principle of the display driver circuit is as follows: For the first conversion circuit, when VCOM_CS1 input is high (3.3V), TR412 is turned on and TR413 is turned off. The voltage at the second terminal of TR412 is VDD1_3V3 (3.3V). At this time, Vgs (the voltage difference between the gate and the source) of M3 is greater than 0V, so M3 is turned on. Vgs of M4 is equal to 0V, so M4 is turned off. The voltage output of VCOMO is VCOML, which is equal to 0V. When VCOM_CS1 input is low (0V), TR412 is turned off and TR413 is turned on. The voltage at the second terminal of TR413 is VDD1_3V3 (3.3V). At this time, Vgs of M3 is equal to 0V, so M3 is turned off. Vgs of M4 is less than 0V, so M4 is turned on. The voltage output of VCOMO is VCOMH, which is equal to 16V.

[0181] Similarly, for the second conversion circuit, when the input level of VCOM_CS2 is high (3.3V), the voltage output of VCOME is VCOMH, which is equal to 16V; when the input level of VCOM_CS2 is low (0V), the voltage output of VCOME is VCOML, which is equal to 0V.

[0182] During the same output cycle, VCOM_CS1 and VCOM_CS2 are voltage signals with the same high and low levels, while VCOMO and VCOME output voltage signals with opposite high and low levels. For timing diagrams of VCOM_CS1, VCOM_CS2, VCOMO, and VCOME, please refer to [link to timing diagram]. Figure 12 .

[0183] In this embodiment, a first reference voltage, a second reference voltage, a first voltage signal, and a second voltage signal are provided to the display driver circuit via a power management integrated circuit (PMIC). Control signals VCOM_CS1 and VCOM_CS2 are provided to the display driver circuit via a logic board (TCON-IC). This enables the first and second conversion circuits to output two sets of AC VCOM voltages to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0184] In one possible implementation, see Figure 13 The first control unit 1111 includes an eleventh resistor R11 and a ninth switch TR9; the second control unit 1112 includes a twelfth resistor R12 and a tenth switch TR10; and the first reference voltage unit 1113 includes a thirteenth resistor R13. The ninth switch TR9 and the tenth switch TR10 are of different types.

[0185] The first end of the eleventh resistor R11 is connected to the third control signal terminal VCOM_CS, and the second end of the eleventh resistor R11 is connected to the base of the ninth switch TR9.

[0186] The first end of the ninth switch TR9 is connected to the second end of the thirteenth resistor R13, and the second end of the ninth switch TR9 is connected to the control signal input end of the first output module 112.

[0187] The first end of the twelfth resistor R12 is connected to the third control signal terminal VCOM_CS, and the second end of the twelfth resistor R12 is connected to the base of the tenth switch TR10;

[0188] The first terminal of the tenth switch TR10 is connected to the second terminal of the thirteenth resistor R13, and the second terminal of the tenth switch TR10 is connected to the control signal input terminal of the second output module 113.

[0189] The first terminal of the thirteenth resistor R13 is connected to the first reference voltage input terminal VDD1_3V3;

[0190] And / or,

[0191] The third control unit 1211 includes a fourteenth resistor R14 and an eleventh switch TR11; the fourth control unit 1212 includes a fifteenth resistor R15 and a twelfth switch TR12; and the second reference voltage unit 1213 includes a sixteenth resistor R16. The eleventh switch TR11 and the twelfth switch TR12 are of the same type.

[0192] The first end of the fourteenth resistor R14 is connected to the third control signal terminal VCOM_CS, and the second end of the fourteenth resistor R14 is connected to the base of the eleventh switch TR11.

[0193] The first terminal of the eleventh switch TR11 is connected to the second terminal of the sixteenth resistor R16, and the second terminal of the eleventh switch TR11 is connected to the control signal input terminal of the third output module.

[0194] The first end of the fifteenth resistor R15 is connected to the third control signal terminal VCOM_CS, and the second end of the fifteenth resistor R15 is connected to the first end of the twelfth switch TR12.

[0195] The base of the twelfth switch TR12 is connected to the second terminal of the sixteenth resistor R16, and the second terminal of the twelfth switch TR12 is connected to the control signal input terminal of the fourth output module.

[0196] The first end of the sixteenth resistor R16 is connected to the third reference voltage input terminal VDD3_1V8.

[0197] Switches nine, tenth, eleventh, and twelfth can be transistors. These transistors can be N-type or P-type transistors, depending on the specific requirements. The first terminal of each transistor is either the emitter or collector, and the second terminal is either the collector or emitter corresponding to the first terminal. Switch nine (TR9) and switch ten (TR10) are of different types, while switch eleven (TR11) and switch twelfth (TR12) are of the same type. In one example, switch nine (TR9) is an NPN transistor, while switches ten (TR10), eleventh (TR11), and twelfth (TR12) are all PNP transistors.

[0198] In this embodiment of the application, the reference voltage of the first reference voltage input terminal VDD1_3V3 is 3.3V, and the reference voltage of the third reference voltage input terminal VDD3_1V8 is 1.8V.

[0199] The difference between this embodiment and the above embodiments lies in the following aspects: First, both the first and second conversion circuits are controlled by the third control signal terminal VCOM_CS; second, the first and second reference voltages are different voltages (one is 3.3V, and the other is 1.8V). Since 1.8V is the conventional operating voltage, when there is a limited number of chip interfaces providing 3.3V, other solutions can be used to replace it, saving one chip interface providing 3.3V. It is understood that this design is only one embodiment, and the specific reference voltage can be selected according to the user's actual design.

[0200] For the timing diagrams of VCOM_CS, VCOMO, and VCOME in this embodiment of the application, please refer to [link / reference]. Figure 14 .

[0201] In this embodiment, by controlling the input signal of the third control signal terminal VCOM_CS, the first conversion circuit and the second conversion circuit are controlled to realize two sets of VCOM voltage AC outputs to drive the dual VCOM panel, thereby shortening the response time of the liquid crystal display panel.

[0202] This application provides a display panel, see [link]. Figure 15 The display panel includes: gate lines, data lines, pixel array and any of the driving circuits described above, wherein the pixel array includes a first type of pixel and a second type of pixel, and the first type of pixel and the second type of pixel are arranged alternately in the same pixel row;

[0203] The first conversion circuit provides a driving voltage for the second type of pixel, and the second conversion circuit provides a driving voltage for the first type of pixel.

[0204] Figure 15 In the pixel array, "+" pixels correspond to the first type of pixels, and "-" pixels correspond to the second type of pixels. In each row of pixels, the first and second type pixels are arranged alternately. The first type pixels are all connected to VCOME via vias, and the second type pixels are all connected to VCOMO via vias.

[0205] The first conversion circuit outputs VCOMO to provide the driving voltage for the second type of pixels in the pixel array; the second conversion circuit outputs VCOME to provide the driving voltage for the first type of pixels in the pixel array.

[0206] In one possible implementation, see Figure 15 The display panel further includes: multiple first-type voltage lines and multiple second-type voltage lines;

[0207] The output terminal of the first conversion circuit is connected to each of the second type of voltage lines respectively, and the second type of voltage lines provide driving voltage to the second type of pixels.

[0208] The output of the second conversion circuit is connected to each of the first type of voltage lines, and the first type of voltage lines provide driving voltage to the first type of pixels.

[0209] VCOME represents a Class I voltage line, and multiple Class I voltage lines are: VCOME1, VCOME2, VCOME3…VCOMEi…VCOMEn; VCOMO represents a Class II voltage line, and multiple Class II voltage lines are: VCOMO1, VCOMO2, VCOMO3…VCOMOi…VCOMOn.

[0210] The output terminal VCOMO of the first conversion circuit is connected to each of the second type voltage lines (VCOMO1, VCOMO2, VCOMO3…VCOMOi…VCOMOn) to provide driving voltage for the second type of pixels through the second type voltage lines; the output terminal VCOME of the second conversion circuit is connected to each of the first type voltage lines (VCOME1, VCOME2, VCOME3…VCOMEi…VCOMEn) to provide driving voltage for the first type of pixels through the first type voltage lines.

[0211] In this embodiment, two sets of VCOM AC voltage signals are output by the display driving circuit to drive the dual VCOM display panel, thereby shortening the response time of the liquid crystal display panel.

[0212] In one possible implementation, see Figure 16 Each first type of voltage line corresponds to two adjacent rows of pixels, and each second type of voltage line corresponds to two adjacent rows of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type pixel in its corresponding pixel row.

[0213] The display driver circuit outputs two sets of VCOM AC voltage signals to drive the pixel array in a dual-VCOM display panel. Different driving methods can be used for different pixel array architectures. Figure 16 As a driving method, specifically, each first type voltage line VCOME corresponds to two adjacent rows of pixels, and each second type voltage line VCOMO corresponds to two adjacent rows of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type voltage line VCOME is connected to the driving voltage input terminal of the first type pixel (+) in its corresponding pixel row, and the second type voltage line VCOMO is connected to the driving voltage input terminal of the second type pixel (-) in its corresponding pixel row.

[0214] In one possible implementation, see Figure 17 Each first type of voltage line corresponds to a row of pixels, and each second type of voltage line corresponds to a row of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type pixel in its corresponding pixel row.

[0215] Figure 17As a driving method, specifically, each first type voltage line VCOME corresponds to one row of pixels, and each second type voltage line VCOMO corresponds to one row of pixels; all pixels in the same pixel column are either first type pixels (+) or second type pixels (-), wherein the first type voltage line VCOME is connected to the driving voltage input terminal of the first type pixel (+) in its corresponding pixel row, and the second type voltage line VCOMO is connected to the driving voltage input terminal of the second type pixel (-) in its corresponding pixel row.

[0216] In one possible implementation, see Figure 18 Each first type of voltage line corresponds to a row of pixels, and each second type of voltage line corresponds to a row of pixels; in the same pixel column, the first type of pixels and the second type of pixels are arranged alternately, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type of pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type of pixel in its corresponding pixel row.

[0217] Figure 18 As a driving method, specifically, each first-type voltage line VCOME corresponds to one row of pixels, and each second-type voltage line VCOMO corresponds to one row of pixels; first-type pixels (+) and second-type pixels (-) are arranged alternately in the same pixel column, wherein the first-type voltage line VCOME is connected to the driving voltage input terminal of the first-type pixel (+) in its corresponding pixel row, and the second-type voltage line VCOMO is connected to the driving voltage input terminal of the second-type pixel (-) in its corresponding pixel row.

[0218] In this embodiment, two sets of VCOM AC voltage signals are output through the display driving circuit to drive display panels with different architectures of dual VCOM. Different driving methods are used for different architectures. By driving the display panel, the response time of the liquid crystal display panel can be shortened.

[0219] This application provides a display, including any of the display panels described above.

[0220] In one example, see Figure 19 The display includes: a display driver circuit, which is usually integrated on the CPCBA (control printed circuit board). The power management integrated circuit (PMIC) generates a reference voltage and a first voltage signal (VCOML) and a second voltage signal (VCOMH), all of which are DC signals. The logic board (TCON-IC) generates control signals VCOM_CS1 and VCOM_CS2. The display driver circuit generates AC signals VCOMO and VCOME, which are used to act on the pixel array in the display panel through the traces in the GOA (row scan) area of ​​the display panel.

[0221] It should be noted that, in this document, relational terms such as "first" and "second" are used only to distinguish one entity or operation from another, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Furthermore, the terms "comprising," "including," or any other variations thereof are intended to cover non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements includes not only those elements but also other elements not expressly listed, or elements inherent to such a process, method, article, or apparatus. Without further limitations, an element defined by the phrase "comprising one..." does not exclude the presence of other identical elements in the process, method, article, or apparatus that includes said element.

[0222] The various embodiments in this specification are described in a related manner. Each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments can be referred to each other.

[0223] The above description is merely a preferred embodiment of this application and is not intended to limit the scope of protection of this application. Any modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of this application are included within the scope of protection of this application.

Claims

1. A display driving circuit, characterized in that, The display driving circuit includes: A first conversion circuit and a second conversion circuit, wherein the first conversion circuit includes a first control module, a first output module and a second output module, and the second conversion circuit includes a second control module, a third output module and a fourth output module; In the first output cycle, the first control module controls the first output module to output a first voltage signal; the second control module controls the fourth output module to output a second voltage signal. During the second output cycle, the first control module controls the second output module to output a second voltage signal; the second control module controls the third output module to output a first voltage signal.

2. The display driving circuit according to claim 1, characterized in that, The first control module includes a first control unit, a second control unit, and a first reference voltage unit; The first reference voltage unit is used to provide a first reference voltage; The first control unit is used to control the reception of the first reference voltage of the first output module, so as to control the first output module to output a first voltage signal in the first output cycle; The second control unit is used to control the reception of the first reference voltage of the second output module, so as to control the second output module to output a second voltage signal in the second output cycle; And / or, The second control module includes a third control unit, a fourth control unit, and a second reference voltage unit; The second reference voltage unit is used to provide a second reference voltage; The third control unit is used to control the reception of the second reference voltage of the third output module, so as to control the third output module to output the first voltage signal in the second output cycle; The fourth control unit is used to control the reception of the second reference voltage of the fourth output module, so as to control the fourth output module to output the second voltage signal in the first output cycle.

3. The display driving circuit according to claim 2, characterized in that, The first control unit includes a first resistor and a first switch; the second control unit includes a second resistor and a second switch; the first reference voltage unit includes a third resistor; wherein the first switch and the second switch are of different types. The first end of the first resistor is connected to the first control signal terminal, and the second end of the first resistor is connected to the base of the first switch; The first end of the first switch is connected to the second end of the third resistor, and the second end of the first switch is connected to the control signal input terminal of the first output module. The first end of the second resistor is connected to the first control signal terminal, and the second end of the second resistor is connected to the base of the second switch; The first end of the second switch is connected to the second end of the third resistor, and the second end of the second switch is connected to the control signal input terminal of the second output module. The first end of the third resistor is connected to the first reference voltage input terminal; And / or, The third control unit includes a fourth resistor and a third switch; the fourth control unit includes a fifth resistor and a fourth switch; the second reference voltage unit includes a sixth resistor; wherein the third switch and the fourth switch are of different types. The first end of the fourth resistor is connected to the second control signal terminal, and the second end of the fourth resistor is connected to the base of the third switch; The first end of the third switch is connected to the second end of the sixth resistor, and the second end of the third switch is connected to the control signal input end of the third output module. The first end of the fifth resistor is connected to the second control signal terminal, and the second end of the fifth resistor is connected to the base of the fourth switch; The first end of the fourth switch is connected to the second end of the sixth resistor, and the second end of the fourth switch is connected to the control signal input end of the fourth output module. The first end of the sixth resistor is connected to the second reference voltage input terminal.

4. The display driving circuit according to claim 1, characterized in that, The first output module includes a seventh resistor and a fifth switch; the second output module includes an eighth resistor and a sixth switch. The first end of the seventh resistor is connected to the first voltage signal input terminal of the first output module and the first end of the fifth switch, respectively; the second end of the seventh resistor is connected to the control signal input terminal of the first output module and the gate of the fifth switch, respectively; the second end of the fifth switch is connected to the first voltage signal output terminal of the first output module. The second end of the eighth resistor is connected to the second voltage signal input terminal of the second output module and the second end of the sixth switch, respectively; the first end of the eighth resistor is connected to the control signal input terminal of the second output module and the gate of the sixth switch, respectively; the first end of the sixth switch is connected to the second voltage signal output terminal of the second output module. The first voltage signal output terminal of the first output module is connected to the output terminal of the first conversion circuit; The second voltage signal output terminal of the second output module is connected to the output terminal of the first conversion circuit; And / or, The third output module includes a ninth resistor and a seventh switch; the fourth output module includes a tenth resistor and an eighth switch. The first end of the ninth resistor is connected to the first voltage signal input terminal of the third output module and the first end of the seventh switch, respectively; the second end of the ninth resistor is connected to the control signal input terminal of the third output module and the gate of the seventh switch, respectively; the second end of the seventh switch is connected to the first voltage signal output terminal of the third output module. The second end of the tenth resistor is connected to the second voltage signal input terminal of the fourth output module and the second end of the eighth switch, respectively; the first end of the tenth resistor is connected to the control signal input terminal of the fourth output module and the gate of the eighth switch, respectively; the first end of the eighth switch is connected to the second voltage signal output terminal of the fourth output module. The first voltage signal output terminal of the third output module is connected to the output terminal of the second conversion circuit. The second voltage signal output terminal of the fourth output module is connected to the output terminal of the second conversion circuit.

5. The display driving circuit according to claim 4, characterized in that, The second output module further includes a first capacitor and a second capacitor, wherein the first capacitor and the second capacitor are connected in parallel between the second voltage signal output terminal of the second output module and ground; And / or, The fourth output module also includes a third capacitor and a fourth capacitor, which are connected in parallel between the second voltage signal output terminal of the fourth output module and ground.

6. The display driving circuit according to claim 3, characterized in that, The first switch is of the same type as the third switch, and the second switch is of the same type as the fourth switch; During the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with opposite high and low levels.

7. The display driving circuit according to claim 6, characterized in that, The display driver circuit also includes a power management integrated circuit and a logic board; The power management integrated circuit is used to provide a first voltage signal to the first output module and the third output module, a second voltage signal to the second output module and the fourth output module, a first reference voltage to the first reference voltage input terminal, and a second reference voltage to the second reference voltage input terminal; The logic board is configured to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in the same output cycle; and to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in two adjacent output cycles.

8. The display driving circuit according to claim 3, characterized in that, The first switch is of a different type than the third switch, and the second switch is of a different type than the fourth switch; During the same output cycle, the first control signal terminal and the second control signal terminal input voltage signals with the same high and low levels.

9. The display driving circuit according to claim 8, characterized in that, The display driver circuit also includes a power management integrated circuit and a logic board; The power management integrated circuit is used to provide a first voltage signal to the first output module and the third output module, a second voltage signal to the second output module and the fourth output module, a first reference voltage to the first reference voltage input terminal, and a second reference voltage to the second reference voltage input terminal; The logic board is configured to provide voltage signals with the same high and low levels to the first control signal terminal and the second control signal terminal in the same output cycle; and to provide voltage signals with opposite high and low levels to the first control signal terminal and the second control signal terminal in two adjacent output cycles.

10. The display driving circuit according to claim 2, characterized in that, The first control unit includes an eleventh resistor and a ninth switch; the second control unit includes a twelfth resistor and a tenth switch; the first reference voltage unit includes a thirteenth resistor; wherein the ninth switch and the tenth switch are of different types. The first end of the eleventh resistor is connected to the third control signal terminal, and the second end of the eleventh resistor is connected to the base of the ninth switch. The first end of the ninth switch is connected to the second end of the thirteenth resistor, and the second end of the ninth switch is connected to the control signal input end of the first output module. The first end of the twelfth resistor is connected to the third control signal terminal, and the second end of the twelfth resistor is connected to the base of the tenth switch; The first end of the tenth switch is connected to the second end of the thirteenth resistor, and the second end of the tenth switch is connected to the control signal input end of the second output module. The first end of the thirteenth resistor is connected to the first reference voltage input terminal; And / or, The third control unit includes a fourteenth resistor and an eleventh switch; the fourth control unit includes a fifteenth resistor and a twelfth switch; and the second reference voltage unit includes a sixteenth resistor, wherein the eleventh switch and the twelfth switch are of the same type. The first end of the fourteenth resistor is connected to the third control signal terminal, and the second end of the fourteenth resistor is connected to the base of the eleventh switch. The first end of the eleventh switch is connected to the second end of the sixteenth resistor, and the second end of the eleventh switch is connected to the control signal input end of the third output module. The first end of the fifteenth resistor is connected to the third control signal terminal, and the second end of the fifteenth resistor is connected to the first end of the twelfth switch. The base of the twelfth switch is connected to the second terminal of the sixteenth resistor, and the second terminal of the twelfth switch is connected to the control signal input terminal of the fourth output module. The first terminal of the sixteenth resistor is connected to the third reference voltage input terminal.

11. A display panel, characterized in that, The display panel includes: gate lines, data lines, pixel array, and display driving circuit according to any one of claims 1-10, wherein the pixel array includes a first type of pixel and a second type of pixel, and the first type of pixel and the second type of pixel are arranged alternately in the same pixel row; The first conversion circuit provides a driving voltage for the second type of pixel, and the second conversion circuit provides a driving voltage for the first type of pixel.

12. The display panel according to claim 11, characterized in that, The display panel also includes: multiple first-class voltage lines and multiple second-class voltage lines; The output terminal of the first conversion circuit is connected to each of the second type of voltage lines, and the second type of voltage lines provide driving voltage to the second type of pixels. The output of the second conversion circuit is connected to each of the first type of voltage lines, and the first type of voltage lines provide driving voltage to the first type of pixels.

13. The display panel according to claim 12, characterized in that, Each first type voltage line corresponds to two adjacent rows of pixels, and each second type voltage line corresponds to two adjacent rows of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type voltage line is connected to the driving voltage input terminal of the first type pixel in its corresponding pixel row, and the second type voltage line is connected to the driving voltage input terminal of the second type pixel in its corresponding pixel row.

14. The display panel according to claim 12, characterized in that, Each first type of voltage line corresponds to a row of pixels, and each second type of voltage line corresponds to a row of pixels; all pixels in the same pixel column are either first type pixels or second type pixels, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type pixel in its corresponding pixel row.

15. The display panel according to claim 12, characterized in that, Each first type of voltage line corresponds to a row of pixels, and each second type of voltage line corresponds to a row of pixels; in the same pixel column, the first type of pixels and the second type of pixels are arranged alternately, wherein the first type of voltage line is connected to the driving voltage input terminal of the first type of pixel in its corresponding pixel row, and the second type of voltage line is connected to the driving voltage input terminal of the second type of pixel in its corresponding pixel row.

16. A display, characterized in that, Includes the display panel described in any one of claims 11-15.

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